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Commit | Line | Data |
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9e60fdcf | 1 | /* |
c103de24 | 2 | * PCA953x 4/8/16 bit I/O ports |
9e60fdcf | 3 | * |
4 | * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> | |
5 | * Copyright (C) 2007 Marvell International Ltd. | |
6 | * | |
7 | * Derived from drivers/i2c/chips/pca9539.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; version 2 of the License. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/init.h> | |
d120c17f | 16 | #include <linux/gpio.h> |
89ea8bbe MZ |
17 | #include <linux/interrupt.h> |
18 | #include <linux/irq.h> | |
9e60fdcf | 19 | #include <linux/i2c.h> |
d1c057e3 | 20 | #include <linux/i2c/pca953x.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1965d303 NC |
22 | #ifdef CONFIG_OF_GPIO |
23 | #include <linux/of_platform.h> | |
1965d303 | 24 | #endif |
9e60fdcf | 25 | |
33226ffd HZ |
26 | #define PCA953X_INPUT 0 |
27 | #define PCA953X_OUTPUT 1 | |
28 | #define PCA953X_INVERT 2 | |
29 | #define PCA953X_DIRECTION 3 | |
30 | ||
ae79c190 AS |
31 | #define REG_ADDR_AI 0x80 |
32 | ||
33226ffd HZ |
33 | #define PCA957X_IN 0 |
34 | #define PCA957X_INVRT 1 | |
35 | #define PCA957X_BKEN 2 | |
36 | #define PCA957X_PUPD 3 | |
37 | #define PCA957X_CFG 4 | |
38 | #define PCA957X_OUT 5 | |
39 | #define PCA957X_MSK 6 | |
40 | #define PCA957X_INTS 7 | |
41 | ||
42 | #define PCA_GPIO_MASK 0x00FF | |
43 | #define PCA_INT 0x0100 | |
44 | #define PCA953X_TYPE 0x1000 | |
45 | #define PCA957X_TYPE 0x2000 | |
89ea8bbe | 46 | |
3760f736 | 47 | static const struct i2c_device_id pca953x_id[] = { |
33226ffd HZ |
48 | { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
49 | { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, | |
50 | { "pca9536", 4 | PCA953X_TYPE, }, | |
51 | { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, | |
52 | { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, | |
53 | { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, | |
54 | { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, | |
55 | { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, | |
56 | { "pca9556", 8 | PCA953X_TYPE, }, | |
57 | { "pca9557", 8 | PCA953X_TYPE, }, | |
58 | { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, | |
59 | { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, | |
60 | ||
61 | { "max7310", 8 | PCA953X_TYPE, }, | |
62 | { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, | |
63 | { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, | |
64 | { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, | |
65 | { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, | |
66 | { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, | |
67 | { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, | |
ae79c190 | 68 | { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, |
3760f736 | 69 | { } |
f5e8ff48 | 70 | }; |
3760f736 | 71 | MODULE_DEVICE_TABLE(i2c, pca953x_id); |
9e60fdcf | 72 | |
f3dc3630 | 73 | struct pca953x_chip { |
9e60fdcf | 74 | unsigned gpio_start; |
ae79c190 AS |
75 | u32 reg_output; |
76 | u32 reg_direction; | |
6e20fb18 | 77 | struct mutex i2c_lock; |
9e60fdcf | 78 | |
89ea8bbe MZ |
79 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
80 | struct mutex irq_lock; | |
81 | uint16_t irq_mask; | |
82 | uint16_t irq_stat; | |
83 | uint16_t irq_trig_raise; | |
84 | uint16_t irq_trig_fall; | |
85 | int irq_base; | |
86 | #endif | |
87 | ||
9e60fdcf | 88 | struct i2c_client *client; |
89 | struct gpio_chip gpio_chip; | |
62154991 | 90 | const char *const *names; |
33226ffd | 91 | int chip_type; |
9e60fdcf | 92 | }; |
93 | ||
ae79c190 | 94 | static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val) |
9e60fdcf | 95 | { |
33226ffd | 96 | int ret = 0; |
f5e8ff48 GL |
97 | |
98 | if (chip->gpio_chip.ngpio <= 8) | |
99 | ret = i2c_smbus_write_byte_data(chip->client, reg, val); | |
ae79c190 AS |
100 | else if (chip->gpio_chip.ngpio == 24) { |
101 | ret = i2c_smbus_write_word_data(chip->client, | |
102 | (reg << 2) | REG_ADDR_AI, | |
103 | val & 0xffff); | |
104 | ret = i2c_smbus_write_byte_data(chip->client, | |
105 | (reg << 2) + 2, | |
106 | (val & 0xff0000) >> 16); | |
107 | } | |
33226ffd HZ |
108 | else { |
109 | switch (chip->chip_type) { | |
110 | case PCA953X_TYPE: | |
111 | ret = i2c_smbus_write_word_data(chip->client, | |
112 | reg << 1, val); | |
113 | break; | |
114 | case PCA957X_TYPE: | |
115 | ret = i2c_smbus_write_byte_data(chip->client, reg << 1, | |
116 | val & 0xff); | |
117 | if (ret < 0) | |
118 | break; | |
119 | ret = i2c_smbus_write_byte_data(chip->client, | |
120 | (reg << 1) + 1, | |
121 | (val & 0xff00) >> 8); | |
122 | break; | |
123 | } | |
124 | } | |
f5e8ff48 GL |
125 | |
126 | if (ret < 0) { | |
127 | dev_err(&chip->client->dev, "failed writing register\n"); | |
ab5dc372 | 128 | return ret; |
f5e8ff48 GL |
129 | } |
130 | ||
131 | return 0; | |
9e60fdcf | 132 | } |
133 | ||
ae79c190 | 134 | static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val) |
9e60fdcf | 135 | { |
136 | int ret; | |
137 | ||
f5e8ff48 GL |
138 | if (chip->gpio_chip.ngpio <= 8) |
139 | ret = i2c_smbus_read_byte_data(chip->client, reg); | |
ae79c190 AS |
140 | else if (chip->gpio_chip.ngpio == 24) { |
141 | ret = i2c_smbus_read_word_data(chip->client, reg << 2); | |
142 | ret |= (i2c_smbus_read_byte_data(chip->client, | |
143 | (reg << 2) + 2)<<16); | |
144 | } | |
f5e8ff48 GL |
145 | else |
146 | ret = i2c_smbus_read_word_data(chip->client, reg << 1); | |
147 | ||
9e60fdcf | 148 | if (ret < 0) { |
149 | dev_err(&chip->client->dev, "failed reading register\n"); | |
ab5dc372 | 150 | return ret; |
9e60fdcf | 151 | } |
152 | ||
ae79c190 | 153 | *val = (u32)ret; |
9e60fdcf | 154 | return 0; |
155 | } | |
156 | ||
f3dc3630 | 157 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
9e60fdcf | 158 | { |
f3dc3630 | 159 | struct pca953x_chip *chip; |
ae79c190 | 160 | uint reg_val; |
33226ffd | 161 | int ret, offset = 0; |
9e60fdcf | 162 | |
f3dc3630 | 163 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 164 | |
6e20fb18 | 165 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 166 | reg_val = chip->reg_direction | (1u << off); |
33226ffd HZ |
167 | |
168 | switch (chip->chip_type) { | |
169 | case PCA953X_TYPE: | |
170 | offset = PCA953X_DIRECTION; | |
171 | break; | |
172 | case PCA957X_TYPE: | |
173 | offset = PCA957X_CFG; | |
174 | break; | |
175 | } | |
176 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 177 | if (ret) |
6e20fb18 | 178 | goto exit; |
9e60fdcf | 179 | |
180 | chip->reg_direction = reg_val; | |
6e20fb18 RS |
181 | ret = 0; |
182 | exit: | |
183 | mutex_unlock(&chip->i2c_lock); | |
184 | return ret; | |
9e60fdcf | 185 | } |
186 | ||
f3dc3630 | 187 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
9e60fdcf | 188 | unsigned off, int val) |
189 | { | |
f3dc3630 | 190 | struct pca953x_chip *chip; |
ae79c190 | 191 | uint reg_val; |
33226ffd | 192 | int ret, offset = 0; |
9e60fdcf | 193 | |
f3dc3630 | 194 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 195 | |
6e20fb18 | 196 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 197 | /* set output level */ |
198 | if (val) | |
199 | reg_val = chip->reg_output | (1u << off); | |
200 | else | |
201 | reg_val = chip->reg_output & ~(1u << off); | |
202 | ||
33226ffd HZ |
203 | switch (chip->chip_type) { |
204 | case PCA953X_TYPE: | |
205 | offset = PCA953X_OUTPUT; | |
206 | break; | |
207 | case PCA957X_TYPE: | |
208 | offset = PCA957X_OUT; | |
209 | break; | |
210 | } | |
211 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 212 | if (ret) |
6e20fb18 | 213 | goto exit; |
9e60fdcf | 214 | |
215 | chip->reg_output = reg_val; | |
216 | ||
217 | /* then direction */ | |
218 | reg_val = chip->reg_direction & ~(1u << off); | |
33226ffd HZ |
219 | switch (chip->chip_type) { |
220 | case PCA953X_TYPE: | |
221 | offset = PCA953X_DIRECTION; | |
222 | break; | |
223 | case PCA957X_TYPE: | |
224 | offset = PCA957X_CFG; | |
225 | break; | |
226 | } | |
227 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 228 | if (ret) |
6e20fb18 | 229 | goto exit; |
9e60fdcf | 230 | |
231 | chip->reg_direction = reg_val; | |
6e20fb18 RS |
232 | ret = 0; |
233 | exit: | |
234 | mutex_unlock(&chip->i2c_lock); | |
235 | return ret; | |
9e60fdcf | 236 | } |
237 | ||
f3dc3630 | 238 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
9e60fdcf | 239 | { |
f3dc3630 | 240 | struct pca953x_chip *chip; |
ae79c190 | 241 | u32 reg_val; |
33226ffd | 242 | int ret, offset = 0; |
9e60fdcf | 243 | |
f3dc3630 | 244 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 245 | |
6e20fb18 | 246 | mutex_lock(&chip->i2c_lock); |
33226ffd HZ |
247 | switch (chip->chip_type) { |
248 | case PCA953X_TYPE: | |
249 | offset = PCA953X_INPUT; | |
250 | break; | |
251 | case PCA957X_TYPE: | |
252 | offset = PCA957X_IN; | |
253 | break; | |
254 | } | |
255 | ret = pca953x_read_reg(chip, offset, ®_val); | |
6e20fb18 | 256 | mutex_unlock(&chip->i2c_lock); |
9e60fdcf | 257 | if (ret < 0) { |
258 | /* NOTE: diagnostic already emitted; that's all we should | |
259 | * do unless gpio_*_value_cansleep() calls become different | |
260 | * from their nonsleeping siblings (and report faults). | |
261 | */ | |
262 | return 0; | |
263 | } | |
264 | ||
265 | return (reg_val & (1u << off)) ? 1 : 0; | |
266 | } | |
267 | ||
f3dc3630 | 268 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
9e60fdcf | 269 | { |
f3dc3630 | 270 | struct pca953x_chip *chip; |
ae79c190 | 271 | u32 reg_val; |
33226ffd | 272 | int ret, offset = 0; |
9e60fdcf | 273 | |
f3dc3630 | 274 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
9e60fdcf | 275 | |
6e20fb18 | 276 | mutex_lock(&chip->i2c_lock); |
9e60fdcf | 277 | if (val) |
278 | reg_val = chip->reg_output | (1u << off); | |
279 | else | |
280 | reg_val = chip->reg_output & ~(1u << off); | |
281 | ||
33226ffd HZ |
282 | switch (chip->chip_type) { |
283 | case PCA953X_TYPE: | |
284 | offset = PCA953X_OUTPUT; | |
285 | break; | |
286 | case PCA957X_TYPE: | |
287 | offset = PCA957X_OUT; | |
288 | break; | |
289 | } | |
290 | ret = pca953x_write_reg(chip, offset, reg_val); | |
9e60fdcf | 291 | if (ret) |
6e20fb18 | 292 | goto exit; |
9e60fdcf | 293 | |
294 | chip->reg_output = reg_val; | |
6e20fb18 RS |
295 | exit: |
296 | mutex_unlock(&chip->i2c_lock); | |
9e60fdcf | 297 | } |
298 | ||
f5e8ff48 | 299 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
9e60fdcf | 300 | { |
301 | struct gpio_chip *gc; | |
302 | ||
303 | gc = &chip->gpio_chip; | |
304 | ||
f3dc3630 GL |
305 | gc->direction_input = pca953x_gpio_direction_input; |
306 | gc->direction_output = pca953x_gpio_direction_output; | |
307 | gc->get = pca953x_gpio_get_value; | |
308 | gc->set = pca953x_gpio_set_value; | |
84207805 | 309 | gc->can_sleep = 1; |
9e60fdcf | 310 | |
311 | gc->base = chip->gpio_start; | |
f5e8ff48 GL |
312 | gc->ngpio = gpios; |
313 | gc->label = chip->client->name; | |
d8f388d8 | 314 | gc->dev = &chip->client->dev; |
d72cbed0 | 315 | gc->owner = THIS_MODULE; |
77906a54 | 316 | gc->names = chip->names; |
9e60fdcf | 317 | } |
318 | ||
89ea8bbe MZ |
319 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
320 | static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off) | |
321 | { | |
322 | struct pca953x_chip *chip; | |
323 | ||
324 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | |
325 | return chip->irq_base + off; | |
326 | } | |
327 | ||
6f5cfc0e | 328 | static void pca953x_irq_mask(struct irq_data *d) |
89ea8bbe | 329 | { |
6f5cfc0e | 330 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe | 331 | |
6f5cfc0e | 332 | chip->irq_mask &= ~(1 << (d->irq - chip->irq_base)); |
89ea8bbe MZ |
333 | } |
334 | ||
6f5cfc0e | 335 | static void pca953x_irq_unmask(struct irq_data *d) |
89ea8bbe | 336 | { |
6f5cfc0e | 337 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe | 338 | |
6f5cfc0e | 339 | chip->irq_mask |= 1 << (d->irq - chip->irq_base); |
89ea8bbe MZ |
340 | } |
341 | ||
6f5cfc0e | 342 | static void pca953x_irq_bus_lock(struct irq_data *d) |
89ea8bbe | 343 | { |
6f5cfc0e | 344 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
89ea8bbe MZ |
345 | |
346 | mutex_lock(&chip->irq_lock); | |
347 | } | |
348 | ||
6f5cfc0e | 349 | static void pca953x_irq_bus_sync_unlock(struct irq_data *d) |
89ea8bbe | 350 | { |
6f5cfc0e | 351 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
a2cb9aeb MZ |
352 | uint16_t new_irqs; |
353 | uint16_t level; | |
354 | ||
355 | /* Look for any newly setup interrupt */ | |
356 | new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; | |
357 | new_irqs &= ~chip->reg_direction; | |
358 | ||
359 | while (new_irqs) { | |
360 | level = __ffs(new_irqs); | |
361 | pca953x_gpio_direction_input(&chip->gpio_chip, level); | |
362 | new_irqs &= ~(1 << level); | |
363 | } | |
89ea8bbe MZ |
364 | |
365 | mutex_unlock(&chip->irq_lock); | |
366 | } | |
367 | ||
6f5cfc0e | 368 | static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) |
89ea8bbe | 369 | { |
6f5cfc0e LB |
370 | struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); |
371 | uint16_t level = d->irq - chip->irq_base; | |
89ea8bbe MZ |
372 | uint16_t mask = 1 << level; |
373 | ||
374 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
375 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
6f5cfc0e | 376 | d->irq, type); |
89ea8bbe MZ |
377 | return -EINVAL; |
378 | } | |
379 | ||
380 | if (type & IRQ_TYPE_EDGE_FALLING) | |
381 | chip->irq_trig_fall |= mask; | |
382 | else | |
383 | chip->irq_trig_fall &= ~mask; | |
384 | ||
385 | if (type & IRQ_TYPE_EDGE_RISING) | |
386 | chip->irq_trig_raise |= mask; | |
387 | else | |
388 | chip->irq_trig_raise &= ~mask; | |
389 | ||
a2cb9aeb | 390 | return 0; |
89ea8bbe MZ |
391 | } |
392 | ||
393 | static struct irq_chip pca953x_irq_chip = { | |
394 | .name = "pca953x", | |
6f5cfc0e LB |
395 | .irq_mask = pca953x_irq_mask, |
396 | .irq_unmask = pca953x_irq_unmask, | |
397 | .irq_bus_lock = pca953x_irq_bus_lock, | |
398 | .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, | |
399 | .irq_set_type = pca953x_irq_set_type, | |
89ea8bbe MZ |
400 | }; |
401 | ||
402 | static uint16_t pca953x_irq_pending(struct pca953x_chip *chip) | |
403 | { | |
ae79c190 | 404 | u32 cur_stat; |
89ea8bbe MZ |
405 | uint16_t old_stat; |
406 | uint16_t pending; | |
407 | uint16_t trigger; | |
33226ffd HZ |
408 | int ret, offset = 0; |
409 | ||
410 | switch (chip->chip_type) { | |
411 | case PCA953X_TYPE: | |
412 | offset = PCA953X_INPUT; | |
413 | break; | |
414 | case PCA957X_TYPE: | |
415 | offset = PCA957X_IN; | |
416 | break; | |
417 | } | |
418 | ret = pca953x_read_reg(chip, offset, &cur_stat); | |
89ea8bbe MZ |
419 | if (ret) |
420 | return 0; | |
421 | ||
422 | /* Remove output pins from the equation */ | |
423 | cur_stat &= chip->reg_direction; | |
424 | ||
425 | old_stat = chip->irq_stat; | |
426 | trigger = (cur_stat ^ old_stat) & chip->irq_mask; | |
427 | ||
428 | if (!trigger) | |
429 | return 0; | |
430 | ||
431 | chip->irq_stat = cur_stat; | |
432 | ||
433 | pending = (old_stat & chip->irq_trig_fall) | | |
434 | (cur_stat & chip->irq_trig_raise); | |
435 | pending &= trigger; | |
436 | ||
437 | return pending; | |
438 | } | |
439 | ||
440 | static irqreturn_t pca953x_irq_handler(int irq, void *devid) | |
441 | { | |
442 | struct pca953x_chip *chip = devid; | |
443 | uint16_t pending; | |
444 | uint16_t level; | |
445 | ||
446 | pending = pca953x_irq_pending(chip); | |
447 | ||
448 | if (!pending) | |
449 | return IRQ_HANDLED; | |
450 | ||
451 | do { | |
452 | level = __ffs(pending); | |
6dd599f8 | 453 | handle_nested_irq(level + chip->irq_base); |
89ea8bbe MZ |
454 | |
455 | pending &= ~(1 << level); | |
456 | } while (pending); | |
457 | ||
458 | return IRQ_HANDLED; | |
459 | } | |
460 | ||
461 | static int pca953x_irq_setup(struct pca953x_chip *chip, | |
c6dcf592 DJ |
462 | const struct i2c_device_id *id, |
463 | int irq_base) | |
89ea8bbe MZ |
464 | { |
465 | struct i2c_client *client = chip->client; | |
33226ffd | 466 | int ret, offset = 0; |
ae79c190 | 467 | u32 temporary; |
89ea8bbe | 468 | |
c6dcf592 | 469 | if (irq_base != -1 |
33226ffd | 470 | && (id->driver_data & PCA_INT)) { |
89ea8bbe MZ |
471 | int lvl; |
472 | ||
33226ffd HZ |
473 | switch (chip->chip_type) { |
474 | case PCA953X_TYPE: | |
475 | offset = PCA953X_INPUT; | |
476 | break; | |
477 | case PCA957X_TYPE: | |
478 | offset = PCA957X_IN; | |
479 | break; | |
480 | } | |
ae79c190 AS |
481 | ret = pca953x_read_reg(chip, offset, &temporary); |
482 | chip->irq_stat = temporary; | |
89ea8bbe MZ |
483 | if (ret) |
484 | goto out_failed; | |
485 | ||
486 | /* | |
487 | * There is no way to know which GPIO line generated the | |
488 | * interrupt. We have to rely on the previous read for | |
489 | * this purpose. | |
490 | */ | |
491 | chip->irq_stat &= chip->reg_direction; | |
89ea8bbe MZ |
492 | mutex_init(&chip->irq_lock); |
493 | ||
c6dcf592 | 494 | chip->irq_base = irq_alloc_descs(-1, irq_base, chip->gpio_chip.ngpio, -1); |
910c8fb6 DJ |
495 | if (chip->irq_base < 0) |
496 | goto out_failed; | |
497 | ||
89ea8bbe MZ |
498 | for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) { |
499 | int irq = lvl + chip->irq_base; | |
500 | ||
910c8fb6 | 501 | irq_clear_status_flags(irq, IRQ_NOREQUEST); |
b51804bc | 502 | irq_set_chip_data(irq, chip); |
6dd599f8 DJ |
503 | irq_set_chip(irq, &pca953x_irq_chip); |
504 | irq_set_nested_thread(irq, true); | |
89ea8bbe MZ |
505 | #ifdef CONFIG_ARM |
506 | set_irq_flags(irq, IRQF_VALID); | |
507 | #else | |
b51804bc | 508 | irq_set_noprobe(irq); |
89ea8bbe MZ |
509 | #endif |
510 | } | |
511 | ||
512 | ret = request_threaded_irq(client->irq, | |
513 | NULL, | |
514 | pca953x_irq_handler, | |
17e8b42c | 515 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
89ea8bbe MZ |
516 | dev_name(&client->dev), chip); |
517 | if (ret) { | |
518 | dev_err(&client->dev, "failed to request irq %d\n", | |
519 | client->irq); | |
520 | goto out_failed; | |
521 | } | |
522 | ||
523 | chip->gpio_chip.to_irq = pca953x_gpio_to_irq; | |
524 | } | |
525 | ||
526 | return 0; | |
527 | ||
528 | out_failed: | |
8a233f01 | 529 | chip->irq_base = -1; |
89ea8bbe MZ |
530 | return ret; |
531 | } | |
532 | ||
533 | static void pca953x_irq_teardown(struct pca953x_chip *chip) | |
534 | { | |
c609c05d DJ |
535 | if (chip->irq_base != -1) { |
536 | irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio); | |
89ea8bbe | 537 | free_irq(chip->client->irq, chip); |
c609c05d | 538 | } |
89ea8bbe MZ |
539 | } |
540 | #else /* CONFIG_GPIO_PCA953X_IRQ */ | |
541 | static int pca953x_irq_setup(struct pca953x_chip *chip, | |
c6dcf592 DJ |
542 | const struct i2c_device_id *id, |
543 | int irq_base) | |
89ea8bbe MZ |
544 | { |
545 | struct i2c_client *client = chip->client; | |
89ea8bbe | 546 | |
c6dcf592 | 547 | if (irq_base != -1 && (id->driver_data & PCA_INT)) |
89ea8bbe MZ |
548 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static void pca953x_irq_teardown(struct pca953x_chip *chip) | |
554 | { | |
555 | } | |
556 | #endif | |
557 | ||
1965d303 NC |
558 | /* |
559 | * Handlers for alternative sources of platform_data | |
560 | */ | |
561 | #ifdef CONFIG_OF_GPIO | |
562 | /* | |
563 | * Translate OpenFirmware node properties into platform_data | |
a57339b4 | 564 | * WARNING: This is DEPRECATED and will be removed eventually! |
1965d303 | 565 | */ |
404ba2b8 | 566 | static void |
c6dcf592 | 567 | pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert) |
1965d303 | 568 | { |
1965d303 | 569 | struct device_node *node; |
1648237d DE |
570 | const __be32 *val; |
571 | int size; | |
1965d303 | 572 | |
61c7a080 | 573 | node = client->dev.of_node; |
1965d303 | 574 | if (node == NULL) |
c6dcf592 | 575 | return; |
1965d303 | 576 | |
c6dcf592 | 577 | *gpio_base = -1; |
1648237d | 578 | val = of_get_property(node, "linux,gpio-base", &size); |
a57339b4 | 579 | WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__); |
1965d303 | 580 | if (val) { |
1648237d DE |
581 | if (size != sizeof(*val)) |
582 | dev_warn(&client->dev, "%s: wrong linux,gpio-base\n", | |
583 | node->full_name); | |
1965d303 | 584 | else |
c6dcf592 | 585 | *gpio_base = be32_to_cpup(val); |
1965d303 NC |
586 | } |
587 | ||
588 | val = of_get_property(node, "polarity", NULL); | |
a57339b4 | 589 | WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__); |
1965d303 | 590 | if (val) |
c6dcf592 | 591 | *invert = *val; |
1965d303 NC |
592 | } |
593 | #else | |
404ba2b8 | 594 | static void |
c6dcf592 | 595 | pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert) |
1965d303 | 596 | { |
25fcf2b7 | 597 | *gpio_base = -1; |
1965d303 NC |
598 | } |
599 | #endif | |
600 | ||
33226ffd HZ |
601 | static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert) |
602 | { | |
603 | int ret; | |
604 | ||
605 | ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); | |
606 | if (ret) | |
607 | goto out; | |
608 | ||
609 | ret = pca953x_read_reg(chip, PCA953X_DIRECTION, | |
610 | &chip->reg_direction); | |
611 | if (ret) | |
612 | goto out; | |
613 | ||
614 | /* set platform specific polarity inversion */ | |
615 | ret = pca953x_write_reg(chip, PCA953X_INVERT, invert); | |
33226ffd HZ |
616 | out: |
617 | return ret; | |
618 | } | |
619 | ||
620 | static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert) | |
621 | { | |
622 | int ret; | |
ae79c190 | 623 | u32 val = 0; |
33226ffd HZ |
624 | |
625 | /* Let every port in proper state, that could save power */ | |
626 | pca953x_write_reg(chip, PCA957X_PUPD, 0x0); | |
627 | pca953x_write_reg(chip, PCA957X_CFG, 0xffff); | |
628 | pca953x_write_reg(chip, PCA957X_OUT, 0x0); | |
629 | ||
630 | ret = pca953x_read_reg(chip, PCA957X_IN, &val); | |
631 | if (ret) | |
632 | goto out; | |
633 | ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output); | |
634 | if (ret) | |
635 | goto out; | |
636 | ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction); | |
637 | if (ret) | |
638 | goto out; | |
639 | ||
640 | /* set platform specific polarity inversion */ | |
641 | pca953x_write_reg(chip, PCA957X_INVRT, invert); | |
642 | ||
643 | /* To enable register 6, 7 to controll pull up and pull down */ | |
644 | pca953x_write_reg(chip, PCA957X_BKEN, 0x202); | |
645 | ||
646 | return 0; | |
647 | out: | |
648 | return ret; | |
649 | } | |
650 | ||
d2653e92 | 651 | static int __devinit pca953x_probe(struct i2c_client *client, |
3760f736 | 652 | const struct i2c_device_id *id) |
9e60fdcf | 653 | { |
f3dc3630 GL |
654 | struct pca953x_platform_data *pdata; |
655 | struct pca953x_chip *chip; | |
a57339b4 | 656 | int irq_base=0, invert=0; |
7ea2aa20 | 657 | int ret; |
9e60fdcf | 658 | |
1965d303 NC |
659 | chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); |
660 | if (chip == NULL) | |
661 | return -ENOMEM; | |
662 | ||
9e60fdcf | 663 | pdata = client->dev.platform_data; |
c6dcf592 DJ |
664 | if (pdata) { |
665 | irq_base = pdata->irq_base; | |
666 | chip->gpio_start = pdata->gpio_base; | |
667 | invert = pdata->invert; | |
668 | chip->names = pdata->names; | |
669 | } else { | |
670 | pca953x_get_alt_pdata(client, &chip->gpio_start, &invert); | |
a57339b4 DJ |
671 | #ifdef CONFIG_OF_GPIO |
672 | /* If I2C node has no interrupts property, disable GPIO interrupts */ | |
673 | if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL) | |
674 | irq_base = -1; | |
675 | #endif | |
1965d303 | 676 | } |
9e60fdcf | 677 | |
678 | chip->client = client; | |
679 | ||
33226ffd | 680 | chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); |
77906a54 | 681 | |
6e20fb18 RS |
682 | mutex_init(&chip->i2c_lock); |
683 | ||
9e60fdcf | 684 | /* initialize cached registers from their original values. |
685 | * we can't share this chip with another i2c master. | |
686 | */ | |
33226ffd | 687 | pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); |
f5e8ff48 | 688 | |
33226ffd | 689 | if (chip->chip_type == PCA953X_TYPE) |
7ea2aa20 | 690 | ret = device_pca953x_init(chip, invert); |
33226ffd | 691 | else |
7ea2aa20 WS |
692 | ret = device_pca957x_init(chip, invert); |
693 | if (ret) | |
9e60fdcf | 694 | goto out_failed; |
695 | ||
c6dcf592 | 696 | ret = pca953x_irq_setup(chip, id, irq_base); |
89ea8bbe MZ |
697 | if (ret) |
698 | goto out_failed; | |
f5e8ff48 GL |
699 | |
700 | ret = gpiochip_add(&chip->gpio_chip); | |
9e60fdcf | 701 | if (ret) |
272df502 | 702 | goto out_failed_irq; |
9e60fdcf | 703 | |
c6dcf592 | 704 | if (pdata && pdata->setup) { |
9e60fdcf | 705 | ret = pdata->setup(client, chip->gpio_chip.base, |
706 | chip->gpio_chip.ngpio, pdata->context); | |
707 | if (ret < 0) | |
708 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
709 | } | |
710 | ||
711 | i2c_set_clientdata(client, chip); | |
712 | return 0; | |
713 | ||
272df502 | 714 | out_failed_irq: |
89ea8bbe | 715 | pca953x_irq_teardown(chip); |
272df502 | 716 | out_failed: |
9e60fdcf | 717 | kfree(chip); |
718 | return ret; | |
719 | } | |
720 | ||
f3dc3630 | 721 | static int pca953x_remove(struct i2c_client *client) |
9e60fdcf | 722 | { |
f3dc3630 GL |
723 | struct pca953x_platform_data *pdata = client->dev.platform_data; |
724 | struct pca953x_chip *chip = i2c_get_clientdata(client); | |
9e60fdcf | 725 | int ret = 0; |
726 | ||
c6dcf592 | 727 | if (pdata && pdata->teardown) { |
9e60fdcf | 728 | ret = pdata->teardown(client, chip->gpio_chip.base, |
729 | chip->gpio_chip.ngpio, pdata->context); | |
730 | if (ret < 0) { | |
731 | dev_err(&client->dev, "%s failed, %d\n", | |
732 | "teardown", ret); | |
733 | return ret; | |
734 | } | |
735 | } | |
736 | ||
737 | ret = gpiochip_remove(&chip->gpio_chip); | |
738 | if (ret) { | |
739 | dev_err(&client->dev, "%s failed, %d\n", | |
740 | "gpiochip_remove()", ret); | |
741 | return ret; | |
742 | } | |
743 | ||
89ea8bbe | 744 | pca953x_irq_teardown(chip); |
9e60fdcf | 745 | kfree(chip); |
746 | return 0; | |
747 | } | |
748 | ||
f3dc3630 | 749 | static struct i2c_driver pca953x_driver = { |
9e60fdcf | 750 | .driver = { |
f3dc3630 | 751 | .name = "pca953x", |
9e60fdcf | 752 | }, |
f3dc3630 GL |
753 | .probe = pca953x_probe, |
754 | .remove = pca953x_remove, | |
3760f736 | 755 | .id_table = pca953x_id, |
9e60fdcf | 756 | }; |
757 | ||
f3dc3630 | 758 | static int __init pca953x_init(void) |
9e60fdcf | 759 | { |
f3dc3630 | 760 | return i2c_add_driver(&pca953x_driver); |
9e60fdcf | 761 | } |
2f8d1197 DB |
762 | /* register after i2c postcore initcall and before |
763 | * subsys initcalls that may rely on these GPIOs | |
764 | */ | |
765 | subsys_initcall(pca953x_init); | |
9e60fdcf | 766 | |
f3dc3630 | 767 | static void __exit pca953x_exit(void) |
9e60fdcf | 768 | { |
f3dc3630 | 769 | i2c_del_driver(&pca953x_driver); |
9e60fdcf | 770 | } |
f3dc3630 | 771 | module_exit(pca953x_exit); |
9e60fdcf | 772 | |
773 | MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); | |
f3dc3630 | 774 | MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); |
9e60fdcf | 775 | MODULE_LICENSE("GPL"); |