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Commit | Line | Data |
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15fae37d | 1 | /* |
c103de24 | 2 | * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders |
15fae37d DB |
3 | * |
4 | * Copyright (C) 2007 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
d120c17f | 23 | #include <linux/gpio.h> |
15fae37d DB |
24 | #include <linux/i2c.h> |
25 | #include <linux/i2c/pcf857x.h> | |
6e20a0a4 KM |
26 | #include <linux/interrupt.h> |
27 | #include <linux/irq.h> | |
28 | #include <linux/irqdomain.h> | |
bb207ef1 | 29 | #include <linux/module.h> |
6e20a0a4 KM |
30 | #include <linux/spinlock.h> |
31 | #include <linux/workqueue.h> | |
15fae37d | 32 | |
15fae37d | 33 | |
3760f736 JD |
34 | static const struct i2c_device_id pcf857x_id[] = { |
35 | { "pcf8574", 8 }, | |
4ba2ccb8 | 36 | { "pcf8574a", 8 }, |
3760f736 JD |
37 | { "pca8574", 8 }, |
38 | { "pca9670", 8 }, | |
39 | { "pca9672", 8 }, | |
40 | { "pca9674", 8 }, | |
41 | { "pcf8575", 16 }, | |
42 | { "pca8575", 16 }, | |
43 | { "pca9671", 16 }, | |
44 | { "pca9673", 16 }, | |
45 | { "pca9675", 16 }, | |
1673ad52 DB |
46 | { "max7328", 8 }, |
47 | { "max7329", 8 }, | |
02130490 | 48 | { "tca9554", 8 }, |
3760f736 JD |
49 | { } |
50 | }; | |
51 | MODULE_DEVICE_TABLE(i2c, pcf857x_id); | |
52 | ||
15fae37d DB |
53 | /* |
54 | * The pcf857x, pca857x, and pca967x chips only expose one read and one | |
55 | * write register. Writing a "one" bit (to match the reset state) lets | |
56 | * that pin be used as an input; it's not an open-drain model, but acts | |
57 | * a bit like one. This is described as "quasi-bidirectional"; read the | |
58 | * chip documentation for details. | |
59 | * | |
60 | * Many other I2C GPIO expander chips (like the pca953x models) have | |
61 | * more complex register models and more conventional circuitry using | |
62 | * push/pull drivers. They often use the same 0x20..0x27 addresses as | |
63 | * pcf857x parts, making the "legacy" I2C driver model problematic. | |
64 | */ | |
65 | struct pcf857x { | |
66 | struct gpio_chip chip; | |
67 | struct i2c_client *client; | |
1673ad52 | 68 | struct mutex lock; /* protect 'out' */ |
6e20a0a4 KM |
69 | struct work_struct work; /* irq demux work */ |
70 | struct irq_domain *irq_domain; /* for irq demux */ | |
71 | spinlock_t slock; /* protect irq demux */ | |
15fae37d | 72 | unsigned out; /* software latch */ |
6e20a0a4 KM |
73 | unsigned status; /* current status */ |
74 | int irq; /* real irq number */ | |
0c65ddd4 KM |
75 | |
76 | int (*write)(struct i2c_client *client, unsigned data); | |
77 | int (*read)(struct i2c_client *client); | |
15fae37d DB |
78 | }; |
79 | ||
80 | /*-------------------------------------------------------------------------*/ | |
81 | ||
82 | /* Talk to 8-bit I/O expander */ | |
83 | ||
0c65ddd4 | 84 | static int i2c_write_le8(struct i2c_client *client, unsigned data) |
15fae37d | 85 | { |
0c65ddd4 | 86 | return i2c_smbus_write_byte(client, data); |
15fae37d DB |
87 | } |
88 | ||
0c65ddd4 | 89 | static int i2c_read_le8(struct i2c_client *client) |
15fae37d | 90 | { |
0c65ddd4 | 91 | return (int)i2c_smbus_read_byte(client); |
15fae37d DB |
92 | } |
93 | ||
15fae37d DB |
94 | /* Talk to 16-bit I/O expander */ |
95 | ||
0c65ddd4 | 96 | static int i2c_write_le16(struct i2c_client *client, unsigned word) |
15fae37d DB |
97 | { |
98 | u8 buf[2] = { word & 0xff, word >> 8, }; | |
99 | int status; | |
100 | ||
101 | status = i2c_master_send(client, buf, 2); | |
102 | return (status < 0) ? status : 0; | |
103 | } | |
104 | ||
105 | static int i2c_read_le16(struct i2c_client *client) | |
106 | { | |
107 | u8 buf[2]; | |
108 | int status; | |
109 | ||
110 | status = i2c_master_recv(client, buf, 2); | |
111 | if (status < 0) | |
112 | return status; | |
113 | return (buf[1] << 8) | buf[0]; | |
114 | } | |
115 | ||
0c65ddd4 KM |
116 | /*-------------------------------------------------------------------------*/ |
117 | ||
118 | static int pcf857x_input(struct gpio_chip *chip, unsigned offset) | |
15fae37d DB |
119 | { |
120 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
1673ad52 | 121 | int status; |
15fae37d | 122 | |
1673ad52 | 123 | mutex_lock(&gpio->lock); |
15fae37d | 124 | gpio->out |= (1 << offset); |
0c65ddd4 | 125 | status = gpio->write(gpio->client, gpio->out); |
1673ad52 DB |
126 | mutex_unlock(&gpio->lock); |
127 | ||
128 | return status; | |
15fae37d DB |
129 | } |
130 | ||
0c65ddd4 | 131 | static int pcf857x_get(struct gpio_chip *chip, unsigned offset) |
15fae37d DB |
132 | { |
133 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
134 | int value; | |
135 | ||
0c65ddd4 | 136 | value = gpio->read(gpio->client); |
15fae37d DB |
137 | return (value < 0) ? 0 : (value & (1 << offset)); |
138 | } | |
139 | ||
0c65ddd4 | 140 | static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) |
15fae37d DB |
141 | { |
142 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
143 | unsigned bit = 1 << offset; | |
1673ad52 | 144 | int status; |
15fae37d | 145 | |
1673ad52 | 146 | mutex_lock(&gpio->lock); |
15fae37d DB |
147 | if (value) |
148 | gpio->out |= bit; | |
149 | else | |
150 | gpio->out &= ~bit; | |
0c65ddd4 | 151 | status = gpio->write(gpio->client, gpio->out); |
1673ad52 DB |
152 | mutex_unlock(&gpio->lock); |
153 | ||
154 | return status; | |
15fae37d DB |
155 | } |
156 | ||
0c65ddd4 | 157 | static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value) |
15fae37d | 158 | { |
0c65ddd4 | 159 | pcf857x_output(chip, offset, value); |
15fae37d DB |
160 | } |
161 | ||
162 | /*-------------------------------------------------------------------------*/ | |
163 | ||
6e20a0a4 KM |
164 | static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset) |
165 | { | |
166 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
167 | ||
168 | return irq_create_mapping(gpio->irq_domain, offset); | |
169 | } | |
170 | ||
171 | static void pcf857x_irq_demux_work(struct work_struct *work) | |
172 | { | |
173 | struct pcf857x *gpio = container_of(work, | |
174 | struct pcf857x, | |
175 | work); | |
176 | unsigned long change, i, status, flags; | |
177 | ||
178 | status = gpio->read(gpio->client); | |
179 | ||
180 | spin_lock_irqsave(&gpio->slock, flags); | |
181 | ||
182 | change = gpio->status ^ status; | |
183 | for_each_set_bit(i, &change, gpio->chip.ngpio) | |
184 | generic_handle_irq(irq_find_mapping(gpio->irq_domain, i)); | |
185 | gpio->status = status; | |
186 | ||
187 | spin_unlock_irqrestore(&gpio->slock, flags); | |
188 | } | |
189 | ||
190 | static irqreturn_t pcf857x_irq_demux(int irq, void *data) | |
191 | { | |
192 | struct pcf857x *gpio = data; | |
193 | ||
194 | /* | |
195 | * pcf857x can't read/write data here, | |
196 | * since i2c data access might go to sleep. | |
197 | */ | |
198 | schedule_work(&gpio->work); | |
199 | ||
200 | return IRQ_HANDLED; | |
201 | } | |
202 | ||
203 | static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq, | |
204 | irq_hw_number_t hw) | |
205 | { | |
206 | irq_set_chip_and_handler(virq, | |
207 | &dummy_irq_chip, | |
208 | handle_level_irq); | |
209 | return 0; | |
210 | } | |
211 | ||
212 | static struct irq_domain_ops pcf857x_irq_domain_ops = { | |
213 | .map = pcf857x_irq_domain_map, | |
214 | }; | |
215 | ||
216 | static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio) | |
217 | { | |
218 | if (gpio->irq_domain) | |
219 | irq_domain_remove(gpio->irq_domain); | |
220 | ||
221 | if (gpio->irq) | |
222 | free_irq(gpio->irq, gpio); | |
223 | } | |
224 | ||
225 | static int pcf857x_irq_domain_init(struct pcf857x *gpio, | |
226 | struct pcf857x_platform_data *pdata, | |
805f864e | 227 | struct i2c_client *client) |
6e20a0a4 KM |
228 | { |
229 | int status; | |
230 | ||
805f864e | 231 | gpio->irq_domain = irq_domain_add_linear(client->dev.of_node, |
6e20a0a4 KM |
232 | gpio->chip.ngpio, |
233 | &pcf857x_irq_domain_ops, | |
234 | NULL); | |
235 | if (!gpio->irq_domain) | |
236 | goto fail; | |
237 | ||
238 | /* enable real irq */ | |
805f864e KM |
239 | status = request_irq(client->irq, pcf857x_irq_demux, 0, |
240 | dev_name(&client->dev), gpio); | |
6e20a0a4 KM |
241 | if (status) |
242 | goto fail; | |
243 | ||
244 | /* enable gpio_to_irq() */ | |
245 | INIT_WORK(&gpio->work, pcf857x_irq_demux_work); | |
246 | gpio->chip.to_irq = pcf857x_to_irq; | |
805f864e | 247 | gpio->irq = client->irq; |
6e20a0a4 KM |
248 | |
249 | return 0; | |
250 | ||
251 | fail: | |
252 | pcf857x_irq_domain_cleanup(gpio); | |
253 | return -EINVAL; | |
254 | } | |
255 | ||
256 | /*-------------------------------------------------------------------------*/ | |
257 | ||
d2653e92 JD |
258 | static int pcf857x_probe(struct i2c_client *client, |
259 | const struct i2c_device_id *id) | |
15fae37d DB |
260 | { |
261 | struct pcf857x_platform_data *pdata; | |
262 | struct pcf857x *gpio; | |
263 | int status; | |
264 | ||
e56aee18 | 265 | pdata = dev_get_platdata(&client->dev); |
a342d215 BD |
266 | if (!pdata) { |
267 | dev_dbg(&client->dev, "no platform data\n"); | |
a342d215 | 268 | } |
15fae37d DB |
269 | |
270 | /* Allocate, initialize, and register this gpio_chip. */ | |
f39f54af | 271 | gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); |
15fae37d DB |
272 | if (!gpio) |
273 | return -ENOMEM; | |
274 | ||
1673ad52 | 275 | mutex_init(&gpio->lock); |
6e20a0a4 | 276 | spin_lock_init(&gpio->slock); |
1673ad52 | 277 | |
0c65ddd4 KM |
278 | gpio->chip.base = pdata ? pdata->gpio_base : -1; |
279 | gpio->chip.can_sleep = 1; | |
280 | gpio->chip.dev = &client->dev; | |
281 | gpio->chip.owner = THIS_MODULE; | |
282 | gpio->chip.get = pcf857x_get; | |
283 | gpio->chip.set = pcf857x_set; | |
284 | gpio->chip.direction_input = pcf857x_input; | |
285 | gpio->chip.direction_output = pcf857x_output; | |
286 | gpio->chip.ngpio = id->driver_data; | |
15fae37d | 287 | |
6e20a0a4 | 288 | /* enable gpio_to_irq() if platform has settings */ |
805f864e KM |
289 | if (pdata && client->irq) { |
290 | status = pcf857x_irq_domain_init(gpio, pdata, client); | |
6e20a0a4 KM |
291 | if (status < 0) { |
292 | dev_err(&client->dev, "irq_domain init failed\n"); | |
293 | goto fail; | |
294 | } | |
295 | } | |
296 | ||
15fae37d DB |
297 | /* NOTE: the OnSemi jlc1562b is also largely compatible with |
298 | * these parts, notably for output. It has a low-resolution | |
299 | * DAC instead of pin change IRQs; and its inputs can be the | |
300 | * result of comparators. | |
301 | */ | |
302 | ||
303 | /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; | |
304 | * 9670, 9672, 9764, and 9764a use quite a variety. | |
305 | * | |
306 | * NOTE: we don't distinguish here between *4 and *4a parts. | |
307 | */ | |
3760f736 | 308 | if (gpio->chip.ngpio == 8) { |
0c65ddd4 KM |
309 | gpio->write = i2c_write_le8; |
310 | gpio->read = i2c_read_le8; | |
15fae37d DB |
311 | |
312 | if (!i2c_check_functionality(client->adapter, | |
313 | I2C_FUNC_SMBUS_BYTE)) | |
314 | status = -EIO; | |
315 | ||
316 | /* fail if there's no chip present */ | |
317 | else | |
318 | status = i2c_smbus_read_byte(client); | |
319 | ||
320 | /* '75/'75c addresses are 0x20..0x27, just like the '74; | |
321 | * the '75c doesn't have a current source pulling high. | |
322 | * 9671, 9673, and 9765 use quite a variety of addresses. | |
323 | * | |
324 | * NOTE: we don't distinguish here between '75 and '75c parts. | |
325 | */ | |
3760f736 | 326 | } else if (gpio->chip.ngpio == 16) { |
0c65ddd4 KM |
327 | gpio->write = i2c_write_le16; |
328 | gpio->read = i2c_read_le16; | |
15fae37d DB |
329 | |
330 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) | |
331 | status = -EIO; | |
332 | ||
333 | /* fail if there's no chip present */ | |
334 | else | |
335 | status = i2c_read_le16(client); | |
336 | ||
a342d215 BD |
337 | } else { |
338 | dev_dbg(&client->dev, "unsupported number of gpios\n"); | |
339 | status = -EINVAL; | |
340 | } | |
15fae37d DB |
341 | |
342 | if (status < 0) | |
343 | goto fail; | |
344 | ||
345 | gpio->chip.label = client->name; | |
346 | ||
347 | gpio->client = client; | |
348 | i2c_set_clientdata(client, gpio); | |
349 | ||
350 | /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. | |
351 | * We can't actually know whether a pin is configured (a) as output | |
352 | * and driving the signal low, or (b) as input and reporting a low | |
353 | * value ... without knowing the last value written since the chip | |
354 | * came out of reset (if any). We can't read the latched output. | |
355 | * | |
356 | * In short, the only reliable solution for setting up pin direction | |
357 | * is to do it explicitly. The setup() method can do that, but it | |
358 | * may cause transient glitching since it can't know the last value | |
359 | * written (some pins may need to be driven low). | |
360 | * | |
361 | * Using pdata->n_latch avoids that trouble. When left initialized | |
362 | * to zero, our software copy of the "latch" then matches the chip's | |
363 | * all-ones reset state. Otherwise it flags pins to be driven low. | |
364 | */ | |
49946f68 | 365 | gpio->out = pdata ? ~pdata->n_latch : ~0; |
6e20a0a4 | 366 | gpio->status = gpio->out; |
15fae37d DB |
367 | |
368 | status = gpiochip_add(&gpio->chip); | |
369 | if (status < 0) | |
370 | goto fail; | |
371 | ||
15fae37d DB |
372 | /* Let platform code set up the GPIOs and their users. |
373 | * Now is the first time anyone could use them. | |
374 | */ | |
49946f68 | 375 | if (pdata && pdata->setup) { |
15fae37d DB |
376 | status = pdata->setup(client, |
377 | gpio->chip.base, gpio->chip.ngpio, | |
378 | pdata->context); | |
379 | if (status < 0) | |
380 | dev_warn(&client->dev, "setup --> %d\n", status); | |
381 | } | |
382 | ||
805f864e KM |
383 | dev_info(&client->dev, "probed\n"); |
384 | ||
15fae37d DB |
385 | return 0; |
386 | ||
387 | fail: | |
388 | dev_dbg(&client->dev, "probe error %d for '%s'\n", | |
389 | status, client->name); | |
6e20a0a4 | 390 | |
805f864e | 391 | if (pdata && client->irq) |
6e20a0a4 KM |
392 | pcf857x_irq_domain_cleanup(gpio); |
393 | ||
15fae37d DB |
394 | return status; |
395 | } | |
396 | ||
397 | static int pcf857x_remove(struct i2c_client *client) | |
398 | { | |
e56aee18 | 399 | struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); |
15fae37d DB |
400 | struct pcf857x *gpio = i2c_get_clientdata(client); |
401 | int status = 0; | |
402 | ||
49946f68 | 403 | if (pdata && pdata->teardown) { |
15fae37d DB |
404 | status = pdata->teardown(client, |
405 | gpio->chip.base, gpio->chip.ngpio, | |
406 | pdata->context); | |
407 | if (status < 0) { | |
408 | dev_err(&client->dev, "%s --> %d\n", | |
409 | "teardown", status); | |
410 | return status; | |
411 | } | |
412 | } | |
413 | ||
805f864e | 414 | if (pdata && client->irq) |
6e20a0a4 KM |
415 | pcf857x_irq_domain_cleanup(gpio); |
416 | ||
15fae37d | 417 | status = gpiochip_remove(&gpio->chip); |
f39f54af | 418 | if (status) |
15fae37d DB |
419 | dev_err(&client->dev, "%s --> %d\n", "remove", status); |
420 | return status; | |
421 | } | |
422 | ||
423 | static struct i2c_driver pcf857x_driver = { | |
424 | .driver = { | |
425 | .name = "pcf857x", | |
426 | .owner = THIS_MODULE, | |
427 | }, | |
428 | .probe = pcf857x_probe, | |
429 | .remove = pcf857x_remove, | |
3760f736 | 430 | .id_table = pcf857x_id, |
15fae37d DB |
431 | }; |
432 | ||
433 | static int __init pcf857x_init(void) | |
434 | { | |
435 | return i2c_add_driver(&pcf857x_driver); | |
436 | } | |
2f8d1197 DB |
437 | /* register after i2c postcore initcall and before |
438 | * subsys initcalls that may rely on these GPIOs | |
439 | */ | |
440 | subsys_initcall(pcf857x_init); | |
15fae37d DB |
441 | |
442 | static void __exit pcf857x_exit(void) | |
443 | { | |
444 | i2c_del_driver(&pcf857x_driver); | |
445 | } | |
446 | module_exit(pcf857x_exit); | |
447 | ||
448 | MODULE_LICENSE("GPL"); | |
449 | MODULE_AUTHOR("David Brownell"); |