[mirror_ubuntu-artful-kernel.git] / drivers / gpio / gpio-xilinx.c

/*
 * Xilinx gpio driver for xps/axi_gpio IP.
 *
 * Copyright 2008 - 2013 Xilinx, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/bitops.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/of_gpio.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/slab.h>

/* Register Offset Definitions */
#define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
#define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */

#define XGPIO_CHANNEL_OFFSET	0x8

/* Read/Write access to the GPIO registers */
#if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
# define xgpio_readreg(offset)		readl(offset)
# define xgpio_writereg(offset, val)	writel(val, offset)
#else
# define xgpio_readreg(offset)		__raw_readl(offset)
# define xgpio_writereg(offset, val)	__raw_writel(val, offset)
#endif

/**
 * struct xgpio_instance - Stores information about GPIO device
 * @mmchip: OF GPIO chip for memory mapped banks
 * @gpio_state: GPIO state shadow register
 * @gpio_dir: GPIO direction shadow register
 * @gpio_lock: Lock used for synchronization
 * @inited: True if the port has been inited
 */
struct xgpio_instance {
	struct of_mm_gpio_chip mmchip;
	u32 gpio_state;
	u32 gpio_dir;
	spinlock_t gpio_lock;
	bool inited;
};

struct xgpio {
	struct xgpio_instance port[2];
};

/**
 * xgpio_get - Read the specified signal of the GPIO device.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 *
 * This function reads the specified signal of the GPIO device.
 *
 * Return:
 * 0 if direction of GPIO signals is set as input otherwise it
 * returns negative error value.
 */
static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);

	return !!(xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET) & BIT(gpio));
}

/**
 * xgpio_set - Write the specified signal of the GPIO device.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 * @val:    Value to be written to specified signal.
 *
 * This function writes the specified value in to the specified signal of the
 * GPIO device.
 */
static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);

	spin_lock_irqsave(&chip->gpio_lock, flags);

	/* Write to GPIO signal and set its direction to output */
	if (val)
		chip->gpio_state |= BIT(gpio);
	else
		chip->gpio_state &= ~BIT(gpio);

	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);
}

/**
 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 *
 * Return:
 * 0 - if direction of GPIO signals is set as input
 * otherwise it returns negative error value.
 */
static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
	unsigned long flags;
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);

	spin_lock_irqsave(&chip->gpio_lock, flags);

	/* Set the GPIO bit in shadow register and set direction as input */
	chip->gpio_dir |= BIT(gpio);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	return 0;
}

/**
 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 * @val:    Value to be written to specified signal.
 *
 * This function sets the direction of specified GPIO signal as output.
 *
 * Return:
 * If all GPIO signals of GPIO chip is configured as input then it returns
 * error otherwise it returns 0.
 */
static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);

	spin_lock_irqsave(&chip->gpio_lock, flags);

	/* Write state of GPIO signal */
	if (val)
		chip->gpio_state |= BIT(gpio);
	else
		chip->gpio_state &= ~BIT(gpio);
	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);

	/* Clear the GPIO bit in shadow register and set direction as output */
	chip->gpio_dir &= ~BIT(gpio);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	return 0;
}

/**
 * xgpio_save_regs - Set initial values of GPIO pins
 * @mm_gc: Pointer to memory mapped GPIO chip structure
 */
static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
{
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);

	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET,	chip->gpio_state);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
}

/**
 * xgpio_remove - Remove method for the GPIO device.
 * @pdev: pointer to the platform device
 *
 * This function remove gpiochips and frees all the allocated resources.
 */
static int xgpio_remove(struct platform_device *pdev)
{
	struct xgpio *xgpio = platform_get_drvdata(pdev);
	int i;

	for (i = 0; i < 2; i++) {
		if (!xgpio->port[i].inited)
			continue;
		gpiochip_remove(&xgpio->port[i].mmchip.gc);

		if (i == 1)
			xgpio->port[i].mmchip.regs -= XGPIO_CHANNEL_OFFSET;

		iounmap(xgpio->port[i].mmchip.regs);
		kfree(xgpio->port[i].mmchip.gc.label);
	}

	return 0;
}

/**
 * xgpio_of_probe - Probe method for the GPIO device.
 * @pdev: pointer to the platform device
 *
 * Return:
 * It returns 0, if the driver is bound to the GPIO device, or
 * a negative value if there is an error.
 */
static int xgpio_probe(struct platform_device *pdev)
{
	struct xgpio *xgpio;
	struct xgpio_instance *chip;
	int status = 0;
	struct device_node *np = pdev->dev.of_node;
	const u32 *tree_info;
	u32 ngpio;

	xgpio = devm_kzalloc(&pdev->dev, sizeof(*xgpio), GFP_KERNEL);
	if (!xgpio)
		return -ENOMEM;

	platform_set_drvdata(pdev, xgpio);

	chip = &xgpio->port[0];

	/* Update GPIO state shadow register with default value */
	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);

	/* By default, all pins are inputs */
	chip->gpio_dir = 0xFFFFFFFF;

	/* Update GPIO direction shadow register with default value */
	of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);

	/*
	 * Check device node and parent device node for device width
	 * and assume default width of 32
	 */
	if (of_property_read_u32(np, "xlnx,gpio-width", &ngpio))
		ngpio = 32;
	chip->mmchip.gc.ngpio = (u16)ngpio;

	spin_lock_init(&chip->gpio_lock);

	chip->mmchip.gc.dev = &pdev->dev;
	chip->mmchip.gc.direction_input = xgpio_dir_in;
	chip->mmchip.gc.direction_output = xgpio_dir_out;
	chip->mmchip.gc.get = xgpio_get;
	chip->mmchip.gc.set = xgpio_set;

	chip->mmchip.save_regs = xgpio_save_regs;

	/* Call the OF gpio helper to setup and register the GPIO device */
	status = of_mm_gpiochip_add(np, &chip->mmchip);
	if (status) {
		pr_err("%s: error in probe function with status %d\n",
		       np->full_name, status);
		return status;
	}
	chip->inited = true;

	pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
							chip->mmchip.gc.base);

	tree_info = of_get_property(np, "xlnx,is-dual", NULL);
	if (tree_info && be32_to_cpup(tree_info)) {
		chip = &xgpio->port[1];

		/* Update GPIO state shadow register with default value */
		of_property_read_u32(np, "xlnx,dout-default-2",
				     &chip->gpio_state);

		/* By default, all pins are inputs */
		chip->gpio_dir = 0xFFFFFFFF;

		/* Update GPIO direction shadow register with default value */
		of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);

		/*
		 * Check device node and parent device node for device width
		 * and assume default width of 32
		 */
		if (of_property_read_u32(np, "xlnx,gpio2-width", &ngpio))
			ngpio = 32;
		chip->mmchip.gc.ngpio = (u16)ngpio;

		spin_lock_init(&chip->gpio_lock);

		chip->mmchip.gc.dev = &pdev->dev;
		chip->mmchip.gc.direction_input = xgpio_dir_in;
		chip->mmchip.gc.direction_output = xgpio_dir_out;
		chip->mmchip.gc.get = xgpio_get;
		chip->mmchip.gc.set = xgpio_set;

		chip->mmchip.save_regs = xgpio_save_regs;

		/* Call the OF gpio helper to setup and register the GPIO dev */
		status = of_mm_gpiochip_add(np, &chip->mmchip);
		if (status) {
			xgpio_remove(pdev);
			pr_err("%s: error in probe function with status %d\n",
			np->full_name, status);
			return status;
		}

		/* Add dual channel offset */
		chip->mmchip.regs += XGPIO_CHANNEL_OFFSET;
		chip->inited = true;

		pr_info("XGpio: %s: dual channel registered, base is %d\n",
					np->full_name, chip->mmchip.gc.base);
	}

	return 0;
}

static const struct of_device_id xgpio_of_match[] = {
	{ .compatible = "xlnx,xps-gpio-1.00.a", },
	{ /* end of list */ },
};

MODULE_DEVICE_TABLE(of, xgpio_of_match);

static struct platform_driver xgpio_plat_driver = {
	.probe		= xgpio_probe,
	.remove		= xgpio_remove,
	.driver		= {
			.name = "gpio-xilinx",
			.of_match_table	= xgpio_of_match,
	},
};

static int __init xgpio_init(void)
{
	return platform_driver_register(&xgpio_plat_driver);
}

subsys_initcall(xgpio_init);

static void __exit xgpio_exit(void)
{
	platform_driver_unregister(&xgpio_plat_driver);
}
module_exit(xgpio_exit);

MODULE_AUTHOR("Xilinx, Inc.");
MODULE_DESCRIPTION("Xilinx GPIO driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
0bcb6069	1	/*
74600ee0	2	* Xilinx gpio driver for xps/axi_gpio IP.
0bcb6069	3	*
74600ee0	4	* Copyright 2008 - 2013 Xilinx, Inc.
0bcb6069 JL	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2
	8	* as published by the Free Software Foundation.
	9	*
	10	* You should have received a copy of the GNU General Public License
	11	* along with this program; if not, write to the Free Software
	12	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	13	*/
	14
74600ee0	15	#include <linux/bitops.h>
0bcb6069 JL	16	#include <linux/init.h>
0bcb6069 JL	17	#include <linux/errno.h>
bb207ef1	18	#include <linux/module.h>
0bcb6069 JL	19	#include <linux/of_device.h>
	20	#include <linux/of_platform.h>
	21	#include <linux/of_gpio.h>
	22	#include <linux/io.h>
	23	#include <linux/gpio.h>
5a0e3ad6	24	#include <linux/slab.h>
0bcb6069 JL	25
	26	/* Register Offset Definitions */
	27	#define XGPIO_DATA_OFFSET (0x0) /* Data register */
	28	#define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
	29
74600ee0 MS	30	#define XGPIO_CHANNEL_OFFSET 0x8
	31
	32	/* Read/Write access to the GPIO registers */
c54c58ba	33	#if defined(CONFIG_ARCH_ZYNQ) \|\| defined(CONFIG_X86)
cc090d61 MS	34	# define xgpio_readreg(offset) readl(offset)
	35	# define xgpio_writereg(offset, val) writel(val, offset)
	36	#else
	37	# define xgpio_readreg(offset) __raw_readl(offset)
	38	# define xgpio_writereg(offset, val) __raw_writel(val, offset)
	39	#endif
74600ee0 MS	40
	41	/**
	42	* struct xgpio_instance - Stores information about GPIO device
4ae798fa RRD	43	* @mmchip: OF GPIO chip for memory mapped banks
	44	* @gpio_state: GPIO state shadow register
	45	* @gpio_dir: GPIO direction shadow register
	46	* @gpio_lock: Lock used for synchronization
	47	* @inited: True if the port has been inited
74600ee0	48	*/
0bcb6069 JL	49	struct xgpio_instance {
0bcb6069 JL	50	struct of_mm_gpio_chip mmchip;
74600ee0 MS	51	u32 gpio_state;
74600ee0 MS	52	u32 gpio_dir;
74600ee0	53	spinlock_t gpio_lock;
749564ff RRD	54	bool inited;
	55	};
	56
	57	struct xgpio {
	58	struct xgpio_instance port[2];
0bcb6069 JL	59	};
	60
	61	/**
	62	* xgpio_get - Read the specified signal of the GPIO device.
	63	* @gc: Pointer to gpio_chip device structure.
	64	* @gpio: GPIO signal number.
	65	*
4ae798fa RRD	66	* This function reads the specified signal of the GPIO device.
	67	*
	68	* Return:
	69	* 0 if direction of GPIO signals is set as input otherwise it
	70	* returns negative error value.
0bcb6069 JL	71	*/
	72	static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
	73	{
	74	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	75
bc2f3dc3	76	return !!(xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET) & BIT(gpio));
0bcb6069 JL	77	}
	78
	79	/**
	80	* xgpio_set - Write the specified signal of the GPIO device.
	81	* @gc: Pointer to gpio_chip device structure.
	82	* @gpio: GPIO signal number.
	83	* @val: Value to be written to specified signal.
	84	*
	85	* This function writes the specified value in to the specified signal of the
	86	* GPIO device.
	87	*/
	88	static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	89	{
	90	unsigned long flags;
	91	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	92	struct xgpio_instance *chip =
	93	container_of(mm_gc, struct xgpio_instance, mmchip);
	94
	95	spin_lock_irqsave(&chip->gpio_lock, flags);
	96
	97	/* Write to GPIO signal and set its direction to output */
	98	if (val)
9f7f0b2b	99	chip->gpio_state \|= BIT(gpio);
0bcb6069	100	else
9f7f0b2b	101	chip->gpio_state &= ~BIT(gpio);
74600ee0	102
bc2f3dc3	103	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
0bcb6069 JL	104
	105	spin_unlock_irqrestore(&chip->gpio_lock, flags);
	106	}
	107
	108	/**
	109	* xgpio_dir_in - Set the direction of the specified GPIO signal as input.
	110	* @gc: Pointer to gpio_chip device structure.
	111	* @gpio: GPIO signal number.
	112	*
4ae798fa RRD	113	* Return:
	114	* 0 - if direction of GPIO signals is set as input
	115	* otherwise it returns negative error value.
0bcb6069 JL	116	*/
	117	static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
	118	{
	119	unsigned long flags;
	120	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	121	struct xgpio_instance *chip =
	122	container_of(mm_gc, struct xgpio_instance, mmchip);
	123
	124	spin_lock_irqsave(&chip->gpio_lock, flags);
	125
	126	/* Set the GPIO bit in shadow register and set direction as input */
9f7f0b2b	127	chip->gpio_dir \|= BIT(gpio);
bc2f3dc3	128	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
0bcb6069 JL	129
	130	spin_unlock_irqrestore(&chip->gpio_lock, flags);
	131
	132	return 0;
	133	}
	134
	135	/**
	136	* xgpio_dir_out - Set the direction of the specified GPIO signal as output.
	137	* @gc: Pointer to gpio_chip device structure.
	138	* @gpio: GPIO signal number.
	139	* @val: Value to be written to specified signal.
	140	*
4ae798fa RRD	141	* This function sets the direction of specified GPIO signal as output.
	142	*
	143	* Return:
	144	* If all GPIO signals of GPIO chip is configured as input then it returns
0bcb6069 JL	145	* error otherwise it returns 0.
	146	*/
	147	static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
	148	{
	149	unsigned long flags;
	150	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	151	struct xgpio_instance *chip =
	152	container_of(mm_gc, struct xgpio_instance, mmchip);
	153
	154	spin_lock_irqsave(&chip->gpio_lock, flags);
	155
	156	/* Write state of GPIO signal */
	157	if (val)
9f7f0b2b	158	chip->gpio_state \|= BIT(gpio);
0bcb6069	159	else
9f7f0b2b	160	chip->gpio_state &= ~BIT(gpio);
bc2f3dc3	161	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
0bcb6069 JL	162
0bcb6069 JL	163	/* Clear the GPIO bit in shadow register and set direction as output */
9f7f0b2b	164	chip->gpio_dir &= ~BIT(gpio);
bc2f3dc3	165	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
0bcb6069 JL	166
	167	spin_unlock_irqrestore(&chip->gpio_lock, flags);
	168
	169	return 0;
	170	}
	171
	172	/**
	173	* xgpio_save_regs - Set initial values of GPIO pins
4ae798fa	174	* @mm_gc: Pointer to memory mapped GPIO chip structure
0bcb6069 JL	175	*/
	176	static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
	177	{
	178	struct xgpio_instance *chip =
	179	container_of(mm_gc, struct xgpio_instance, mmchip);
	180
bc2f3dc3 RRD	181	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
bc2f3dc3 RRD	182	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
0bcb6069 JL	183	}
0bcb6069 JL	184
749564ff RRD	185	/**
	186	* xgpio_remove - Remove method for the GPIO device.
	187	* @pdev: pointer to the platform device
	188	*
	189	* This function remove gpiochips and frees all the allocated resources.
	190	*/
	191	static int xgpio_remove(struct platform_device *pdev)
	192	{
	193	struct xgpio *xgpio = platform_get_drvdata(pdev);
	194	int i;
	195
	196	for (i = 0; i < 2; i++) {
	197	if (!xgpio->port[i].inited)
	198	continue;
	199	gpiochip_remove(&xgpio->port[i].mmchip.gc);
	200
	201	if (i == 1)
	202	xgpio->port[i].mmchip.regs -= XGPIO_CHANNEL_OFFSET;
	203
	204	iounmap(xgpio->port[i].mmchip.regs);
	205	kfree(xgpio->port[i].mmchip.gc.label);
	206	}
	207
	208	return 0;
	209	}
	210
0bcb6069 JL	211	/**
0bcb6069 JL	212	* xgpio_of_probe - Probe method for the GPIO device.
749564ff	213	* @pdev: pointer to the platform device
0bcb6069	214	*
4ae798fa RRD	215	* Return:
	216	* It returns 0, if the driver is bound to the GPIO device, or
	217	* a negative value if there is an error.
0bcb6069	218	*/
749564ff	219	static int xgpio_probe(struct platform_device *pdev)
0bcb6069	220	{
749564ff	221	struct xgpio *xgpio;
0bcb6069	222	struct xgpio_instance *chip;
0bcb6069	223	int status = 0;
749564ff	224	struct device_node *np = pdev->dev.of_node;
0bcb6069	225	const u32 *tree_info;
1b4c5a6e	226	u32 ngpio;
0bcb6069	227
749564ff RRD	228	xgpio = devm_kzalloc(&pdev->dev, sizeof(*xgpio), GFP_KERNEL);
749564ff RRD	229	if (!xgpio)
0bcb6069	230	return -ENOMEM;
0bcb6069	231
749564ff RRD	232	platform_set_drvdata(pdev, xgpio);
	233
	234	chip = &xgpio->port[0];
	235
0bcb6069	236	/* Update GPIO state shadow register with default value */
6f8bf500 MS	237	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);
	238
	239	/* By default, all pins are inputs */
	240	chip->gpio_dir = 0xFFFFFFFF;
0bcb6069 JL	241
0bcb6069 JL	242	/* Update GPIO direction shadow register with default value */
6f8bf500 MS	243	of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
6f8bf500 MS	244
1b4c5a6e GV	245	/*
	246	* Check device node and parent device node for device width
	247	* and assume default width of 32
	248	*/
	249	if (of_property_read_u32(np, "xlnx,gpio-width", &ngpio))
	250	ngpio = 32;
	251	chip->mmchip.gc.ngpio = (u16)ngpio;
0bcb6069 JL	252
	253	spin_lock_init(&chip->gpio_lock);
	254
749564ff	255	chip->mmchip.gc.dev = &pdev->dev;
a19e3da5 AV	256	chip->mmchip.gc.direction_input = xgpio_dir_in;
	257	chip->mmchip.gc.direction_output = xgpio_dir_out;
	258	chip->mmchip.gc.get = xgpio_get;
	259	chip->mmchip.gc.set = xgpio_set;
0bcb6069 JL	260
	261	chip->mmchip.save_regs = xgpio_save_regs;
	262
	263	/* Call the OF gpio helper to setup and register the GPIO device */
	264	status = of_mm_gpiochip_add(np, &chip->mmchip);
	265	if (status) {
0bcb6069 JL	266	pr_err("%s: error in probe function with status %d\n",
	267	np->full_name, status);
	268	return status;
	269	}
749564ff	270	chip->inited = true;
74600ee0 MS	271
	272	pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
	273	chip->mmchip.gc.base);
	274
	275	tree_info = of_get_property(np, "xlnx,is-dual", NULL);
	276	if (tree_info && be32_to_cpup(tree_info)) {
749564ff	277	chip = &xgpio->port[1];
74600ee0	278
74600ee0 MS	279	/* Update GPIO state shadow register with default value */
	280	of_property_read_u32(np, "xlnx,dout-default-2",
	281	&chip->gpio_state);
	282
	283	/* By default, all pins are inputs */
	284	chip->gpio_dir = 0xFFFFFFFF;
	285
	286	/* Update GPIO direction shadow register with default value */
	287	of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
	288
1b4c5a6e GV	289	/*
	290	* Check device node and parent device node for device width
	291	* and assume default width of 32
	292	*/
	293	if (of_property_read_u32(np, "xlnx,gpio2-width", &ngpio))
	294	ngpio = 32;
	295	chip->mmchip.gc.ngpio = (u16)ngpio;
74600ee0 MS	296
	297	spin_lock_init(&chip->gpio_lock);
	298
749564ff	299	chip->mmchip.gc.dev = &pdev->dev;
74600ee0 MS	300	chip->mmchip.gc.direction_input = xgpio_dir_in;
	301	chip->mmchip.gc.direction_output = xgpio_dir_out;
	302	chip->mmchip.gc.get = xgpio_get;
	303	chip->mmchip.gc.set = xgpio_set;
	304
	305	chip->mmchip.save_regs = xgpio_save_regs;
	306
	307	/* Call the OF gpio helper to setup and register the GPIO dev */
	308	status = of_mm_gpiochip_add(np, &chip->mmchip);
	309	if (status) {
749564ff	310	xgpio_remove(pdev);
74600ee0 MS	311	pr_err("%s: error in probe function with status %d\n",
	312	np->full_name, status);
	313	return status;
	314	}
bc2f3dc3 RRD	315
	316	/* Add dual channel offset */
	317	chip->mmchip.regs += XGPIO_CHANNEL_OFFSET;
749564ff	318	chip->inited = true;
bc2f3dc3	319
74600ee0 MS	320	pr_info("XGpio: %s: dual channel registered, base is %d\n",
	321	np->full_name, chip->mmchip.gc.base);
	322	}
	323
0bcb6069 JL	324	return 0;
	325	}
	326
9992bc95	327	static const struct of_device_id xgpio_of_match[] = {
0bcb6069 JL	328	{ .compatible = "xlnx,xps-gpio-1.00.a", },
	329	{ /* end of list */ },
	330	};
	331
749564ff	332	MODULE_DEVICE_TABLE(of, xgpio_of_match);
0bcb6069	333
749564ff RRD	334	static struct platform_driver xgpio_plat_driver = {
	335	.probe = xgpio_probe,
	336	.remove = xgpio_remove,
	337	.driver = {
	338	.name = "gpio-xilinx",
	339	.of_match_table = xgpio_of_match,
	340	},
	341	};
0bcb6069	342
749564ff RRD	343	static int __init xgpio_init(void)
	344	{
	345	return platform_driver_register(&xgpio_plat_driver);
0bcb6069 JL	346	}
0bcb6069 JL	347
0bcb6069	348	subsys_initcall(xgpio_init);
749564ff RRD	349
	350	static void __exit xgpio_exit(void)
	351	{
	352	platform_driver_unregister(&xgpio_plat_driver);
	353	}
	354	module_exit(xgpio_exit);
0bcb6069 JL	355
	356	MODULE_AUTHOR("Xilinx, Inc.");
	357	MODULE_DESCRIPTION("Xilinx GPIO driver");
	358	MODULE_LICENSE("GPL");