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Merge branch 'work.gfs2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[mirror_ubuntu-jammy-kernel.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
923a654c 3#include <linux/bitmap.h>
d2876d08
DB
4#include <linux/kernel.h>
5#include <linux/module.h>
ff77c352 6#include <linux/interrupt.h>
d2876d08
DB
7#include <linux/irq.h>
8#include <linux/spinlock.h>
1a989d0f 9#include <linux/list.h>
d8f388d8
DB
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
ff77c352 15#include <linux/idr.h>
5a0e3ad6 16#include <linux/slab.h>
7b199811 17#include <linux/acpi.h>
53e7cac3 18#include <linux/gpio/driver.h>
0a6d3158 19#include <linux/gpio/machine.h>
c771c2f4 20#include <linux/pinctrl/consumer.h>
3c702e99 21#include <linux/fs.h>
8b92e17e 22#include <linux/compat.h>
953b956a 23#include <linux/file.h>
3c702e99 24#include <uapi/linux/gpio.h>
d2876d08 25
664e3e5a 26#include "gpiolib.h"
f626d6df 27#include "gpiolib-of.h"
77cb907a 28#include "gpiolib-acpi.h"
925ca369 29#include "gpiolib-cdev.h"
ef087d8e 30#include "gpiolib-sysfs.h"
664e3e5a 31
3f397c21
UKK
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
d2876d08 34
79a9becd 35/* Implementation infrastructure for GPIO interfaces.
d2876d08 36 *
79a9becd
AC
37 * The GPIO programming interface allows for inlining speed-critical
38 * get/set operations for common cases, so that access to SOC-integrated
39 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
40 */
41
42
43/* When debugging, extend minimal trust to callers and platform code.
44 * Also emit diagnostic messages that may help initial bringup, when
45 * board setup or driver bugs are most common.
46 *
47 * Otherwise, minimize overhead in what may be bitbanging codepaths.
48 */
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
ff2b1359
LW
55/* Device and char device-related information */
56static DEFINE_IDA(gpio_ida);
3c702e99
LW
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 59static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
60static struct bus_type gpio_bus_type = {
61 .name = "gpio",
ced2af41 62 .match = gpio_bus_match,
3c702e99 63};
ff2b1359 64
3027743f
LA
65/*
66 * Number of GPIOs to use for the fast path in set array
67 */
68#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
69
d2876d08
DB
70/* gpio_lock prevents conflicts during gpio_desc[] table updates.
71 * While any GPIO is requested, its gpio_chip is not removable;
72 * each GPIO's "requested" flag serves as a lock and refcount.
73 */
0eb4c6c2 74DEFINE_SPINLOCK(gpio_lock);
d2876d08 75
bae48da2
AC
76static DEFINE_MUTEX(gpio_lookup_lock);
77static LIST_HEAD(gpio_lookup_list);
ff2b1359 78LIST_HEAD(gpio_devices);
6d86750c 79
a411e81e
BG
80static DEFINE_MUTEX(gpio_machine_hogs_mutex);
81static LIST_HEAD(gpio_machine_hogs);
82
a0b66a73
LW
83static void gpiochip_free_hogs(struct gpio_chip *gc);
84static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
85 struct lock_class_key *lock_key,
86 struct lock_class_key *request_key);
a0b66a73
LW
87static void gpiochip_irqchip_remove(struct gpio_chip *gc);
88static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 91
159f3cd9 92static bool gpiolib_initialized;
6d86750c 93
d2876d08
DB
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
d2876d08 96 d->label = label;
d2876d08
DB
97}
98
372e722e 99/**
950d55f5
TR
100 * gpio_to_desc - Convert a GPIO number to its descriptor
101 * @gpio: global GPIO number
102 *
103 * Returns:
104 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
105 * with the given number exists in the system.
372e722e 106 */
79a9becd 107struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 108{
ff2b1359 109 struct gpio_device *gdev;
14e85c0e
AC
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
ff2b1359 114 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
14e85c0e 117 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 118 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
0e9a5edf 124 if (!gpio_is_valid(gpio))
c47d9e1b 125 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 126
14e85c0e 127 return NULL;
372e722e 128}
79a9becd 129EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 130
d468bf9e 131/**
950d55f5
TR
132 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
133 * hardware number for this chip
a0b66a73 134 * @gc: GPIO chip
950d55f5
TR
135 * @hwnum: hardware number of the GPIO for this chip
136 *
137 * Returns:
35c6cfb4 138 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 139 * in the given chip for the specified hardware number.
d468bf9e 140 */
a0b66a73 141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 142 unsigned int hwnum)
d468bf9e 143{
a0b66a73 144 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
145
146 if (hwnum >= gdev->ngpio)
b7d0a28a 147 return ERR_PTR(-EINVAL);
d468bf9e 148
fdeb8e15 149 return &gdev->descs[hwnum];
d468bf9e 150}
97795420 151EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
a0b66a73 216 struct gpio_chip *gc;
13daf489 217 unsigned int offset;
d377f56f 218 int ret;
80b0a602 219
a0b66a73 220 gc = gpiod_to_chip(desc);
372e722e 221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
a0b66a73 231 if (!gc->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
a0b66a73 234 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0 297 * Convert a GPIO name to its descriptor
582838ea
GU
298 * Note that there is no guarantee that GPIO names are globally unique!
299 * Hence this function will return, if it exists, a reference to the first GPIO
300 * line found that matches the given name.
f881bab0
LW
301 */
302static struct gpio_desc *gpio_name_to_desc(const char * const name)
303{
ff2b1359 304 struct gpio_device *gdev;
f881bab0
LW
305 unsigned long flags;
306
ee203bbd
MM
307 if (!name)
308 return NULL;
309
f881bab0
LW
310 spin_lock_irqsave(&gpio_lock, flags);
311
ff2b1359 312 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
313 int i;
314
fdeb8e15
LW
315 for (i = 0; i != gdev->ngpio; ++i) {
316 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 317
ee203bbd 318 if (!desc->name)
f881bab0
LW
319 continue;
320
fdeb8e15 321 if (!strcmp(desc->name, name)) {
f881bab0 322 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 323 return desc;
f881bab0
LW
324 }
325 }
326 }
327
328 spin_unlock_irqrestore(&gpio_lock, flags);
329
330 return NULL;
331}
332
5f3ca732 333/*
582838ea
GU
334 * Take the names from gc->names and assign them to their GPIO descriptors.
335 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 336 *
582838ea
GU
337 * Note that:
338 * 1. Non-unique names are still accepted,
339 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
340 */
341static int gpiochip_set_desc_names(struct gpio_chip *gc)
342{
fdeb8e15 343 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
344 int i;
345
5f3ca732
MP
346 /* First check all names if they are unique */
347 for (i = 0; i != gc->ngpio; ++i) {
348 struct gpio_desc *gpio;
349
350 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 351 if (gpio)
fdeb8e15 352 dev_warn(&gdev->dev,
34ffd85d 353 "Detected name collision for GPIO name '%s'\n",
f881bab0 354 gc->names[i]);
5f3ca732
MP
355 }
356
357 /* Then add all names to the GPIO descriptors */
358 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 359 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
360
361 return 0;
362}
363
32fc5aa2
BG
364/*
365 * devprop_gpiochip_set_names - Set GPIO line names using device properties
366 * @chip: GPIO chip whose lines should be named, if possible
367 *
368 * Looks for device property "gpio-line-names" and if it exists assigns
369 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 370 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
371 * by the caller.
372 */
373static int devprop_gpiochip_set_names(struct gpio_chip *chip)
374{
375 struct gpio_device *gdev = chip->gpiodev;
b41ba2ec 376 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
32fc5aa2
BG
377 const char **names;
378 int ret, i;
379 int count;
380
b41ba2ec 381 count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
32fc5aa2
BG
382 if (count < 0)
383 return 0;
384
4e804c39
SP
385 /*
386 * When offset is set in the driver side we assume the driver internally
387 * is using more than one gpiochip per the same device. We have to stop
388 * setting friendly names if the specified ones with 'gpio-line-names'
389 * are less than the offset in the device itself. This means all the
390 * lines are not present for every single pin within all the internal
391 * gpiochips.
392 */
393 if (count <= chip->offset) {
394 dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
395 count, chip->offset);
396 return 0;
32fc5aa2
BG
397 }
398
399 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
400 if (!names)
401 return -ENOMEM;
402
b41ba2ec 403 ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
32fc5aa2
BG
404 names, count);
405 if (ret < 0) {
406 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
407 kfree(names);
408 return ret;
409 }
410
4e804c39
SP
411 /*
412 * When more that one gpiochip per device is used, 'count' can
413 * contain at most number gpiochips x chip->ngpio. We have to
414 * correctly distribute all defined lines taking into account
415 * chip->offset as starting point from where we will assign
416 * the names to pins from the 'names' array. Since property
417 * 'gpio-line-names' cannot contains gaps, we have to be sure
418 * we only assign those pins that really exists since chip->ngpio
419 * can be different of the chip->offset.
420 */
421 count = (count > chip->offset) ? count - chip->offset : count;
422 if (count > chip->ngpio)
423 count = chip->ngpio;
424
32fc5aa2 425 for (i = 0; i < count; i++)
4e804c39 426 gdev->descs[i].name = names[chip->offset + i];
32fc5aa2
BG
427
428 kfree(names);
429
430 return 0;
431}
432
a0b66a73 433static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
434{
435 unsigned long *p;
436
a0b66a73 437 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
438 if (!p)
439 return NULL;
440
441 /* Assume by default all GPIOs are valid */
a0b66a73 442 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
443
444 return p;
445}
446
f626d6df 447static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 448{
eb1e8bd6 449 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
450 return 0;
451
f626d6df
LW
452 gc->valid_mask = gpiochip_allocate_mask(gc);
453 if (!gc->valid_mask)
726cb3ba
SB
454 return -ENOMEM;
455
456 return 0;
457}
458
c9fc5aff 459static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 460{
c9fc5aff
LW
461 if (gc->init_valid_mask)
462 return gc->init_valid_mask(gc,
463 gc->valid_mask,
464 gc->ngpio);
f8ec92a9
RR
465
466 return 0;
467}
468
a0b66a73 469static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 470{
a0b66a73
LW
471 bitmap_free(gc->valid_mask);
472 gc->valid_mask = NULL;
726cb3ba
SB
473}
474
b056ca1c
AS
475static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
476{
477 if (gc->add_pin_ranges)
478 return gc->add_pin_ranges(gc);
479
480 return 0;
481}
482
a0b66a73 483bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
484 unsigned int offset)
485{
486 /* No mask means all valid */
a0b66a73 487 if (likely(!gc->valid_mask))
726cb3ba 488 return true;
a0b66a73 489 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
490}
491EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
492
ff2b1359
LW
493static void gpiodevice_release(struct device *dev)
494{
a6112998 495 struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
cf25ef6b 496 unsigned long flags;
ff2b1359 497
cf25ef6b 498 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 499 list_del(&gdev->list);
cf25ef6b
JH
500 spin_unlock_irqrestore(&gpio_lock, flags);
501
8d4a85b6 502 ida_free(&gpio_ida, gdev->id);
fcf273e5 503 kfree_const(gdev->label);
476e2fc5 504 kfree(gdev->descs);
9efd9e69 505 kfree(gdev);
ff2b1359
LW
506}
507
1f5eb8b1
KG
508#ifdef CONFIG_GPIO_CDEV
509#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
510#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
511#else
512/*
513 * gpiolib_cdev_register() indirectly calls device_add(), which is still
514 * required even when cdev is not selected.
515 */
516#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
517#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
518#endif
519
159f3cd9
GR
520static int gpiochip_setup_dev(struct gpio_device *gdev)
521{
d377f56f 522 int ret;
159f3cd9 523
1f5eb8b1 524 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
525 if (ret)
526 return ret;
111379dc 527
d377f56f
LW
528 ret = gpiochip_sysfs_register(gdev);
529 if (ret)
159f3cd9
GR
530 goto err_remove_device;
531
532 /* From this point, the .release() function cleans up gpio_device */
533 gdev->dev.release = gpiodevice_release;
262b9011
GU
534 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
535 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
536
537 return 0;
538
539err_remove_device:
1f5eb8b1 540 gcdev_unregister(gdev);
d377f56f 541 return ret;
159f3cd9
GR
542}
543
a0b66a73 544static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
545{
546 struct gpio_desc *desc;
547 int rv;
548
a0b66a73 549 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 550 if (IS_ERR(desc)) {
262b9011
GU
551 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
552 PTR_ERR(desc));
a411e81e
BG
553 return;
554 }
555
ba3efdff 556 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
557 return;
558
559 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
560 if (rv)
262b9011
GU
561 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
562 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
563}
564
a0b66a73 565static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
566{
567 struct gpiod_hog *hog;
568
569 mutex_lock(&gpio_machine_hogs_mutex);
570
571 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
572 if (!strcmp(gc->label, hog->chip_label))
573 gpiochip_machine_hog(gc, hog);
a411e81e
BG
574 }
575
576 mutex_unlock(&gpio_machine_hogs_mutex);
577}
578
159f3cd9
GR
579static void gpiochip_setup_devs(void)
580{
581 struct gpio_device *gdev;
d377f56f 582 int ret;
159f3cd9
GR
583
584 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
585 ret = gpiochip_setup_dev(gdev);
586 if (ret)
262b9011
GU
587 dev_err(&gdev->dev,
588 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
589 }
590}
591
a0b66a73 592int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
593 struct lock_class_key *lock_key,
594 struct lock_class_key *request_key)
d2876d08 595{
6cb59afe 596 struct fwnode_handle *fwnode = gc->parent ? dev_fwnode(gc->parent) : NULL;
d2876d08 597 unsigned long flags;
d377f56f 598 int ret = 0;
ff2b1359 599 unsigned i;
a0b66a73 600 int base = gc->base;
ff2b1359 601 struct gpio_device *gdev;
d2876d08 602
ff2b1359
LW
603 /*
604 * First: allocate and populate the internal stat container, and
605 * set up the struct device.
606 */
969f07b4 607 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 608 if (!gdev)
14e85c0e 609 return -ENOMEM;
3c702e99 610 gdev->dev.bus = &gpio_bus_type;
1df62542 611 gdev->dev.parent = gc->parent;
a0b66a73
LW
612 gdev->chip = gc;
613 gc->gpiodev = gdev;
acc6e331 614
4731210c 615 of_gpio_dev_init(gc, gdev);
515321ac 616 acpi_gpio_dev_init(gc, gdev);
acc6e331 617
6cb59afe
AS
618 /*
619 * Assign fwnode depending on the result of the previous calls,
620 * if none of them succeed, assign it to the parent's one.
621 */
622 gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
623
8d4a85b6 624 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 625 if (gdev->id < 0) {
d377f56f 626 ret = gdev->id;
ff2b1359
LW
627 goto err_free_gdev;
628 }
c351bb64
QW
629
630 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
631 if (ret)
632 goto err_free_ida;
633
ff2b1359 634 device_initialize(&gdev->dev);
a0b66a73
LW
635 if (gc->parent && gc->parent->driver)
636 gdev->owner = gc->parent->driver->owner;
637 else if (gc->owner)
ff2b1359 638 /* TODO: remove chip->owner */
a0b66a73 639 gdev->owner = gc->owner;
ff2b1359
LW
640 else
641 gdev->owner = THIS_MODULE;
d2876d08 642
a0b66a73 643 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 644 if (!gdev->descs) {
d377f56f 645 ret = -ENOMEM;
c351bb64 646 goto err_free_dev_name;
ff2b1359
LW
647 }
648
a0b66a73
LW
649 if (gc->ngpio == 0) {
650 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 651 ret = -EINVAL;
159f3cd9 652 goto err_free_descs;
5ed41cc4 653 }
df4878e9 654
a0b66a73
LW
655 if (gc->ngpio > FASTPATH_NGPIO)
656 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
657 gc->ngpio, FASTPATH_NGPIO);
3027743f 658
a0b66a73 659 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 660 if (!gdev->label) {
d377f56f 661 ret = -ENOMEM;
476e2fc5 662 goto err_free_descs;
df4878e9
LW
663 }
664
a0b66a73 665 gdev->ngpio = gc->ngpio;
43c54eca 666 gdev->data = data;
5ed41cc4 667
d2876d08
DB
668 spin_lock_irqsave(&gpio_lock, flags);
669
fdeb8e15
LW
670 /*
671 * TODO: this allocates a Linux GPIO number base in the global
672 * GPIO numberspace for this chip. In the long run we want to
673 * get *rid* of this numberspace and use only descriptors, but
674 * it may be a pipe dream. It will not happen before we get rid
675 * of the sysfs interface anyways.
676 */
8d0aab2f 677 if (base < 0) {
a0b66a73 678 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 679 if (base < 0) {
d377f56f 680 ret = base;
225fce83 681 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 682 goto err_free_label;
8d0aab2f 683 }
fdeb8e15
LW
684 /*
685 * TODO: it should not be necessary to reflect the assigned
686 * base outside of the GPIO subsystem. Go over drivers and
687 * see if anyone makes use of this, else drop this and assign
688 * a poison instead.
689 */
a0b66a73 690 gc->base = base;
8d0aab2f 691 }
fdeb8e15 692 gdev->base = base;
8d0aab2f 693
d377f56f
LW
694 ret = gpiodev_add_to_list(gdev);
695 if (ret) {
05aa5203 696 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 697 goto err_free_label;
05aa5203 698 }
1a989d0f 699
a0b66a73 700 for (i = 0; i < gc->ngpio; i++)
767cd17a 701 gdev->descs[i].gdev = gdev;
14e85c0e 702
207270dd
DC
703 spin_unlock_irqrestore(&gpio_lock, flags);
704
6accc376 705 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
51c1064e 706
f23f1516 707#ifdef CONFIG_PINCTRL
20ec3e39 708 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
709#endif
710
7cba1a4d
BG
711 if (gc->names)
712 ret = gpiochip_set_desc_names(gc);
713 else
714 ret = devprop_gpiochip_set_names(gc);
d377f56f 715 if (ret)
5f3ca732
MP
716 goto err_remove_from_list;
717
a0b66a73 718 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 719 if (ret)
48057ed1 720 goto err_remove_from_list;
e0d89728 721
a0b66a73 722 ret = of_gpiochip_add(gc);
d377f56f 723 if (ret)
48057ed1 724 goto err_free_gpiochip_mask;
28355f81 725
a0b66a73 726 ret = gpiochip_init_valid_mask(gc);
d377f56f 727 if (ret)
35779890 728 goto err_remove_of_chip;
f8ec92a9 729
a0b66a73 730 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RR
731 struct gpio_desc *desc = &gdev->descs[i];
732
a0b66a73 733 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 734 assign_bit(FLAG_IS_OUT,
a0b66a73 735 &desc->flags, !gc->get_direction(gc, i));
d95da993 736 } else {
4fc5bfeb 737 assign_bit(FLAG_IS_OUT,
a0b66a73 738 &desc->flags, !gc->direction_input);
d95da993 739 }
3edfb7bd
RR
740 }
741
a0b66a73 742 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
743 if (ret)
744 goto err_remove_of_chip;
745
a0b66a73 746 acpi_gpiochip_add(gc);
391c970c 747
a0b66a73 748 machine_gpiochip_add(gc);
a411e81e 749
a0b66a73 750 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
751 if (ret)
752 goto err_remove_acpi_chip;
753
a0b66a73 754 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 755 if (ret)
48057ed1
LW
756 goto err_remove_acpi_chip;
757
a0b66a73 758 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 759 if (ret)
48057ed1
LW
760 goto err_remove_irqchip_mask;
761
3c702e99
LW
762 /*
763 * By first adding the chardev, and then adding the device,
764 * we get a device node entry in sysfs under
765 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
766 * coldplug of device nodes and other udev business.
159f3cd9
GR
767 * We can do this only if gpiolib has been initialized.
768 * Otherwise, defer until later.
3c702e99 769 */
159f3cd9 770 if (gpiolib_initialized) {
d377f56f
LW
771 ret = gpiochip_setup_dev(gdev);
772 if (ret)
48057ed1 773 goto err_remove_irqchip;
159f3cd9 774 }
cedb1881 775 return 0;
3bae4811 776
48057ed1 777err_remove_irqchip:
a0b66a73 778 gpiochip_irqchip_remove(gc);
48057ed1 779err_remove_irqchip_mask:
a0b66a73 780 gpiochip_irqchip_free_valid_mask(gc);
35779890 781err_remove_acpi_chip:
a0b66a73 782 acpi_gpiochip_remove(gc);
35779890 783err_remove_of_chip:
a0b66a73
LW
784 gpiochip_free_hogs(gc);
785 of_gpiochip_remove(gc);
35779890 786err_free_gpiochip_mask:
a0b66a73
LW
787 gpiochip_remove_pin_ranges(gc);
788 gpiochip_free_valid_mask(gc);
5f3ca732 789err_remove_from_list:
225fce83 790 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 791 list_del(&gdev->list);
3bae4811 792 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 793err_free_label:
fcf273e5 794 kfree_const(gdev->label);
476e2fc5
GR
795err_free_descs:
796 kfree(gdev->descs);
c351bb64
QW
797err_free_dev_name:
798 kfree(dev_name(&gdev->dev));
a05a1404 799err_free_ida:
8d4a85b6 800 ida_free(&gpio_ida, gdev->id);
a05a1404 801err_free_gdev:
d2876d08 802 /* failures here can mean systems won't boot... */
3cc1fb73
GS
803 if (ret != -EPROBE_DEFER) {
804 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
805 gdev->base, gdev->base + gdev->ngpio - 1,
806 gc->label ? : "generic", ret);
807 }
fdeb8e15 808 kfree(gdev);
d377f56f 809 return ret;
d2876d08 810}
959bc7b2 811EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 812
43c54eca
LW
813/**
814 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 815 * @gc: GPIO chip
950d55f5
TR
816 *
817 * Returns:
818 * The per-subdriver data for the chip.
43c54eca 819 */
a0b66a73 820void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 821{
a0b66a73 822 return gc->gpiodev->data;
43c54eca
LW
823}
824EXPORT_SYMBOL_GPL(gpiochip_get_data);
825
d2876d08
DB
826/**
827 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 828 * @gc: the chip to unregister
d2876d08
DB
829 *
830 * A gpio_chip with any GPIOs still requested may not be removed.
831 */
a0b66a73 832void gpiochip_remove(struct gpio_chip *gc)
d2876d08 833{
a0b66a73 834 struct gpio_device *gdev = gc->gpiodev;
d2876d08 835 unsigned long flags;
869233f8 836 unsigned int i;
d2876d08 837
ff2b1359 838 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 839 gpiochip_sysfs_unregister(gdev);
a0b66a73 840 gpiochip_free_hogs(gc);
bd203bd5
BJZ
841 /* Numb the device, cancelling all outstanding operations */
842 gdev->chip = NULL;
a0b66a73
LW
843 gpiochip_irqchip_remove(gc);
844 acpi_gpiochip_remove(gc);
845 of_gpiochip_remove(gc);
846 gpiochip_remove_pin_ranges(gc);
847 gpiochip_free_valid_mask(gc);
43c54eca
LW
848 /*
849 * We accept no more calls into the driver from this point, so
850 * NULL the driver data pointer
851 */
852 gdev->data = NULL;
391c970c 853
6798acaa 854 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 855 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 856 if (gpiochip_is_requested(gc, i))
869233f8 857 break;
d2876d08 858 }
d2876d08 859 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 860
ca18a852 861 if (i != gdev->ngpio)
fdeb8e15 862 dev_crit(&gdev->dev,
58383c78 863 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 864
ff2b1359
LW
865 /*
866 * The gpiochip side puts its use of the device to rest here:
867 * if there are no userspace clients, the chardev and device will
868 * be removed, else it will be dangling until the last user is
869 * gone.
870 */
1f5eb8b1 871 gcdev_unregister(gdev);
ff2b1359 872 put_device(&gdev->dev);
d2876d08
DB
873}
874EXPORT_SYMBOL_GPL(gpiochip_remove);
875
594fa265
GL
876/**
877 * gpiochip_find() - iterator for locating a specific gpio_chip
878 * @data: data to pass to match function
950d55f5 879 * @match: Callback function to check gpio_chip
594fa265
GL
880 *
881 * Similar to bus_find_device. It returns a reference to a gpio_chip as
882 * determined by a user supplied @match callback. The callback should return
883 * 0 if the device doesn't match and non-zero if it does. If the callback is
884 * non-zero, this function will return to the caller and not iterate over any
885 * more gpio_chips.
886 */
07ce8ec7 887struct gpio_chip *gpiochip_find(void *data,
a0b66a73 888 int (*match)(struct gpio_chip *gc,
3d0f7cf0 889 void *data))
594fa265 890{
ff2b1359 891 struct gpio_device *gdev;
a0b66a73 892 struct gpio_chip *gc = NULL;
594fa265 893 unsigned long flags;
594fa265
GL
894
895 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 896 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 897 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 898 gc = gdev->chip;
594fa265 899 break;
acf06ff7 900 }
ff2b1359 901
594fa265
GL
902 spin_unlock_irqrestore(&gpio_lock, flags);
903
a0b66a73 904 return gc;
594fa265 905}
8fa0c9bf 906EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 907
a0b66a73 908static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
909{
910 const char *name = data;
911
a0b66a73 912 return !strcmp(gc->label, name);
79697ef9
AC
913}
914
915static struct gpio_chip *find_chip_by_name(const char *name)
916{
917 return gpiochip_find((void *)name, gpiochip_match_name);
918}
919
14250520
LW
920#ifdef CONFIG_GPIOLIB_IRQCHIP
921
922/*
923 * The following is irqchip helper code for gpiochips.
924 */
925
9411e3aa
AS
926static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
927{
928 struct gpio_irq_chip *girq = &gc->irq;
929
930 if (!girq->init_hw)
931 return 0;
932
933 return girq->init_hw(gc);
934}
935
5fbe5b58 936static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 937{
5fbe5b58
LW
938 struct gpio_irq_chip *girq = &gc->irq;
939
940 if (!girq->init_valid_mask)
79b804cb
MW
941 return 0;
942
5fbe5b58
LW
943 girq->valid_mask = gpiochip_allocate_mask(gc);
944 if (!girq->valid_mask)
79b804cb
MW
945 return -ENOMEM;
946
5fbe5b58
LW
947 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
948
79b804cb
MW
949 return 0;
950}
951
a0b66a73 952static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 953{
a0b66a73
LW
954 bitmap_free(gc->irq.valid_mask);
955 gc->irq.valid_mask = NULL;
79b804cb
MW
956}
957
a0b66a73 958bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 959 unsigned int offset)
79b804cb 960{
a0b66a73 961 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 962 return false;
79b804cb 963 /* No mask means all valid */
a0b66a73 964 if (likely(!gc->irq.valid_mask))
79b804cb 965 return true;
a0b66a73 966 return test_bit(offset, gc->irq.valid_mask);
79b804cb 967}
64ff2c8e 968EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 969
fdd61a01
LW
970#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
971
972/**
973 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
974 * to a gpiochip
975 * @gc: the gpiochip to set the irqchip hierarchical handler to
976 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
977 * will then percolate up to the parent
978 */
979static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
980 struct irq_chip *irqchip)
981{
982 /* DT will deal with mapping each IRQ as we go along */
983 if (is_of_node(gc->irq.fwnode))
984 return;
985
986 /*
987 * This is for legacy and boardfile "irqchip" fwnodes: allocate
988 * irqs upfront instead of dynamically since we don't have the
989 * dynamic type of allocation that hardware description languages
990 * provide. Once all GPIO drivers using board files are gone from
991 * the kernel we can delete this code, but for a transitional period
992 * it is necessary to keep this around.
993 */
994 if (is_fwnode_irqchip(gc->irq.fwnode)) {
995 int i;
996 int ret;
997
998 for (i = 0; i < gc->ngpio; i++) {
999 struct irq_fwspec fwspec;
1000 unsigned int parent_hwirq;
1001 unsigned int parent_type;
1002 struct gpio_irq_chip *girq = &gc->irq;
1003
1004 /*
1005 * We call the child to parent translation function
1006 * only to check if the child IRQ is valid or not.
1007 * Just pick the rising edge type here as that is what
1008 * we likely need to support.
1009 */
1010 ret = girq->child_to_parent_hwirq(gc, i,
1011 IRQ_TYPE_EDGE_RISING,
1012 &parent_hwirq,
1013 &parent_type);
1014 if (ret) {
1015 chip_err(gc, "skip set-up on hwirq %d\n",
1016 i);
1017 continue;
1018 }
1019
1020 fwspec.fwnode = gc->irq.fwnode;
1021 /* This is the hwirq for the GPIO line side of things */
1022 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1023 /* Just pick something */
1024 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1025 fwspec.param_count = 2;
1026 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1027 /* just pick something */
1028 -1,
1029 1,
1030 NUMA_NO_NODE,
1031 &fwspec,
1032 false,
1033 NULL);
1034 if (ret < 0) {
1035 chip_err(gc,
1036 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1037 i, parent_hwirq,
1038 ret);
1039 }
1040 }
1041 }
1042
1043 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1044
1045 return;
1046}
1047
1048static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1049 struct irq_fwspec *fwspec,
1050 unsigned long *hwirq,
1051 unsigned int *type)
1052{
1053 /* We support standard DT translation */
1054 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1055 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1056 }
1057
1058 /* This is for board files and others not using DT */
1059 if (is_fwnode_irqchip(fwspec->fwnode)) {
1060 int ret;
1061
1062 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1063 if (ret)
1064 return ret;
1065 WARN_ON(*type == IRQ_TYPE_NONE);
1066 return 0;
1067 }
1068 return -EINVAL;
1069}
1070
1071static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1072 unsigned int irq,
1073 unsigned int nr_irqs,
1074 void *data)
1075{
1076 struct gpio_chip *gc = d->host_data;
1077 irq_hw_number_t hwirq;
1078 unsigned int type = IRQ_TYPE_NONE;
1079 struct irq_fwspec *fwspec = data;
24258761 1080 void *parent_arg;
fdd61a01
LW
1081 unsigned int parent_hwirq;
1082 unsigned int parent_type;
1083 struct gpio_irq_chip *girq = &gc->irq;
1084 int ret;
1085
1086 /*
1087 * The nr_irqs parameter is always one except for PCI multi-MSI
1088 * so this should not happen.
1089 */
1090 WARN_ON(nr_irqs != 1);
1091
1092 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1093 if (ret)
1094 return ret;
1095
366950ee 1096 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1097
1098 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1099 &parent_hwirq, &parent_type);
1100 if (ret) {
1101 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1102 return ret;
1103 }
366950ee 1104 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1105
1106 /*
1107 * We set handle_bad_irq because the .set_type() should
1108 * always be invoked and set the right type of handler.
1109 */
1110 irq_domain_set_info(d,
1111 irq,
1112 hwirq,
1113 gc->irq.chip,
1114 gc,
1115 girq->handler,
1116 NULL, NULL);
1117 irq_set_probe(irq);
1118
fdd61a01 1119 /* This parent only handles asserted level IRQs */
24258761
KH
1120 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1121 if (!parent_arg)
1122 return -ENOMEM;
1123
366950ee 1124 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1125 irq, parent_hwirq);
c34f6dc8 1126 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 1127 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
1128 /*
1129 * If the parent irqdomain is msi, the interrupts have already
1130 * been allocated, so the EEXIST is good.
1131 */
1132 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1133 ret = 0;
fdd61a01
LW
1134 if (ret)
1135 chip_err(gc,
1136 "failed to allocate parent hwirq %d for hwirq %lu\n",
1137 parent_hwirq, hwirq);
1138
24258761 1139 kfree(parent_arg);
fdd61a01
LW
1140 return ret;
1141}
1142
a0b66a73 1143static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1144 unsigned int offset)
1145{
1146 return offset;
1147}
1148
1149static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1150{
1151 ops->activate = gpiochip_irq_domain_activate;
1152 ops->deactivate = gpiochip_irq_domain_deactivate;
1153 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1154 ops->free = irq_domain_free_irqs_common;
1155
1156 /*
1157 * We only allow overriding the translate() function for
1158 * hierarchical chips, and this should only be done if the user
1159 * really need something other than 1:1 translation.
1160 */
1161 if (!ops->translate)
1162 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1163}
1164
1165static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1166{
1167 if (!gc->irq.child_to_parent_hwirq ||
1168 !gc->irq.fwnode) {
1169 chip_err(gc, "missing irqdomain vital data\n");
1170 return -EINVAL;
1171 }
1172
1173 if (!gc->irq.child_offset_to_irq)
1174 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1175
24258761
KH
1176 if (!gc->irq.populate_parent_alloc_arg)
1177 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1178 gpiochip_populate_parent_fwspec_twocell;
1179
1180 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1181
1182 gc->irq.domain = irq_domain_create_hierarchy(
1183 gc->irq.parent_domain,
1184 0,
1185 gc->ngpio,
1186 gc->irq.fwnode,
1187 &gc->irq.child_irq_domain_ops,
1188 gc);
1189
1190 if (!gc->irq.domain)
1191 return -ENOMEM;
1192
1193 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1194
1195 return 0;
1196}
1197
1198static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1199{
1200 return !!gc->irq.parent_domain;
1201}
1202
a0b66a73 1203void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
fdd61a01
LW
1204 unsigned int parent_hwirq,
1205 unsigned int parent_type)
1206{
24258761
KH
1207 struct irq_fwspec *fwspec;
1208
1209 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1210 if (!fwspec)
1211 return NULL;
1212
a0b66a73 1213 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1214 fwspec->param_count = 2;
1215 fwspec->param[0] = parent_hwirq;
1216 fwspec->param[1] = parent_type;
24258761
KH
1217
1218 return fwspec;
fdd61a01
LW
1219}
1220EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1221
a0b66a73 1222void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
fdd61a01
LW
1223 unsigned int parent_hwirq,
1224 unsigned int parent_type)
1225{
24258761
KH
1226 struct irq_fwspec *fwspec;
1227
1228 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1229 if (!fwspec)
1230 return NULL;
1231
a0b66a73 1232 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1233 fwspec->param_count = 4;
1234 fwspec->param[0] = 0;
1235 fwspec->param[1] = parent_hwirq;
1236 fwspec->param[2] = 0;
1237 fwspec->param[3] = parent_type;
24258761
KH
1238
1239 return fwspec;
fdd61a01
LW
1240}
1241EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1242
1243#else
1244
1245static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1246{
1247 return -EINVAL;
1248}
1249
1250static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1251{
1252 return false;
1253}
1254
1255#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1256
14250520
LW
1257/**
1258 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1259 * @d: the irqdomain used by this irqchip
1260 * @irq: the global irq number used by this GPIO irqchip irq
1261 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1262 *
1263 * This function will set up the mapping for a certain IRQ line on a
1264 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1265 * stored inside the gpiochip.
1266 */
1b95b4eb
TR
1267int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1268 irq_hw_number_t hwirq)
14250520 1269{
a0b66a73 1270 struct gpio_chip *gc = d->host_data;
d377f56f 1271 int ret = 0;
14250520 1272
a0b66a73 1273 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1274 return -ENXIO;
1275
a0b66a73 1276 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1277 /*
1278 * This lock class tells lockdep that GPIO irqs are in a different
1279 * category than their parents, so it won't report false recursion.
1280 */
a0b66a73
LW
1281 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1282 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1283 /* Chips that use nested thread handlers have them marked */
a0b66a73 1284 if (gc->irq.threaded)
1c8732bb 1285 irq_set_nested_thread(irq, 1);
14250520 1286 irq_set_noprobe(irq);
23393d49 1287
a0b66a73
LW
1288 if (gc->irq.num_parents == 1)
1289 ret = irq_set_parent(irq, gc->irq.parents[0]);
1290 else if (gc->irq.map)
1291 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1292
d377f56f
LW
1293 if (ret < 0)
1294 return ret;
e0d89728 1295
1333b90f
LW
1296 /*
1297 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1298 * is passed as default type.
1299 */
a0b66a73
LW
1300 if (gc->irq.default_type != IRQ_TYPE_NONE)
1301 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1302
1303 return 0;
1304}
1b95b4eb 1305EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1306
1b95b4eb 1307void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1308{
a0b66a73 1309 struct gpio_chip *gc = d->host_data;
1c8732bb 1310
a0b66a73 1311 if (gc->irq.threaded)
1c8732bb 1312 irq_set_nested_thread(irq, 0);
c3626fde
LW
1313 irq_set_chip_and_handler(irq, NULL, NULL);
1314 irq_set_chip_data(irq, NULL);
1315}
1b95b4eb 1316EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1317
14250520
LW
1318static const struct irq_domain_ops gpiochip_domain_ops = {
1319 .map = gpiochip_irq_map,
c3626fde 1320 .unmap = gpiochip_irq_unmap,
14250520
LW
1321 /* Virtually all GPIO irqchips are twocell:ed */
1322 .xlate = irq_domain_xlate_twocell,
1323};
1324
fdd61a01
LW
1325/*
1326 * TODO: move these activate/deactivate in under the hierarchicial
1327 * irqchip implementation as static once SPMI and SSBI (all external
1328 * users) are phased over.
1329 */
ef74f70e
BM
1330/**
1331 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1332 * @domain: The IRQ domain used by this IRQ chip
1333 * @data: Outermost irq_data associated with the IRQ
1334 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1335 *
1336 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1337 * used as the activate function for the &struct irq_domain_ops. The host_data
1338 * for the IRQ domain must be the &struct gpio_chip.
1339 */
1340int gpiochip_irq_domain_activate(struct irq_domain *domain,
1341 struct irq_data *data, bool reserve)
1342{
a0b66a73 1343 struct gpio_chip *gc = domain->host_data;
ef74f70e 1344
a0b66a73 1345 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1346}
1347EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1348
1349/**
1350 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1351 * @domain: The IRQ domain used by this IRQ chip
1352 * @data: Outermost irq_data associated with the IRQ
1353 *
1354 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1355 * be used as the deactivate function for the &struct irq_domain_ops. The
1356 * host_data for the IRQ domain must be the &struct gpio_chip.
1357 */
1358void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1359 struct irq_data *data)
1360{
a0b66a73 1361 struct gpio_chip *gc = domain->host_data;
ef74f70e 1362
a0b66a73 1363 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1364}
1365EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1366
13daf489 1367static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1368{
a0b66a73 1369 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1370
a0b66a73 1371 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1372 return -ENXIO;
5b76e79c 1373
fdd61a01
LW
1374#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1375 if (irq_domain_is_hierarchy(domain)) {
1376 struct irq_fwspec spec;
1377
1378 spec.fwnode = domain->fwnode;
1379 spec.param_count = 2;
a0b66a73 1380 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1381 spec.param[1] = IRQ_TYPE_NONE;
1382
1383 return irq_create_fwspec_mapping(&spec);
1384 }
1385#endif
1386
1387 return irq_create_mapping(domain, offset);
14250520
LW
1388}
1389
14250520
LW
1390static int gpiochip_irq_reqres(struct irq_data *d)
1391{
a0b66a73 1392 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1393
a0b66a73 1394 return gpiochip_reqres_irq(gc, d->hwirq);
14250520
LW
1395}
1396
1397static void gpiochip_irq_relres(struct irq_data *d)
1398{
a0b66a73 1399 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1400
a0b66a73 1401 gpiochip_relres_irq(gc, d->hwirq);
14250520
LW
1402}
1403
a8173820
MS
1404static void gpiochip_irq_mask(struct irq_data *d)
1405{
1406 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1407
1408 if (gc->irq.irq_mask)
1409 gc->irq.irq_mask(d);
1410 gpiochip_disable_irq(gc, d->hwirq);
1411}
1412
1413static void gpiochip_irq_unmask(struct irq_data *d)
1414{
1415 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1416
1417 gpiochip_enable_irq(gc, d->hwirq);
1418 if (gc->irq.irq_unmask)
1419 gc->irq.irq_unmask(d);
1420}
1421
461c1a7d 1422static void gpiochip_irq_enable(struct irq_data *d)
14250520 1423{
a0b66a73 1424 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1425
a0b66a73 1426 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1427 gc->irq.irq_enable(d);
461c1a7d
HV
1428}
1429
1430static void gpiochip_irq_disable(struct irq_data *d)
1431{
a0b66a73 1432 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1433
a8173820 1434 gc->irq.irq_disable(d);
a0b66a73 1435 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1436}
1437
a0b66a73 1438static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1439{
a0b66a73 1440 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d
HV
1441
1442 if (!irqchip->irq_request_resources &&
1443 !irqchip->irq_release_resources) {
1444 irqchip->irq_request_resources = gpiochip_irq_reqres;
1445 irqchip->irq_release_resources = gpiochip_irq_relres;
1446 }
a0b66a73 1447 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1448 return;
171948ea 1449 /* Check if the irqchip already has this hook... */
9d552219
NS
1450 if (irqchip->irq_enable == gpiochip_irq_enable ||
1451 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1452 /*
1453 * ...and if so, give a gentle warning that this is bad
1454 * practice.
1455 */
a0b66a73 1456 chip_info(gc,
171948ea
HV
1457 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1458 return;
1459 }
a8173820
MS
1460
1461 if (irqchip->irq_disable) {
1462 gc->irq.irq_disable = irqchip->irq_disable;
1463 irqchip->irq_disable = gpiochip_irq_disable;
1464 } else {
1465 gc->irq.irq_mask = irqchip->irq_mask;
1466 irqchip->irq_mask = gpiochip_irq_mask;
1467 }
1468
1469 if (irqchip->irq_enable) {
1470 gc->irq.irq_enable = irqchip->irq_enable;
1471 irqchip->irq_enable = gpiochip_irq_enable;
1472 } else {
1473 gc->irq.irq_unmask = irqchip->irq_unmask;
1474 irqchip->irq_unmask = gpiochip_irq_unmask;
1475 }
14250520
LW
1476}
1477
e0d89728
TR
1478/**
1479 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1480 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1481 * @lock_key: lockdep class for IRQ lock
1482 * @request_key: lockdep class for IRQ request
e0d89728 1483 */
a0b66a73 1484static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1485 struct lock_class_key *lock_key,
1486 struct lock_class_key *request_key)
e0d89728 1487{
5c63a9db 1488 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1489 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1490 unsigned int type;
1491 unsigned int i;
1492
1493 if (!irqchip)
1494 return 0;
1495
a0b66a73
LW
1496 if (gc->irq.parent_handler && gc->can_sleep) {
1497 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1498 return -EINVAL;
1499 }
1500
a0b66a73 1501 type = gc->irq.default_type;
e0d89728
TR
1502
1503 /*
1504 * Specifying a default trigger is a terrible idea if DT or ACPI is
1505 * used to configure the interrupts, as you may end up with
1506 * conflicting triggers. Tell the user, and reset to NONE.
1507 */
5c63a9db
AS
1508 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1509 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1510 type = IRQ_TYPE_NONE;
1511
ef382374
NS
1512 if (gc->to_irq)
1513 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1514
a0b66a73
LW
1515 gc->to_irq = gpiochip_to_irq;
1516 gc->irq.default_type = type;
1517 gc->irq.lock_key = lock_key;
1518 gc->irq.request_key = request_key;
e0d89728 1519
fdd61a01 1520 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1521 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1522 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1523 if (ret)
1524 return ret;
1525 } else {
1526 /* Some drivers provide custom irqdomain ops */
5c63a9db 1527 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1528 gc->ngpio,
1529 gc->irq.first,
266315fb
AS
1530 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1531 gc);
a0b66a73 1532 if (!gc->irq.domain)
fdd61a01
LW
1533 return -EINVAL;
1534 }
e0d89728 1535
a0b66a73
LW
1536 if (gc->irq.parent_handler) {
1537 void *data = gc->irq.parent_handler_data ?: gc;
e0d89728 1538
a0b66a73 1539 for (i = 0; i < gc->irq.num_parents; i++) {
e0d89728
TR
1540 /*
1541 * The parent IRQ chip is already using the chip_data
1542 * for this IRQ chip, so our callbacks simply use the
1543 * handler_data.
1544 */
a0b66a73
LW
1545 irq_set_chained_handler_and_data(gc->irq.parents[i],
1546 gc->irq.parent_handler,
e0d89728
TR
1547 data);
1548 }
e0d89728
TR
1549 }
1550
a0b66a73 1551 gpiochip_set_irq_hooks(gc);
ca620f2d 1552
a0b66a73 1553 acpi_gpiochip_request_interrupts(gc);
e0d89728
TR
1554
1555 return 0;
1556}
1557
14250520
LW
1558/**
1559 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1560 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1561 *
1562 * This is called only from gpiochip_remove()
1563 */
a0b66a73 1564static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1565{
a0b66a73 1566 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1567 unsigned int offset;
c3626fde 1568
a0b66a73 1569 acpi_gpiochip_free_interrupts(gc);
afa82fab 1570
a0b66a73
LW
1571 if (irqchip && gc->irq.parent_handler) {
1572 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1573 unsigned int i;
1574
1575 for (i = 0; i < irq->num_parents; i++)
1576 irq_set_chained_handler_and_data(irq->parents[i],
1577 NULL, NULL);
25e4fe92
DB
1578 }
1579
c3626fde 1580 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1581 if (gc->irq.domain) {
39e5f096
TR
1582 unsigned int irq;
1583
a0b66a73
LW
1584 for (offset = 0; offset < gc->ngpio; offset++) {
1585 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1586 continue;
f0fbe7bc 1587
a0b66a73 1588 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1589 irq_dispose_mapping(irq);
79b804cb 1590 }
f0fbe7bc 1591
a0b66a73 1592 irq_domain_remove(gc->irq.domain);
c3626fde 1593 }
14250520 1594
461c1a7d
HV
1595 if (irqchip) {
1596 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1597 irqchip->irq_request_resources = NULL;
1598 irqchip->irq_release_resources = NULL;
1599 }
1600 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1601 irqchip->irq_enable = gc->irq.irq_enable;
1602 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1603 }
14250520 1604 }
a0b66a73
LW
1605 gc->irq.irq_enable = NULL;
1606 gc->irq.irq_disable = NULL;
1607 gc->irq.chip = NULL;
79b804cb 1608
a0b66a73 1609 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1610}
1611
6a45b0e2
MW
1612/**
1613 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1614 * @gc: the gpiochip to add the irqchip to
1615 * @domain: the irqdomain to add to the gpiochip
1616 *
1617 * This function adds an IRQ domain to the gpiochip.
1618 */
1619int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1620 struct irq_domain *domain)
1621{
1622 if (!domain)
1623 return -EINVAL;
1624
1625 gc->to_irq = gpiochip_to_irq;
1626 gc->irq.domain = domain;
1627
1628 return 0;
1629}
1630EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1631
14250520
LW
1632#else /* CONFIG_GPIOLIB_IRQCHIP */
1633
a0b66a73 1634static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1635 struct lock_class_key *lock_key,
1636 struct lock_class_key *request_key)
e0d89728
TR
1637{
1638 return 0;
1639}
a0b66a73 1640static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1641
a0b66a73 1642static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1643{
1644 return 0;
1645}
1646
a0b66a73 1647static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1648{
1649 return 0;
1650}
a0b66a73 1651static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1652{ }
14250520
LW
1653
1654#endif /* CONFIG_GPIOLIB_IRQCHIP */
1655
c771c2f4
JG
1656/**
1657 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1658 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1659 * @offset: the offset of the GPIO to request for GPIO function
1660 */
13daf489 1661int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1662{
89ad556b 1663#ifdef CONFIG_PINCTRL
a0b66a73 1664 if (list_empty(&gc->gpiodev->pin_ranges))
89ad556b
TR
1665 return 0;
1666#endif
2ab73c6d 1667
a0b66a73 1668 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1669}
1670EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1671
1672/**
1673 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1674 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1675 * @offset: the offset of the GPIO to free from GPIO function
1676 */
13daf489 1677void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1678{
6dbbf846
EC
1679#ifdef CONFIG_PINCTRL
1680 if (list_empty(&gc->gpiodev->pin_ranges))
1681 return;
1682#endif
1683
a0b66a73 1684 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1685}
1686EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1687
2956b5d9
MW
1688/**
1689 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1690 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1691 * @offset: the offset of the GPIO to apply the configuration
1692 * @config: the configuration to be applied
1693 */
13daf489 1694int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1695 unsigned long config)
1696{
a0b66a73 1697 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1698}
1699EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1700
f23f1516 1701#ifdef CONFIG_PINCTRL
165adc9c 1702
586a87e6
CR
1703/**
1704 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1705 * @gc: the gpiochip to add the range for
d32651f6 1706 * @pctldev: the pin controller to map to
586a87e6
CR
1707 * @gpio_offset: the start offset in the current gpio_chip number space
1708 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1709 *
1710 * Calling this function directly from a DeviceTree-supported
1711 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1712 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1713 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1714 */
a0b66a73 1715int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1716 struct pinctrl_dev *pctldev,
1717 unsigned int gpio_offset, const char *pin_group)
1718{
1719 struct gpio_pin_range *pin_range;
a0b66a73 1720 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1721 int ret;
1722
1723 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1724 if (!pin_range) {
a0b66a73 1725 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1726 return -ENOMEM;
1727 }
1728
1729 /* Use local offset as range ID */
1730 pin_range->range.id = gpio_offset;
a0b66a73
LW
1731 pin_range->range.gc = gc;
1732 pin_range->range.name = gc->label;
fdeb8e15 1733 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1734 pin_range->pctldev = pctldev;
1735
1736 ret = pinctrl_get_group_pins(pctldev, pin_group,
1737 &pin_range->range.pins,
1738 &pin_range->range.npins);
61c6375d
MN
1739 if (ret < 0) {
1740 kfree(pin_range);
586a87e6 1741 return ret;
61c6375d 1742 }
586a87e6
CR
1743
1744 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1745
a0b66a73 1746 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1747 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1748 pinctrl_dev_get_devname(pctldev), pin_group);
1749
20ec3e39 1750 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1751
1752 return 0;
1753}
1754EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1755
3f0f8670
LW
1756/**
1757 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1758 * @gc: the gpiochip to add the range for
950d55f5 1759 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1760 * @gpio_offset: the start offset in the current gpio_chip number space
1761 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1762 * @npins: the number of pins from the offset of each pin space (GPIO and
1763 * pin controller) to accumulate in this range
950d55f5
TR
1764 *
1765 * Returns:
1766 * 0 on success, or a negative error-code on failure.
973c1714
CL
1767 *
1768 * Calling this function directly from a DeviceTree-supported
1769 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1770 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1771 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1772 */
a0b66a73 1773int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1774 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1775 unsigned int npins)
f23f1516
SH
1776{
1777 struct gpio_pin_range *pin_range;
a0b66a73 1778 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1779 int ret;
f23f1516 1780
3f0f8670 1781 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1782 if (!pin_range) {
a0b66a73 1783 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1784 return -ENOMEM;
f23f1516
SH
1785 }
1786
3f0f8670 1787 /* Use local offset as range ID */
316511c0 1788 pin_range->range.id = gpio_offset;
a0b66a73
LW
1789 pin_range->range.gc = gc;
1790 pin_range->range.name = gc->label;
fdeb8e15 1791 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1792 pin_range->range.pin_base = pin_offset;
f23f1516 1793 pin_range->range.npins = npins;
192c369c 1794 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1795 &pin_range->range);
8f23ca1a 1796 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1797 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1798 chip_err(gc, "could not create pin range\n");
3f0f8670 1799 kfree(pin_range);
b4d4b1f0 1800 return ret;
3f0f8670 1801 }
a0b66a73 1802 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1803 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1804 pinctl_name,
1805 pin_offset, pin_offset + npins - 1);
f23f1516 1806
20ec3e39 1807 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1808
1809 return 0;
f23f1516 1810}
165adc9c 1811EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1812
3f0f8670
LW
1813/**
1814 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1815 * @gc: the chip to remove all the mappings for
3f0f8670 1816 */
a0b66a73 1817void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1818{
1819 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1820 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1821
20ec3e39 1822 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1823 list_del(&pin_range->node);
1824 pinctrl_remove_gpio_range(pin_range->pctldev,
1825 &pin_range->range);
3f0f8670 1826 kfree(pin_range);
f23f1516
SH
1827 }
1828}
165adc9c
LW
1829EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1830
1831#endif /* CONFIG_PINCTRL */
f23f1516 1832
d2876d08
DB
1833/* These "optional" allocation calls help prevent drivers from stomping
1834 * on each other, and help provide better diagnostics in debugfs.
1835 * They're called even less than the "set direction" calls.
1836 */
fac9d885 1837static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1838{
a0b66a73 1839 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1840 int ret;
d2876d08 1841 unsigned long flags;
3789f5ac 1842 unsigned offset;
d2876d08 1843
18534df4
MS
1844 if (label) {
1845 label = kstrdup_const(label, GFP_KERNEL);
1846 if (!label)
1847 return -ENOMEM;
1848 }
1849
bcabdef1
AC
1850 spin_lock_irqsave(&gpio_lock, flags);
1851
d2876d08 1852 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1853 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1854 */
1855
1856 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1857 desc_set_label(desc, label ? : "?");
438d8908 1858 } else {
d377f56f 1859 ret = -EBUSY;
95d9f84f 1860 goto out_free_unlock;
35e8bb51
DB
1861 }
1862
a0b66a73
LW
1863 if (gc->request) {
1864 /* gc->request may sleep */
35e8bb51 1865 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 1866 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
1867 if (gpiochip_line_is_valid(gc, offset))
1868 ret = gc->request(gc, offset);
3789f5ac 1869 else
d377f56f 1870 ret = -EINVAL;
35e8bb51
DB
1871 spin_lock_irqsave(&gpio_lock, flags);
1872
8bbff39c 1873 if (ret) {
35e8bb51 1874 desc_set_label(desc, NULL);
35e8bb51 1875 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 1876 goto out_free_unlock;
35e8bb51 1877 }
438d8908 1878 }
a0b66a73
LW
1879 if (gc->get_direction) {
1880 /* gc->get_direction may sleep */
80b0a602 1881 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 1882 gpiod_get_direction(desc);
80b0a602
MN
1883 spin_lock_irqsave(&gpio_lock, flags);
1884 }
77c2d792 1885 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
1886 return 0;
1887
1888out_free_unlock:
1889 spin_unlock_irqrestore(&gpio_lock, flags);
1890 kfree_const(label);
d377f56f 1891 return ret;
77c2d792
MW
1892}
1893
fdeb8e15
LW
1894/*
1895 * This descriptor validation needs to be inserted verbatim into each
1896 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
1897 * macro to avoid endless duplication. If the desc is NULL it is an
1898 * optional GPIO and calls should just bail out.
fdeb8e15 1899 */
a746a232
RV
1900static int validate_desc(const struct gpio_desc *desc, const char *func)
1901{
1902 if (!desc)
1903 return 0;
1904 if (IS_ERR(desc)) {
1905 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1906 return PTR_ERR(desc);
1907 }
1908 if (!desc->gdev) {
1909 pr_warn("%s: invalid GPIO (no device)\n", func);
1910 return -EINVAL;
1911 }
1912 if (!desc->gdev->chip) {
1913 dev_warn(&desc->gdev->dev,
1914 "%s: backing chip is gone\n", func);
1915 return 0;
1916 }
1917 return 1;
1918}
1919
fdeb8e15 1920#define VALIDATE_DESC(desc) do { \
a746a232
RV
1921 int __valid = validate_desc(desc, __func__); \
1922 if (__valid <= 0) \
1923 return __valid; \
1924 } while (0)
fdeb8e15
LW
1925
1926#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
1927 int __valid = validate_desc(desc, __func__); \
1928 if (__valid <= 0) \
fdeb8e15 1929 return; \
a746a232 1930 } while (0)
fdeb8e15 1931
0eb4c6c2 1932int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 1933{
d377f56f 1934 int ret = -EPROBE_DEFER;
fdeb8e15 1935 struct gpio_device *gdev;
77c2d792 1936
fdeb8e15
LW
1937 VALIDATE_DESC(desc);
1938 gdev = desc->gdev;
77c2d792 1939
fdeb8e15 1940 if (try_module_get(gdev->owner)) {
d377f56f 1941 ret = gpiod_request_commit(desc, label);
8bbff39c 1942 if (ret)
fdeb8e15 1943 module_put(gdev->owner);
33a68e86
LW
1944 else
1945 get_device(&gdev->dev);
77c2d792
MW
1946 }
1947
d377f56f
LW
1948 if (ret)
1949 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 1950
d377f56f 1951 return ret;
d2876d08 1952}
372e722e 1953
fac9d885 1954static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 1955{
77c2d792 1956 bool ret = false;
d2876d08 1957 unsigned long flags;
a0b66a73 1958 struct gpio_chip *gc;
d2876d08 1959
3d599d1c
UKK
1960 might_sleep();
1961
372e722e 1962 gpiod_unexport(desc);
d8f388d8 1963
d2876d08
DB
1964 spin_lock_irqsave(&gpio_lock, flags);
1965
a0b66a73
LW
1966 gc = desc->gdev->chip;
1967 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
1968 if (gc->free) {
35e8bb51 1969 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
1970 might_sleep_if(gc->can_sleep);
1971 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
1972 spin_lock_irqsave(&gpio_lock, flags);
1973 }
18534df4 1974 kfree_const(desc->label);
d2876d08 1975 desc_set_label(desc, NULL);
07697461 1976 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 1977 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 1978 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 1979 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
1980 clear_bit(FLAG_PULL_UP, &desc->flags);
1981 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 1982 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
1983 clear_bit(FLAG_EDGE_RISING, &desc->flags);
1984 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 1985 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
1986#ifdef CONFIG_OF_DYNAMIC
1987 desc->hog = NULL;
65cff704
KG
1988#endif
1989#ifdef CONFIG_GPIO_CDEV
1990 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 1991#endif
77c2d792
MW
1992 ret = true;
1993 }
d2876d08
DB
1994
1995 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
1996 blocking_notifier_call_chain(&desc->gdev->notifier,
1997 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 1998
77c2d792
MW
1999 return ret;
2000}
2001
0eb4c6c2 2002void gpiod_free(struct gpio_desc *desc)
77c2d792 2003{
fac9d885 2004 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2005 module_put(desc->gdev->owner);
33a68e86
LW
2006 put_device(&desc->gdev->dev);
2007 } else {
77c2d792 2008 WARN_ON(extra_checks);
33a68e86 2009 }
d2876d08 2010}
372e722e 2011
d2876d08
DB
2012/**
2013 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2014 * @gc: controller managing the signal
d2876d08
DB
2015 * @offset: of signal within controller's 0..(ngpio - 1) range
2016 *
2017 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2018 * The string returned is the label passed to gpio_request(); if none has been
2019 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2020 *
2021 * This function is for use by GPIO controller drivers. The label can
2022 * help with diagnostics, and knowing that the signal is used as a GPIO
2023 * can help avoid accidentally multiplexing it to another controller.
2024 */
13daf489 2025const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2026{
6c0b4e6c 2027 struct gpio_desc *desc;
6c0b4e6c 2028
a0b66a73 2029 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2030 if (IS_ERR(desc))
2031 return NULL;
6c0b4e6c 2032
372e722e 2033 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2034 return NULL;
372e722e 2035 return desc->label;
d2876d08
DB
2036}
2037EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2038
77c2d792
MW
2039/**
2040 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2041 * @gc: GPIO chip
950d55f5 2042 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2043 * @label: label for the GPIO
5923ea6c
LW
2044 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2045 * specify things like line inversion semantics with the machine flags
2046 * such as GPIO_OUT_LOW
2047 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2048 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2049 *
2050 * Function allows GPIO chip drivers to request and use their own GPIO
2051 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2052 * function will not increase reference count of the GPIO chip module. This
2053 * allows the GPIO chip module to be unloaded as needed (we assume that the
2054 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2055 *
2056 * Returns:
2057 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2058 * code on failure.
77c2d792 2059 */
a0b66a73 2060struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2061 unsigned int hwnum,
21abf103 2062 const char *label,
5923ea6c
LW
2063 enum gpio_lookup_flags lflags,
2064 enum gpiod_flags dflags)
77c2d792 2065{
a0b66a73 2066 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2067 int ret;
77c2d792 2068
abdc08a3 2069 if (IS_ERR(desc)) {
a0b66a73 2070 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2071 return desc;
2072 }
2073
d377f56f
LW
2074 ret = gpiod_request_commit(desc, label);
2075 if (ret < 0)
2076 return ERR_PTR(ret);
77c2d792 2077
d377f56f
LW
2078 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2079 if (ret) {
a0b66a73 2080 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2081 gpiod_free_commit(desc);
d377f56f 2082 return ERR_PTR(ret);
21abf103
LW
2083 }
2084
abdc08a3 2085 return desc;
77c2d792 2086}
f7d4ad98 2087EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2088
2089/**
2090 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2091 * @desc: GPIO descriptor to free
2092 *
2093 * Function frees the given GPIO requested previously with
2094 * gpiochip_request_own_desc().
2095 */
2096void gpiochip_free_own_desc(struct gpio_desc *desc)
2097{
2098 if (desc)
fac9d885 2099 gpiod_free_commit(desc);
77c2d792 2100}
f7d4ad98 2101EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2102
fdeb8e15
LW
2103/*
2104 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2105 * some cases this is done in early boot, before IRQs are enabled.
2106 *
2107 * As a rule these aren't called more than once (except for drivers
2108 * using the open-drain emulation idiom) so these are natural places
2109 * to accumulate extra debugging checks. Note that we can't (yet)
2110 * rely on gpio_request() having been called beforehand.
2111 */
2112
d99f8876 2113static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2114 unsigned long config)
71479789 2115{
d90f3685
BG
2116 if (!gc->set_config)
2117 return -ENOTSUPP;
542f3615 2118
62adc6f3 2119 return gc->set_config(gc, offset, config);
71479789
TP
2120}
2121
0c4d8666
AS
2122static int gpio_set_config_with_argument(struct gpio_desc *desc,
2123 enum pin_config_param mode,
2124 u32 argument)
d99f8876 2125{
a0b66a73 2126 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2127 unsigned long config;
0c4d8666
AS
2128
2129 config = pinconf_to_config_packed(mode, argument);
2130 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2131}
2132
baca3b15
AS
2133static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2134 enum pin_config_param mode,
2135 u32 argument)
2136{
2137 struct device *dev = &desc->gdev->dev;
2138 int gpio = gpio_chip_hwgpio(desc);
2139 int ret;
2140
2141 ret = gpio_set_config_with_argument(desc, mode, argument);
2142 if (ret != -ENOTSUPP)
2143 return ret;
d99f8876
BG
2144
2145 switch (mode) {
baca3b15
AS
2146 case PIN_CONFIG_PERSIST_STATE:
2147 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2148 break;
d99f8876 2149 default:
baca3b15 2150 break;
d99f8876
BG
2151 }
2152
baca3b15
AS
2153 return 0;
2154}
2155
0c4d8666
AS
2156static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2157{
6aa32ad7 2158 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2159}
2160
5f4bf171 2161static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2162{
9ef6293c 2163 enum pin_config_param bias;
6aa32ad7 2164 unsigned int arg;
2148ad77
KG
2165
2166 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2167 bias = PIN_CONFIG_BIAS_DISABLE;
2168 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2169 bias = PIN_CONFIG_BIAS_PULL_UP;
2170 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2171 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2172 else
2173 return 0;
2148ad77 2174
6aa32ad7
AS
2175 switch (bias) {
2176 case PIN_CONFIG_BIAS_PULL_DOWN:
2177 case PIN_CONFIG_BIAS_PULL_UP:
2178 arg = 1;
2179 break;
2180
2181 default:
2182 arg = 0;
2183 break;
2148ad77 2184 }
6aa32ad7 2185
baca3b15 2186 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2187}
2188
f725edd8
AS
2189int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2190{
2191 return gpio_set_config_with_argument_optional(desc,
2192 PIN_CONFIG_INPUT_DEBOUNCE,
2193 debounce);
2148ad77
KG
2194}
2195
79a9becd
AC
2196/**
2197 * gpiod_direction_input - set the GPIO direction to input
2198 * @desc: GPIO to set to input
2199 *
2200 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2201 * be called safely on it.
2202 *
2203 * Return 0 in case of success, else an error code.
2204 */
2205int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2206{
a0b66a73 2207 struct gpio_chip *gc;
d377f56f 2208 int ret = 0;
d2876d08 2209
fdeb8e15 2210 VALIDATE_DESC(desc);
a0b66a73 2211 gc = desc->gdev->chip;
bcabdef1 2212
e48d194d
LW
2213 /*
2214 * It is legal to have no .get() and .direction_input() specified if
2215 * the chip is output-only, but you can't specify .direction_input()
2216 * and not support the .get() operation, that doesn't make sense.
2217 */
a0b66a73 2218 if (!gc->get && gc->direction_input) {
6424de5a 2219 gpiod_warn(desc,
e48d194d
LW
2220 "%s: missing get() but have direction_input()\n",
2221 __func__);
be1a4b13
LW
2222 return -EIO;
2223 }
2224
e48d194d
LW
2225 /*
2226 * If we have a .direction_input() callback, things are simple,
2227 * just call it. Else we are some input-only chip so try to check the
2228 * direction (if .get_direction() is supported) else we silently
2229 * assume we are in input mode after this.
2230 */
a0b66a73
LW
2231 if (gc->direction_input) {
2232 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2233 } else if (gc->get_direction &&
2234 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2235 gpiod_warn(desc,
e48d194d
LW
2236 "%s: missing direction_input() operation and line is output\n",
2237 __func__);
ae9847f4
RR
2238 return -EIO;
2239 }
2148ad77 2240 if (ret == 0) {
d2876d08 2241 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2242 ret = gpio_set_bias(desc);
2148ad77 2243 }
d449991c 2244
d377f56f 2245 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2246
d377f56f 2247 return ret;
d2876d08 2248}
79a9becd 2249EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2250
fac9d885 2251static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2252{
c663e5f5 2253 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2254 int val = !!value;
ae9847f4 2255 int ret = 0;
d2876d08 2256
e48d194d
LW
2257 /*
2258 * It's OK not to specify .direction_output() if the gpiochip is
2259 * output-only, but if there is then not even a .set() operation it
2260 * is pretty tricky to drive the output line.
2261 */
ae9847f4 2262 if (!gc->set && !gc->direction_output) {
6424de5a 2263 gpiod_warn(desc,
e48d194d
LW
2264 "%s: missing set() and direction_output() operations\n",
2265 __func__);
be1a4b13
LW
2266 return -EIO;
2267 }
2268
ae9847f4
RR
2269 if (gc->direction_output) {
2270 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2271 } else {
e48d194d 2272 /* Check that we are in output mode if we can */
ae9847f4
RR
2273 if (gc->get_direction &&
2274 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2275 gpiod_warn(desc,
2276 "%s: missing direction_output() operation\n",
2277 __func__);
2278 return -EIO;
2279 }
e48d194d
LW
2280 /*
2281 * If we can't actively set the direction, we are some
2282 * output-only chip, so just drive the output as desired.
2283 */
ae9847f4
RR
2284 gc->set(gc, gpio_chip_hwgpio(desc), val);
2285 }
2286
c663e5f5 2287 if (!ret)
d2876d08 2288 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2289 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2290 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2291 return ret;
d2876d08 2292}
ef70bbe1
PZ
2293
2294/**
2295 * gpiod_direction_output_raw - set the GPIO direction to output
2296 * @desc: GPIO to set to output
2297 * @value: initial output value of the GPIO
2298 *
2299 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2300 * be called safely on it. The initial value of the output must be specified
2301 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2302 *
2303 * Return 0 in case of success, else an error code.
2304 */
2305int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2306{
fdeb8e15 2307 VALIDATE_DESC(desc);
fac9d885 2308 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2309}
2310EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2311
2312/**
90df4fe0 2313 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2314 * @desc: GPIO to set to output
2315 * @value: initial output value of the GPIO
2316 *
2317 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2318 * be called safely on it. The initial value of the output must be specified
2319 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2320 * account.
2321 *
2322 * Return 0 in case of success, else an error code.
2323 */
2324int gpiod_direction_output(struct gpio_desc *desc, int value)
2325{
02e47980
LW
2326 int ret;
2327
fdeb8e15 2328 VALIDATE_DESC(desc);
ef70bbe1
PZ
2329 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2330 value = !value;
ad17731d
LW
2331 else
2332 value = !!value;
02e47980 2333
4e9439dd
HV
2334 /* GPIOs used for enabled IRQs shall not be set as output */
2335 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2336 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2337 gpiod_err(desc,
2338 "%s: tried to set a GPIO tied to an IRQ as output\n",
2339 __func__);
2340 return -EIO;
2341 }
2342
2343 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2344 /* First see if we can enable open drain in hardware */
83522358 2345 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2346 if (!ret)
2347 goto set_output_value;
2348 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2349 if (value) {
2350 ret = gpiod_direction_input(desc);
2351 goto set_output_flag;
2352 }
02e47980
LW
2353 }
2354 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2355 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2356 if (!ret)
2357 goto set_output_value;
2358 /* Emulate open source by not actively driving the line low */
e735244e
BG
2359 if (!value) {
2360 ret = gpiod_direction_input(desc);
2361 goto set_output_flag;
2362 }
02e47980 2363 } else {
83522358 2364 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2365 }
2366
2367set_output_value:
5f4bf171 2368 ret = gpio_set_bias(desc);
2821ae5f
KG
2369 if (ret)
2370 return ret;
fac9d885 2371 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2372
2373set_output_flag:
2374 /*
2375 * When emulating open-source or open-drain functionalities by not
2376 * actively driving the line (setting mode to input) we still need to
2377 * set the IS_OUT flag or otherwise we won't be able to set the line
2378 * value anymore.
2379 */
2380 if (ret == 0)
2381 set_bit(FLAG_IS_OUT, &desc->flags);
2382 return ret;
ef70bbe1 2383}
79a9becd 2384EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2385
8ced32ff
GU
2386/**
2387 * gpiod_set_config - sets @config for a GPIO
2388 * @desc: descriptor of the GPIO for which to set the configuration
2389 * @config: Same packed config format as generic pinconf
2390 *
2391 * Returns:
2392 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2393 * configuration.
2394 */
2395int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2396{
a0b66a73 2397 struct gpio_chip *gc;
8ced32ff
GU
2398
2399 VALIDATE_DESC(desc);
a0b66a73 2400 gc = desc->gdev->chip;
8ced32ff 2401
a0b66a73 2402 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2403}
2404EXPORT_SYMBOL_GPL(gpiod_set_config);
2405
c4b5be98 2406/**
950d55f5
TR
2407 * gpiod_set_debounce - sets @debounce time for a GPIO
2408 * @desc: descriptor of the GPIO for which to set debounce time
2409 * @debounce: debounce time in microseconds
65d87656 2410 *
950d55f5
TR
2411 * Returns:
2412 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2413 * debounce time.
c4b5be98 2414 */
13daf489 2415int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2416{
8ced32ff 2417 unsigned long config;
be1a4b13 2418
2956b5d9 2419 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2420 return gpiod_set_config(desc, config);
c4b5be98 2421}
79a9becd 2422EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2423
e10f72bf
AJ
2424/**
2425 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2426 * @desc: descriptor of the GPIO for which to configure persistence
2427 * @transitory: True to lose state on suspend or reset, false for persistence
2428 *
2429 * Returns:
2430 * 0 on success, otherwise a negative error code.
2431 */
2432int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2433{
156dd392 2434 VALIDATE_DESC(desc);
e10f72bf
AJ
2435 /*
2436 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2437 * persistence state.
2438 */
4fc5bfeb 2439 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2440
2441 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2442 return gpio_set_config_with_argument_optional(desc,
2443 PIN_CONFIG_PERSIST_STATE,
2444 !transitory);
e10f72bf
AJ
2445}
2446EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2447
79a9becd
AC
2448/**
2449 * gpiod_is_active_low - test whether a GPIO is active-low or not
2450 * @desc: the gpio descriptor to test
2451 *
2452 * Returns 1 if the GPIO is active-low, 0 otherwise.
2453 */
2454int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2455{
fdeb8e15 2456 VALIDATE_DESC(desc);
79a9becd 2457 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2458}
79a9becd 2459EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2460
d3a5bcb4
MM
2461/**
2462 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2463 * @desc: the gpio descriptor to change
2464 */
2465void gpiod_toggle_active_low(struct gpio_desc *desc)
2466{
2467 VALIDATE_DESC_VOID(desc);
2468 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2469}
2470EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2471
d2876d08
DB
2472/* I/O calls are only valid after configuration completed; the relevant
2473 * "is this a valid GPIO" error checks should already have been done.
2474 *
2475 * "Get" operations are often inlinable as reading a pin value register,
2476 * and masking the relevant bit in that register.
2477 *
2478 * When "set" operations are inlinable, they involve writing that mask to
2479 * one register to set a low value, or a different register to set it high.
2480 * Otherwise locking is needed, so there may be little value to inlining.
2481 *
2482 *------------------------------------------------------------------------
2483 *
2484 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2485 * have requested the GPIO. That can include implicit requesting by
2486 * a direction setting call. Marking a gpio as requested locks its chip
2487 * in memory, guaranteeing that these table lookups need no more locking
2488 * and that gpiochip_remove() will fail.
2489 *
2490 * REVISIT when debugging, consider adding some instrumentation to ensure
2491 * that the GPIO was actually requested.
2492 */
2493
fac9d885 2494static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2495{
a0b66a73 2496 struct gpio_chip *gc;
372e722e 2497 int offset;
e20538b8 2498 int value;
d2876d08 2499
a0b66a73 2500 gc = desc->gdev->chip;
372e722e 2501 offset = gpio_chip_hwgpio(desc);
a0b66a73 2502 value = gc->get ? gc->get(gc, offset) : -EIO;
723a6303 2503 value = value < 0 ? value : !!value;
372e722e 2504 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2505 return value;
d2876d08 2506}
372e722e 2507
a0b66a73 2508static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2509 unsigned long *mask, unsigned long *bits)
2510{
a0b66a73
LW
2511 if (gc->get_multiple) {
2512 return gc->get_multiple(gc, mask, bits);
2513 } else if (gc->get) {
eec1d566
LW
2514 int i, value;
2515
a0b66a73
LW
2516 for_each_set_bit(i, mask, gc->ngpio) {
2517 value = gc->get(gc, i);
eec1d566
LW
2518 if (value < 0)
2519 return value;
2520 __assign_bit(i, bits, value);
2521 }
2522 return 0;
2523 }
2524 return -EIO;
2525}
2526
2527int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2528 unsigned int array_size,
2529 struct gpio_desc **desc_array,
77588c14 2530 struct gpio_array *array_info,
b9762beb 2531 unsigned long *value_bitmap)
eec1d566 2532{
d377f56f 2533 int ret, i = 0;
b17566a6
JK
2534
2535 /*
2536 * Validate array_info against desc_array and its size.
2537 * It should immediately follow desc_array if both
2538 * have been obtained from the same gpiod_get_array() call.
2539 */
2540 if (array_info && array_info->desc == desc_array &&
2541 array_size <= array_info->size &&
2542 (void *)array_info == desc_array + array_info->size) {
2543 if (!can_sleep)
2544 WARN_ON(array_info->chip->can_sleep);
2545
d377f56f 2546 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2547 array_info->get_mask,
2548 value_bitmap);
d377f56f
LW
2549 if (ret)
2550 return ret;
b17566a6
JK
2551
2552 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2553 bitmap_xor(value_bitmap, value_bitmap,
2554 array_info->invert_mask, array_size);
2555
b17566a6 2556 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2557 if (i == array_size)
2558 return 0;
b17566a6
JK
2559 } else {
2560 array_info = NULL;
2561 }
eec1d566
LW
2562
2563 while (i < array_size) {
a0b66a73 2564 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2565 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2566 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2567 unsigned long *mask, *bits;
c07ea8d0 2568 int first, j;
eec1d566 2569
a0b66a73 2570 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2571 mask = fastpath_mask;
2572 bits = fastpath_bits;
3027743f 2573 } else {
c354c295
AS
2574 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2575
2576 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2577 if (!mask)
2578 return -ENOMEM;
c80c4435 2579
c354c295
AS
2580 bits = bitmap_alloc(gc->ngpio, flags);
2581 if (!bits) {
2582 bitmap_free(mask);
2583 return -ENOMEM;
2584 }
3027743f
LA
2585 }
2586
a0b66a73 2587 bitmap_zero(mask, gc->ngpio);
3027743f 2588
eec1d566 2589 if (!can_sleep)
a0b66a73 2590 WARN_ON(gc->can_sleep);
eec1d566
LW
2591
2592 /* collect all inputs belonging to the same chip */
2593 first = i;
eec1d566
LW
2594 do {
2595 const struct gpio_desc *desc = desc_array[i];
2596 int hwgpio = gpio_chip_hwgpio(desc);
2597
2598 __set_bit(hwgpio, mask);
2599 i++;
b17566a6
JK
2600
2601 if (array_info)
35ae7f96
JK
2602 i = find_next_zero_bit(array_info->get_mask,
2603 array_size, i);
eec1d566 2604 } while ((i < array_size) &&
a0b66a73 2605 (desc_array[i]->gdev->chip == gc));
eec1d566 2606
a0b66a73 2607 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2608 if (ret) {
c80c4435 2609 if (mask != fastpath_mask)
c354c295
AS
2610 bitmap_free(mask);
2611 if (bits != fastpath_bits)
2612 bitmap_free(bits);
eec1d566 2613 return ret;
3027743f 2614 }
eec1d566 2615
b17566a6 2616 for (j = first; j < i; ) {
eec1d566
LW
2617 const struct gpio_desc *desc = desc_array[j];
2618 int hwgpio = gpio_chip_hwgpio(desc);
2619 int value = test_bit(hwgpio, bits);
2620
2621 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2622 value = !value;
b9762beb 2623 __assign_bit(j, value_bitmap, value);
eec1d566 2624 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2625 j++;
b17566a6
JK
2626
2627 if (array_info)
35ae7f96
JK
2628 j = find_next_zero_bit(array_info->get_mask, i,
2629 j);
eec1d566 2630 }
3027743f 2631
c80c4435 2632 if (mask != fastpath_mask)
c354c295
AS
2633 bitmap_free(mask);
2634 if (bits != fastpath_bits)
2635 bitmap_free(bits);
eec1d566
LW
2636 }
2637 return 0;
2638}
2639
d2876d08 2640/**
79a9becd
AC
2641 * gpiod_get_raw_value() - return a gpio's raw value
2642 * @desc: gpio whose value will be returned
d2876d08 2643 *
79a9becd 2644 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2645 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2646 *
827a9b8b 2647 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2648 * complain if the GPIO chip functions potentially sleep.
d2876d08 2649 */
79a9becd 2650int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2651{
fdeb8e15 2652 VALIDATE_DESC(desc);
3285170f 2653 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2654 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2655 return gpiod_get_raw_value_commit(desc);
d2876d08 2656}
79a9becd 2657EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2658
79a9becd
AC
2659/**
2660 * gpiod_get_value() - return a gpio's value
2661 * @desc: gpio whose value will be returned
2662 *
2663 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2664 * account, or negative errno on failure.
79a9becd 2665 *
827a9b8b 2666 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2667 * complain if the GPIO chip functions potentially sleep.
2668 */
2669int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2670{
79a9becd 2671 int value;
fdeb8e15
LW
2672
2673 VALIDATE_DESC(desc);
3285170f 2674 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2675 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2676
fac9d885 2677 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2678 if (value < 0)
2679 return value;
2680
79a9becd
AC
2681 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2682 value = !value;
2683
2684 return value;
372e722e 2685}
79a9becd 2686EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2687
eec1d566
LW
2688/**
2689 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2690 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2691 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2692 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2693 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2694 *
2695 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2696 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2697 * else an error code.
2698 *
827a9b8b 2699 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2700 * and it will complain if the GPIO chip functions potentially sleep.
2701 */
2702int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2703 struct gpio_desc **desc_array,
77588c14 2704 struct gpio_array *array_info,
b9762beb 2705 unsigned long *value_bitmap)
eec1d566
LW
2706{
2707 if (!desc_array)
2708 return -EINVAL;
2709 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2710 desc_array, array_info,
2711 value_bitmap);
eec1d566
LW
2712}
2713EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2714
2715/**
2716 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2717 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2718 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2719 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2720 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2721 *
2722 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2723 * into account. Return 0 in case of success, else an error code.
2724 *
827a9b8b 2725 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2726 * and it will complain if the GPIO chip functions potentially sleep.
2727 */
2728int gpiod_get_array_value(unsigned int array_size,
b9762beb 2729 struct gpio_desc **desc_array,
77588c14 2730 struct gpio_array *array_info,
b9762beb 2731 unsigned long *value_bitmap)
eec1d566
LW
2732{
2733 if (!desc_array)
2734 return -EINVAL;
2735 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2736 desc_array, array_info,
2737 value_bitmap);
eec1d566
LW
2738}
2739EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2740
aca5ce14 2741/*
fac9d885 2742 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2743 * @desc: gpio descriptor whose state need to be set.
20a8a968 2744 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2745 */
fac9d885 2746static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2747{
d377f56f 2748 int ret = 0;
a0b66a73 2749 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2750 int offset = gpio_chip_hwgpio(desc);
2751
aca5ce14 2752 if (value) {
a0b66a73 2753 ret = gc->direction_input(gc, offset);
aca5ce14 2754 } else {
a0b66a73 2755 ret = gc->direction_output(gc, offset, 0);
d377f56f 2756 if (!ret)
372e722e 2757 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2758 }
d377f56f
LW
2759 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2760 if (ret < 0)
6424de5a
MB
2761 gpiod_err(desc,
2762 "%s: Error in set_value for open drain err %d\n",
d377f56f 2763 __func__, ret);
aca5ce14
LD
2764}
2765
25553ff0 2766/*
79a9becd
AC
2767 * _gpio_set_open_source_value() - Set the open source gpio's value.
2768 * @desc: gpio descriptor whose state need to be set.
20a8a968 2769 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2770 */
fac9d885 2771static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2772{
d377f56f 2773 int ret = 0;
a0b66a73 2774 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2775 int offset = gpio_chip_hwgpio(desc);
2776
25553ff0 2777 if (value) {
a0b66a73 2778 ret = gc->direction_output(gc, offset, 1);
d377f56f 2779 if (!ret)
372e722e 2780 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2781 } else {
a0b66a73 2782 ret = gc->direction_input(gc, offset);
25553ff0 2783 }
d377f56f
LW
2784 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2785 if (ret < 0)
6424de5a
MB
2786 gpiod_err(desc,
2787 "%s: Error in set_value for open source err %d\n",
d377f56f 2788 __func__, ret);
25553ff0
LD
2789}
2790
fac9d885 2791static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2792{
a0b66a73 2793 struct gpio_chip *gc;
d2876d08 2794
a0b66a73 2795 gc = desc->gdev->chip;
372e722e 2796 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 2797 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
2798}
2799
5f424243
RI
2800/*
2801 * set multiple outputs on the same chip;
2802 * use the chip's set_multiple function if available;
2803 * otherwise set the outputs sequentially;
a0b66a73 2804 * @chip: the GPIO chip we operate on
5f424243
RI
2805 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
2806 * defines which outputs are to be changed
2807 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
2808 * defines the values the outputs specified by mask are to be set to
2809 */
a0b66a73 2810static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
2811 unsigned long *mask, unsigned long *bits)
2812{
a0b66a73
LW
2813 if (gc->set_multiple) {
2814 gc->set_multiple(gc, mask, bits);
5f424243 2815 } else {
5e4e6fb3
AS
2816 unsigned int i;
2817
2818 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
2819 for_each_set_bit(i, mask, gc->ngpio)
2820 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
2821 }
2822}
2823
3027743f 2824int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
2825 unsigned int array_size,
2826 struct gpio_desc **desc_array,
2827 struct gpio_array *array_info,
2828 unsigned long *value_bitmap)
5f424243
RI
2829{
2830 int i = 0;
2831
b17566a6
JK
2832 /*
2833 * Validate array_info against desc_array and its size.
2834 * It should immediately follow desc_array if both
2835 * have been obtained from the same gpiod_get_array() call.
2836 */
2837 if (array_info && array_info->desc == desc_array &&
2838 array_size <= array_info->size &&
2839 (void *)array_info == desc_array + array_info->size) {
2840 if (!can_sleep)
2841 WARN_ON(array_info->chip->can_sleep);
2842
2843 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2844 bitmap_xor(value_bitmap, value_bitmap,
2845 array_info->invert_mask, array_size);
2846
2847 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2848 value_bitmap);
2849
b17566a6 2850 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
2851 if (i == array_size)
2852 return 0;
b17566a6
JK
2853 } else {
2854 array_info = NULL;
2855 }
2856
5f424243 2857 while (i < array_size) {
a0b66a73 2858 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2859 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2860 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2861 unsigned long *mask, *bits;
5f424243
RI
2862 int count = 0;
2863
a0b66a73 2864 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2865 mask = fastpath_mask;
2866 bits = fastpath_bits;
3027743f 2867 } else {
c354c295
AS
2868 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2869
2870 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2871 if (!mask)
2872 return -ENOMEM;
c80c4435 2873
c354c295
AS
2874 bits = bitmap_alloc(gc->ngpio, flags);
2875 if (!bits) {
2876 bitmap_free(mask);
2877 return -ENOMEM;
2878 }
3027743f
LA
2879 }
2880
a0b66a73 2881 bitmap_zero(mask, gc->ngpio);
3027743f 2882
38e003f4 2883 if (!can_sleep)
a0b66a73 2884 WARN_ON(gc->can_sleep);
38e003f4 2885
5f424243
RI
2886 do {
2887 struct gpio_desc *desc = desc_array[i];
2888 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 2889 int value = test_bit(i, value_bitmap);
5f424243 2890
b17566a6
JK
2891 /*
2892 * Pins applicable for fast input but not for
2893 * fast output processing may have been already
2894 * inverted inside the fast path, skip them.
2895 */
2896 if (!raw && !(array_info &&
2897 test_bit(i, array_info->invert_mask)) &&
2898 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
2899 value = !value;
2900 trace_gpio_value(desc_to_gpio(desc), 0, value);
2901 /*
2902 * collect all normal outputs belonging to the same chip
2903 * open drain and open source outputs are set individually
2904 */
02e47980 2905 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 2906 gpio_set_open_drain_value_commit(desc, value);
02e47980 2907 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 2908 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
2909 } else {
2910 __set_bit(hwgpio, mask);
4fc5bfeb 2911 __assign_bit(hwgpio, bits, value);
5f424243
RI
2912 count++;
2913 }
2914 i++;
b17566a6
JK
2915
2916 if (array_info)
35ae7f96
JK
2917 i = find_next_zero_bit(array_info->set_mask,
2918 array_size, i);
fdeb8e15 2919 } while ((i < array_size) &&
a0b66a73 2920 (desc_array[i]->gdev->chip == gc));
5f424243 2921 /* push collected bits to outputs */
38e003f4 2922 if (count != 0)
a0b66a73 2923 gpio_chip_set_multiple(gc, mask, bits);
3027743f 2924
c80c4435 2925 if (mask != fastpath_mask)
c354c295
AS
2926 bitmap_free(mask);
2927 if (bits != fastpath_bits)
2928 bitmap_free(bits);
5f424243 2929 }
3027743f 2930 return 0;
5f424243
RI
2931}
2932
d2876d08 2933/**
79a9becd
AC
2934 * gpiod_set_raw_value() - assign a gpio's raw value
2935 * @desc: gpio whose value will be assigned
d2876d08 2936 * @value: value to assign
d2876d08 2937 *
79a9becd
AC
2938 * Set the raw value of the GPIO, i.e. the value of its physical line without
2939 * regard for its ACTIVE_LOW status.
2940 *
827a9b8b 2941 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2942 * complain if the GPIO chip functions potentially sleep.
d2876d08 2943 */
79a9becd 2944void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 2945{
fdeb8e15 2946 VALIDATE_DESC_VOID(desc);
3285170f 2947 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 2948 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2949 gpiod_set_raw_value_commit(desc, value);
d2876d08 2950}
79a9becd 2951EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 2952
1e77fc82
GU
2953/**
2954 * gpiod_set_value_nocheck() - set a GPIO line value without checking
2955 * @desc: the descriptor to set the value on
2956 * @value: value to set
2957 *
2958 * This sets the value of a GPIO line backing a descriptor, applying
2959 * different semantic quirks like active low and open drain/source
2960 * handling.
2961 */
2962static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
2963{
2964 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2965 value = !value;
2966 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2967 gpio_set_open_drain_value_commit(desc, value);
2968 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2969 gpio_set_open_source_value_commit(desc, value);
2970 else
2971 gpiod_set_raw_value_commit(desc, value);
2972}
2973
d2876d08 2974/**
79a9becd
AC
2975 * gpiod_set_value() - assign a gpio's value
2976 * @desc: gpio whose value will be assigned
2977 * @value: value to assign
2978 *
02e47980
LW
2979 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
2980 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 2981 *
827a9b8b 2982 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2983 * complain if the GPIO chip functions potentially sleep.
d2876d08 2984 */
79a9becd 2985void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 2986{
fdeb8e15 2987 VALIDATE_DESC_VOID(desc);
3285170f 2988 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 2989 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 2990 gpiod_set_value_nocheck(desc, value);
372e722e 2991}
79a9becd 2992EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 2993
5f424243 2994/**
3fff99bc 2995 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 2996 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 2997 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 2998 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2999 * @value_bitmap: bitmap of values to assign
5f424243
RI
3000 *
3001 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3002 * without regard for their ACTIVE_LOW status.
3003 *
827a9b8b 3004 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3005 * complain if the GPIO chip functions potentially sleep.
3006 */
3027743f 3007int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3008 struct gpio_desc **desc_array,
3009 struct gpio_array *array_info,
3010 unsigned long *value_bitmap)
5f424243
RI
3011{
3012 if (!desc_array)
3027743f
LA
3013 return -EINVAL;
3014 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3015 desc_array, array_info, value_bitmap);
5f424243 3016}
3fff99bc 3017EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3018
3019/**
3fff99bc 3020 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3021 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3022 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3023 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3024 * @value_bitmap: bitmap of values to assign
5f424243
RI
3025 *
3026 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3027 * into account.
3028 *
827a9b8b 3029 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3030 * complain if the GPIO chip functions potentially sleep.
3031 */
cf9af0d5
GU
3032int gpiod_set_array_value(unsigned int array_size,
3033 struct gpio_desc **desc_array,
3034 struct gpio_array *array_info,
3035 unsigned long *value_bitmap)
5f424243
RI
3036{
3037 if (!desc_array)
cf9af0d5
GU
3038 return -EINVAL;
3039 return gpiod_set_array_value_complex(false, false, array_size,
3040 desc_array, array_info,
3041 value_bitmap);
5f424243 3042}
3fff99bc 3043EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3044
d2876d08 3045/**
79a9becd
AC
3046 * gpiod_cansleep() - report whether gpio value access may sleep
3047 * @desc: gpio to check
d2876d08 3048 *
d2876d08 3049 */
79a9becd 3050int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3051{
fdeb8e15
LW
3052 VALIDATE_DESC(desc);
3053 return desc->gdev->chip->can_sleep;
d2876d08 3054}
79a9becd 3055EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3056
90b39402
LW
3057/**
3058 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3059 * @desc: gpio to set the consumer name on
3060 * @name: the new consumer name
3061 */
18534df4 3062int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3063{
18534df4
MS
3064 VALIDATE_DESC(desc);
3065 if (name) {
3066 name = kstrdup_const(name, GFP_KERNEL);
3067 if (!name)
3068 return -ENOMEM;
3069 }
3070
3071 kfree_const(desc->label);
3072 desc_set_label(desc, name);
3073
3074 return 0;
90b39402
LW
3075}
3076EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3077
0f6d504e 3078/**
79a9becd
AC
3079 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3080 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3081 *
79a9becd
AC
3082 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3083 * error.
0f6d504e 3084 */
79a9becd 3085int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3086{
a0b66a73 3087 struct gpio_chip *gc;
4c37ce86 3088 int offset;
0f6d504e 3089
79bb71bd
LW
3090 /*
3091 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3092 * requires this function to not return zero on an invalid descriptor
3093 * but rather a negative error number.
3094 */
bfbbe44d 3095 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3096 return -EINVAL;
3097
a0b66a73 3098 gc = desc->gdev->chip;
372e722e 3099 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3100 if (gc->to_irq) {
3101 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3102
3103 /* Zero means NO_IRQ */
3104 if (!retirq)
3105 return -ENXIO;
3106
3107 return retirq;
3108 }
3109 return -ENXIO;
0f6d504e 3110}
79a9becd 3111EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3112
d468bf9e 3113/**
e3a2e878 3114 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3115 * @gc: the chip the GPIO to lock belongs to
d74be6df 3116 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3117 *
3118 * This is used directly by GPIO drivers that want to lock down
f438acdf 3119 * a certain GPIO line to be used for IRQs.
d468bf9e 3120 */
a0b66a73 3121int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3122{
9c10280d
LW
3123 struct gpio_desc *desc;
3124
a0b66a73 3125 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3126 if (IS_ERR(desc))
3127 return PTR_ERR(desc);
3128
60f8339e
LW
3129 /*
3130 * If it's fast: flush the direction setting if something changed
3131 * behind our back
3132 */
a0b66a73 3133 if (!gc->can_sleep && gc->get_direction) {
80956790 3134 int dir = gpiod_get_direction(desc);
9c10280d 3135
36b31279 3136 if (dir < 0) {
a0b66a73 3137 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3138 __func__);
3139 return dir;
3140 }
9c10280d 3141 }
d468bf9e 3142
e9bdf7e6
LW
3143 /* To be valid for IRQ the line needs to be input or open drain */
3144 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3145 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3146 chip_err(gc,
b1911710
AS
3147 "%s: tried to flag a GPIO set as output for IRQ\n",
3148 __func__);
d468bf9e
LW
3149 return -EIO;
3150 }
3151
9c10280d 3152 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3153 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3154
3155 /*
3156 * If the consumer has not set up a label (such as when the
3157 * IRQ is referenced from .to_irq()) we set up a label here
3158 * so it is clear this is used as an interrupt.
3159 */
3160 if (!desc->label)
3161 desc_set_label(desc, "interrupt");
3162
d468bf9e 3163 return 0;
372e722e 3164}
e3a2e878 3165EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3166
d468bf9e 3167/**
e3a2e878 3168 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3169 * @gc: the chip the GPIO to lock belongs to
d74be6df 3170 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3171 *
3172 * This is used directly by GPIO drivers that want to indicate
3173 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3174 */
a0b66a73 3175void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3176{
3940c34a
LW
3177 struct gpio_desc *desc;
3178
a0b66a73 3179 desc = gpiochip_get_desc(gc, offset);
3940c34a 3180 if (IS_ERR(desc))
d468bf9e 3181 return;
d2876d08 3182
3940c34a 3183 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3184 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3185
3186 /* If we only had this marking, erase it */
3187 if (desc->label && !strcmp(desc->label, "interrupt"))
3188 desc_set_label(desc, NULL);
d468bf9e 3189}
e3a2e878 3190EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3191
a0b66a73 3192void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3193{
a0b66a73 3194 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3195
3196 if (!IS_ERR(desc) &&
3197 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3198 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3199}
3200EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3201
a0b66a73 3202void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3203{
a0b66a73 3204 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3205
3206 if (!IS_ERR(desc) &&
3207 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3208 /*
3209 * We must not be output when using IRQ UNLESS we are
3210 * open drain.
3211 */
3212 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3213 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3214 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3215 }
3216}
3217EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3218
a0b66a73 3219bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3220{
a0b66a73 3221 if (offset >= gc->ngpio)
6cee3821
LW
3222 return false;
3223
a0b66a73 3224 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3225}
3226EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3227
a0b66a73 3228int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3229{
3230 int ret;
3231
a0b66a73 3232 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3233 return -ENODEV;
3234
a0b66a73 3235 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3236 if (ret) {
a0b66a73
LW
3237 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3238 module_put(gc->gpiodev->owner);
4e6b8238
HV
3239 return ret;
3240 }
3241 return 0;
3242}
3243EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3244
a0b66a73 3245void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3246{
a0b66a73
LW
3247 gpiochip_unlock_as_irq(gc, offset);
3248 module_put(gc->gpiodev->owner);
4e6b8238
HV
3249}
3250EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3251
a0b66a73 3252bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3253{
a0b66a73 3254 if (offset >= gc->ngpio)
143b65d6
LW
3255 return false;
3256
a0b66a73 3257 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3258}
3259EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3260
a0b66a73 3261bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3262{
a0b66a73 3263 if (offset >= gc->ngpio)
143b65d6
LW
3264 return false;
3265
a0b66a73 3266 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3267}
3268EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3269
a0b66a73 3270bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3271{
a0b66a73 3272 if (offset >= gc->ngpio)
05f479bf
CK
3273 return false;
3274
a0b66a73 3275 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3276}
3277EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3278
79a9becd
AC
3279/**
3280 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3281 * @desc: gpio whose value will be returned
3282 *
3283 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3284 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3285 *
3286 * This function is to be called from contexts that can sleep.
d2876d08 3287 */
79a9becd 3288int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3289{
d2876d08 3290 might_sleep_if(extra_checks);
fdeb8e15 3291 VALIDATE_DESC(desc);
fac9d885 3292 return gpiod_get_raw_value_commit(desc);
d2876d08 3293}
79a9becd 3294EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3295
79a9becd
AC
3296/**
3297 * gpiod_get_value_cansleep() - return a gpio's value
3298 * @desc: gpio whose value will be returned
3299 *
3300 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3301 * account, or negative errno on failure.
79a9becd
AC
3302 *
3303 * This function is to be called from contexts that can sleep.
3304 */
3305int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3306{
3f397c21 3307 int value;
d2876d08
DB
3308
3309 might_sleep_if(extra_checks);
fdeb8e15 3310 VALIDATE_DESC(desc);
fac9d885 3311 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3312 if (value < 0)
3313 return value;
3314
79a9becd
AC
3315 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3316 value = !value;
3317
3f397c21 3318 return value;
d2876d08 3319}
79a9becd 3320EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3321
eec1d566
LW
3322/**
3323 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3324 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3325 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3326 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3327 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3328 *
3329 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3330 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3331 * else an error code.
3332 *
3333 * This function is to be called from contexts that can sleep.
3334 */
3335int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3336 struct gpio_desc **desc_array,
77588c14 3337 struct gpio_array *array_info,
b9762beb 3338 unsigned long *value_bitmap)
eec1d566
LW
3339{
3340 might_sleep_if(extra_checks);
3341 if (!desc_array)
3342 return -EINVAL;
3343 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3344 desc_array, array_info,
3345 value_bitmap);
eec1d566
LW
3346}
3347EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3348
3349/**
3350 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3351 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3352 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3353 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3354 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3355 *
3356 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3357 * into account. Return 0 in case of success, else an error code.
3358 *
3359 * This function is to be called from contexts that can sleep.
3360 */
3361int gpiod_get_array_value_cansleep(unsigned int array_size,
3362 struct gpio_desc **desc_array,
77588c14 3363 struct gpio_array *array_info,
b9762beb 3364 unsigned long *value_bitmap)
eec1d566
LW
3365{
3366 might_sleep_if(extra_checks);
3367 if (!desc_array)
3368 return -EINVAL;
3369 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3370 desc_array, array_info,
3371 value_bitmap);
eec1d566
LW
3372}
3373EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3374
79a9becd
AC
3375/**
3376 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3377 * @desc: gpio whose value will be assigned
3378 * @value: value to assign
3379 *
3380 * Set the raw value of the GPIO, i.e. the value of its physical line without
3381 * regard for its ACTIVE_LOW status.
3382 *
3383 * This function is to be called from contexts that can sleep.
3384 */
3385void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3386{
d2876d08 3387 might_sleep_if(extra_checks);
fdeb8e15 3388 VALIDATE_DESC_VOID(desc);
fac9d885 3389 gpiod_set_raw_value_commit(desc, value);
372e722e 3390}
79a9becd 3391EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3392
79a9becd
AC
3393/**
3394 * gpiod_set_value_cansleep() - assign a gpio's value
3395 * @desc: gpio whose value will be assigned
3396 * @value: value to assign
3397 *
3398 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3399 * account
3400 *
3401 * This function is to be called from contexts that can sleep.
3402 */
3403void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3404{
d2876d08 3405 might_sleep_if(extra_checks);
fdeb8e15 3406 VALIDATE_DESC_VOID(desc);
1e77fc82 3407 gpiod_set_value_nocheck(desc, value);
372e722e 3408}
79a9becd 3409EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3410
5f424243 3411/**
3fff99bc 3412 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3413 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3414 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3415 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3416 * @value_bitmap: bitmap of values to assign
5f424243
RI
3417 *
3418 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3419 * without regard for their ACTIVE_LOW status.
3420 *
3421 * This function is to be called from contexts that can sleep.
3422 */
3027743f 3423int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3424 struct gpio_desc **desc_array,
3425 struct gpio_array *array_info,
3426 unsigned long *value_bitmap)
5f424243
RI
3427{
3428 might_sleep_if(extra_checks);
3429 if (!desc_array)
3027743f
LA
3430 return -EINVAL;
3431 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3432 array_info, value_bitmap);
5f424243 3433}
3fff99bc 3434EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3435
3946d187
DT
3436/**
3437 * gpiod_add_lookup_tables() - register GPIO device consumers
3438 * @tables: list of tables of consumers to register
3439 * @n: number of tables in the list
3440 */
3441void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3442{
3443 unsigned int i;
3444
3445 mutex_lock(&gpio_lookup_lock);
3446
3447 for (i = 0; i < n; i++)
3448 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3449
3450 mutex_unlock(&gpio_lookup_lock);
3451}
3452
5f424243 3453/**
3fff99bc 3454 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3455 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3456 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3457 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3458 * @value_bitmap: bitmap of values to assign
5f424243
RI
3459 *
3460 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3461 * into account.
3462 *
3463 * This function is to be called from contexts that can sleep.
3464 */
cf9af0d5
GU
3465int gpiod_set_array_value_cansleep(unsigned int array_size,
3466 struct gpio_desc **desc_array,
3467 struct gpio_array *array_info,
3468 unsigned long *value_bitmap)
5f424243
RI
3469{
3470 might_sleep_if(extra_checks);
3471 if (!desc_array)
cf9af0d5
GU
3472 return -EINVAL;
3473 return gpiod_set_array_value_complex(false, true, array_size,
3474 desc_array, array_info,
3475 value_bitmap);
5f424243 3476}
3fff99bc 3477EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3478
bae48da2 3479/**
ad824783
AC
3480 * gpiod_add_lookup_table() - register GPIO device consumers
3481 * @table: table of consumers to register
bae48da2 3482 */
ad824783 3483void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
3484{
3485 mutex_lock(&gpio_lookup_lock);
3486
ad824783 3487 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
3488
3489 mutex_unlock(&gpio_lookup_lock);
3490}
226b2242 3491EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3492
be9015ab
SK
3493/**
3494 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3495 * @table: table of consumers to unregister
3496 */
3497void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3498{
d321ad12
AS
3499 /* Nothing to remove */
3500 if (!table)
3501 return;
3502
be9015ab
SK
3503 mutex_lock(&gpio_lookup_lock);
3504
3505 list_del(&table->list);
3506
3507 mutex_unlock(&gpio_lookup_lock);
3508}
226b2242 3509EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3510
a411e81e
BG
3511/**
3512 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3513 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3514 */
3515void gpiod_add_hogs(struct gpiod_hog *hogs)
3516{
a0b66a73 3517 struct gpio_chip *gc;
a411e81e
BG
3518 struct gpiod_hog *hog;
3519
3520 mutex_lock(&gpio_machine_hogs_mutex);
3521
3522 for (hog = &hogs[0]; hog->chip_label; hog++) {
3523 list_add_tail(&hog->list, &gpio_machine_hogs);
3524
3525 /*
3526 * The chip may have been registered earlier, so check if it
3527 * exists and, if so, try to hog the line now.
3528 */
a0b66a73
LW
3529 gc = find_chip_by_name(hog->chip_label);
3530 if (gc)
3531 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3532 }
3533
3534 mutex_unlock(&gpio_machine_hogs_mutex);
3535}
3536EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3537
ad824783 3538static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3539{
3540 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3541 struct gpiod_lookup_table *table;
bae48da2
AC
3542
3543 mutex_lock(&gpio_lookup_lock);
3544
ad824783
AC
3545 list_for_each_entry(table, &gpio_lookup_list, list) {
3546 if (table->dev_id && dev_id) {
3547 /*
3548 * Valid strings on both ends, must be identical to have
3549 * a match
3550 */
3551 if (!strcmp(table->dev_id, dev_id))
3552 goto found;
3553 } else {
3554 /*
3555 * One of the pointers is NULL, so both must be to have
3556 * a match
3557 */
3558 if (dev_id == table->dev_id)
3559 goto found;
3560 }
3561 }
3562 table = NULL;
bae48da2 3563
ad824783
AC
3564found:
3565 mutex_unlock(&gpio_lookup_lock);
3566 return table;
3567}
bae48da2 3568
ad824783 3569static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3570 unsigned int idx, unsigned long *flags)
ad824783 3571{
2a3cf6a3 3572 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3573 struct gpiod_lookup_table *table;
3574 struct gpiod_lookup *p;
bae48da2 3575
ad824783
AC
3576 table = gpiod_find_lookup_table(dev);
3577 if (!table)
3578 return desc;
bae48da2 3579
4c033b54 3580 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3581 struct gpio_chip *gc;
bae48da2 3582
ad824783 3583 /* idx must always match exactly */
bae48da2
AC
3584 if (p->idx != idx)
3585 continue;
3586
ad824783
AC
3587 /* If the lookup entry has a con_id, require exact match */
3588 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3589 continue;
bae48da2 3590
4c033b54
GU
3591 if (p->chip_hwnum == U16_MAX) {
3592 desc = gpio_name_to_desc(p->key);
3593 if (desc) {
3594 *flags = p->flags;
3595 return desc;
3596 }
3597
3598 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3599 p->key);
3600 return ERR_PTR(-EPROBE_DEFER);
3601 }
3602
3603 gc = find_chip_by_name(p->key);
bae48da2 3604
a0b66a73 3605 if (!gc) {
8853daf3
JK
3606 /*
3607 * As the lookup table indicates a chip with
4c033b54 3608 * p->key should exist, assume it may
8853daf3
JK
3609 * still appear later and let the interested
3610 * consumer be probed again or let the Deferred
3611 * Probe infrastructure handle the error.
3612 */
3613 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3614 p->key);
8853daf3 3615 return ERR_PTR(-EPROBE_DEFER);
ad824783 3616 }
bae48da2 3617
a0b66a73 3618 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3619 dev_err(dev,
d935bd50 3620 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3621 idx, p->chip_hwnum, gc->ngpio - 1,
3622 gc->label);
2a3cf6a3 3623 return ERR_PTR(-EINVAL);
bae48da2 3624 }
bae48da2 3625
a0b66a73 3626 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3627 *flags = p->flags;
bae48da2 3628
2a3cf6a3 3629 return desc;
bae48da2
AC
3630 }
3631
bae48da2
AC
3632 return desc;
3633}
3634
66858527
RI
3635static int platform_gpio_count(struct device *dev, const char *con_id)
3636{
3637 struct gpiod_lookup_table *table;
3638 struct gpiod_lookup *p;
3639 unsigned int count = 0;
3640
3641 table = gpiod_find_lookup_table(dev);
3642 if (!table)
3643 return -ENOENT;
3644
4c033b54 3645 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3646 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3647 (!con_id && !p->con_id))
3648 count++;
3649 }
3650 if (!count)
3651 return -ENOENT;
3652
3653 return count;
3654}
3655
13949fa9
DT
3656/**
3657 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3658 * @fwnode: handle of the firmware node
3659 * @con_id: function within the GPIO consumer
3660 * @index: index of the GPIO to obtain for the consumer
3661 * @flags: GPIO initialization flags
3662 * @label: label to attach to the requested GPIO
3663 *
3664 * This function can be used for drivers that get their configuration
3665 * from opaque firmware.
3666 *
3667 * The function properly finds the corresponding GPIO using whatever is the
3668 * underlying firmware interface and then makes sure that the GPIO
3669 * descriptor is requested before it is returned to the caller.
3670 *
3671 * Returns:
3672 * On successful request the GPIO pin is configured in accordance with
3673 * provided @flags.
3674 *
3675 * In case of error an ERR_PTR() is returned.
3676 */
3677struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3678 const char *con_id, int index,
3679 enum gpiod_flags flags,
3680 const char *label)
3681{
3682 struct gpio_desc *desc;
3683 char prop_name[32]; /* 32 is max size of property name */
3684 unsigned int i;
3685
3686 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3687 if (con_id)
3688 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3689 con_id, gpio_suffixes[i]);
3690 else
3691 snprintf(prop_name, sizeof(prop_name), "%s",
3692 gpio_suffixes[i]);
3693
3694 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3695 label);
7b58696d 3696 if (!gpiod_not_found(desc))
13949fa9
DT
3697 break;
3698 }
3699
3700 return desc;
3701}
3702EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3703
66858527
RI
3704/**
3705 * gpiod_count - return the number of GPIOs associated with a device / function
3706 * or -ENOENT if no GPIO has been assigned to the requested function
3707 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3708 * @con_id: function within the GPIO consumer
3709 */
3710int gpiod_count(struct device *dev, const char *con_id)
3711{
944f4b0a 3712 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
3713 int count = -ENOENT;
3714
944f4b0a 3715 if (is_of_node(fwnode))
f626d6df 3716 count = of_gpio_get_count(dev, con_id);
944f4b0a 3717 else if (is_acpi_node(fwnode))
66858527
RI
3718 count = acpi_gpio_count(dev, con_id);
3719
3720 if (count < 0)
3721 count = platform_gpio_count(dev, con_id);
3722
3723 return count;
3724}
3725EXPORT_SYMBOL_GPL(gpiod_count);
3726
bae48da2 3727/**
0879162f 3728 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 3729 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 3730 * @con_id: function within the GPIO consumer
39b2bbe3 3731 * @flags: optional GPIO initialization flags
bae48da2
AC
3732 *
3733 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 3734 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 3735 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 3736 */
b17d1bf1 3737struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 3738 enum gpiod_flags flags)
bae48da2 3739{
39b2bbe3 3740 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 3741}
b17d1bf1 3742EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 3743
29a1f233
TR
3744/**
3745 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
3746 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3747 * @con_id: function within the GPIO consumer
39b2bbe3 3748 * @flags: optional GPIO initialization flags
29a1f233
TR
3749 *
3750 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
3751 * the requested function it will return NULL. This is convenient for drivers
3752 * that need to handle optional GPIOs.
3753 */
b17d1bf1 3754struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
3755 const char *con_id,
3756 enum gpiod_flags flags)
29a1f233 3757{
39b2bbe3 3758 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 3759}
b17d1bf1 3760EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 3761
f625d460
BP
3762
3763/**
3764 * gpiod_configure_flags - helper function to configure a given GPIO
3765 * @desc: gpio whose value will be assigned
3766 * @con_id: function within the GPIO consumer
fed7026a
AS
3767 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3768 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3769 * @dflags: gpiod_flags - optional GPIO initialization flags
3770 *
3771 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
3772 * requested function and/or index, or another IS_ERR() code if an error
3773 * occurred while trying to acquire the GPIO.
3774 */
c29fd9eb 3775int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 3776 unsigned long lflags, enum gpiod_flags dflags)
f625d460 3777{
d377f56f 3778 int ret;
f625d460 3779
85b03b30
JH
3780 if (lflags & GPIO_ACTIVE_LOW)
3781 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 3782
85b03b30
JH
3783 if (lflags & GPIO_OPEN_DRAIN)
3784 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
3785 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3786 /*
3787 * This enforces open drain mode from the consumer side.
3788 * This is necessary for some busses like I2C, but the lookup
3789 * should *REALLY* have specified them as open drain in the
3790 * first place, so print a little warning here.
3791 */
3792 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3793 gpiod_warn(desc,
3794 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3795 }
3796
85b03b30
JH
3797 if (lflags & GPIO_OPEN_SOURCE)
3798 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 3799
d449991c
TP
3800 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3801 gpiod_err(desc,
3802 "both pull-up and pull-down enabled, invalid configuration\n");
3803 return -EINVAL;
3804 }
3805
3806 if (lflags & GPIO_PULL_UP)
3807 set_bit(FLAG_PULL_UP, &desc->flags);
3808 else if (lflags & GPIO_PULL_DOWN)
3809 set_bit(FLAG_PULL_DOWN, &desc->flags);
3810
d377f56f
LW
3811 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3812 if (ret < 0)
3813 return ret;
85b03b30 3814
f625d460
BP
3815 /* No particular flag request, return here... */
3816 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 3817 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
3818 return 0;
3819 }
3820
3821 /* Process flags */
3822 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 3823 ret = gpiod_direction_output(desc,
ad17731d 3824 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 3825 else
d377f56f 3826 ret = gpiod_direction_input(desc);
f625d460 3827
d377f56f 3828 return ret;
f625d460
BP
3829}
3830
bae48da2
AC
3831/**
3832 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 3833 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
3834 * @con_id: function within the GPIO consumer
3835 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 3836 * @flags: optional GPIO initialization flags
bae48da2
AC
3837 *
3838 * This variant of gpiod_get() allows to access GPIOs other than the first
3839 * defined one for functions that define several GPIOs.
3840 *
2a3cf6a3
AC
3841 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
3842 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 3843 * occurred while trying to acquire the GPIO.
bae48da2 3844 */
b17d1bf1 3845struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 3846 const char *con_id,
39b2bbe3
AC
3847 unsigned int idx,
3848 enum gpiod_flags flags)
bae48da2 3849{
2d6c06f5 3850 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 3851 struct gpio_desc *desc = NULL;
d377f56f 3852 int ret;
7d18f0a1
LW
3853 /* Maybe we have a device name, maybe not */
3854 const char *devname = dev ? dev_name(dev) : "?";
944f4b0a 3855 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
bae48da2
AC
3856
3857 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
3858
944f4b0a
AS
3859 /* Using device tree? */
3860 if (is_of_node(fwnode)) {
3861 dev_dbg(dev, "using device tree for GPIO lookup\n");
3862 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
3863 } else if (is_acpi_node(fwnode)) {
3864 dev_dbg(dev, "using ACPI for GPIO lookup\n");
3865 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
35c5d7fd
AC
3866 }
3867
3868 /*
3869 * Either we are not using DT or ACPI, or their lookup did not return
3870 * a result. In that case, use platform lookup as a fallback.
3871 */
7b58696d 3872 if (!desc || gpiod_not_found(desc)) {
43a8785a 3873 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 3874 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
3875 }
3876
3877 if (IS_ERR(desc)) {
9d5a1f2c 3878 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
3879 return desc;
3880 }
3881
7d18f0a1
LW
3882 /*
3883 * If a connection label was passed use that, else attempt to use
3884 * the device name as label
3885 */
d377f56f 3886 ret = gpiod_request(desc, con_id ? con_id : devname);
8bbff39c 3887 if (ret) {
d377f56f 3888 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
3889 /*
3890 * This happens when there are several consumers for
3891 * the same GPIO line: we just return here without
3892 * further initialization. It is a bit if a hack.
3893 * This is necessary to support fixed regulators.
3894 *
3895 * FIXME: Make this more sane and safe.
3896 */
3897 dev_info(dev, "nonexclusive access to GPIO for %s\n",
3898 con_id ? con_id : devname);
3899 return desc;
3900 } else {
d377f56f 3901 return ERR_PTR(ret);
b0ce7b29
LW
3902 }
3903 }
bae48da2 3904
d377f56f 3905 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 3906 if (ret < 0) {
39b2bbe3 3907 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
3908 gpiod_put(desc);
3909 return ERR_PTR(ret);
3910 }
3911
6accc376
KG
3912 blocking_notifier_call_chain(&desc->gdev->notifier,
3913 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 3914
6392cca4
LW
3915 return desc;
3916}
b17d1bf1 3917EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 3918
40b73183
MW
3919/**
3920 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
3921 * @fwnode: handle of the firmware node
3922 * @propname: name of the firmware property representing the GPIO
6392cca4 3923 * @index: index of the GPIO to obtain for the consumer
a264d10f 3924 * @dflags: GPIO initialization flags
950d55f5 3925 * @label: label to attach to the requested GPIO
40b73183
MW
3926 *
3927 * This function can be used for drivers that get their configuration
6392cca4 3928 * from opaque firmware.
40b73183 3929 *
6392cca4 3930 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
3931 * underlying firmware interface and then makes sure that the GPIO
3932 * descriptor is requested before it is returned to the caller.
3933 *
950d55f5 3934 * Returns:
ff21378a 3935 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
3936 * provided @dflags.
3937 *
40b73183
MW
3938 * In case of error an ERR_PTR() is returned.
3939 */
3940struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 3941 const char *propname, int index,
b2987d74
AS
3942 enum gpiod_flags dflags,
3943 const char *label)
40b73183 3944{
2d6c06f5 3945 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 3946 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
3947 int ret;
3948
40b73183 3949 if (is_of_node(fwnode)) {
6392cca4
LW
3950 desc = gpiod_get_from_of_node(to_of_node(fwnode),
3951 propname, index,
3952 dflags,
3953 label);
3954 return desc;
40b73183
MW
3955 } else if (is_acpi_node(fwnode)) {
3956 struct acpi_gpio_info info;
3957
537b94da 3958 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
3959 if (IS_ERR(desc))
3960 return desc;
40b73183 3961
6392cca4 3962 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 3963 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
944f4b0a
AS
3964 } else
3965 return ERR_PTR(-EINVAL);
40b73183 3966
6392cca4 3967 /* Currently only ACPI takes this path */
b2987d74 3968 ret = gpiod_request(desc, label);
85b03b30
JH
3969 if (ret)
3970 return ERR_PTR(ret);
3971
a264d10f
AS
3972 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
3973 if (ret < 0) {
3974 gpiod_put(desc);
3975 return ERR_PTR(ret);
90b665f6
LP
3976 }
3977
6accc376
KG
3978 blocking_notifier_call_chain(&desc->gdev->notifier,
3979 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 3980
40b73183
MW
3981 return desc;
3982}
3983EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
3984
29a1f233
TR
3985/**
3986 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
3987 * function
3988 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3989 * @con_id: function within the GPIO consumer
3990 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 3991 * @flags: optional GPIO initialization flags
29a1f233
TR
3992 *
3993 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
3994 * specified index was assigned to the requested function it will return NULL.
3995 * This is convenient for drivers that need to handle optional GPIOs.
3996 */
b17d1bf1 3997struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 3998 const char *con_id,
39b2bbe3
AC
3999 unsigned int index,
4000 enum gpiod_flags flags)
29a1f233
TR
4001{
4002 struct gpio_desc *desc;
4003
39b2bbe3 4004 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4005 if (gpiod_not_found(desc))
4006 return NULL;
29a1f233
TR
4007
4008 return desc;
4009}
b17d1bf1 4010EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4011
f625d460
BP
4012/**
4013 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4014 * @desc: gpio whose value will be assigned
4015 * @name: gpio line name
fed7026a
AS
4016 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4017 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4018 * @dflags: gpiod_flags - optional GPIO initialization flags
4019 */
4020int gpiod_hog(struct gpio_desc *desc, const char *name,
4021 unsigned long lflags, enum gpiod_flags dflags)
4022{
a0b66a73 4023 struct gpio_chip *gc;
f625d460
BP
4024 struct gpio_desc *local_desc;
4025 int hwnum;
d377f56f 4026 int ret;
f625d460 4027
a0b66a73 4028 gc = gpiod_to_chip(desc);
f625d460
BP
4029 hwnum = gpio_chip_hwgpio(desc);
4030
a0b66a73 4031 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4032 lflags, dflags);
f625d460 4033 if (IS_ERR(local_desc)) {
d377f56f 4034 ret = PTR_ERR(local_desc);
c31a571d 4035 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4036 name, gc->label, hwnum, ret);
d377f56f 4037 return ret;
f625d460
BP
4038 }
4039
f625d460
BP
4040 /* Mark GPIO as hogged so it can be identified and removed later */
4041 set_bit(FLAG_IS_HOGGED, &desc->flags);
4042
262b9011 4043 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4044 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4045 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4046 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4047
4048 return 0;
4049}
4050
4051/**
4052 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4053 * @gc: gpio chip to act on
f625d460 4054 */
a0b66a73 4055static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460
BP
4056{
4057 int id;
4058
a0b66a73
LW
4059 for (id = 0; id < gc->ngpio; id++) {
4060 if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
4061 gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
f625d460
BP
4062 }
4063}
4064
66858527
RI
4065/**
4066 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4067 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4068 * @con_id: function within the GPIO consumer
4069 * @flags: optional GPIO initialization flags
4070 *
4071 * This function acquires all the GPIOs defined under a given function.
4072 *
4073 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4074 * no GPIO has been assigned to the requested function, or another IS_ERR()
4075 * code if an error occurred while trying to acquire the GPIOs.
4076 */
4077struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4078 const char *con_id,
4079 enum gpiod_flags flags)
4080{
4081 struct gpio_desc *desc;
4082 struct gpio_descs *descs;
bf9346f5 4083 struct gpio_array *array_info = NULL;
a0b66a73 4084 struct gpio_chip *gc;
bf9346f5 4085 int count, bitmap_size;
66858527
RI
4086
4087 count = gpiod_count(dev, con_id);
4088 if (count < 0)
4089 return ERR_PTR(count);
4090
acafe7e3 4091 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4092 if (!descs)
4093 return ERR_PTR(-ENOMEM);
4094
4095 for (descs->ndescs = 0; descs->ndescs < count; ) {
4096 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4097 if (IS_ERR(desc)) {
4098 gpiod_put_array(descs);
4099 return ERR_CAST(desc);
4100 }
bf9346f5 4101
66858527 4102 descs->desc[descs->ndescs] = desc;
bf9346f5 4103
a0b66a73 4104 gc = gpiod_to_chip(desc);
bf9346f5 4105 /*
c4c958aa
JK
4106 * If pin hardware number of array member 0 is also 0, select
4107 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4108 */
c4c958aa 4109 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4110 struct gpio_descs *array;
4111
a0b66a73
LW
4112 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4113 gc->ngpio : count);
bf9346f5
JK
4114
4115 array = kzalloc(struct_size(descs, desc, count) +
4116 struct_size(array_info, invert_mask,
4117 3 * bitmap_size), GFP_KERNEL);
4118 if (!array) {
4119 gpiod_put_array(descs);
4120 return ERR_PTR(-ENOMEM);
4121 }
4122
4123 memcpy(array, descs,
4124 struct_size(descs, desc, descs->ndescs + 1));
4125 kfree(descs);
4126
4127 descs = array;
4128 array_info = (void *)(descs->desc + count);
4129 array_info->get_mask = array_info->invert_mask +
4130 bitmap_size;
4131 array_info->set_mask = array_info->get_mask +
4132 bitmap_size;
4133
4134 array_info->desc = descs->desc;
4135 array_info->size = count;
a0b66a73 4136 array_info->chip = gc;
bf9346f5
JK
4137 bitmap_set(array_info->get_mask, descs->ndescs,
4138 count - descs->ndescs);
4139 bitmap_set(array_info->set_mask, descs->ndescs,
4140 count - descs->ndescs);
4141 descs->info = array_info;
4142 }
c4c958aa 4143 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4144 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4145 __clear_bit(descs->ndescs, array_info->get_mask);
4146 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4147 }
4148 /*
4149 * Detect array members which belong to the 'fast' chip
4150 * but their pins are not in hardware order.
4151 */
4152 else if (array_info &&
4153 gpio_chip_hwgpio(desc) != descs->ndescs) {
4154 /*
4155 * Don't use fast path if all array members processed so
4156 * far belong to the same chip as this one but its pin
4157 * hardware number is different from its array index.
4158 */
4159 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4160 array_info = NULL;
4161 } else {
4162 __clear_bit(descs->ndescs,
4163 array_info->get_mask);
4164 __clear_bit(descs->ndescs,
4165 array_info->set_mask);
4166 }
bf9346f5
JK
4167 } else if (array_info) {
4168 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4169 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4170 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4171 __clear_bit(descs->ndescs,
4172 array_info->set_mask);
4173 /* Identify 'fast' pins which require invertion */
4174 if (gpiod_is_active_low(desc))
4175 __set_bit(descs->ndescs,
4176 array_info->invert_mask);
4177 }
4178
66858527
RI
4179 descs->ndescs++;
4180 }
bf9346f5
JK
4181 if (array_info)
4182 dev_dbg(dev,
4183 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4184 array_info->chip->label, array_info->size,
4185 *array_info->get_mask, *array_info->set_mask,
4186 *array_info->invert_mask);
66858527
RI
4187 return descs;
4188}
4189EXPORT_SYMBOL_GPL(gpiod_get_array);
4190
4191/**
4192 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4193 * function
4194 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4195 * @con_id: function within the GPIO consumer
4196 * @flags: optional GPIO initialization flags
4197 *
4198 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4199 * assigned to the requested function it will return NULL.
4200 */
4201struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4202 const char *con_id,
4203 enum gpiod_flags flags)
4204{
4205 struct gpio_descs *descs;
4206
4207 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4208 if (gpiod_not_found(descs))
66858527
RI
4209 return NULL;
4210
4211 return descs;
4212}
4213EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4214
bae48da2
AC
4215/**
4216 * gpiod_put - dispose of a GPIO descriptor
4217 * @desc: GPIO descriptor to dispose of
4218 *
4219 * No descriptor can be used after gpiod_put() has been called on it.
4220 */
4221void gpiod_put(struct gpio_desc *desc)
4222{
1d7765ba
AS
4223 if (desc)
4224 gpiod_free(desc);
372e722e 4225}
bae48da2 4226EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4227
66858527
RI
4228/**
4229 * gpiod_put_array - dispose of multiple GPIO descriptors
4230 * @descs: struct gpio_descs containing an array of descriptors
4231 */
4232void gpiod_put_array(struct gpio_descs *descs)
4233{
4234 unsigned int i;
4235
4236 for (i = 0; i < descs->ndescs; i++)
4237 gpiod_put(descs->desc[i]);
4238
4239 kfree(descs);
4240}
4241EXPORT_SYMBOL_GPL(gpiod_put_array);
4242
ced2af41
SK
4243
4244static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4245{
1df62542
AS
4246 struct fwnode_handle *fwnode = dev_fwnode(dev);
4247
ced2af41
SK
4248 /*
4249 * Only match if the fwnode doesn't already have a proper struct device
4250 * created for it.
4251 */
1df62542 4252 if (fwnode && fwnode->dev != dev)
ced2af41
SK
4253 return 0;
4254 return 1;
4255}
4256
4731210c
SK
4257static int gpio_stub_drv_probe(struct device *dev)
4258{
4259 /*
4260 * The DT node of some GPIO chips have a "compatible" property, but
4261 * never have a struct device added and probed by a driver to register
4262 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4263 * the consumers of the GPIO chip to get probe deferred forever because
4264 * they will be waiting for a device associated with the GPIO chip
4265 * firmware node to get added and bound to a driver.
4266 *
4267 * To allow these consumers to probe, we associate the struct
4268 * gpio_device of the GPIO chip with the firmware node and then simply
4269 * bind it to this stub driver.
4270 */
4271 return 0;
4272}
4273
4274static struct device_driver gpio_stub_drv = {
4275 .name = "gpio_stub_drv",
4276 .bus = &gpio_bus_type,
4277 .probe = gpio_stub_drv_probe,
4278};
4279
3c702e99
LW
4280static int __init gpiolib_dev_init(void)
4281{
4282 int ret;
4283
4284 /* Register GPIO sysfs bus */
b1911710 4285 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4286 if (ret < 0) {
4287 pr_err("gpiolib: could not register GPIO bus type\n");
4288 return ret;
4289 }
4290
3875721e
WY
4291 ret = driver_register(&gpio_stub_drv);
4292 if (ret < 0) {
4731210c
SK
4293 pr_err("gpiolib: could not register GPIO stub driver\n");
4294 bus_unregister(&gpio_bus_type);
4295 return ret;
4296 }
4297
ddd8891e 4298 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4299 if (ret < 0) {
4300 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4301 driver_unregister(&gpio_stub_drv);
3c702e99 4302 bus_unregister(&gpio_bus_type);
63636d95 4303 return ret;
3c702e99 4304 }
63636d95
GU
4305
4306 gpiolib_initialized = true;
4307 gpiochip_setup_devs();
4308
8650b609
DG
4309#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4310 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4311#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4312
3c702e99
LW
4313 return ret;
4314}
4315core_initcall(gpiolib_dev_init);
4316
d2876d08
DB
4317#ifdef CONFIG_DEBUG_FS
4318
fdeb8e15 4319static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
4320{
4321 unsigned i;
a0b66a73 4322 struct gpio_chip *gc = gdev->chip;
fdeb8e15
LW
4323 unsigned gpio = gdev->base;
4324 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
4325 bool is_out;
4326 bool is_irq;
4327 bool active_low;
d2876d08 4328
fdeb8e15 4329 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
4330 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4331 if (gdesc->name) {
4332 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4333 gpio, gdesc->name);
4334 }
d2876d08 4335 continue;
ced433e2 4336 }
d2876d08 4337
372e722e 4338 gpiod_get_direction(gdesc);
d2876d08 4339 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 4340 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
4341 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4342 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 4343 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 4344 is_out ? "out" : "in ",
a0b66a73 4345 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
90fd2270
LW
4346 is_irq ? "IRQ " : "",
4347 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
4348 seq_printf(s, "\n");
4349 }
4350}
4351
f9c4a31f 4352static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4353{
362432ae 4354 unsigned long flags;
ff2b1359 4355 struct gpio_device *gdev = NULL;
cb1650d4 4356 loff_t index = *pos;
d2876d08 4357
f9c4a31f 4358 s->private = "";
d2876d08 4359
362432ae 4360 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4361 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4362 if (index-- == 0) {
4363 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4364 return gdev;
f9c4a31f 4365 }
362432ae 4366 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4367
cb1650d4 4368 return NULL;
f9c4a31f
TR
4369}
4370
4371static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4372{
362432ae 4373 unsigned long flags;
ff2b1359 4374 struct gpio_device *gdev = v;
f9c4a31f
TR
4375 void *ret = NULL;
4376
362432ae 4377 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4378 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4379 ret = NULL;
4380 else
ff2b1359 4381 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 4382 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4383
4384 s->private = "\n";
4385 ++*pos;
4386
4387 return ret;
4388}
4389
4390static void gpiolib_seq_stop(struct seq_file *s, void *v)
4391{
4392}
4393
4394static int gpiolib_seq_show(struct seq_file *s, void *v)
4395{
ff2b1359 4396 struct gpio_device *gdev = v;
a0b66a73 4397 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4398 struct device *parent;
4399
a0b66a73 4400 if (!gc) {
ff2b1359
LW
4401 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4402 dev_name(&gdev->dev));
4403 return 0;
4404 }
f9c4a31f 4405
ff2b1359
LW
4406 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4407 dev_name(&gdev->dev),
fdeb8e15 4408 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4409 parent = gc->parent;
ff2b1359
LW
4410 if (parent)
4411 seq_printf(s, ", parent: %s/%s",
4412 parent->bus ? parent->bus->name : "no-bus",
4413 dev_name(parent));
a0b66a73
LW
4414 if (gc->label)
4415 seq_printf(s, ", %s", gc->label);
4416 if (gc->can_sleep)
f9c4a31f
TR
4417 seq_printf(s, ", can sleep");
4418 seq_printf(s, ":\n");
4419
a0b66a73
LW
4420 if (gc->dbg_show)
4421 gc->dbg_show(s, gc);
f9c4a31f 4422 else
fdeb8e15 4423 gpiolib_dbg_show(s, gdev);
f9c4a31f 4424
d2876d08
DB
4425 return 0;
4426}
4427
425c5b3e 4428static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4429 .start = gpiolib_seq_start,
4430 .next = gpiolib_seq_next,
4431 .stop = gpiolib_seq_stop,
4432 .show = gpiolib_seq_show,
4433};
425c5b3e 4434DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4435
4436static int __init gpiolib_debugfs_init(void)
4437{
4438 /* /sys/kernel/debug/gpio */
425c5b3e 4439 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4440 return 0;
4441}
4442subsys_initcall(gpiolib_debugfs_init);
4443
4444#endif /* DEBUG_FS */