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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
923a654c | 2 | #include <linux/bitmap.h> |
d2876d08 DB |
3 | #include <linux/kernel.h> |
4 | #include <linux/module.h> | |
ff77c352 | 5 | #include <linux/interrupt.h> |
d2876d08 DB |
6 | #include <linux/irq.h> |
7 | #include <linux/spinlock.h> | |
1a989d0f | 8 | #include <linux/list.h> |
d8f388d8 DB |
9 | #include <linux/device.h> |
10 | #include <linux/err.h> | |
11 | #include <linux/debugfs.h> | |
12 | #include <linux/seq_file.h> | |
13 | #include <linux/gpio.h> | |
ff77c352 | 14 | #include <linux/idr.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
7b199811 | 16 | #include <linux/acpi.h> |
53e7cac3 | 17 | #include <linux/gpio/driver.h> |
0a6d3158 | 18 | #include <linux/gpio/machine.h> |
c771c2f4 | 19 | #include <linux/pinctrl/consumer.h> |
3c702e99 LW |
20 | #include <linux/cdev.h> |
21 | #include <linux/fs.h> | |
22 | #include <linux/uaccess.h> | |
8b92e17e | 23 | #include <linux/compat.h> |
d7c51b47 | 24 | #include <linux/anon_inodes.h> |
953b956a | 25 | #include <linux/file.h> |
61f922db LW |
26 | #include <linux/kfifo.h> |
27 | #include <linux/poll.h> | |
28 | #include <linux/timekeeping.h> | |
3c702e99 | 29 | #include <uapi/linux/gpio.h> |
d2876d08 | 30 | |
664e3e5a | 31 | #include "gpiolib.h" |
f626d6df | 32 | #include "gpiolib-of.h" |
77cb907a | 33 | #include "gpiolib-acpi.h" |
664e3e5a | 34 | |
3f397c21 UKK |
35 | #define CREATE_TRACE_POINTS |
36 | #include <trace/events/gpio.h> | |
d2876d08 | 37 | |
79a9becd | 38 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 39 | * |
79a9becd AC |
40 | * The GPIO programming interface allows for inlining speed-critical |
41 | * get/set operations for common cases, so that access to SOC-integrated | |
42 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
43 | */ |
44 | ||
45 | ||
46 | /* When debugging, extend minimal trust to callers and platform code. | |
47 | * Also emit diagnostic messages that may help initial bringup, when | |
48 | * board setup or driver bugs are most common. | |
49 | * | |
50 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
51 | */ | |
52 | #ifdef DEBUG | |
53 | #define extra_checks 1 | |
54 | #else | |
55 | #define extra_checks 0 | |
56 | #endif | |
57 | ||
ff2b1359 LW |
58 | /* Device and char device-related information */ |
59 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
60 | static dev_t gpio_devt; |
61 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
62 | static struct bus_type gpio_bus_type = { | |
63 | .name = "gpio", | |
64 | }; | |
ff2b1359 | 65 | |
3027743f LA |
66 | /* |
67 | * Number of GPIOs to use for the fast path in set array | |
68 | */ | |
69 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
70 | ||
d2876d08 DB |
71 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
72 | * While any GPIO is requested, its gpio_chip is not removable; | |
73 | * each GPIO's "requested" flag serves as a lock and refcount. | |
74 | */ | |
0eb4c6c2 | 75 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 76 | |
bae48da2 AC |
77 | static DEFINE_MUTEX(gpio_lookup_lock); |
78 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 79 | LIST_HEAD(gpio_devices); |
6d86750c | 80 | |
a411e81e BG |
81 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
82 | static LIST_HEAD(gpio_machine_hogs); | |
83 | ||
6d86750c | 84 | static void gpiochip_free_hogs(struct gpio_chip *chip); |
959bc7b2 | 85 | static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
86 | struct lock_class_key *lock_key, |
87 | struct lock_class_key *request_key); | |
6d86750c | 88 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip); |
79b804cb MW |
89 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip); |
90 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip); | |
6d86750c | 91 | |
159f3cd9 | 92 | static bool gpiolib_initialized; |
6d86750c | 93 | |
d2876d08 DB |
94 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
95 | { | |
d2876d08 | 96 | d->label = label; |
d2876d08 DB |
97 | } |
98 | ||
372e722e | 99 | /** |
950d55f5 TR |
100 | * gpio_to_desc - Convert a GPIO number to its descriptor |
101 | * @gpio: global GPIO number | |
102 | * | |
103 | * Returns: | |
104 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
105 | * with the given number exists in the system. | |
372e722e | 106 | */ |
79a9becd | 107 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 108 | { |
ff2b1359 | 109 | struct gpio_device *gdev; |
14e85c0e AC |
110 | unsigned long flags; |
111 | ||
112 | spin_lock_irqsave(&gpio_lock, flags); | |
113 | ||
ff2b1359 | 114 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
115 | if (gdev->base <= gpio && |
116 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 117 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 118 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
119 | } |
120 | } | |
121 | ||
122 | spin_unlock_irqrestore(&gpio_lock, flags); | |
123 | ||
0e9a5edf AC |
124 | if (!gpio_is_valid(gpio)) |
125 | WARN(1, "invalid GPIO %d\n", gpio); | |
126 | ||
14e85c0e | 127 | return NULL; |
372e722e | 128 | } |
79a9becd | 129 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 130 | |
d468bf9e | 131 | /** |
950d55f5 TR |
132 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
133 | * hardware number for this chip | |
134 | * @chip: GPIO chip | |
135 | * @hwnum: hardware number of the GPIO for this chip | |
136 | * | |
137 | * Returns: | |
138 | * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists | |
139 | * in the given chip for the specified hardware number. | |
d468bf9e | 140 | */ |
bb1e88cc AC |
141 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, |
142 | u16 hwnum) | |
d468bf9e | 143 | { |
fdeb8e15 LW |
144 | struct gpio_device *gdev = chip->gpiodev; |
145 | ||
146 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 147 | return ERR_PTR(-EINVAL); |
d468bf9e | 148 | |
fdeb8e15 | 149 | return &gdev->descs[hwnum]; |
d468bf9e | 150 | } |
372e722e AC |
151 | |
152 | /** | |
950d55f5 TR |
153 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
154 | * @desc: GPIO descriptor | |
155 | * | |
372e722e | 156 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
157 | * use GPIO numbers for error messages and sysfs nodes. |
158 | * | |
159 | * Returns: | |
160 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 161 | */ |
79a9becd | 162 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 163 | { |
fdeb8e15 | 164 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 165 | } |
79a9becd | 166 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
167 | |
168 | ||
79a9becd AC |
169 | /** |
170 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
171 | * @desc: descriptor to return the chip of | |
172 | */ | |
173 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 174 | { |
dd3b9a44 | 175 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
176 | return NULL; |
177 | return desc->gdev->chip; | |
372e722e | 178 | } |
79a9becd | 179 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 180 | |
8d0aab2f AV |
181 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
182 | static int gpiochip_find_base(int ngpio) | |
183 | { | |
ff2b1359 | 184 | struct gpio_device *gdev; |
83cabe33 | 185 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 186 | |
ff2b1359 | 187 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 188 | /* found a free space? */ |
fdeb8e15 | 189 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
190 | break; |
191 | else | |
192 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 193 | base = gdev->base - ngpio; |
8d0aab2f AV |
194 | } |
195 | ||
83cabe33 | 196 | if (gpio_is_valid(base)) { |
8d0aab2f | 197 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
198 | return base; |
199 | } else { | |
200 | pr_err("%s: cannot find free range\n", __func__); | |
201 | return -ENOSPC; | |
169b6a7a | 202 | } |
169b6a7a AV |
203 | } |
204 | ||
79a9becd AC |
205 | /** |
206 | * gpiod_get_direction - return the current direction of a GPIO | |
207 | * @desc: GPIO to get the direction of | |
208 | * | |
94fc7309 | 209 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
210 | * |
211 | * This function may sleep if gpiod_cansleep() is true. | |
212 | */ | |
8e53b0f1 | 213 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 214 | { |
d0121b85 WS |
215 | struct gpio_chip *chip; |
216 | unsigned offset; | |
d377f56f | 217 | int ret; |
80b0a602 | 218 | |
372e722e AC |
219 | chip = gpiod_to_chip(desc); |
220 | offset = gpio_chip_hwgpio(desc); | |
80b0a602 MN |
221 | |
222 | if (!chip->get_direction) | |
d0121b85 | 223 | return -ENOTSUPP; |
80b0a602 | 224 | |
d377f56f LW |
225 | ret = chip->get_direction(chip, offset); |
226 | if (ret > 0) { | |
80b0a602 | 227 | /* GPIOF_DIR_IN, or other positive */ |
d377f56f | 228 | ret = 1; |
8e53b0f1 | 229 | clear_bit(FLAG_IS_OUT, &desc->flags); |
80b0a602 | 230 | } |
d377f56f | 231 | if (ret == 0) { |
80b0a602 | 232 | /* GPIOF_DIR_OUT */ |
8e53b0f1 | 233 | set_bit(FLAG_IS_OUT, &desc->flags); |
80b0a602 | 234 | } |
d377f56f | 235 | return ret; |
80b0a602 | 236 | } |
79a9becd | 237 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 238 | |
1a989d0f AC |
239 | /* |
240 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 241 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
242 | * |
243 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
244 | * space. | |
245 | */ | |
ff2b1359 | 246 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 247 | { |
a961f9b4 | 248 | struct gpio_device *prev, *next; |
1a989d0f | 249 | |
ff2b1359 | 250 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 251 | /* initial entry in list */ |
ff2b1359 | 252 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 253 | return 0; |
1a989d0f AC |
254 | } |
255 | ||
a961f9b4 BJZ |
256 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
257 | if (gdev->base + gdev->ngpio <= next->base) { | |
258 | /* add before first entry */ | |
259 | list_add(&gdev->list, &gpio_devices); | |
260 | return 0; | |
1a989d0f AC |
261 | } |
262 | ||
a961f9b4 BJZ |
263 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
264 | if (prev->base + prev->ngpio <= gdev->base) { | |
265 | /* add behind last entry */ | |
266 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 267 | return 0; |
1a989d0f AC |
268 | } |
269 | ||
a961f9b4 BJZ |
270 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
271 | /* at the end of the list */ | |
272 | if (&next->list == &gpio_devices) | |
273 | break; | |
1a989d0f | 274 | |
a961f9b4 BJZ |
275 | /* add between prev and next */ |
276 | if (prev->base + prev->ngpio <= gdev->base | |
277 | && gdev->base + gdev->ngpio <= next->base) { | |
278 | list_add(&gdev->list, &prev->list); | |
279 | return 0; | |
280 | } | |
281 | } | |
282 | ||
283 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
284 | return -EBUSY; | |
1a989d0f AC |
285 | } |
286 | ||
950d55f5 | 287 | /* |
f881bab0 LW |
288 | * Convert a GPIO name to its descriptor |
289 | */ | |
290 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
291 | { | |
ff2b1359 | 292 | struct gpio_device *gdev; |
f881bab0 LW |
293 | unsigned long flags; |
294 | ||
295 | spin_lock_irqsave(&gpio_lock, flags); | |
296 | ||
ff2b1359 | 297 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
298 | int i; |
299 | ||
fdeb8e15 LW |
300 | for (i = 0; i != gdev->ngpio; ++i) { |
301 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 302 | |
fdeb8e15 | 303 | if (!desc->name || !name) |
f881bab0 LW |
304 | continue; |
305 | ||
fdeb8e15 | 306 | if (!strcmp(desc->name, name)) { |
f881bab0 | 307 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 308 | return desc; |
f881bab0 LW |
309 | } |
310 | } | |
311 | } | |
312 | ||
313 | spin_unlock_irqrestore(&gpio_lock, flags); | |
314 | ||
315 | return NULL; | |
316 | } | |
317 | ||
5f3ca732 MP |
318 | /* |
319 | * Takes the names from gc->names and checks if they are all unique. If they | |
320 | * are, they are assigned to their gpio descriptors. | |
321 | * | |
ed37915c | 322 | * Warning if one of the names is already used for a different GPIO. |
5f3ca732 MP |
323 | */ |
324 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
325 | { | |
fdeb8e15 | 326 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
327 | int i; |
328 | ||
329 | if (!gc->names) | |
330 | return 0; | |
331 | ||
332 | /* First check all names if they are unique */ | |
333 | for (i = 0; i != gc->ngpio; ++i) { | |
334 | struct gpio_desc *gpio; | |
335 | ||
336 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 337 | if (gpio) |
fdeb8e15 | 338 | dev_warn(&gdev->dev, |
34ffd85d | 339 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 340 | gc->names[i]); |
5f3ca732 MP |
341 | } |
342 | ||
343 | /* Then add all names to the GPIO descriptors */ | |
344 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 345 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
346 | |
347 | return 0; | |
348 | } | |
349 | ||
e4371f6e SB |
350 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip) |
351 | { | |
352 | unsigned long *p; | |
353 | ||
7bdbd1ec | 354 | p = bitmap_alloc(chip->ngpio, GFP_KERNEL); |
e4371f6e SB |
355 | if (!p) |
356 | return NULL; | |
357 | ||
358 | /* Assume by default all GPIOs are valid */ | |
359 | bitmap_fill(p, chip->ngpio); | |
360 | ||
361 | return p; | |
362 | } | |
363 | ||
f626d6df | 364 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 365 | { |
eb1e8bd6 | 366 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
367 | return 0; |
368 | ||
f626d6df LW |
369 | gc->valid_mask = gpiochip_allocate_mask(gc); |
370 | if (!gc->valid_mask) | |
726cb3ba SB |
371 | return -ENOMEM; |
372 | ||
373 | return 0; | |
374 | } | |
375 | ||
c9fc5aff | 376 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 377 | { |
c9fc5aff LW |
378 | if (gc->init_valid_mask) |
379 | return gc->init_valid_mask(gc, | |
380 | gc->valid_mask, | |
381 | gc->ngpio); | |
f8ec92a9 RRD |
382 | |
383 | return 0; | |
384 | } | |
385 | ||
726cb3ba SB |
386 | static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip) |
387 | { | |
7bdbd1ec | 388 | bitmap_free(gpiochip->valid_mask); |
726cb3ba SB |
389 | gpiochip->valid_mask = NULL; |
390 | } | |
391 | ||
392 | bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip, | |
393 | unsigned int offset) | |
394 | { | |
395 | /* No mask means all valid */ | |
396 | if (likely(!gpiochip->valid_mask)) | |
397 | return true; | |
398 | return test_bit(offset, gpiochip->valid_mask); | |
399 | } | |
400 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
401 | ||
d7c51b47 LW |
402 | /* |
403 | * GPIO line handle management | |
404 | */ | |
405 | ||
406 | /** | |
407 | * struct linehandle_state - contains the state of a userspace handle | |
408 | * @gdev: the GPIO device the handle pertains to | |
409 | * @label: consumer label used to tag descriptors | |
410 | * @descs: the GPIO descriptors held by this handle | |
411 | * @numdescs: the number of descriptors held in the descs array | |
412 | */ | |
413 | struct linehandle_state { | |
414 | struct gpio_device *gdev; | |
415 | const char *label; | |
416 | struct gpio_desc *descs[GPIOHANDLES_MAX]; | |
417 | u32 numdescs; | |
418 | }; | |
419 | ||
e3e847c7 LPC |
420 | #define GPIOHANDLE_REQUEST_VALID_FLAGS \ |
421 | (GPIOHANDLE_REQUEST_INPUT | \ | |
422 | GPIOHANDLE_REQUEST_OUTPUT | \ | |
423 | GPIOHANDLE_REQUEST_ACTIVE_LOW | \ | |
424 | GPIOHANDLE_REQUEST_OPEN_DRAIN | \ | |
425 | GPIOHANDLE_REQUEST_OPEN_SOURCE) | |
426 | ||
d7c51b47 LW |
427 | static long linehandle_ioctl(struct file *filep, unsigned int cmd, |
428 | unsigned long arg) | |
429 | { | |
430 | struct linehandle_state *lh = filep->private_data; | |
431 | void __user *ip = (void __user *)arg; | |
432 | struct gpiohandle_data ghd; | |
b9762beb | 433 | DECLARE_BITMAP(vals, GPIOHANDLES_MAX); |
d7c51b47 LW |
434 | int i; |
435 | ||
436 | if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) { | |
2b955b34 | 437 | /* NOTE: It's ok to read values of output lines. */ |
eec1d566 LW |
438 | int ret = gpiod_get_array_value_complex(false, |
439 | true, | |
440 | lh->numdescs, | |
441 | lh->descs, | |
77588c14 | 442 | NULL, |
eec1d566 LW |
443 | vals); |
444 | if (ret) | |
445 | return ret; | |
d7c51b47 | 446 | |
3eded5d8 | 447 | memset(&ghd, 0, sizeof(ghd)); |
eec1d566 | 448 | for (i = 0; i < lh->numdescs; i++) |
b9762beb | 449 | ghd.values[i] = test_bit(i, vals); |
d7c51b47 LW |
450 | |
451 | if (copy_to_user(ip, &ghd, sizeof(ghd))) | |
452 | return -EFAULT; | |
453 | ||
454 | return 0; | |
455 | } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) { | |
e5332d54 BG |
456 | /* |
457 | * All line descriptors were created at once with the same | |
458 | * flags so just check if the first one is really output. | |
459 | */ | |
460 | if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags)) | |
461 | return -EPERM; | |
462 | ||
d7c51b47 LW |
463 | if (copy_from_user(&ghd, ip, sizeof(ghd))) |
464 | return -EFAULT; | |
465 | ||
466 | /* Clamp all values to [0,1] */ | |
467 | for (i = 0; i < lh->numdescs; i++) | |
b9762beb | 468 | __assign_bit(i, vals, ghd.values[i]); |
d7c51b47 LW |
469 | |
470 | /* Reuse the array setting function */ | |
3027743f | 471 | return gpiod_set_array_value_complex(false, |
d7c51b47 LW |
472 | true, |
473 | lh->numdescs, | |
474 | lh->descs, | |
77588c14 | 475 | NULL, |
d7c51b47 | 476 | vals); |
d7c51b47 LW |
477 | } |
478 | return -EINVAL; | |
479 | } | |
480 | ||
481 | #ifdef CONFIG_COMPAT | |
482 | static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd, | |
483 | unsigned long arg) | |
484 | { | |
485 | return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg)); | |
486 | } | |
487 | #endif | |
488 | ||
489 | static int linehandle_release(struct inode *inode, struct file *filep) | |
490 | { | |
491 | struct linehandle_state *lh = filep->private_data; | |
492 | struct gpio_device *gdev = lh->gdev; | |
493 | int i; | |
494 | ||
495 | for (i = 0; i < lh->numdescs; i++) | |
496 | gpiod_free(lh->descs[i]); | |
497 | kfree(lh->label); | |
498 | kfree(lh); | |
499 | put_device(&gdev->dev); | |
500 | return 0; | |
501 | } | |
502 | ||
503 | static const struct file_operations linehandle_fileops = { | |
504 | .release = linehandle_release, | |
505 | .owner = THIS_MODULE, | |
506 | .llseek = noop_llseek, | |
507 | .unlocked_ioctl = linehandle_ioctl, | |
508 | #ifdef CONFIG_COMPAT | |
509 | .compat_ioctl = linehandle_ioctl_compat, | |
510 | #endif | |
511 | }; | |
512 | ||
513 | static int linehandle_create(struct gpio_device *gdev, void __user *ip) | |
514 | { | |
515 | struct gpiohandle_request handlereq; | |
516 | struct linehandle_state *lh; | |
953b956a | 517 | struct file *file; |
ab3dbcf7 | 518 | int fd, i, count = 0, ret; |
418ee8e9 | 519 | u32 lflags; |
d7c51b47 LW |
520 | |
521 | if (copy_from_user(&handlereq, ip, sizeof(handlereq))) | |
522 | return -EFAULT; | |
523 | if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX)) | |
524 | return -EINVAL; | |
525 | ||
418ee8e9 BG |
526 | lflags = handlereq.flags; |
527 | ||
528 | /* Return an error if an unknown flag is set */ | |
529 | if (lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) | |
530 | return -EINVAL; | |
531 | ||
e95fbc13 KG |
532 | /* |
533 | * Do not allow both INPUT & OUTPUT flags to be set as they are | |
534 | * contradictory. | |
535 | */ | |
536 | if ((lflags & GPIOHANDLE_REQUEST_INPUT) && | |
537 | (lflags & GPIOHANDLE_REQUEST_OUTPUT)) | |
538 | return -EINVAL; | |
539 | ||
588fc3bc BG |
540 | /* |
541 | * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If | |
542 | * the hardware actually supports enabling both at the same time the | |
543 | * electrical result would be disastrous. | |
544 | */ | |
545 | if ((lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) && | |
546 | (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) | |
547 | return -EINVAL; | |
548 | ||
609aaf6a BG |
549 | /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */ |
550 | if (!(lflags & GPIOHANDLE_REQUEST_OUTPUT) && | |
551 | ((lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) || | |
552 | (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))) | |
553 | return -EINVAL; | |
554 | ||
d7c51b47 LW |
555 | lh = kzalloc(sizeof(*lh), GFP_KERNEL); |
556 | if (!lh) | |
557 | return -ENOMEM; | |
558 | lh->gdev = gdev; | |
559 | get_device(&gdev->dev); | |
560 | ||
561 | /* Make sure this is terminated */ | |
562 | handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0'; | |
563 | if (strlen(handlereq.consumer_label)) { | |
564 | lh->label = kstrdup(handlereq.consumer_label, | |
565 | GFP_KERNEL); | |
566 | if (!lh->label) { | |
567 | ret = -ENOMEM; | |
568 | goto out_free_lh; | |
569 | } | |
570 | } | |
571 | ||
572 | /* Request each GPIO */ | |
573 | for (i = 0; i < handlereq.lines; i++) { | |
574 | u32 offset = handlereq.lineoffsets[i]; | |
d7c51b47 LW |
575 | struct gpio_desc *desc; |
576 | ||
e405f9fc LPC |
577 | if (offset >= gdev->ngpio) { |
578 | ret = -EINVAL; | |
579 | goto out_free_descs; | |
580 | } | |
581 | ||
d7c51b47 LW |
582 | desc = &gdev->descs[offset]; |
583 | ret = gpiod_request(desc, lh->label); | |
584 | if (ret) | |
585 | goto out_free_descs; | |
586 | lh->descs[i] = desc; | |
19a4fbff | 587 | count = i + 1; |
d7c51b47 LW |
588 | |
589 | if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW) | |
590 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
591 | if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) | |
592 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
593 | if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE) | |
594 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
595 | ||
e10f72bf AJ |
596 | ret = gpiod_set_transitory(desc, false); |
597 | if (ret < 0) | |
598 | goto out_free_descs; | |
599 | ||
d7c51b47 LW |
600 | /* |
601 | * Lines have to be requested explicitly for input | |
602 | * or output, else the line will be treated "as is". | |
603 | */ | |
604 | if (lflags & GPIOHANDLE_REQUEST_OUTPUT) { | |
605 | int val = !!handlereq.default_values[i]; | |
606 | ||
607 | ret = gpiod_direction_output(desc, val); | |
608 | if (ret) | |
609 | goto out_free_descs; | |
610 | } else if (lflags & GPIOHANDLE_REQUEST_INPUT) { | |
611 | ret = gpiod_direction_input(desc); | |
612 | if (ret) | |
613 | goto out_free_descs; | |
614 | } | |
615 | dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", | |
616 | offset); | |
617 | } | |
e2f608be LW |
618 | /* Let i point at the last handle */ |
619 | i--; | |
d7c51b47 LW |
620 | lh->numdescs = handlereq.lines; |
621 | ||
953b956a | 622 | fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); |
d7c51b47 LW |
623 | if (fd < 0) { |
624 | ret = fd; | |
625 | goto out_free_descs; | |
626 | } | |
627 | ||
953b956a LPC |
628 | file = anon_inode_getfile("gpio-linehandle", |
629 | &linehandle_fileops, | |
630 | lh, | |
631 | O_RDONLY | O_CLOEXEC); | |
632 | if (IS_ERR(file)) { | |
633 | ret = PTR_ERR(file); | |
634 | goto out_put_unused_fd; | |
635 | } | |
636 | ||
d7c51b47 | 637 | handlereq.fd = fd; |
d932cd49 | 638 | if (copy_to_user(ip, &handlereq, sizeof(handlereq))) { |
953b956a LPC |
639 | /* |
640 | * fput() will trigger the release() callback, so do not go onto | |
641 | * the regular error cleanup path here. | |
642 | */ | |
643 | fput(file); | |
644 | put_unused_fd(fd); | |
645 | return -EFAULT; | |
d932cd49 | 646 | } |
d7c51b47 | 647 | |
953b956a LPC |
648 | fd_install(fd, file); |
649 | ||
d7c51b47 LW |
650 | dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n", |
651 | lh->numdescs); | |
652 | ||
653 | return 0; | |
654 | ||
953b956a LPC |
655 | out_put_unused_fd: |
656 | put_unused_fd(fd); | |
d7c51b47 | 657 | out_free_descs: |
ab3dbcf7 | 658 | for (i = 0; i < count; i++) |
d7c51b47 LW |
659 | gpiod_free(lh->descs[i]); |
660 | kfree(lh->label); | |
661 | out_free_lh: | |
662 | kfree(lh); | |
663 | put_device(&gdev->dev); | |
664 | return ret; | |
665 | } | |
666 | ||
61f922db LW |
667 | /* |
668 | * GPIO line event management | |
669 | */ | |
670 | ||
671 | /** | |
672 | * struct lineevent_state - contains the state of a userspace event | |
673 | * @gdev: the GPIO device the event pertains to | |
674 | * @label: consumer label used to tag descriptors | |
675 | * @desc: the GPIO descriptor held by this event | |
676 | * @eflags: the event flags this line was requested with | |
677 | * @irq: the interrupt that trigger in response to events on this GPIO | |
678 | * @wait: wait queue that handles blocking reads of events | |
679 | * @events: KFIFO for the GPIO events | |
680 | * @read_lock: mutex lock to protect reads from colliding with adding | |
681 | * new events to the FIFO | |
d58f2bf2 LW |
682 | * @timestamp: cache for the timestamp storing it between hardirq |
683 | * and IRQ thread, used to bring the timestamp close to the actual | |
684 | * event | |
61f922db LW |
685 | */ |
686 | struct lineevent_state { | |
687 | struct gpio_device *gdev; | |
688 | const char *label; | |
689 | struct gpio_desc *desc; | |
690 | u32 eflags; | |
691 | int irq; | |
692 | wait_queue_head_t wait; | |
693 | DECLARE_KFIFO(events, struct gpioevent_data, 16); | |
694 | struct mutex read_lock; | |
d58f2bf2 | 695 | u64 timestamp; |
61f922db LW |
696 | }; |
697 | ||
ac7dbb99 LPC |
698 | #define GPIOEVENT_REQUEST_VALID_FLAGS \ |
699 | (GPIOEVENT_REQUEST_RISING_EDGE | \ | |
700 | GPIOEVENT_REQUEST_FALLING_EDGE) | |
701 | ||
afc9a42b | 702 | static __poll_t lineevent_poll(struct file *filep, |
61f922db LW |
703 | struct poll_table_struct *wait) |
704 | { | |
705 | struct lineevent_state *le = filep->private_data; | |
afc9a42b | 706 | __poll_t events = 0; |
61f922db LW |
707 | |
708 | poll_wait(filep, &le->wait, wait); | |
709 | ||
710 | if (!kfifo_is_empty(&le->events)) | |
a9a08845 | 711 | events = EPOLLIN | EPOLLRDNORM; |
61f922db LW |
712 | |
713 | return events; | |
714 | } | |
715 | ||
716 | ||
717 | static ssize_t lineevent_read(struct file *filep, | |
718 | char __user *buf, | |
719 | size_t count, | |
720 | loff_t *f_ps) | |
721 | { | |
722 | struct lineevent_state *le = filep->private_data; | |
723 | unsigned int copied; | |
724 | int ret; | |
725 | ||
726 | if (count < sizeof(struct gpioevent_data)) | |
727 | return -EINVAL; | |
728 | ||
729 | do { | |
730 | if (kfifo_is_empty(&le->events)) { | |
731 | if (filep->f_flags & O_NONBLOCK) | |
732 | return -EAGAIN; | |
733 | ||
734 | ret = wait_event_interruptible(le->wait, | |
735 | !kfifo_is_empty(&le->events)); | |
736 | if (ret) | |
737 | return ret; | |
738 | } | |
739 | ||
740 | if (mutex_lock_interruptible(&le->read_lock)) | |
741 | return -ERESTARTSYS; | |
742 | ret = kfifo_to_user(&le->events, buf, count, &copied); | |
743 | mutex_unlock(&le->read_lock); | |
744 | ||
745 | if (ret) | |
746 | return ret; | |
747 | ||
748 | /* | |
749 | * If we couldn't read anything from the fifo (a different | |
750 | * thread might have been faster) we either return -EAGAIN if | |
751 | * the file descriptor is non-blocking, otherwise we go back to | |
752 | * sleep and wait for more data to arrive. | |
753 | */ | |
754 | if (copied == 0 && (filep->f_flags & O_NONBLOCK)) | |
755 | return -EAGAIN; | |
756 | ||
757 | } while (copied == 0); | |
758 | ||
759 | return copied; | |
760 | } | |
761 | ||
762 | static int lineevent_release(struct inode *inode, struct file *filep) | |
763 | { | |
764 | struct lineevent_state *le = filep->private_data; | |
765 | struct gpio_device *gdev = le->gdev; | |
766 | ||
767 | free_irq(le->irq, le); | |
768 | gpiod_free(le->desc); | |
769 | kfree(le->label); | |
770 | kfree(le); | |
771 | put_device(&gdev->dev); | |
772 | return 0; | |
773 | } | |
774 | ||
775 | static long lineevent_ioctl(struct file *filep, unsigned int cmd, | |
776 | unsigned long arg) | |
777 | { | |
778 | struct lineevent_state *le = filep->private_data; | |
779 | void __user *ip = (void __user *)arg; | |
780 | struct gpiohandle_data ghd; | |
781 | ||
782 | /* | |
783 | * We can get the value for an event line but not set it, | |
784 | * because it is input by definition. | |
785 | */ | |
786 | if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) { | |
787 | int val; | |
788 | ||
d82aa4a8 LPC |
789 | memset(&ghd, 0, sizeof(ghd)); |
790 | ||
61f922db LW |
791 | val = gpiod_get_value_cansleep(le->desc); |
792 | if (val < 0) | |
793 | return val; | |
794 | ghd.values[0] = val; | |
795 | ||
796 | if (copy_to_user(ip, &ghd, sizeof(ghd))) | |
797 | return -EFAULT; | |
798 | ||
799 | return 0; | |
800 | } | |
801 | return -EINVAL; | |
802 | } | |
803 | ||
804 | #ifdef CONFIG_COMPAT | |
805 | static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd, | |
806 | unsigned long arg) | |
807 | { | |
808 | return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg)); | |
809 | } | |
810 | #endif | |
811 | ||
812 | static const struct file_operations lineevent_fileops = { | |
813 | .release = lineevent_release, | |
814 | .read = lineevent_read, | |
815 | .poll = lineevent_poll, | |
816 | .owner = THIS_MODULE, | |
817 | .llseek = noop_llseek, | |
818 | .unlocked_ioctl = lineevent_ioctl, | |
819 | #ifdef CONFIG_COMPAT | |
820 | .compat_ioctl = lineevent_ioctl_compat, | |
821 | #endif | |
822 | }; | |
823 | ||
33265b17 | 824 | static irqreturn_t lineevent_irq_thread(int irq, void *p) |
61f922db LW |
825 | { |
826 | struct lineevent_state *le = p; | |
827 | struct gpioevent_data ge; | |
fa38869b | 828 | int ret; |
61f922db | 829 | |
24bd3efc LW |
830 | /* Do not leak kernel stack to userspace */ |
831 | memset(&ge, 0, sizeof(ge)); | |
832 | ||
1033be58 BG |
833 | /* |
834 | * We may be running from a nested threaded interrupt in which case | |
835 | * we didn't get the timestamp from lineevent_irq_handler(). | |
836 | */ | |
837 | if (!le->timestamp) | |
838 | ge.timestamp = ktime_get_real_ns(); | |
839 | else | |
840 | ge.timestamp = le->timestamp; | |
61f922db | 841 | |
ad537b82 BG |
842 | if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE |
843 | && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { | |
fa38869b | 844 | int level = gpiod_get_value_cansleep(le->desc); |
61f922db LW |
845 | if (level) |
846 | /* Emit low-to-high event */ | |
847 | ge.id = GPIOEVENT_EVENT_RISING_EDGE; | |
848 | else | |
849 | /* Emit high-to-low event */ | |
850 | ge.id = GPIOEVENT_EVENT_FALLING_EDGE; | |
fa38869b | 851 | } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) { |
61f922db LW |
852 | /* Emit low-to-high event */ |
853 | ge.id = GPIOEVENT_EVENT_RISING_EDGE; | |
fa38869b | 854 | } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { |
61f922db LW |
855 | /* Emit high-to-low event */ |
856 | ge.id = GPIOEVENT_EVENT_FALLING_EDGE; | |
bc0207a5 AB |
857 | } else { |
858 | return IRQ_NONE; | |
61f922db LW |
859 | } |
860 | ||
861 | ret = kfifo_put(&le->events, ge); | |
2efc6bfa | 862 | if (ret) |
a9a08845 | 863 | wake_up_poll(&le->wait, EPOLLIN); |
61f922db LW |
864 | |
865 | return IRQ_HANDLED; | |
866 | } | |
867 | ||
d58f2bf2 LW |
868 | static irqreturn_t lineevent_irq_handler(int irq, void *p) |
869 | { | |
870 | struct lineevent_state *le = p; | |
871 | ||
872 | /* | |
873 | * Just store the timestamp in hardirq context so we get it as | |
874 | * close in time as possible to the actual event. | |
875 | */ | |
876 | le->timestamp = ktime_get_real_ns(); | |
877 | ||
878 | return IRQ_WAKE_THREAD; | |
879 | } | |
880 | ||
61f922db LW |
881 | static int lineevent_create(struct gpio_device *gdev, void __user *ip) |
882 | { | |
883 | struct gpioevent_request eventreq; | |
884 | struct lineevent_state *le; | |
885 | struct gpio_desc *desc; | |
953b956a | 886 | struct file *file; |
61f922db LW |
887 | u32 offset; |
888 | u32 lflags; | |
889 | u32 eflags; | |
890 | int fd; | |
891 | int ret; | |
892 | int irqflags = 0; | |
893 | ||
894 | if (copy_from_user(&eventreq, ip, sizeof(eventreq))) | |
895 | return -EFAULT; | |
896 | ||
897 | le = kzalloc(sizeof(*le), GFP_KERNEL); | |
898 | if (!le) | |
899 | return -ENOMEM; | |
900 | le->gdev = gdev; | |
901 | get_device(&gdev->dev); | |
902 | ||
903 | /* Make sure this is terminated */ | |
904 | eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0'; | |
905 | if (strlen(eventreq.consumer_label)) { | |
906 | le->label = kstrdup(eventreq.consumer_label, | |
907 | GFP_KERNEL); | |
908 | if (!le->label) { | |
909 | ret = -ENOMEM; | |
910 | goto out_free_le; | |
911 | } | |
912 | } | |
913 | ||
914 | offset = eventreq.lineoffset; | |
915 | lflags = eventreq.handleflags; | |
916 | eflags = eventreq.eventflags; | |
917 | ||
b8b0e3d3 LPC |
918 | if (offset >= gdev->ngpio) { |
919 | ret = -EINVAL; | |
920 | goto out_free_label; | |
921 | } | |
922 | ||
ac7dbb99 LPC |
923 | /* Return an error if a unknown flag is set */ |
924 | if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) || | |
925 | (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS)) { | |
926 | ret = -EINVAL; | |
927 | goto out_free_label; | |
928 | } | |
929 | ||
61f922db | 930 | /* This is just wrong: we don't look for events on output lines */ |
5ca2f54b KG |
931 | if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) || |
932 | (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) || | |
933 | (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) { | |
61f922db LW |
934 | ret = -EINVAL; |
935 | goto out_free_label; | |
936 | } | |
937 | ||
938 | desc = &gdev->descs[offset]; | |
939 | ret = gpiod_request(desc, le->label); | |
940 | if (ret) | |
f001cc35 | 941 | goto out_free_label; |
61f922db LW |
942 | le->desc = desc; |
943 | le->eflags = eflags; | |
944 | ||
945 | if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW) | |
946 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
61f922db LW |
947 | |
948 | ret = gpiod_direction_input(desc); | |
949 | if (ret) | |
950 | goto out_free_desc; | |
951 | ||
952 | le->irq = gpiod_to_irq(desc); | |
953 | if (le->irq <= 0) { | |
954 | ret = -ENODEV; | |
955 | goto out_free_desc; | |
956 | } | |
957 | ||
958 | if (eflags & GPIOEVENT_REQUEST_RISING_EDGE) | |
223ecaf1 MW |
959 | irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? |
960 | IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; | |
61f922db | 961 | if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE) |
223ecaf1 MW |
962 | irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? |
963 | IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; | |
61f922db | 964 | irqflags |= IRQF_ONESHOT; |
61f922db LW |
965 | |
966 | INIT_KFIFO(le->events); | |
967 | init_waitqueue_head(&le->wait); | |
968 | mutex_init(&le->read_lock); | |
969 | ||
970 | /* Request a thread to read the events */ | |
971 | ret = request_threaded_irq(le->irq, | |
d58f2bf2 | 972 | lineevent_irq_handler, |
61f922db LW |
973 | lineevent_irq_thread, |
974 | irqflags, | |
975 | le->label, | |
976 | le); | |
977 | if (ret) | |
978 | goto out_free_desc; | |
979 | ||
953b956a | 980 | fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); |
61f922db LW |
981 | if (fd < 0) { |
982 | ret = fd; | |
983 | goto out_free_irq; | |
984 | } | |
985 | ||
953b956a LPC |
986 | file = anon_inode_getfile("gpio-event", |
987 | &lineevent_fileops, | |
988 | le, | |
989 | O_RDONLY | O_CLOEXEC); | |
990 | if (IS_ERR(file)) { | |
991 | ret = PTR_ERR(file); | |
992 | goto out_put_unused_fd; | |
993 | } | |
994 | ||
61f922db | 995 | eventreq.fd = fd; |
d932cd49 | 996 | if (copy_to_user(ip, &eventreq, sizeof(eventreq))) { |
953b956a LPC |
997 | /* |
998 | * fput() will trigger the release() callback, so do not go onto | |
999 | * the regular error cleanup path here. | |
1000 | */ | |
1001 | fput(file); | |
1002 | put_unused_fd(fd); | |
1003 | return -EFAULT; | |
d932cd49 | 1004 | } |
61f922db | 1005 | |
953b956a LPC |
1006 | fd_install(fd, file); |
1007 | ||
61f922db LW |
1008 | return 0; |
1009 | ||
953b956a LPC |
1010 | out_put_unused_fd: |
1011 | put_unused_fd(fd); | |
61f922db LW |
1012 | out_free_irq: |
1013 | free_irq(le->irq, le); | |
1014 | out_free_desc: | |
1015 | gpiod_free(le->desc); | |
1016 | out_free_label: | |
1017 | kfree(le->label); | |
1018 | out_free_le: | |
1019 | kfree(le); | |
1020 | put_device(&gdev->dev); | |
1021 | return ret; | |
1022 | } | |
1023 | ||
950d55f5 | 1024 | /* |
3c702e99 LW |
1025 | * gpio_ioctl() - ioctl handler for the GPIO chardev |
1026 | */ | |
1027 | static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |
1028 | { | |
1029 | struct gpio_device *gdev = filp->private_data; | |
1030 | struct gpio_chip *chip = gdev->chip; | |
8b92e17e | 1031 | void __user *ip = (void __user *)arg; |
3c702e99 LW |
1032 | |
1033 | /* We fail any subsequent ioctl():s when the chip is gone */ | |
1034 | if (!chip) | |
1035 | return -ENODEV; | |
1036 | ||
521a2ad6 | 1037 | /* Fill in the struct and pass to userspace */ |
3c702e99 | 1038 | if (cmd == GPIO_GET_CHIPINFO_IOCTL) { |
521a2ad6 LW |
1039 | struct gpiochip_info chipinfo; |
1040 | ||
0f4bbb23 LPC |
1041 | memset(&chipinfo, 0, sizeof(chipinfo)); |
1042 | ||
3c702e99 LW |
1043 | strncpy(chipinfo.name, dev_name(&gdev->dev), |
1044 | sizeof(chipinfo.name)); | |
1045 | chipinfo.name[sizeof(chipinfo.name)-1] = '\0'; | |
df4878e9 LW |
1046 | strncpy(chipinfo.label, gdev->label, |
1047 | sizeof(chipinfo.label)); | |
1048 | chipinfo.label[sizeof(chipinfo.label)-1] = '\0'; | |
fdeb8e15 | 1049 | chipinfo.lines = gdev->ngpio; |
3c702e99 LW |
1050 | if (copy_to_user(ip, &chipinfo, sizeof(chipinfo))) |
1051 | return -EFAULT; | |
1052 | return 0; | |
521a2ad6 LW |
1053 | } else if (cmd == GPIO_GET_LINEINFO_IOCTL) { |
1054 | struct gpioline_info lineinfo; | |
1055 | struct gpio_desc *desc; | |
1056 | ||
1057 | if (copy_from_user(&lineinfo, ip, sizeof(lineinfo))) | |
1058 | return -EFAULT; | |
1f1cc456 | 1059 | if (lineinfo.line_offset >= gdev->ngpio) |
521a2ad6 LW |
1060 | return -EINVAL; |
1061 | ||
1062 | desc = &gdev->descs[lineinfo.line_offset]; | |
1063 | if (desc->name) { | |
1064 | strncpy(lineinfo.name, desc->name, | |
1065 | sizeof(lineinfo.name)); | |
1066 | lineinfo.name[sizeof(lineinfo.name)-1] = '\0'; | |
1067 | } else { | |
1068 | lineinfo.name[0] = '\0'; | |
1069 | } | |
1070 | if (desc->label) { | |
214338e3 LW |
1071 | strncpy(lineinfo.consumer, desc->label, |
1072 | sizeof(lineinfo.consumer)); | |
1073 | lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0'; | |
521a2ad6 | 1074 | } else { |
214338e3 | 1075 | lineinfo.consumer[0] = '\0'; |
521a2ad6 LW |
1076 | } |
1077 | ||
1078 | /* | |
1079 | * Userspace only need to know that the kernel is using | |
1080 | * this GPIO so it can't use it. | |
1081 | */ | |
1082 | lineinfo.flags = 0; | |
9d8cc89c LW |
1083 | if (test_bit(FLAG_REQUESTED, &desc->flags) || |
1084 | test_bit(FLAG_IS_HOGGED, &desc->flags) || | |
1085 | test_bit(FLAG_USED_AS_IRQ, &desc->flags) || | |
1086 | test_bit(FLAG_EXPORT, &desc->flags) || | |
472a61e7 SW |
1087 | test_bit(FLAG_SYSFS, &desc->flags) || |
1088 | !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset)) | |
521a2ad6 | 1089 | lineinfo.flags |= GPIOLINE_FLAG_KERNEL; |
9d8cc89c | 1090 | if (test_bit(FLAG_IS_OUT, &desc->flags)) |
521a2ad6 | 1091 | lineinfo.flags |= GPIOLINE_FLAG_IS_OUT; |
9d8cc89c | 1092 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
521a2ad6 | 1093 | lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW; |
9d8cc89c | 1094 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) |
2c60e6b5 BG |
1095 | lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN | |
1096 | GPIOLINE_FLAG_IS_OUT); | |
9d8cc89c | 1097 | if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) |
2c60e6b5 BG |
1098 | lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE | |
1099 | GPIOLINE_FLAG_IS_OUT); | |
521a2ad6 LW |
1100 | |
1101 | if (copy_to_user(ip, &lineinfo, sizeof(lineinfo))) | |
1102 | return -EFAULT; | |
1103 | return 0; | |
d7c51b47 LW |
1104 | } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) { |
1105 | return linehandle_create(gdev, ip); | |
61f922db LW |
1106 | } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) { |
1107 | return lineevent_create(gdev, ip); | |
3c702e99 LW |
1108 | } |
1109 | return -EINVAL; | |
1110 | } | |
1111 | ||
8b92e17e LW |
1112 | #ifdef CONFIG_COMPAT |
1113 | static long gpio_ioctl_compat(struct file *filp, unsigned int cmd, | |
1114 | unsigned long arg) | |
1115 | { | |
1116 | return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); | |
1117 | } | |
1118 | #endif | |
1119 | ||
3c702e99 LW |
1120 | /** |
1121 | * gpio_chrdev_open() - open the chardev for ioctl operations | |
1122 | * @inode: inode for this chardev | |
1123 | * @filp: file struct for storing private data | |
1124 | * Returns 0 on success | |
1125 | */ | |
1126 | static int gpio_chrdev_open(struct inode *inode, struct file *filp) | |
1127 | { | |
1128 | struct gpio_device *gdev = container_of(inode->i_cdev, | |
1129 | struct gpio_device, chrdev); | |
1130 | ||
1131 | /* Fail on open if the backing gpiochip is gone */ | |
fb505747 | 1132 | if (!gdev->chip) |
3c702e99 LW |
1133 | return -ENODEV; |
1134 | get_device(&gdev->dev); | |
1135 | filp->private_data = gdev; | |
f4e81c52 LPC |
1136 | |
1137 | return nonseekable_open(inode, filp); | |
3c702e99 LW |
1138 | } |
1139 | ||
1140 | /** | |
1141 | * gpio_chrdev_release() - close chardev after ioctl operations | |
1142 | * @inode: inode for this chardev | |
1143 | * @filp: file struct for storing private data | |
1144 | * Returns 0 on success | |
1145 | */ | |
1146 | static int gpio_chrdev_release(struct inode *inode, struct file *filp) | |
1147 | { | |
1148 | struct gpio_device *gdev = container_of(inode->i_cdev, | |
1149 | struct gpio_device, chrdev); | |
1150 | ||
3c702e99 LW |
1151 | put_device(&gdev->dev); |
1152 | return 0; | |
1153 | } | |
1154 | ||
1155 | ||
1156 | static const struct file_operations gpio_fileops = { | |
1157 | .release = gpio_chrdev_release, | |
1158 | .open = gpio_chrdev_open, | |
1159 | .owner = THIS_MODULE, | |
f4e81c52 | 1160 | .llseek = no_llseek, |
3c702e99 | 1161 | .unlocked_ioctl = gpio_ioctl, |
8b92e17e LW |
1162 | #ifdef CONFIG_COMPAT |
1163 | .compat_ioctl = gpio_ioctl_compat, | |
1164 | #endif | |
3c702e99 LW |
1165 | }; |
1166 | ||
ff2b1359 LW |
1167 | static void gpiodevice_release(struct device *dev) |
1168 | { | |
1169 | struct gpio_device *gdev = dev_get_drvdata(dev); | |
1170 | ||
1171 | list_del(&gdev->list); | |
1172 | ida_simple_remove(&gpio_ida, gdev->id); | |
fcf273e5 | 1173 | kfree_const(gdev->label); |
476e2fc5 | 1174 | kfree(gdev->descs); |
9efd9e69 | 1175 | kfree(gdev); |
ff2b1359 LW |
1176 | } |
1177 | ||
159f3cd9 GR |
1178 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
1179 | { | |
d377f56f | 1180 | int ret; |
159f3cd9 GR |
1181 | |
1182 | cdev_init(&gdev->chrdev, &gpio_fileops); | |
1183 | gdev->chrdev.owner = THIS_MODULE; | |
159f3cd9 | 1184 | gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id); |
111379dc | 1185 | |
d377f56f LW |
1186 | ret = cdev_device_add(&gdev->chrdev, &gdev->dev); |
1187 | if (ret) | |
1188 | return ret; | |
111379dc LG |
1189 | |
1190 | chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n", | |
1191 | MAJOR(gpio_devt), gdev->id); | |
159f3cd9 | 1192 | |
d377f56f LW |
1193 | ret = gpiochip_sysfs_register(gdev); |
1194 | if (ret) | |
159f3cd9 GR |
1195 | goto err_remove_device; |
1196 | ||
1197 | /* From this point, the .release() function cleans up gpio_device */ | |
1198 | gdev->dev.release = gpiodevice_release; | |
159f3cd9 GR |
1199 | pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n", |
1200 | __func__, gdev->base, gdev->base + gdev->ngpio - 1, | |
1201 | dev_name(&gdev->dev), gdev->chip->label ? : "generic"); | |
1202 | ||
1203 | return 0; | |
1204 | ||
1205 | err_remove_device: | |
111379dc | 1206 | cdev_device_del(&gdev->chrdev, &gdev->dev); |
d377f56f | 1207 | return ret; |
159f3cd9 GR |
1208 | } |
1209 | ||
a411e81e BG |
1210 | static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog) |
1211 | { | |
1212 | struct gpio_desc *desc; | |
1213 | int rv; | |
1214 | ||
1215 | desc = gpiochip_get_desc(chip, hog->chip_hwnum); | |
1216 | if (IS_ERR(desc)) { | |
1217 | pr_err("%s: unable to get GPIO desc: %ld\n", | |
1218 | __func__, PTR_ERR(desc)); | |
1219 | return; | |
1220 | } | |
1221 | ||
ba3efdff | 1222 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
1223 | return; |
1224 | ||
1225 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
1226 | if (rv) | |
1227 | pr_err("%s: unable to hog GPIO line (%s:%u): %d\n", | |
1228 | __func__, chip->label, hog->chip_hwnum, rv); | |
1229 | } | |
1230 | ||
1231 | static void machine_gpiochip_add(struct gpio_chip *chip) | |
1232 | { | |
1233 | struct gpiod_hog *hog; | |
1234 | ||
1235 | mutex_lock(&gpio_machine_hogs_mutex); | |
1236 | ||
1237 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
1238 | if (!strcmp(chip->label, hog->chip_label)) | |
1239 | gpiochip_machine_hog(chip, hog); | |
1240 | } | |
1241 | ||
1242 | mutex_unlock(&gpio_machine_hogs_mutex); | |
1243 | } | |
1244 | ||
159f3cd9 GR |
1245 | static void gpiochip_setup_devs(void) |
1246 | { | |
1247 | struct gpio_device *gdev; | |
d377f56f | 1248 | int ret; |
159f3cd9 GR |
1249 | |
1250 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
1251 | ret = gpiochip_setup_dev(gdev); |
1252 | if (ret) | |
159f3cd9 | 1253 | pr_err("%s: Failed to initialize gpio device (%d)\n", |
d377f56f | 1254 | dev_name(&gdev->dev), ret); |
159f3cd9 GR |
1255 | } |
1256 | } | |
1257 | ||
959bc7b2 | 1258 | int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, |
39c3fd58 AL |
1259 | struct lock_class_key *lock_key, |
1260 | struct lock_class_key *request_key) | |
d2876d08 DB |
1261 | { |
1262 | unsigned long flags; | |
d377f56f | 1263 | int ret = 0; |
ff2b1359 | 1264 | unsigned i; |
8d0aab2f | 1265 | int base = chip->base; |
ff2b1359 | 1266 | struct gpio_device *gdev; |
d2876d08 | 1267 | |
ff2b1359 LW |
1268 | /* |
1269 | * First: allocate and populate the internal stat container, and | |
1270 | * set up the struct device. | |
1271 | */ | |
969f07b4 | 1272 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 1273 | if (!gdev) |
14e85c0e | 1274 | return -ENOMEM; |
3c702e99 | 1275 | gdev->dev.bus = &gpio_bus_type; |
ff2b1359 LW |
1276 | gdev->chip = chip; |
1277 | chip->gpiodev = gdev; | |
1278 | if (chip->parent) { | |
1279 | gdev->dev.parent = chip->parent; | |
1280 | gdev->dev.of_node = chip->parent->of_node; | |
acc6e331 TR |
1281 | } |
1282 | ||
ff2b1359 LW |
1283 | #ifdef CONFIG_OF_GPIO |
1284 | /* If the gpiochip has an assigned OF node this takes precedence */ | |
acc6e331 TR |
1285 | if (chip->of_node) |
1286 | gdev->dev.of_node = chip->of_node; | |
6ff04974 BD |
1287 | else |
1288 | chip->of_node = gdev->dev.of_node; | |
ff2b1359 | 1289 | #endif |
acc6e331 | 1290 | |
ff2b1359 LW |
1291 | gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL); |
1292 | if (gdev->id < 0) { | |
d377f56f | 1293 | ret = gdev->id; |
ff2b1359 LW |
1294 | goto err_free_gdev; |
1295 | } | |
1296 | dev_set_name(&gdev->dev, "gpiochip%d", gdev->id); | |
1297 | device_initialize(&gdev->dev); | |
1298 | dev_set_drvdata(&gdev->dev, gdev); | |
1299 | if (chip->parent && chip->parent->driver) | |
1300 | gdev->owner = chip->parent->driver->owner; | |
1301 | else if (chip->owner) | |
1302 | /* TODO: remove chip->owner */ | |
1303 | gdev->owner = chip->owner; | |
1304 | else | |
1305 | gdev->owner = THIS_MODULE; | |
d2876d08 | 1306 | |
476e2fc5 | 1307 | gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 1308 | if (!gdev->descs) { |
d377f56f | 1309 | ret = -ENOMEM; |
a05a1404 | 1310 | goto err_free_ida; |
ff2b1359 LW |
1311 | } |
1312 | ||
5ed41cc4 BJZ |
1313 | if (chip->ngpio == 0) { |
1314 | chip_err(chip, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 1315 | ret = -EINVAL; |
159f3cd9 | 1316 | goto err_free_descs; |
5ed41cc4 | 1317 | } |
df4878e9 | 1318 | |
3027743f LA |
1319 | if (chip->ngpio > FASTPATH_NGPIO) |
1320 | chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n", | |
1321 | chip->ngpio, FASTPATH_NGPIO); | |
1322 | ||
fcf273e5 | 1323 | gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 1324 | if (!gdev->label) { |
d377f56f | 1325 | ret = -ENOMEM; |
476e2fc5 | 1326 | goto err_free_descs; |
df4878e9 LW |
1327 | } |
1328 | ||
fdeb8e15 | 1329 | gdev->ngpio = chip->ngpio; |
43c54eca | 1330 | gdev->data = data; |
5ed41cc4 | 1331 | |
d2876d08 DB |
1332 | spin_lock_irqsave(&gpio_lock, flags); |
1333 | ||
fdeb8e15 LW |
1334 | /* |
1335 | * TODO: this allocates a Linux GPIO number base in the global | |
1336 | * GPIO numberspace for this chip. In the long run we want to | |
1337 | * get *rid* of this numberspace and use only descriptors, but | |
1338 | * it may be a pipe dream. It will not happen before we get rid | |
1339 | * of the sysfs interface anyways. | |
1340 | */ | |
8d0aab2f AV |
1341 | if (base < 0) { |
1342 | base = gpiochip_find_base(chip->ngpio); | |
1343 | if (base < 0) { | |
d377f56f | 1344 | ret = base; |
225fce83 | 1345 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1346 | goto err_free_label; |
8d0aab2f | 1347 | } |
fdeb8e15 LW |
1348 | /* |
1349 | * TODO: it should not be necessary to reflect the assigned | |
1350 | * base outside of the GPIO subsystem. Go over drivers and | |
1351 | * see if anyone makes use of this, else drop this and assign | |
1352 | * a poison instead. | |
1353 | */ | |
8d0aab2f AV |
1354 | chip->base = base; |
1355 | } | |
fdeb8e15 | 1356 | gdev->base = base; |
8d0aab2f | 1357 | |
d377f56f LW |
1358 | ret = gpiodev_add_to_list(gdev); |
1359 | if (ret) { | |
05aa5203 | 1360 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1361 | goto err_free_label; |
05aa5203 | 1362 | } |
1a989d0f | 1363 | |
545ebd9a LW |
1364 | spin_unlock_irqrestore(&gpio_lock, flags); |
1365 | ||
767cd17a RRD |
1366 | for (i = 0; i < chip->ngpio; i++) |
1367 | gdev->descs[i].gdev = gdev; | |
14e85c0e | 1368 | |
f23f1516 | 1369 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 1370 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
1371 | #endif |
1372 | ||
d377f56f LW |
1373 | ret = gpiochip_set_desc_names(chip); |
1374 | if (ret) | |
5f3ca732 MP |
1375 | goto err_remove_from_list; |
1376 | ||
d377f56f LW |
1377 | ret = gpiochip_alloc_valid_mask(chip); |
1378 | if (ret) | |
48057ed1 | 1379 | goto err_remove_from_list; |
e0d89728 | 1380 | |
d377f56f LW |
1381 | ret = of_gpiochip_add(chip); |
1382 | if (ret) | |
48057ed1 | 1383 | goto err_free_gpiochip_mask; |
28355f81 | 1384 | |
d377f56f LW |
1385 | ret = gpiochip_init_valid_mask(chip); |
1386 | if (ret) | |
35779890 | 1387 | goto err_remove_of_chip; |
f8ec92a9 | 1388 | |
3edfb7bd RRD |
1389 | for (i = 0; i < chip->ngpio; i++) { |
1390 | struct gpio_desc *desc = &gdev->descs[i]; | |
1391 | ||
d95da993 CP |
1392 | if (chip->get_direction && gpiochip_line_is_valid(chip, i)) { |
1393 | if (!chip->get_direction(chip, i)) | |
1394 | set_bit(FLAG_IS_OUT, &desc->flags); | |
1395 | else | |
1396 | clear_bit(FLAG_IS_OUT, &desc->flags); | |
1397 | } else { | |
1398 | if (!chip->direction_input) | |
1399 | set_bit(FLAG_IS_OUT, &desc->flags); | |
1400 | else | |
1401 | clear_bit(FLAG_IS_OUT, &desc->flags); | |
1402 | } | |
3edfb7bd RRD |
1403 | } |
1404 | ||
664e3e5a | 1405 | acpi_gpiochip_add(chip); |
391c970c | 1406 | |
a411e81e BG |
1407 | machine_gpiochip_add(chip); |
1408 | ||
fbdf8d4b LW |
1409 | ret = gpiochip_irqchip_init_valid_mask(chip); |
1410 | if (ret) | |
48057ed1 LW |
1411 | goto err_remove_acpi_chip; |
1412 | ||
fbdf8d4b LW |
1413 | ret = gpiochip_add_irqchip(chip, lock_key, request_key); |
1414 | if (ret) | |
48057ed1 LW |
1415 | goto err_remove_irqchip_mask; |
1416 | ||
3c702e99 LW |
1417 | /* |
1418 | * By first adding the chardev, and then adding the device, | |
1419 | * we get a device node entry in sysfs under | |
1420 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
1421 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
1422 | * We can do this only if gpiolib has been initialized. |
1423 | * Otherwise, defer until later. | |
3c702e99 | 1424 | */ |
159f3cd9 | 1425 | if (gpiolib_initialized) { |
d377f56f LW |
1426 | ret = gpiochip_setup_dev(gdev); |
1427 | if (ret) | |
48057ed1 | 1428 | goto err_remove_irqchip; |
159f3cd9 | 1429 | } |
cedb1881 | 1430 | return 0; |
3bae4811 | 1431 | |
48057ed1 LW |
1432 | err_remove_irqchip: |
1433 | gpiochip_irqchip_remove(chip); | |
1434 | err_remove_irqchip_mask: | |
1435 | gpiochip_irqchip_free_valid_mask(chip); | |
35779890 | 1436 | err_remove_acpi_chip: |
225fce83 | 1437 | acpi_gpiochip_remove(chip); |
35779890 | 1438 | err_remove_of_chip: |
6d86750c | 1439 | gpiochip_free_hogs(chip); |
225fce83 | 1440 | of_gpiochip_remove(chip); |
35779890 | 1441 | err_free_gpiochip_mask: |
726cb3ba | 1442 | gpiochip_free_valid_mask(chip); |
5f3ca732 | 1443 | err_remove_from_list: |
225fce83 | 1444 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 1445 | list_del(&gdev->list); |
3bae4811 | 1446 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1447 | err_free_label: |
fcf273e5 | 1448 | kfree_const(gdev->label); |
476e2fc5 GR |
1449 | err_free_descs: |
1450 | kfree(gdev->descs); | |
a05a1404 | 1451 | err_free_ida: |
ff2b1359 | 1452 | ida_simple_remove(&gpio_ida, gdev->id); |
a05a1404 | 1453 | err_free_gdev: |
d2876d08 | 1454 | /* failures here can mean systems won't boot... */ |
1777fc97 | 1455 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, |
fdeb8e15 | 1456 | gdev->base, gdev->base + gdev->ngpio - 1, |
d377f56f | 1457 | chip->label ? : "generic", ret); |
fdeb8e15 | 1458 | kfree(gdev); |
d377f56f | 1459 | return ret; |
d2876d08 | 1460 | } |
959bc7b2 | 1461 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 1462 | |
43c54eca LW |
1463 | /** |
1464 | * gpiochip_get_data() - get per-subdriver data for the chip | |
950d55f5 TR |
1465 | * @chip: GPIO chip |
1466 | * | |
1467 | * Returns: | |
1468 | * The per-subdriver data for the chip. | |
43c54eca LW |
1469 | */ |
1470 | void *gpiochip_get_data(struct gpio_chip *chip) | |
1471 | { | |
1472 | return chip->gpiodev->data; | |
1473 | } | |
1474 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
1475 | ||
d2876d08 DB |
1476 | /** |
1477 | * gpiochip_remove() - unregister a gpio_chip | |
1478 | * @chip: the chip to unregister | |
1479 | * | |
1480 | * A gpio_chip with any GPIOs still requested may not be removed. | |
1481 | */ | |
e1db1706 | 1482 | void gpiochip_remove(struct gpio_chip *chip) |
d2876d08 | 1483 | { |
ff2b1359 | 1484 | struct gpio_device *gdev = chip->gpiodev; |
fab28b89 | 1485 | struct gpio_desc *desc; |
d2876d08 | 1486 | unsigned long flags; |
1c3cdb18 | 1487 | unsigned i; |
fab28b89 | 1488 | bool requested = false; |
d2876d08 | 1489 | |
ff2b1359 | 1490 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 1491 | gpiochip_sysfs_unregister(gdev); |
5018ada6 | 1492 | gpiochip_free_hogs(chip); |
bd203bd5 BJZ |
1493 | /* Numb the device, cancelling all outstanding operations */ |
1494 | gdev->chip = NULL; | |
00acc3dc | 1495 | gpiochip_irqchip_remove(chip); |
6072b9dc | 1496 | acpi_gpiochip_remove(chip); |
9ef0d6f7 | 1497 | gpiochip_remove_pin_ranges(chip); |
391c970c | 1498 | of_gpiochip_remove(chip); |
726cb3ba | 1499 | gpiochip_free_valid_mask(chip); |
43c54eca LW |
1500 | /* |
1501 | * We accept no more calls into the driver from this point, so | |
1502 | * NULL the driver data pointer | |
1503 | */ | |
1504 | gdev->data = NULL; | |
391c970c | 1505 | |
6798acaa | 1506 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 1507 | for (i = 0; i < gdev->ngpio; i++) { |
1c3cdb18 | 1508 | desc = &gdev->descs[i]; |
fab28b89 JH |
1509 | if (test_bit(FLAG_REQUESTED, &desc->flags)) |
1510 | requested = true; | |
d2876d08 | 1511 | } |
d2876d08 | 1512 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 1513 | |
fab28b89 | 1514 | if (requested) |
fdeb8e15 | 1515 | dev_crit(&gdev->dev, |
58383c78 | 1516 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 1517 | |
ff2b1359 LW |
1518 | /* |
1519 | * The gpiochip side puts its use of the device to rest here: | |
1520 | * if there are no userspace clients, the chardev and device will | |
1521 | * be removed, else it will be dangling until the last user is | |
1522 | * gone. | |
1523 | */ | |
111379dc | 1524 | cdev_device_del(&gdev->chrdev, &gdev->dev); |
ff2b1359 | 1525 | put_device(&gdev->dev); |
d2876d08 DB |
1526 | } |
1527 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
1528 | ||
0cf3292c LD |
1529 | static void devm_gpio_chip_release(struct device *dev, void *res) |
1530 | { | |
1531 | struct gpio_chip *chip = *(struct gpio_chip **)res; | |
1532 | ||
1533 | gpiochip_remove(chip); | |
1534 | } | |
1535 | ||
0cf3292c | 1536 | /** |
689fd02e | 1537 | * devm_gpiochip_add_data() - Resource manager gpiochip_add_data() |
3925b90f | 1538 | * @dev: pointer to the device that gpio_chip belongs to. |
0cf3292c | 1539 | * @chip: the chip to register, with chip->base initialized |
950d55f5 | 1540 | * @data: driver-private data associated with this chip |
0cf3292c | 1541 | * |
950d55f5 | 1542 | * Context: potentially before irqs will work |
0cf3292c LD |
1543 | * |
1544 | * The gpio chip automatically be released when the device is unbound. | |
950d55f5 TR |
1545 | * |
1546 | * Returns: | |
1547 | * A negative errno if the chip can't be registered, such as because the | |
1548 | * chip->base is invalid or already associated with a different chip. | |
1549 | * Otherwise it returns zero as a success code. | |
0cf3292c LD |
1550 | */ |
1551 | int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, | |
1552 | void *data) | |
1553 | { | |
1554 | struct gpio_chip **ptr; | |
1555 | int ret; | |
1556 | ||
1557 | ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr), | |
1558 | GFP_KERNEL); | |
1559 | if (!ptr) | |
1560 | return -ENOMEM; | |
1561 | ||
1562 | ret = gpiochip_add_data(chip, data); | |
1563 | if (ret < 0) { | |
1564 | devres_free(ptr); | |
1565 | return ret; | |
1566 | } | |
1567 | ||
1568 | *ptr = chip; | |
1569 | devres_add(dev, ptr); | |
1570 | ||
1571 | return 0; | |
1572 | } | |
1573 | EXPORT_SYMBOL_GPL(devm_gpiochip_add_data); | |
1574 | ||
594fa265 GL |
1575 | /** |
1576 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
1577 | * @data: data to pass to match function | |
950d55f5 | 1578 | * @match: Callback function to check gpio_chip |
594fa265 GL |
1579 | * |
1580 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
1581 | * determined by a user supplied @match callback. The callback should return | |
1582 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
1583 | * non-zero, this function will return to the caller and not iterate over any | |
1584 | * more gpio_chips. | |
1585 | */ | |
07ce8ec7 | 1586 | struct gpio_chip *gpiochip_find(void *data, |
6e2cf651 | 1587 | int (*match)(struct gpio_chip *chip, |
3d0f7cf0 | 1588 | void *data)) |
594fa265 | 1589 | { |
ff2b1359 | 1590 | struct gpio_device *gdev; |
acf06ff7 | 1591 | struct gpio_chip *chip = NULL; |
594fa265 | 1592 | unsigned long flags; |
594fa265 GL |
1593 | |
1594 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 1595 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 MY |
1596 | if (gdev->chip && match(gdev->chip, data)) { |
1597 | chip = gdev->chip; | |
594fa265 | 1598 | break; |
acf06ff7 | 1599 | } |
ff2b1359 | 1600 | |
594fa265 GL |
1601 | spin_unlock_irqrestore(&gpio_lock, flags); |
1602 | ||
1603 | return chip; | |
1604 | } | |
8fa0c9bf | 1605 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 1606 | |
79697ef9 AC |
1607 | static int gpiochip_match_name(struct gpio_chip *chip, void *data) |
1608 | { | |
1609 | const char *name = data; | |
1610 | ||
1611 | return !strcmp(chip->label, name); | |
1612 | } | |
1613 | ||
1614 | static struct gpio_chip *find_chip_by_name(const char *name) | |
1615 | { | |
1616 | return gpiochip_find((void *)name, gpiochip_match_name); | |
1617 | } | |
1618 | ||
14250520 LW |
1619 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1620 | ||
1621 | /* | |
1622 | * The following is irqchip helper code for gpiochips. | |
1623 | */ | |
1624 | ||
5fbe5b58 | 1625 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 1626 | { |
5fbe5b58 LW |
1627 | struct gpio_irq_chip *girq = &gc->irq; |
1628 | ||
1629 | if (!girq->init_valid_mask) | |
79b804cb MW |
1630 | return 0; |
1631 | ||
5fbe5b58 LW |
1632 | girq->valid_mask = gpiochip_allocate_mask(gc); |
1633 | if (!girq->valid_mask) | |
79b804cb MW |
1634 | return -ENOMEM; |
1635 | ||
5fbe5b58 LW |
1636 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
1637 | ||
79b804cb MW |
1638 | return 0; |
1639 | } | |
1640 | ||
1641 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) | |
1642 | { | |
7bdbd1ec | 1643 | bitmap_free(gpiochip->irq.valid_mask); |
dc7b0387 | 1644 | gpiochip->irq.valid_mask = NULL; |
79b804cb MW |
1645 | } |
1646 | ||
64ff2c8e SB |
1647 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip, |
1648 | unsigned int offset) | |
79b804cb | 1649 | { |
726cb3ba SB |
1650 | if (!gpiochip_line_is_valid(gpiochip, offset)) |
1651 | return false; | |
79b804cb | 1652 | /* No mask means all valid */ |
dc7b0387 | 1653 | if (likely(!gpiochip->irq.valid_mask)) |
79b804cb | 1654 | return true; |
dc7b0387 | 1655 | return test_bit(offset, gpiochip->irq.valid_mask); |
79b804cb | 1656 | } |
64ff2c8e | 1657 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 1658 | |
14250520 | 1659 | /** |
d245b3f9 | 1660 | * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip |
4892d3a6 | 1661 | * @gc: the gpiochip to set the irqchip chain to |
14250520 LW |
1662 | * @parent_irq: the irq number corresponding to the parent IRQ for this |
1663 | * chained irqchip | |
1664 | * @parent_handler: the parent interrupt handler for the accumulated IRQ | |
3f97d5fc LW |
1665 | * coming out of the gpiochip. If the interrupt is nested rather than |
1666 | * cascaded, pass NULL in this handler argument | |
14250520 | 1667 | */ |
4892d3a6 | 1668 | static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc, |
6f79309a | 1669 | unsigned int parent_irq, |
d245b3f9 | 1670 | irq_flow_handler_t parent_handler) |
14250520 | 1671 | { |
4892d3a6 LW |
1672 | struct gpio_irq_chip *girq = &gc->irq; |
1673 | struct device *dev = &gc->gpiodev->dev; | |
1674 | ||
1675 | if (!girq->domain) { | |
1676 | chip_err(gc, "called %s before setting up irqchip\n", | |
83141a77 | 1677 | __func__); |
1c8732bb LW |
1678 | return; |
1679 | } | |
1680 | ||
3f97d5fc | 1681 | if (parent_handler) { |
4892d3a6 LW |
1682 | if (gc->can_sleep) { |
1683 | chip_err(gc, | |
b1911710 | 1684 | "you cannot have chained interrupts on a chip that may sleep\n"); |
3f97d5fc LW |
1685 | return; |
1686 | } | |
4892d3a6 LW |
1687 | girq->parents = devm_kcalloc(dev, 1, |
1688 | sizeof(*girq->parents), | |
1689 | GFP_KERNEL); | |
1690 | if (!girq->parents) { | |
1691 | chip_err(gc, "out of memory allocating parent IRQ\n"); | |
1692 | return; | |
1693 | } | |
1694 | girq->parents[0] = parent_irq; | |
1695 | girq->num_parents = 1; | |
3f97d5fc LW |
1696 | /* |
1697 | * The parent irqchip is already using the chip_data for this | |
1698 | * irqchip, so our callbacks simply use the handler_data. | |
1699 | */ | |
f7f87753 | 1700 | irq_set_chained_handler_and_data(parent_irq, parent_handler, |
4892d3a6 | 1701 | gc); |
3f97d5fc | 1702 | } |
14250520 | 1703 | } |
d245b3f9 LW |
1704 | |
1705 | /** | |
1706 | * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip | |
1707 | * @gpiochip: the gpiochip to set the irqchip chain to | |
1708 | * @irqchip: the irqchip to chain to the gpiochip | |
1709 | * @parent_irq: the irq number corresponding to the parent IRQ for this | |
1710 | * chained irqchip | |
1711 | * @parent_handler: the parent interrupt handler for the accumulated IRQ | |
40f5ff4f | 1712 | * coming out of the gpiochip. |
d245b3f9 LW |
1713 | */ |
1714 | void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, | |
1715 | struct irq_chip *irqchip, | |
6f79309a | 1716 | unsigned int parent_irq, |
d245b3f9 LW |
1717 | irq_flow_handler_t parent_handler) |
1718 | { | |
60ed54ca TR |
1719 | if (gpiochip->irq.threaded) { |
1720 | chip_err(gpiochip, "tried to chain a threaded gpiochip\n"); | |
1721 | return; | |
1722 | } | |
1723 | ||
3c1f6b2d | 1724 | gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, parent_handler); |
d245b3f9 | 1725 | } |
14250520 LW |
1726 | EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip); |
1727 | ||
d245b3f9 LW |
1728 | /** |
1729 | * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip | |
1730 | * @gpiochip: the gpiochip to set the irqchip nested handler to | |
1731 | * @irqchip: the irqchip to nest to the gpiochip | |
1732 | * @parent_irq: the irq number corresponding to the parent IRQ for this | |
1733 | * nested irqchip | |
1734 | */ | |
1735 | void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip, | |
1736 | struct irq_chip *irqchip, | |
6f79309a | 1737 | unsigned int parent_irq) |
d245b3f9 | 1738 | { |
3c1f6b2d | 1739 | gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL); |
d245b3f9 LW |
1740 | } |
1741 | EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip); | |
1742 | ||
fdd61a01 LW |
1743 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1744 | ||
1745 | /** | |
1746 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
1747 | * to a gpiochip | |
1748 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
1749 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
1750 | * will then percolate up to the parent | |
1751 | */ | |
1752 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
1753 | struct irq_chip *irqchip) | |
1754 | { | |
1755 | /* DT will deal with mapping each IRQ as we go along */ | |
1756 | if (is_of_node(gc->irq.fwnode)) | |
1757 | return; | |
1758 | ||
1759 | /* | |
1760 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
1761 | * irqs upfront instead of dynamically since we don't have the | |
1762 | * dynamic type of allocation that hardware description languages | |
1763 | * provide. Once all GPIO drivers using board files are gone from | |
1764 | * the kernel we can delete this code, but for a transitional period | |
1765 | * it is necessary to keep this around. | |
1766 | */ | |
1767 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
1768 | int i; | |
1769 | int ret; | |
1770 | ||
1771 | for (i = 0; i < gc->ngpio; i++) { | |
1772 | struct irq_fwspec fwspec; | |
1773 | unsigned int parent_hwirq; | |
1774 | unsigned int parent_type; | |
1775 | struct gpio_irq_chip *girq = &gc->irq; | |
1776 | ||
1777 | /* | |
1778 | * We call the child to parent translation function | |
1779 | * only to check if the child IRQ is valid or not. | |
1780 | * Just pick the rising edge type here as that is what | |
1781 | * we likely need to support. | |
1782 | */ | |
1783 | ret = girq->child_to_parent_hwirq(gc, i, | |
1784 | IRQ_TYPE_EDGE_RISING, | |
1785 | &parent_hwirq, | |
1786 | &parent_type); | |
1787 | if (ret) { | |
1788 | chip_err(gc, "skip set-up on hwirq %d\n", | |
1789 | i); | |
1790 | continue; | |
1791 | } | |
1792 | ||
1793 | fwspec.fwnode = gc->irq.fwnode; | |
1794 | /* This is the hwirq for the GPIO line side of things */ | |
1795 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1796 | /* Just pick something */ | |
1797 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1798 | fwspec.param_count = 2; | |
1799 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
1800 | /* just pick something */ | |
1801 | -1, | |
1802 | 1, | |
1803 | NUMA_NO_NODE, | |
1804 | &fwspec, | |
1805 | false, | |
1806 | NULL); | |
1807 | if (ret < 0) { | |
1808 | chip_err(gc, | |
1809 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1810 | i, parent_hwirq, | |
1811 | ret); | |
1812 | } | |
1813 | } | |
1814 | } | |
1815 | ||
1816 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1817 | ||
1818 | return; | |
1819 | } | |
1820 | ||
1821 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1822 | struct irq_fwspec *fwspec, | |
1823 | unsigned long *hwirq, | |
1824 | unsigned int *type) | |
1825 | { | |
1826 | /* We support standard DT translation */ | |
1827 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1828 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1829 | } | |
1830 | ||
1831 | /* This is for board files and others not using DT */ | |
1832 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1833 | int ret; | |
1834 | ||
1835 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1836 | if (ret) | |
1837 | return ret; | |
1838 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1839 | return 0; | |
1840 | } | |
1841 | return -EINVAL; | |
1842 | } | |
1843 | ||
1844 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1845 | unsigned int irq, | |
1846 | unsigned int nr_irqs, | |
1847 | void *data) | |
1848 | { | |
1849 | struct gpio_chip *gc = d->host_data; | |
1850 | irq_hw_number_t hwirq; | |
1851 | unsigned int type = IRQ_TYPE_NONE; | |
1852 | struct irq_fwspec *fwspec = data; | |
1853 | struct irq_fwspec parent_fwspec; | |
1854 | unsigned int parent_hwirq; | |
1855 | unsigned int parent_type; | |
1856 | struct gpio_irq_chip *girq = &gc->irq; | |
1857 | int ret; | |
1858 | ||
1859 | /* | |
1860 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1861 | * so this should not happen. | |
1862 | */ | |
1863 | WARN_ON(nr_irqs != 1); | |
1864 | ||
1865 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1866 | if (ret) | |
1867 | return ret; | |
1868 | ||
1869 | chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); | |
1870 | ||
1871 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1872 | &parent_hwirq, &parent_type); | |
1873 | if (ret) { | |
1874 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1875 | return ret; | |
1876 | } | |
1877 | chip_info(gc, "found parent hwirq %u\n", parent_hwirq); | |
1878 | ||
1879 | /* | |
1880 | * We set handle_bad_irq because the .set_type() should | |
1881 | * always be invoked and set the right type of handler. | |
1882 | */ | |
1883 | irq_domain_set_info(d, | |
1884 | irq, | |
1885 | hwirq, | |
1886 | gc->irq.chip, | |
1887 | gc, | |
1888 | girq->handler, | |
1889 | NULL, NULL); | |
1890 | irq_set_probe(irq); | |
1891 | ||
1892 | /* | |
1893 | * Create a IRQ fwspec to send up to the parent irqdomain: | |
1894 | * specify the hwirq we address on the parent and tie it | |
1895 | * all together up the chain. | |
1896 | */ | |
1897 | parent_fwspec.fwnode = d->parent->fwnode; | |
1898 | /* This parent only handles asserted level IRQs */ | |
1899 | girq->populate_parent_fwspec(gc, &parent_fwspec, parent_hwirq, | |
1900 | parent_type); | |
1901 | chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n", | |
1902 | irq, parent_hwirq); | |
1903 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, &parent_fwspec); | |
1904 | if (ret) | |
1905 | chip_err(gc, | |
1906 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1907 | parent_hwirq, hwirq); | |
1908 | ||
1909 | return ret; | |
1910 | } | |
1911 | ||
1912 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip, | |
1913 | unsigned int offset) | |
1914 | { | |
1915 | return offset; | |
1916 | } | |
1917 | ||
1918 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1919 | { | |
1920 | ops->activate = gpiochip_irq_domain_activate; | |
1921 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1922 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
1923 | ops->free = irq_domain_free_irqs_common; | |
1924 | ||
1925 | /* | |
1926 | * We only allow overriding the translate() function for | |
1927 | * hierarchical chips, and this should only be done if the user | |
1928 | * really need something other than 1:1 translation. | |
1929 | */ | |
1930 | if (!ops->translate) | |
1931 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
1932 | } | |
1933 | ||
1934 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1935 | { | |
1936 | if (!gc->irq.child_to_parent_hwirq || | |
1937 | !gc->irq.fwnode) { | |
1938 | chip_err(gc, "missing irqdomain vital data\n"); | |
1939 | return -EINVAL; | |
1940 | } | |
1941 | ||
1942 | if (!gc->irq.child_offset_to_irq) | |
1943 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1944 | ||
1945 | if (!gc->irq.populate_parent_fwspec) | |
1946 | gc->irq.populate_parent_fwspec = | |
1947 | gpiochip_populate_parent_fwspec_twocell; | |
1948 | ||
1949 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1950 | ||
1951 | gc->irq.domain = irq_domain_create_hierarchy( | |
1952 | gc->irq.parent_domain, | |
1953 | 0, | |
1954 | gc->ngpio, | |
1955 | gc->irq.fwnode, | |
1956 | &gc->irq.child_irq_domain_ops, | |
1957 | gc); | |
1958 | ||
1959 | if (!gc->irq.domain) | |
1960 | return -ENOMEM; | |
1961 | ||
1962 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1963 | ||
1964 | return 0; | |
1965 | } | |
1966 | ||
1967 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1968 | { | |
1969 | return !!gc->irq.parent_domain; | |
1970 | } | |
1971 | ||
1972 | void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip, | |
1973 | struct irq_fwspec *fwspec, | |
1974 | unsigned int parent_hwirq, | |
1975 | unsigned int parent_type) | |
1976 | { | |
1977 | fwspec->param_count = 2; | |
1978 | fwspec->param[0] = parent_hwirq; | |
1979 | fwspec->param[1] = parent_type; | |
1980 | } | |
1981 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1982 | ||
1983 | void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip, | |
1984 | struct irq_fwspec *fwspec, | |
1985 | unsigned int parent_hwirq, | |
1986 | unsigned int parent_type) | |
1987 | { | |
1988 | fwspec->param_count = 4; | |
1989 | fwspec->param[0] = 0; | |
1990 | fwspec->param[1] = parent_hwirq; | |
1991 | fwspec->param[2] = 0; | |
1992 | fwspec->param[3] = parent_type; | |
1993 | } | |
1994 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1995 | ||
1996 | #else | |
1997 | ||
1998 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1999 | { | |
2000 | return -EINVAL; | |
2001 | } | |
2002 | ||
2003 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
2004 | { | |
2005 | return false; | |
2006 | } | |
2007 | ||
2008 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
2009 | ||
14250520 LW |
2010 | /** |
2011 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
2012 | * @d: the irqdomain used by this irqchip | |
2013 | * @irq: the global irq number used by this GPIO irqchip irq | |
2014 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
2015 | * | |
2016 | * This function will set up the mapping for a certain IRQ line on a | |
2017 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
2018 | * stored inside the gpiochip. | |
2019 | */ | |
1b95b4eb TR |
2020 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
2021 | irq_hw_number_t hwirq) | |
14250520 LW |
2022 | { |
2023 | struct gpio_chip *chip = d->host_data; | |
d377f56f | 2024 | int ret = 0; |
14250520 | 2025 | |
dc749a09 GS |
2026 | if (!gpiochip_irqchip_irq_valid(chip, hwirq)) |
2027 | return -ENXIO; | |
2028 | ||
14250520 | 2029 | irq_set_chip_data(irq, chip); |
a0a8bcf4 GS |
2030 | /* |
2031 | * This lock class tells lockdep that GPIO irqs are in a different | |
2032 | * category than their parents, so it won't report false recursion. | |
2033 | */ | |
39c3fd58 | 2034 | irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key); |
c7a0aa59 | 2035 | irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler); |
d245b3f9 | 2036 | /* Chips that use nested thread handlers have them marked */ |
60ed54ca | 2037 | if (chip->irq.threaded) |
1c8732bb | 2038 | irq_set_nested_thread(irq, 1); |
14250520 | 2039 | irq_set_noprobe(irq); |
23393d49 | 2040 | |
e0d89728 | 2041 | if (chip->irq.num_parents == 1) |
d377f56f | 2042 | ret = irq_set_parent(irq, chip->irq.parents[0]); |
e0d89728 | 2043 | else if (chip->irq.map) |
d377f56f | 2044 | ret = irq_set_parent(irq, chip->irq.map[hwirq]); |
e0d89728 | 2045 | |
d377f56f LW |
2046 | if (ret < 0) |
2047 | return ret; | |
e0d89728 | 2048 | |
1333b90f LW |
2049 | /* |
2050 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
2051 | * is passed as default type. | |
2052 | */ | |
3634eeb0 TR |
2053 | if (chip->irq.default_type != IRQ_TYPE_NONE) |
2054 | irq_set_irq_type(irq, chip->irq.default_type); | |
14250520 LW |
2055 | |
2056 | return 0; | |
2057 | } | |
1b95b4eb | 2058 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 2059 | |
1b95b4eb | 2060 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 2061 | { |
1c8732bb LW |
2062 | struct gpio_chip *chip = d->host_data; |
2063 | ||
60ed54ca | 2064 | if (chip->irq.threaded) |
1c8732bb | 2065 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
2066 | irq_set_chip_and_handler(irq, NULL, NULL); |
2067 | irq_set_chip_data(irq, NULL); | |
2068 | } | |
1b95b4eb | 2069 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 2070 | |
14250520 LW |
2071 | static const struct irq_domain_ops gpiochip_domain_ops = { |
2072 | .map = gpiochip_irq_map, | |
c3626fde | 2073 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
2074 | /* Virtually all GPIO irqchips are twocell:ed */ |
2075 | .xlate = irq_domain_xlate_twocell, | |
2076 | }; | |
2077 | ||
fdd61a01 LW |
2078 | /* |
2079 | * TODO: move these activate/deactivate in under the hierarchicial | |
2080 | * irqchip implementation as static once SPMI and SSBI (all external | |
2081 | * users) are phased over. | |
2082 | */ | |
ef74f70e BM |
2083 | /** |
2084 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
2085 | * @domain: The IRQ domain used by this IRQ chip | |
2086 | * @data: Outermost irq_data associated with the IRQ | |
2087 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
2088 | * | |
2089 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
2090 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
2091 | * for the IRQ domain must be the &struct gpio_chip. | |
2092 | */ | |
2093 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
2094 | struct irq_data *data, bool reserve) | |
2095 | { | |
2096 | struct gpio_chip *chip = domain->host_data; | |
2097 | ||
2098 | return gpiochip_lock_as_irq(chip, data->hwirq); | |
2099 | } | |
2100 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
2101 | ||
2102 | /** | |
2103 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
2104 | * @domain: The IRQ domain used by this IRQ chip | |
2105 | * @data: Outermost irq_data associated with the IRQ | |
2106 | * | |
2107 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
2108 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
2109 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
2110 | */ | |
2111 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
2112 | struct irq_data *data) | |
2113 | { | |
2114 | struct gpio_chip *chip = domain->host_data; | |
2115 | ||
2116 | return gpiochip_unlock_as_irq(chip, data->hwirq); | |
2117 | } | |
2118 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
2119 | ||
4e6b8238 | 2120 | static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset) |
14250520 | 2121 | { |
fdd61a01 LW |
2122 | struct irq_domain *domain = chip->irq.domain; |
2123 | ||
4e6b8238 HV |
2124 | if (!gpiochip_irqchip_irq_valid(chip, offset)) |
2125 | return -ENXIO; | |
5b76e79c | 2126 | |
fdd61a01 LW |
2127 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2128 | if (irq_domain_is_hierarchy(domain)) { | |
2129 | struct irq_fwspec spec; | |
2130 | ||
2131 | spec.fwnode = domain->fwnode; | |
2132 | spec.param_count = 2; | |
2133 | spec.param[0] = chip->irq.child_offset_to_irq(chip, offset); | |
2134 | spec.param[1] = IRQ_TYPE_NONE; | |
2135 | ||
2136 | return irq_create_fwspec_mapping(&spec); | |
2137 | } | |
2138 | #endif | |
2139 | ||
2140 | return irq_create_mapping(domain, offset); | |
14250520 LW |
2141 | } |
2142 | ||
14250520 LW |
2143 | static int gpiochip_irq_reqres(struct irq_data *d) |
2144 | { | |
2145 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
5b76e79c | 2146 | |
4e6b8238 | 2147 | return gpiochip_reqres_irq(chip, d->hwirq); |
14250520 LW |
2148 | } |
2149 | ||
2150 | static void gpiochip_irq_relres(struct irq_data *d) | |
2151 | { | |
2152 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
2153 | ||
4e6b8238 | 2154 | gpiochip_relres_irq(chip, d->hwirq); |
14250520 LW |
2155 | } |
2156 | ||
461c1a7d | 2157 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 2158 | { |
461c1a7d | 2159 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
e0d89728 | 2160 | |
461c1a7d HV |
2161 | gpiochip_enable_irq(chip, d->hwirq); |
2162 | if (chip->irq.irq_enable) | |
2163 | chip->irq.irq_enable(d); | |
2164 | else | |
2165 | chip->irq.chip->irq_unmask(d); | |
2166 | } | |
2167 | ||
2168 | static void gpiochip_irq_disable(struct irq_data *d) | |
2169 | { | |
2170 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
2171 | ||
2172 | if (chip->irq.irq_disable) | |
2173 | chip->irq.irq_disable(d); | |
2174 | else | |
2175 | chip->irq.chip->irq_mask(d); | |
2176 | gpiochip_disable_irq(chip, d->hwirq); | |
2177 | } | |
2178 | ||
ca620f2d HV |
2179 | static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip) |
2180 | { | |
2181 | struct irq_chip *irqchip = gpiochip->irq.chip; | |
2182 | ||
2183 | if (!irqchip->irq_request_resources && | |
2184 | !irqchip->irq_release_resources) { | |
2185 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
2186 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
2187 | } | |
461c1a7d HV |
2188 | if (WARN_ON(gpiochip->irq.irq_enable)) |
2189 | return; | |
171948ea HV |
2190 | /* Check if the irqchip already has this hook... */ |
2191 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
2192 | /* | |
2193 | * ...and if so, give a gentle warning that this is bad | |
2194 | * practice. | |
2195 | */ | |
2196 | chip_info(gpiochip, | |
2197 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); | |
2198 | return; | |
2199 | } | |
461c1a7d HV |
2200 | gpiochip->irq.irq_enable = irqchip->irq_enable; |
2201 | gpiochip->irq.irq_disable = irqchip->irq_disable; | |
2202 | irqchip->irq_enable = gpiochip_irq_enable; | |
2203 | irqchip->irq_disable = gpiochip_irq_disable; | |
14250520 LW |
2204 | } |
2205 | ||
e0d89728 TR |
2206 | /** |
2207 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
2208 | * @gpiochip: the GPIO chip to add the IRQ chip to | |
39c3fd58 AL |
2209 | * @lock_key: lockdep class for IRQ lock |
2210 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 2211 | */ |
959bc7b2 | 2212 | static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
2213 | struct lock_class_key *lock_key, |
2214 | struct lock_class_key *request_key) | |
e0d89728 TR |
2215 | { |
2216 | struct irq_chip *irqchip = gpiochip->irq.chip; | |
fdd61a01 | 2217 | const struct irq_domain_ops *ops = NULL; |
e0d89728 TR |
2218 | struct device_node *np; |
2219 | unsigned int type; | |
2220 | unsigned int i; | |
2221 | ||
2222 | if (!irqchip) | |
2223 | return 0; | |
2224 | ||
2225 | if (gpiochip->irq.parent_handler && gpiochip->can_sleep) { | |
b1911710 | 2226 | chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n"); |
e0d89728 TR |
2227 | return -EINVAL; |
2228 | } | |
2229 | ||
2230 | np = gpiochip->gpiodev->dev.of_node; | |
2231 | type = gpiochip->irq.default_type; | |
2232 | ||
2233 | /* | |
2234 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
2235 | * used to configure the interrupts, as you may end up with | |
2236 | * conflicting triggers. Tell the user, and reset to NONE. | |
2237 | */ | |
2238 | if (WARN(np && type != IRQ_TYPE_NONE, | |
2239 | "%s: Ignoring %u default trigger\n", np->full_name, type)) | |
2240 | type = IRQ_TYPE_NONE; | |
2241 | ||
2242 | if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) { | |
2243 | acpi_handle_warn(ACPI_HANDLE(gpiochip->parent), | |
2244 | "Ignoring %u default trigger\n", type); | |
2245 | type = IRQ_TYPE_NONE; | |
2246 | } | |
2247 | ||
2248 | gpiochip->to_irq = gpiochip_to_irq; | |
2249 | gpiochip->irq.default_type = type; | |
959bc7b2 | 2250 | gpiochip->irq.lock_key = lock_key; |
39c3fd58 | 2251 | gpiochip->irq.request_key = request_key; |
e0d89728 | 2252 | |
fdd61a01 LW |
2253 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
2254 | if (gpiochip_hierarchy_is_hierarchical(gpiochip)) { | |
2255 | int ret = gpiochip_hierarchy_add_domain(gpiochip); | |
2256 | if (ret) | |
2257 | return ret; | |
2258 | } else { | |
2259 | /* Some drivers provide custom irqdomain ops */ | |
2260 | if (gpiochip->irq.domain_ops) | |
2261 | ops = gpiochip->irq.domain_ops; | |
2262 | ||
2263 | if (!ops) | |
2264 | ops = &gpiochip_domain_ops; | |
2265 | gpiochip->irq.domain = irq_domain_add_simple(np, | |
2266 | gpiochip->ngpio, | |
2267 | gpiochip->irq.first, | |
2268 | ops, gpiochip); | |
2269 | if (!gpiochip->irq.domain) | |
2270 | return -EINVAL; | |
2271 | } | |
e0d89728 | 2272 | |
e0d89728 TR |
2273 | if (gpiochip->irq.parent_handler) { |
2274 | void *data = gpiochip->irq.parent_handler_data ?: gpiochip; | |
2275 | ||
2276 | for (i = 0; i < gpiochip->irq.num_parents; i++) { | |
2277 | /* | |
2278 | * The parent IRQ chip is already using the chip_data | |
2279 | * for this IRQ chip, so our callbacks simply use the | |
2280 | * handler_data. | |
2281 | */ | |
2282 | irq_set_chained_handler_and_data(gpiochip->irq.parents[i], | |
2283 | gpiochip->irq.parent_handler, | |
2284 | data); | |
2285 | } | |
e0d89728 TR |
2286 | } |
2287 | ||
ca620f2d HV |
2288 | gpiochip_set_irq_hooks(gpiochip); |
2289 | ||
e0d89728 TR |
2290 | acpi_gpiochip_request_interrupts(gpiochip); |
2291 | ||
2292 | return 0; | |
2293 | } | |
2294 | ||
14250520 LW |
2295 | /** |
2296 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
2297 | * @gpiochip: the gpiochip to remove the irqchip from | |
2298 | * | |
2299 | * This is called only from gpiochip_remove() | |
2300 | */ | |
2301 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) | |
2302 | { | |
ca620f2d | 2303 | struct irq_chip *irqchip = gpiochip->irq.chip; |
39e5f096 | 2304 | unsigned int offset; |
c3626fde | 2305 | |
afa82fab MW |
2306 | acpi_gpiochip_free_interrupts(gpiochip); |
2307 | ||
ca620f2d | 2308 | if (irqchip && gpiochip->irq.parent_handler) { |
39e5f096 TR |
2309 | struct gpio_irq_chip *irq = &gpiochip->irq; |
2310 | unsigned int i; | |
2311 | ||
2312 | for (i = 0; i < irq->num_parents; i++) | |
2313 | irq_set_chained_handler_and_data(irq->parents[i], | |
2314 | NULL, NULL); | |
25e4fe92 DES |
2315 | } |
2316 | ||
c3626fde | 2317 | /* Remove all IRQ mappings and delete the domain */ |
f0fbe7bc | 2318 | if (gpiochip->irq.domain) { |
39e5f096 TR |
2319 | unsigned int irq; |
2320 | ||
79b804cb MW |
2321 | for (offset = 0; offset < gpiochip->ngpio; offset++) { |
2322 | if (!gpiochip_irqchip_irq_valid(gpiochip, offset)) | |
2323 | continue; | |
f0fbe7bc TR |
2324 | |
2325 | irq = irq_find_mapping(gpiochip->irq.domain, offset); | |
2326 | irq_dispose_mapping(irq); | |
79b804cb | 2327 | } |
f0fbe7bc TR |
2328 | |
2329 | irq_domain_remove(gpiochip->irq.domain); | |
c3626fde | 2330 | } |
14250520 | 2331 | |
461c1a7d HV |
2332 | if (irqchip) { |
2333 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
2334 | irqchip->irq_request_resources = NULL; | |
2335 | irqchip->irq_release_resources = NULL; | |
2336 | } | |
2337 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
2338 | irqchip->irq_enable = gpiochip->irq.irq_enable; | |
2339 | irqchip->irq_disable = gpiochip->irq.irq_disable; | |
2340 | } | |
14250520 | 2341 | } |
461c1a7d HV |
2342 | gpiochip->irq.irq_enable = NULL; |
2343 | gpiochip->irq.irq_disable = NULL; | |
ca620f2d | 2344 | gpiochip->irq.chip = NULL; |
79b804cb MW |
2345 | |
2346 | gpiochip_irqchip_free_valid_mask(gpiochip); | |
14250520 LW |
2347 | } |
2348 | ||
2349 | /** | |
739e6f59 | 2350 | * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip |
14250520 LW |
2351 | * @gpiochip: the gpiochip to add the irqchip to |
2352 | * @irqchip: the irqchip to add to the gpiochip | |
2353 | * @first_irq: if not dynamically assigned, the base (first) IRQ to | |
2354 | * allocate gpiochip irqs from | |
2355 | * @handler: the irq handler to use (often a predefined irq core function) | |
1333b90f LW |
2356 | * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE |
2357 | * to have the core avoid setting up any default type in the hardware. | |
60ed54ca | 2358 | * @threaded: whether this irqchip uses a nested thread handler |
39c3fd58 AL |
2359 | * @lock_key: lockdep class for IRQ lock |
2360 | * @request_key: lockdep class for IRQ request | |
14250520 LW |
2361 | * |
2362 | * This function closely associates a certain irqchip with a certain | |
2363 | * gpiochip, providing an irq domain to translate the local IRQs to | |
2364 | * global irqs in the gpiolib core, and making sure that the gpiochip | |
2365 | * is passed as chip data to all related functions. Driver callbacks | |
09dd5f9e | 2366 | * need to use gpiochip_get_data() to get their local state containers back |
14250520 LW |
2367 | * from the gpiochip passed as chip data. An irqdomain will be stored |
2368 | * in the gpiochip that shall be used by the driver to handle IRQ number | |
2369 | * translation. The gpiochip will need to be initialized and registered | |
2370 | * before calling this function. | |
2371 | * | |
c3626fde LW |
2372 | * This function will handle two cell:ed simple IRQs and assumes all |
2373 | * the pins on the gpiochip can generate a unique IRQ. Everything else | |
14250520 LW |
2374 | * need to be open coded. |
2375 | */ | |
739e6f59 LW |
2376 | int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, |
2377 | struct irq_chip *irqchip, | |
2378 | unsigned int first_irq, | |
2379 | irq_flow_handler_t handler, | |
2380 | unsigned int type, | |
60ed54ca | 2381 | bool threaded, |
39c3fd58 AL |
2382 | struct lock_class_key *lock_key, |
2383 | struct lock_class_key *request_key) | |
14250520 LW |
2384 | { |
2385 | struct device_node *of_node; | |
14250520 LW |
2386 | |
2387 | if (!gpiochip || !irqchip) | |
2388 | return -EINVAL; | |
2389 | ||
58383c78 | 2390 | if (!gpiochip->parent) { |
14250520 LW |
2391 | pr_err("missing gpiochip .dev parent pointer\n"); |
2392 | return -EINVAL; | |
2393 | } | |
60ed54ca | 2394 | gpiochip->irq.threaded = threaded; |
58383c78 | 2395 | of_node = gpiochip->parent->of_node; |
14250520 LW |
2396 | #ifdef CONFIG_OF_GPIO |
2397 | /* | |
20a8a968 | 2398 | * If the gpiochip has an assigned OF node this takes precedence |
c88402c2 BJZ |
2399 | * FIXME: get rid of this and use gpiochip->parent->of_node |
2400 | * everywhere | |
14250520 LW |
2401 | */ |
2402 | if (gpiochip->of_node) | |
2403 | of_node = gpiochip->of_node; | |
2404 | #endif | |
332e99d5 | 2405 | /* |
0a1e0053 | 2406 | * Specifying a default trigger is a terrible idea if DT or ACPI is |
332e99d5 MZ |
2407 | * used to configure the interrupts, as you may end-up with |
2408 | * conflicting triggers. Tell the user, and reset to NONE. | |
2409 | */ | |
2410 | if (WARN(of_node && type != IRQ_TYPE_NONE, | |
7eb6ce2f | 2411 | "%pOF: Ignoring %d default trigger\n", of_node, type)) |
332e99d5 | 2412 | type = IRQ_TYPE_NONE; |
0a1e0053 MW |
2413 | if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) { |
2414 | acpi_handle_warn(ACPI_HANDLE(gpiochip->parent), | |
2415 | "Ignoring %d default trigger\n", type); | |
2416 | type = IRQ_TYPE_NONE; | |
2417 | } | |
332e99d5 | 2418 | |
da80ff81 | 2419 | gpiochip->irq.chip = irqchip; |
c7a0aa59 | 2420 | gpiochip->irq.handler = handler; |
3634eeb0 | 2421 | gpiochip->irq.default_type = type; |
14250520 | 2422 | gpiochip->to_irq = gpiochip_to_irq; |
ca9df053 | 2423 | gpiochip->irq.lock_key = lock_key; |
39c3fd58 | 2424 | gpiochip->irq.request_key = request_key; |
f0fbe7bc | 2425 | gpiochip->irq.domain = irq_domain_add_simple(of_node, |
14250520 LW |
2426 | gpiochip->ngpio, first_irq, |
2427 | &gpiochip_domain_ops, gpiochip); | |
f0fbe7bc | 2428 | if (!gpiochip->irq.domain) { |
da80ff81 | 2429 | gpiochip->irq.chip = NULL; |
14250520 LW |
2430 | return -EINVAL; |
2431 | } | |
8b67a1f0 | 2432 | |
ca620f2d | 2433 | gpiochip_set_irq_hooks(gpiochip); |
14250520 | 2434 | |
afa82fab MW |
2435 | acpi_gpiochip_request_interrupts(gpiochip); |
2436 | ||
14250520 LW |
2437 | return 0; |
2438 | } | |
739e6f59 | 2439 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key); |
14250520 LW |
2440 | |
2441 | #else /* CONFIG_GPIOLIB_IRQCHIP */ | |
2442 | ||
959bc7b2 | 2443 | static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
2444 | struct lock_class_key *lock_key, |
2445 | struct lock_class_key *request_key) | |
e0d89728 TR |
2446 | { |
2447 | return 0; | |
2448 | } | |
2449 | ||
14250520 | 2450 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {} |
79b804cb MW |
2451 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip) |
2452 | { | |
2453 | return 0; | |
2454 | } | |
2455 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) | |
2456 | { } | |
14250520 LW |
2457 | |
2458 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
2459 | ||
c771c2f4 JG |
2460 | /** |
2461 | * gpiochip_generic_request() - request the gpio function for a pin | |
2462 | * @chip: the gpiochip owning the GPIO | |
2463 | * @offset: the offset of the GPIO to request for GPIO function | |
2464 | */ | |
2465 | int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset) | |
2466 | { | |
a9a1d2a7 | 2467 | return pinctrl_gpio_request(chip->gpiodev->base + offset); |
c771c2f4 JG |
2468 | } |
2469 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
2470 | ||
2471 | /** | |
2472 | * gpiochip_generic_free() - free the gpio function from a pin | |
2473 | * @chip: the gpiochip to request the gpio function for | |
2474 | * @offset: the offset of the GPIO to free from GPIO function | |
2475 | */ | |
2476 | void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset) | |
2477 | { | |
a9a1d2a7 | 2478 | pinctrl_gpio_free(chip->gpiodev->base + offset); |
c771c2f4 JG |
2479 | } |
2480 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
2481 | ||
2956b5d9 MW |
2482 | /** |
2483 | * gpiochip_generic_config() - apply configuration for a pin | |
2484 | * @chip: the gpiochip owning the GPIO | |
2485 | * @offset: the offset of the GPIO to apply the configuration | |
2486 | * @config: the configuration to be applied | |
2487 | */ | |
2488 | int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, | |
2489 | unsigned long config) | |
2490 | { | |
2491 | return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config); | |
2492 | } | |
2493 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
2494 | ||
f23f1516 | 2495 | #ifdef CONFIG_PINCTRL |
165adc9c | 2496 | |
586a87e6 CR |
2497 | /** |
2498 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
2499 | * @chip: the gpiochip to add the range for | |
d32651f6 | 2500 | * @pctldev: the pin controller to map to |
586a87e6 CR |
2501 | * @gpio_offset: the start offset in the current gpio_chip number space |
2502 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
2503 | * |
2504 | * Calling this function directly from a DeviceTree-supported | |
2505 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2506 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2507 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 CR |
2508 | */ |
2509 | int gpiochip_add_pingroup_range(struct gpio_chip *chip, | |
2510 | struct pinctrl_dev *pctldev, | |
2511 | unsigned int gpio_offset, const char *pin_group) | |
2512 | { | |
2513 | struct gpio_pin_range *pin_range; | |
fdeb8e15 | 2514 | struct gpio_device *gdev = chip->gpiodev; |
586a87e6 CR |
2515 | int ret; |
2516 | ||
2517 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
2518 | if (!pin_range) { | |
1a2a99c6 | 2519 | chip_err(chip, "failed to allocate pin ranges\n"); |
586a87e6 CR |
2520 | return -ENOMEM; |
2521 | } | |
2522 | ||
2523 | /* Use local offset as range ID */ | |
2524 | pin_range->range.id = gpio_offset; | |
2525 | pin_range->range.gc = chip; | |
2526 | pin_range->range.name = chip->label; | |
fdeb8e15 | 2527 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
2528 | pin_range->pctldev = pctldev; |
2529 | ||
2530 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
2531 | &pin_range->range.pins, | |
2532 | &pin_range->range.npins); | |
61c6375d MN |
2533 | if (ret < 0) { |
2534 | kfree(pin_range); | |
586a87e6 | 2535 | return ret; |
61c6375d | 2536 | } |
586a87e6 CR |
2537 | |
2538 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
2539 | ||
1a2a99c6 AS |
2540 | chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
2541 | gpio_offset, gpio_offset + pin_range->range.npins - 1, | |
586a87e6 CR |
2542 | pinctrl_dev_get_devname(pctldev), pin_group); |
2543 | ||
20ec3e39 | 2544 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
2545 | |
2546 | return 0; | |
2547 | } | |
2548 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
2549 | ||
3f0f8670 LW |
2550 | /** |
2551 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
2552 | * @chip: the gpiochip to add the range for | |
950d55f5 | 2553 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
2554 | * @gpio_offset: the start offset in the current gpio_chip number space |
2555 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
2556 | * @npins: the number of pins from the offset of each pin space (GPIO and |
2557 | * pin controller) to accumulate in this range | |
950d55f5 TR |
2558 | * |
2559 | * Returns: | |
2560 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
2561 | * |
2562 | * Calling this function directly from a DeviceTree-supported | |
2563 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2564 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2565 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 2566 | */ |
1e63d7b9 | 2567 | int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
316511c0 | 2568 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 2569 | unsigned int npins) |
f23f1516 SH |
2570 | { |
2571 | struct gpio_pin_range *pin_range; | |
fdeb8e15 | 2572 | struct gpio_device *gdev = chip->gpiodev; |
b4d4b1f0 | 2573 | int ret; |
f23f1516 | 2574 | |
3f0f8670 | 2575 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 2576 | if (!pin_range) { |
1a2a99c6 | 2577 | chip_err(chip, "failed to allocate pin ranges\n"); |
1e63d7b9 | 2578 | return -ENOMEM; |
f23f1516 SH |
2579 | } |
2580 | ||
3f0f8670 | 2581 | /* Use local offset as range ID */ |
316511c0 | 2582 | pin_range->range.id = gpio_offset; |
3f0f8670 | 2583 | pin_range->range.gc = chip; |
f23f1516 | 2584 | pin_range->range.name = chip->label; |
fdeb8e15 | 2585 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 2586 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 2587 | pin_range->range.npins = npins; |
192c369c | 2588 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 2589 | &pin_range->range); |
8f23ca1a | 2590 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 2591 | ret = PTR_ERR(pin_range->pctldev); |
1a2a99c6 | 2592 | chip_err(chip, "could not create pin range\n"); |
3f0f8670 | 2593 | kfree(pin_range); |
b4d4b1f0 | 2594 | return ret; |
3f0f8670 | 2595 | } |
1a2a99c6 AS |
2596 | chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
2597 | gpio_offset, gpio_offset + npins - 1, | |
316511c0 LW |
2598 | pinctl_name, |
2599 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 2600 | |
20ec3e39 | 2601 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
2602 | |
2603 | return 0; | |
f23f1516 | 2604 | } |
165adc9c | 2605 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 2606 | |
3f0f8670 LW |
2607 | /** |
2608 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
2609 | * @chip: the chip to remove all the mappings for | |
2610 | */ | |
f23f1516 SH |
2611 | void gpiochip_remove_pin_ranges(struct gpio_chip *chip) |
2612 | { | |
2613 | struct gpio_pin_range *pin_range, *tmp; | |
20ec3e39 | 2614 | struct gpio_device *gdev = chip->gpiodev; |
f23f1516 | 2615 | |
20ec3e39 | 2616 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
2617 | list_del(&pin_range->node); |
2618 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
2619 | &pin_range->range); | |
3f0f8670 | 2620 | kfree(pin_range); |
f23f1516 SH |
2621 | } |
2622 | } | |
165adc9c LW |
2623 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
2624 | ||
2625 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 2626 | |
d2876d08 DB |
2627 | /* These "optional" allocation calls help prevent drivers from stomping |
2628 | * on each other, and help provide better diagnostics in debugfs. | |
2629 | * They're called even less than the "set direction" calls. | |
2630 | */ | |
fac9d885 | 2631 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 2632 | { |
fdeb8e15 | 2633 | struct gpio_chip *chip = desc->gdev->chip; |
d377f56f | 2634 | int ret; |
d2876d08 | 2635 | unsigned long flags; |
3789f5ac | 2636 | unsigned offset; |
d2876d08 | 2637 | |
18534df4 MS |
2638 | if (label) { |
2639 | label = kstrdup_const(label, GFP_KERNEL); | |
2640 | if (!label) | |
2641 | return -ENOMEM; | |
2642 | } | |
2643 | ||
bcabdef1 AC |
2644 | spin_lock_irqsave(&gpio_lock, flags); |
2645 | ||
d2876d08 | 2646 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 2647 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
2648 | */ |
2649 | ||
2650 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
2651 | desc_set_label(desc, label ? : "?"); | |
d377f56f | 2652 | ret = 0; |
438d8908 | 2653 | } else { |
18534df4 | 2654 | kfree_const(label); |
d377f56f | 2655 | ret = -EBUSY; |
7460db56 | 2656 | goto done; |
35e8bb51 DB |
2657 | } |
2658 | ||
2659 | if (chip->request) { | |
2660 | /* chip->request may sleep */ | |
2661 | spin_unlock_irqrestore(&gpio_lock, flags); | |
3789f5ac BD |
2662 | offset = gpio_chip_hwgpio(desc); |
2663 | if (gpiochip_line_is_valid(chip, offset)) | |
d377f56f | 2664 | ret = chip->request(chip, offset); |
3789f5ac | 2665 | else |
d377f56f | 2666 | ret = -EINVAL; |
35e8bb51 DB |
2667 | spin_lock_irqsave(&gpio_lock, flags); |
2668 | ||
d377f56f | 2669 | if (ret < 0) { |
35e8bb51 | 2670 | desc_set_label(desc, NULL); |
18534df4 | 2671 | kfree_const(label); |
35e8bb51 | 2672 | clear_bit(FLAG_REQUESTED, &desc->flags); |
80b0a602 | 2673 | goto done; |
35e8bb51 | 2674 | } |
438d8908 | 2675 | } |
80b0a602 MN |
2676 | if (chip->get_direction) { |
2677 | /* chip->get_direction may sleep */ | |
2678 | spin_unlock_irqrestore(&gpio_lock, flags); | |
372e722e | 2679 | gpiod_get_direction(desc); |
80b0a602 MN |
2680 | spin_lock_irqsave(&gpio_lock, flags); |
2681 | } | |
77c2d792 MW |
2682 | done: |
2683 | spin_unlock_irqrestore(&gpio_lock, flags); | |
d377f56f | 2684 | return ret; |
77c2d792 MW |
2685 | } |
2686 | ||
fdeb8e15 LW |
2687 | /* |
2688 | * This descriptor validation needs to be inserted verbatim into each | |
2689 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
2690 | * macro to avoid endless duplication. If the desc is NULL it is an |
2691 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 2692 | */ |
a746a232 RV |
2693 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
2694 | { | |
2695 | if (!desc) | |
2696 | return 0; | |
2697 | if (IS_ERR(desc)) { | |
2698 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
2699 | return PTR_ERR(desc); | |
2700 | } | |
2701 | if (!desc->gdev) { | |
2702 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
2703 | return -EINVAL; | |
2704 | } | |
2705 | if (!desc->gdev->chip) { | |
2706 | dev_warn(&desc->gdev->dev, | |
2707 | "%s: backing chip is gone\n", func); | |
2708 | return 0; | |
2709 | } | |
2710 | return 1; | |
2711 | } | |
2712 | ||
fdeb8e15 | 2713 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
2714 | int __valid = validate_desc(desc, __func__); \ |
2715 | if (__valid <= 0) \ | |
2716 | return __valid; \ | |
2717 | } while (0) | |
fdeb8e15 LW |
2718 | |
2719 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
2720 | int __valid = validate_desc(desc, __func__); \ |
2721 | if (__valid <= 0) \ | |
fdeb8e15 | 2722 | return; \ |
a746a232 | 2723 | } while (0) |
fdeb8e15 | 2724 | |
0eb4c6c2 | 2725 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 2726 | { |
d377f56f | 2727 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 2728 | struct gpio_device *gdev; |
77c2d792 | 2729 | |
fdeb8e15 LW |
2730 | VALIDATE_DESC(desc); |
2731 | gdev = desc->gdev; | |
77c2d792 | 2732 | |
fdeb8e15 | 2733 | if (try_module_get(gdev->owner)) { |
d377f56f LW |
2734 | ret = gpiod_request_commit(desc, label); |
2735 | if (ret < 0) | |
fdeb8e15 | 2736 | module_put(gdev->owner); |
33a68e86 LW |
2737 | else |
2738 | get_device(&gdev->dev); | |
77c2d792 MW |
2739 | } |
2740 | ||
d377f56f LW |
2741 | if (ret) |
2742 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 2743 | |
d377f56f | 2744 | return ret; |
d2876d08 | 2745 | } |
372e722e | 2746 | |
fac9d885 | 2747 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 2748 | { |
77c2d792 | 2749 | bool ret = false; |
d2876d08 | 2750 | unsigned long flags; |
35e8bb51 | 2751 | struct gpio_chip *chip; |
d2876d08 | 2752 | |
3d599d1c UKK |
2753 | might_sleep(); |
2754 | ||
372e722e | 2755 | gpiod_unexport(desc); |
d8f388d8 | 2756 | |
d2876d08 DB |
2757 | spin_lock_irqsave(&gpio_lock, flags); |
2758 | ||
fdeb8e15 | 2759 | chip = desc->gdev->chip; |
35e8bb51 DB |
2760 | if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) { |
2761 | if (chip->free) { | |
2762 | spin_unlock_irqrestore(&gpio_lock, flags); | |
9c4ba946 | 2763 | might_sleep_if(chip->can_sleep); |
372e722e | 2764 | chip->free(chip, gpio_chip_hwgpio(desc)); |
35e8bb51 DB |
2765 | spin_lock_irqsave(&gpio_lock, flags); |
2766 | } | |
18534df4 | 2767 | kfree_const(desc->label); |
d2876d08 | 2768 | desc_set_label(desc, NULL); |
07697461 | 2769 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 2770 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 2771 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 2772 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
f625d460 | 2773 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
77c2d792 MW |
2774 | ret = true; |
2775 | } | |
d2876d08 DB |
2776 | |
2777 | spin_unlock_irqrestore(&gpio_lock, flags); | |
77c2d792 MW |
2778 | return ret; |
2779 | } | |
2780 | ||
0eb4c6c2 | 2781 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 2782 | { |
fac9d885 | 2783 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 2784 | module_put(desc->gdev->owner); |
33a68e86 LW |
2785 | put_device(&desc->gdev->dev); |
2786 | } else { | |
77c2d792 | 2787 | WARN_ON(extra_checks); |
33a68e86 | 2788 | } |
d2876d08 | 2789 | } |
372e722e | 2790 | |
d2876d08 DB |
2791 | /** |
2792 | * gpiochip_is_requested - return string iff signal was requested | |
2793 | * @chip: controller managing the signal | |
2794 | * @offset: of signal within controller's 0..(ngpio - 1) range | |
2795 | * | |
2796 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2797 | * The string returned is the label passed to gpio_request(); if none has been |
2798 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2799 | * |
2800 | * This function is for use by GPIO controller drivers. The label can | |
2801 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2802 | * can help avoid accidentally multiplexing it to another controller. | |
2803 | */ | |
2804 | const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset) | |
2805 | { | |
6c0b4e6c | 2806 | struct gpio_desc *desc; |
d2876d08 | 2807 | |
48b5953e | 2808 | if (offset >= chip->ngpio) |
d2876d08 | 2809 | return NULL; |
6c0b4e6c | 2810 | |
1c3cdb18 | 2811 | desc = &chip->gpiodev->descs[offset]; |
6c0b4e6c | 2812 | |
372e722e | 2813 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2814 | return NULL; |
372e722e | 2815 | return desc->label; |
d2876d08 DB |
2816 | } |
2817 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2818 | ||
77c2d792 MW |
2819 | /** |
2820 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
950d55f5 TR |
2821 | * @chip: GPIO chip |
2822 | * @hwnum: hardware number of the GPIO for which to request the descriptor | |
77c2d792 | 2823 | * @label: label for the GPIO |
5923ea6c LW |
2824 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2825 | * specify things like line inversion semantics with the machine flags | |
2826 | * such as GPIO_OUT_LOW | |
2827 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2828 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2829 | * |
2830 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2831 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2832 | * function will not increase reference count of the GPIO chip module. This | |
2833 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2834 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2835 | * |
2836 | * Returns: | |
2837 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2838 | * code on failure. | |
77c2d792 | 2839 | */ |
abdc08a3 | 2840 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, |
21abf103 | 2841 | const char *label, |
5923ea6c LW |
2842 | enum gpio_lookup_flags lflags, |
2843 | enum gpiod_flags dflags) | |
77c2d792 | 2844 | { |
abdc08a3 | 2845 | struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum); |
d377f56f | 2846 | int ret; |
77c2d792 | 2847 | |
abdc08a3 AC |
2848 | if (IS_ERR(desc)) { |
2849 | chip_err(chip, "failed to get GPIO descriptor\n"); | |
2850 | return desc; | |
2851 | } | |
2852 | ||
d377f56f LW |
2853 | ret = gpiod_request_commit(desc, label); |
2854 | if (ret < 0) | |
2855 | return ERR_PTR(ret); | |
77c2d792 | 2856 | |
d377f56f LW |
2857 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2858 | if (ret) { | |
21abf103 LW |
2859 | chip_err(chip, "setup of own GPIO %s failed\n", label); |
2860 | gpiod_free_commit(desc); | |
d377f56f | 2861 | return ERR_PTR(ret); |
21abf103 LW |
2862 | } |
2863 | ||
abdc08a3 | 2864 | return desc; |
77c2d792 | 2865 | } |
f7d4ad98 | 2866 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2867 | |
2868 | /** | |
2869 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2870 | * @desc: GPIO descriptor to free | |
2871 | * | |
2872 | * Function frees the given GPIO requested previously with | |
2873 | * gpiochip_request_own_desc(). | |
2874 | */ | |
2875 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2876 | { | |
2877 | if (desc) | |
fac9d885 | 2878 | gpiod_free_commit(desc); |
77c2d792 | 2879 | } |
f7d4ad98 | 2880 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2881 | |
fdeb8e15 LW |
2882 | /* |
2883 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2884 | * some cases this is done in early boot, before IRQs are enabled. |
2885 | * | |
2886 | * As a rule these aren't called more than once (except for drivers | |
2887 | * using the open-drain emulation idiom) so these are natural places | |
2888 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2889 | * rely on gpio_request() having been called beforehand. | |
2890 | */ | |
2891 | ||
71479789 TP |
2892 | static int gpio_set_config(struct gpio_chip *gc, unsigned offset, |
2893 | enum pin_config_param mode) | |
2894 | { | |
542f3615 MR |
2895 | unsigned long config; |
2896 | unsigned arg; | |
71479789 | 2897 | |
542f3615 MR |
2898 | switch (mode) { |
2899 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2900 | case PIN_CONFIG_BIAS_PULL_UP: | |
2901 | arg = 1; | |
2902 | break; | |
2903 | ||
2904 | default: | |
2905 | arg = 0; | |
2906 | } | |
2907 | ||
2908 | config = PIN_CONF_PACKED(mode, arg); | |
71479789 TP |
2909 | return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP; |
2910 | } | |
2911 | ||
79a9becd AC |
2912 | /** |
2913 | * gpiod_direction_input - set the GPIO direction to input | |
2914 | * @desc: GPIO to set to input | |
2915 | * | |
2916 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2917 | * be called safely on it. | |
2918 | * | |
2919 | * Return 0 in case of success, else an error code. | |
2920 | */ | |
2921 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2922 | { |
d2876d08 | 2923 | struct gpio_chip *chip; |
d377f56f | 2924 | int ret = 0; |
d2876d08 | 2925 | |
fdeb8e15 LW |
2926 | VALIDATE_DESC(desc); |
2927 | chip = desc->gdev->chip; | |
bcabdef1 | 2928 | |
e48d194d LW |
2929 | /* |
2930 | * It is legal to have no .get() and .direction_input() specified if | |
2931 | * the chip is output-only, but you can't specify .direction_input() | |
2932 | * and not support the .get() operation, that doesn't make sense. | |
2933 | */ | |
ae9847f4 | 2934 | if (!chip->get && chip->direction_input) { |
6424de5a | 2935 | gpiod_warn(desc, |
e48d194d LW |
2936 | "%s: missing get() but have direction_input()\n", |
2937 | __func__); | |
be1a4b13 LW |
2938 | return -EIO; |
2939 | } | |
2940 | ||
e48d194d LW |
2941 | /* |
2942 | * If we have a .direction_input() callback, things are simple, | |
2943 | * just call it. Else we are some input-only chip so try to check the | |
2944 | * direction (if .get_direction() is supported) else we silently | |
2945 | * assume we are in input mode after this. | |
2946 | */ | |
ae9847f4 | 2947 | if (chip->direction_input) { |
d377f56f | 2948 | ret = chip->direction_input(chip, gpio_chip_hwgpio(desc)); |
ae9847f4 RRD |
2949 | } else if (chip->get_direction && |
2950 | (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) { | |
2951 | gpiod_warn(desc, | |
e48d194d LW |
2952 | "%s: missing direction_input() operation and line is output\n", |
2953 | __func__); | |
ae9847f4 RRD |
2954 | return -EIO; |
2955 | } | |
d377f56f | 2956 | if (ret == 0) |
d2876d08 | 2957 | clear_bit(FLAG_IS_OUT, &desc->flags); |
3f397c21 | 2958 | |
d449991c TP |
2959 | if (test_bit(FLAG_PULL_UP, &desc->flags)) |
2960 | gpio_set_config(chip, gpio_chip_hwgpio(desc), | |
2961 | PIN_CONFIG_BIAS_PULL_UP); | |
2962 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2963 | gpio_set_config(chip, gpio_chip_hwgpio(desc), | |
2964 | PIN_CONFIG_BIAS_PULL_DOWN); | |
2965 | ||
d377f56f | 2966 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2967 | |
d377f56f | 2968 | return ret; |
d2876d08 | 2969 | } |
79a9becd | 2970 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2971 | |
fac9d885 | 2972 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2973 | { |
c663e5f5 | 2974 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2975 | int val = !!value; |
ae9847f4 | 2976 | int ret = 0; |
d2876d08 | 2977 | |
e48d194d LW |
2978 | /* |
2979 | * It's OK not to specify .direction_output() if the gpiochip is | |
2980 | * output-only, but if there is then not even a .set() operation it | |
2981 | * is pretty tricky to drive the output line. | |
2982 | */ | |
ae9847f4 | 2983 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2984 | gpiod_warn(desc, |
e48d194d LW |
2985 | "%s: missing set() and direction_output() operations\n", |
2986 | __func__); | |
be1a4b13 LW |
2987 | return -EIO; |
2988 | } | |
2989 | ||
ae9847f4 RRD |
2990 | if (gc->direction_output) { |
2991 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2992 | } else { | |
e48d194d | 2993 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2994 | if (gc->get_direction && |
2995 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2996 | gpiod_warn(desc, | |
2997 | "%s: missing direction_output() operation\n", | |
2998 | __func__); | |
2999 | return -EIO; | |
3000 | } | |
e48d194d LW |
3001 | /* |
3002 | * If we can't actively set the direction, we are some | |
3003 | * output-only chip, so just drive the output as desired. | |
3004 | */ | |
ae9847f4 RRD |
3005 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
3006 | } | |
3007 | ||
c663e5f5 | 3008 | if (!ret) |
d2876d08 | 3009 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 3010 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
3011 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
3012 | return ret; | |
d2876d08 | 3013 | } |
ef70bbe1 PZ |
3014 | |
3015 | /** | |
3016 | * gpiod_direction_output_raw - set the GPIO direction to output | |
3017 | * @desc: GPIO to set to output | |
3018 | * @value: initial output value of the GPIO | |
3019 | * | |
3020 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
3021 | * be called safely on it. The initial value of the output must be specified | |
3022 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
3023 | * | |
3024 | * Return 0 in case of success, else an error code. | |
3025 | */ | |
3026 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
3027 | { | |
fdeb8e15 | 3028 | VALIDATE_DESC(desc); |
fac9d885 | 3029 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
3030 | } |
3031 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
3032 | ||
3033 | /** | |
90df4fe0 | 3034 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
3035 | * @desc: GPIO to set to output |
3036 | * @value: initial output value of the GPIO | |
3037 | * | |
3038 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
3039 | * be called safely on it. The initial value of the output must be specified | |
3040 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3041 | * account. | |
3042 | * | |
3043 | * Return 0 in case of success, else an error code. | |
3044 | */ | |
3045 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
3046 | { | |
30322bcf | 3047 | struct gpio_chip *gc; |
02e47980 LW |
3048 | int ret; |
3049 | ||
fdeb8e15 | 3050 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
3051 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3052 | value = !value; | |
ad17731d LW |
3053 | else |
3054 | value = !!value; | |
02e47980 | 3055 | |
4e9439dd HV |
3056 | /* GPIOs used for enabled IRQs shall not be set as output */ |
3057 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
3058 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
3059 | gpiod_err(desc, |
3060 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
3061 | __func__); | |
3062 | return -EIO; | |
3063 | } | |
3064 | ||
30322bcf | 3065 | gc = desc->gdev->chip; |
02e47980 LW |
3066 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { |
3067 | /* First see if we can enable open drain in hardware */ | |
71479789 TP |
3068 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3069 | PIN_CONFIG_DRIVE_OPEN_DRAIN); | |
02e47980 LW |
3070 | if (!ret) |
3071 | goto set_output_value; | |
3072 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
3073 | if (value) { |
3074 | ret = gpiod_direction_input(desc); | |
3075 | goto set_output_flag; | |
3076 | } | |
02e47980 LW |
3077 | } |
3078 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
71479789 TP |
3079 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3080 | PIN_CONFIG_DRIVE_OPEN_SOURCE); | |
02e47980 LW |
3081 | if (!ret) |
3082 | goto set_output_value; | |
3083 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
3084 | if (!value) { |
3085 | ret = gpiod_direction_input(desc); | |
3086 | goto set_output_flag; | |
3087 | } | |
02e47980 | 3088 | } else { |
71479789 TP |
3089 | gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3090 | PIN_CONFIG_DRIVE_PUSH_PULL); | |
02e47980 LW |
3091 | } |
3092 | ||
3093 | set_output_value: | |
fac9d885 | 3094 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
3095 | |
3096 | set_output_flag: | |
3097 | /* | |
3098 | * When emulating open-source or open-drain functionalities by not | |
3099 | * actively driving the line (setting mode to input) we still need to | |
3100 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
3101 | * value anymore. | |
3102 | */ | |
3103 | if (ret == 0) | |
3104 | set_bit(FLAG_IS_OUT, &desc->flags); | |
3105 | return ret; | |
ef70bbe1 | 3106 | } |
79a9becd | 3107 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 3108 | |
c4b5be98 | 3109 | /** |
950d55f5 TR |
3110 | * gpiod_set_debounce - sets @debounce time for a GPIO |
3111 | * @desc: descriptor of the GPIO for which to set debounce time | |
3112 | * @debounce: debounce time in microseconds | |
65d87656 | 3113 | * |
950d55f5 TR |
3114 | * Returns: |
3115 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
3116 | * debounce time. | |
c4b5be98 | 3117 | */ |
79a9becd | 3118 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) |
c4b5be98 | 3119 | { |
c4b5be98 | 3120 | struct gpio_chip *chip; |
2956b5d9 | 3121 | unsigned long config; |
c4b5be98 | 3122 | |
fdeb8e15 LW |
3123 | VALIDATE_DESC(desc); |
3124 | chip = desc->gdev->chip; | |
2956b5d9 | 3125 | if (!chip->set || !chip->set_config) { |
6424de5a | 3126 | gpiod_dbg(desc, |
2956b5d9 | 3127 | "%s: missing set() or set_config() operations\n", |
6424de5a | 3128 | __func__); |
65d87656 | 3129 | return -ENOTSUPP; |
be1a4b13 LW |
3130 | } |
3131 | ||
2956b5d9 | 3132 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
fa59dd23 | 3133 | return chip->set_config(chip, gpio_chip_hwgpio(desc), config); |
c4b5be98 | 3134 | } |
79a9becd | 3135 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 3136 | |
e10f72bf AJ |
3137 | /** |
3138 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
3139 | * @desc: descriptor of the GPIO for which to configure persistence | |
3140 | * @transitory: True to lose state on suspend or reset, false for persistence | |
3141 | * | |
3142 | * Returns: | |
3143 | * 0 on success, otherwise a negative error code. | |
3144 | */ | |
3145 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
3146 | { | |
3147 | struct gpio_chip *chip; | |
3148 | unsigned long packed; | |
3149 | int gpio; | |
3150 | int rc; | |
3151 | ||
156dd392 | 3152 | VALIDATE_DESC(desc); |
e10f72bf AJ |
3153 | /* |
3154 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
3155 | * persistence state. | |
3156 | */ | |
3157 | if (transitory) | |
3158 | set_bit(FLAG_TRANSITORY, &desc->flags); | |
3159 | else | |
3160 | clear_bit(FLAG_TRANSITORY, &desc->flags); | |
3161 | ||
3162 | /* If the driver supports it, set the persistence state now */ | |
3163 | chip = desc->gdev->chip; | |
3164 | if (!chip->set_config) | |
3165 | return 0; | |
3166 | ||
3167 | packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE, | |
3168 | !transitory); | |
3169 | gpio = gpio_chip_hwgpio(desc); | |
fa59dd23 | 3170 | rc = chip->set_config(chip, gpio, packed); |
e10f72bf AJ |
3171 | if (rc == -ENOTSUPP) { |
3172 | dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n", | |
3173 | gpio); | |
3174 | return 0; | |
3175 | } | |
3176 | ||
3177 | return rc; | |
3178 | } | |
3179 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
3180 | ||
79a9becd AC |
3181 | /** |
3182 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
3183 | * @desc: the gpio descriptor to test | |
3184 | * | |
3185 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
3186 | */ | |
3187 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 3188 | { |
fdeb8e15 | 3189 | VALIDATE_DESC(desc); |
79a9becd | 3190 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 3191 | } |
79a9becd | 3192 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 DB |
3193 | |
3194 | /* I/O calls are only valid after configuration completed; the relevant | |
3195 | * "is this a valid GPIO" error checks should already have been done. | |
3196 | * | |
3197 | * "Get" operations are often inlinable as reading a pin value register, | |
3198 | * and masking the relevant bit in that register. | |
3199 | * | |
3200 | * When "set" operations are inlinable, they involve writing that mask to | |
3201 | * one register to set a low value, or a different register to set it high. | |
3202 | * Otherwise locking is needed, so there may be little value to inlining. | |
3203 | * | |
3204 | *------------------------------------------------------------------------ | |
3205 | * | |
3206 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
3207 | * have requested the GPIO. That can include implicit requesting by | |
3208 | * a direction setting call. Marking a gpio as requested locks its chip | |
3209 | * in memory, guaranteeing that these table lookups need no more locking | |
3210 | * and that gpiochip_remove() will fail. | |
3211 | * | |
3212 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
3213 | * that the GPIO was actually requested. | |
3214 | */ | |
3215 | ||
fac9d885 | 3216 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 DB |
3217 | { |
3218 | struct gpio_chip *chip; | |
372e722e | 3219 | int offset; |
e20538b8 | 3220 | int value; |
d2876d08 | 3221 | |
fdeb8e15 | 3222 | chip = desc->gdev->chip; |
372e722e | 3223 | offset = gpio_chip_hwgpio(desc); |
e20538b8 | 3224 | value = chip->get ? chip->get(chip, offset) : -EIO; |
723a6303 | 3225 | value = value < 0 ? value : !!value; |
372e722e | 3226 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 3227 | return value; |
d2876d08 | 3228 | } |
372e722e | 3229 | |
eec1d566 LW |
3230 | static int gpio_chip_get_multiple(struct gpio_chip *chip, |
3231 | unsigned long *mask, unsigned long *bits) | |
3232 | { | |
3233 | if (chip->get_multiple) { | |
3234 | return chip->get_multiple(chip, mask, bits); | |
3235 | } else if (chip->get) { | |
3236 | int i, value; | |
3237 | ||
3238 | for_each_set_bit(i, mask, chip->ngpio) { | |
3239 | value = chip->get(chip, i); | |
3240 | if (value < 0) | |
3241 | return value; | |
3242 | __assign_bit(i, bits, value); | |
3243 | } | |
3244 | return 0; | |
3245 | } | |
3246 | return -EIO; | |
3247 | } | |
3248 | ||
3249 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
3250 | unsigned int array_size, | |
3251 | struct gpio_desc **desc_array, | |
77588c14 | 3252 | struct gpio_array *array_info, |
b9762beb | 3253 | unsigned long *value_bitmap) |
eec1d566 | 3254 | { |
d377f56f | 3255 | int ret, i = 0; |
b17566a6 JK |
3256 | |
3257 | /* | |
3258 | * Validate array_info against desc_array and its size. | |
3259 | * It should immediately follow desc_array if both | |
3260 | * have been obtained from the same gpiod_get_array() call. | |
3261 | */ | |
3262 | if (array_info && array_info->desc == desc_array && | |
3263 | array_size <= array_info->size && | |
3264 | (void *)array_info == desc_array + array_info->size) { | |
3265 | if (!can_sleep) | |
3266 | WARN_ON(array_info->chip->can_sleep); | |
3267 | ||
d377f56f | 3268 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
3269 | array_info->get_mask, |
3270 | value_bitmap); | |
d377f56f LW |
3271 | if (ret) |
3272 | return ret; | |
b17566a6 JK |
3273 | |
3274 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3275 | bitmap_xor(value_bitmap, value_bitmap, | |
3276 | array_info->invert_mask, array_size); | |
3277 | ||
3278 | if (bitmap_full(array_info->get_mask, array_size)) | |
3279 | return 0; | |
3280 | ||
3281 | i = find_first_zero_bit(array_info->get_mask, array_size); | |
3282 | } else { | |
3283 | array_info = NULL; | |
3284 | } | |
eec1d566 LW |
3285 | |
3286 | while (i < array_size) { | |
3287 | struct gpio_chip *chip = desc_array[i]->gdev->chip; | |
3027743f LA |
3288 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
3289 | unsigned long *mask, *bits; | |
eec1d566 LW |
3290 | int first, j, ret; |
3291 | ||
3027743f LA |
3292 | if (likely(chip->ngpio <= FASTPATH_NGPIO)) { |
3293 | mask = fastpath; | |
3294 | } else { | |
3295 | mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio), | |
3296 | sizeof(*mask), | |
3297 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
3298 | if (!mask) | |
3299 | return -ENOMEM; | |
3300 | } | |
3301 | ||
3302 | bits = mask + BITS_TO_LONGS(chip->ngpio); | |
3303 | bitmap_zero(mask, chip->ngpio); | |
3304 | ||
eec1d566 LW |
3305 | if (!can_sleep) |
3306 | WARN_ON(chip->can_sleep); | |
3307 | ||
3308 | /* collect all inputs belonging to the same chip */ | |
3309 | first = i; | |
eec1d566 LW |
3310 | do { |
3311 | const struct gpio_desc *desc = desc_array[i]; | |
3312 | int hwgpio = gpio_chip_hwgpio(desc); | |
3313 | ||
3314 | __set_bit(hwgpio, mask); | |
3315 | i++; | |
b17566a6 JK |
3316 | |
3317 | if (array_info) | |
35ae7f96 JK |
3318 | i = find_next_zero_bit(array_info->get_mask, |
3319 | array_size, i); | |
eec1d566 LW |
3320 | } while ((i < array_size) && |
3321 | (desc_array[i]->gdev->chip == chip)); | |
3322 | ||
3323 | ret = gpio_chip_get_multiple(chip, mask, bits); | |
3027743f LA |
3324 | if (ret) { |
3325 | if (mask != fastpath) | |
3326 | kfree(mask); | |
eec1d566 | 3327 | return ret; |
3027743f | 3328 | } |
eec1d566 | 3329 | |
b17566a6 | 3330 | for (j = first; j < i; ) { |
eec1d566 LW |
3331 | const struct gpio_desc *desc = desc_array[j]; |
3332 | int hwgpio = gpio_chip_hwgpio(desc); | |
3333 | int value = test_bit(hwgpio, bits); | |
3334 | ||
3335 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3336 | value = !value; | |
b9762beb | 3337 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 3338 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 3339 | j++; |
b17566a6 JK |
3340 | |
3341 | if (array_info) | |
35ae7f96 JK |
3342 | j = find_next_zero_bit(array_info->get_mask, i, |
3343 | j); | |
eec1d566 | 3344 | } |
3027743f LA |
3345 | |
3346 | if (mask != fastpath) | |
3347 | kfree(mask); | |
eec1d566 LW |
3348 | } |
3349 | return 0; | |
3350 | } | |
3351 | ||
d2876d08 | 3352 | /** |
79a9becd AC |
3353 | * gpiod_get_raw_value() - return a gpio's raw value |
3354 | * @desc: gpio whose value will be returned | |
d2876d08 | 3355 | * |
79a9becd | 3356 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 3357 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 3358 | * |
827a9b8b | 3359 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3360 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3361 | */ |
79a9becd | 3362 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 3363 | { |
fdeb8e15 | 3364 | VALIDATE_DESC(desc); |
3285170f | 3365 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 3366 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3367 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3368 | } |
79a9becd | 3369 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 3370 | |
79a9becd AC |
3371 | /** |
3372 | * gpiod_get_value() - return a gpio's value | |
3373 | * @desc: gpio whose value will be returned | |
3374 | * | |
3375 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3376 | * account, or negative errno on failure. |
79a9becd | 3377 | * |
827a9b8b | 3378 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
3379 | * complain if the GPIO chip functions potentially sleep. |
3380 | */ | |
3381 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 3382 | { |
79a9becd | 3383 | int value; |
fdeb8e15 LW |
3384 | |
3385 | VALIDATE_DESC(desc); | |
3285170f | 3386 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 3387 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 3388 | |
fac9d885 | 3389 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3390 | if (value < 0) |
3391 | return value; | |
3392 | ||
79a9becd AC |
3393 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3394 | value = !value; | |
3395 | ||
3396 | return value; | |
372e722e | 3397 | } |
79a9becd | 3398 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 3399 | |
eec1d566 LW |
3400 | /** |
3401 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 3402 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3403 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3404 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3405 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3406 | * |
3407 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3408 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3409 | * else an error code. | |
3410 | * | |
827a9b8b | 3411 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3412 | * and it will complain if the GPIO chip functions potentially sleep. |
3413 | */ | |
3414 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 3415 | struct gpio_desc **desc_array, |
77588c14 | 3416 | struct gpio_array *array_info, |
b9762beb | 3417 | unsigned long *value_bitmap) |
eec1d566 LW |
3418 | { |
3419 | if (!desc_array) | |
3420 | return -EINVAL; | |
3421 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
3422 | desc_array, array_info, |
3423 | value_bitmap); | |
eec1d566 LW |
3424 | } |
3425 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
3426 | ||
3427 | /** | |
3428 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 3429 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3430 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3431 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3432 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3433 | * |
3434 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3435 | * into account. Return 0 in case of success, else an error code. | |
3436 | * | |
827a9b8b | 3437 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3438 | * and it will complain if the GPIO chip functions potentially sleep. |
3439 | */ | |
3440 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 3441 | struct gpio_desc **desc_array, |
77588c14 | 3442 | struct gpio_array *array_info, |
b9762beb | 3443 | unsigned long *value_bitmap) |
eec1d566 LW |
3444 | { |
3445 | if (!desc_array) | |
3446 | return -EINVAL; | |
3447 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
3448 | desc_array, array_info, |
3449 | value_bitmap); | |
eec1d566 LW |
3450 | } |
3451 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
3452 | ||
aca5ce14 | 3453 | /* |
fac9d885 | 3454 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 3455 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 3456 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 3457 | */ |
fac9d885 | 3458 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 3459 | { |
d377f56f | 3460 | int ret = 0; |
fdeb8e15 | 3461 | struct gpio_chip *chip = desc->gdev->chip; |
372e722e AC |
3462 | int offset = gpio_chip_hwgpio(desc); |
3463 | ||
aca5ce14 | 3464 | if (value) { |
d377f56f | 3465 | ret = chip->direction_input(chip, offset); |
aca5ce14 | 3466 | } else { |
d377f56f LW |
3467 | ret = chip->direction_output(chip, offset, 0); |
3468 | if (!ret) | |
372e722e | 3469 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 3470 | } |
d377f56f LW |
3471 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
3472 | if (ret < 0) | |
6424de5a MB |
3473 | gpiod_err(desc, |
3474 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 3475 | __func__, ret); |
aca5ce14 LD |
3476 | } |
3477 | ||
25553ff0 | 3478 | /* |
79a9becd AC |
3479 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
3480 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 3481 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 3482 | */ |
fac9d885 | 3483 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 3484 | { |
d377f56f | 3485 | int ret = 0; |
fdeb8e15 | 3486 | struct gpio_chip *chip = desc->gdev->chip; |
372e722e AC |
3487 | int offset = gpio_chip_hwgpio(desc); |
3488 | ||
25553ff0 | 3489 | if (value) { |
d377f56f LW |
3490 | ret = chip->direction_output(chip, offset, 1); |
3491 | if (!ret) | |
372e722e | 3492 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 3493 | } else { |
d377f56f | 3494 | ret = chip->direction_input(chip, offset); |
25553ff0 | 3495 | } |
d377f56f LW |
3496 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
3497 | if (ret < 0) | |
6424de5a MB |
3498 | gpiod_err(desc, |
3499 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 3500 | __func__, ret); |
25553ff0 LD |
3501 | } |
3502 | ||
fac9d885 | 3503 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 DB |
3504 | { |
3505 | struct gpio_chip *chip; | |
3506 | ||
fdeb8e15 | 3507 | chip = desc->gdev->chip; |
372e722e | 3508 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
02e47980 | 3509 | chip->set(chip, gpio_chip_hwgpio(desc), value); |
372e722e AC |
3510 | } |
3511 | ||
5f424243 RI |
3512 | /* |
3513 | * set multiple outputs on the same chip; | |
3514 | * use the chip's set_multiple function if available; | |
3515 | * otherwise set the outputs sequentially; | |
3516 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word | |
3517 | * defines which outputs are to be changed | |
3518 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
3519 | * defines the values the outputs specified by mask are to be set to | |
3520 | */ | |
3521 | static void gpio_chip_set_multiple(struct gpio_chip *chip, | |
3522 | unsigned long *mask, unsigned long *bits) | |
3523 | { | |
3524 | if (chip->set_multiple) { | |
3525 | chip->set_multiple(chip, mask, bits); | |
3526 | } else { | |
5e4e6fb3 AS |
3527 | unsigned int i; |
3528 | ||
3529 | /* set outputs if the corresponding mask bit is set */ | |
3530 | for_each_set_bit(i, mask, chip->ngpio) | |
3531 | chip->set(chip, i, test_bit(i, bits)); | |
5f424243 RI |
3532 | } |
3533 | } | |
3534 | ||
3027743f | 3535 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
3536 | unsigned int array_size, |
3537 | struct gpio_desc **desc_array, | |
3538 | struct gpio_array *array_info, | |
3539 | unsigned long *value_bitmap) | |
5f424243 RI |
3540 | { |
3541 | int i = 0; | |
3542 | ||
b17566a6 JK |
3543 | /* |
3544 | * Validate array_info against desc_array and its size. | |
3545 | * It should immediately follow desc_array if both | |
3546 | * have been obtained from the same gpiod_get_array() call. | |
3547 | */ | |
3548 | if (array_info && array_info->desc == desc_array && | |
3549 | array_size <= array_info->size && | |
3550 | (void *)array_info == desc_array + array_info->size) { | |
3551 | if (!can_sleep) | |
3552 | WARN_ON(array_info->chip->can_sleep); | |
3553 | ||
3554 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3555 | bitmap_xor(value_bitmap, value_bitmap, | |
3556 | array_info->invert_mask, array_size); | |
3557 | ||
3558 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
3559 | value_bitmap); | |
3560 | ||
3561 | if (bitmap_full(array_info->set_mask, array_size)) | |
3562 | return 0; | |
3563 | ||
3564 | i = find_first_zero_bit(array_info->set_mask, array_size); | |
3565 | } else { | |
3566 | array_info = NULL; | |
3567 | } | |
3568 | ||
5f424243 | 3569 | while (i < array_size) { |
fdeb8e15 | 3570 | struct gpio_chip *chip = desc_array[i]->gdev->chip; |
3027743f LA |
3571 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
3572 | unsigned long *mask, *bits; | |
5f424243 RI |
3573 | int count = 0; |
3574 | ||
3027743f LA |
3575 | if (likely(chip->ngpio <= FASTPATH_NGPIO)) { |
3576 | mask = fastpath; | |
3577 | } else { | |
3578 | mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio), | |
3579 | sizeof(*mask), | |
3580 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
3581 | if (!mask) | |
3582 | return -ENOMEM; | |
3583 | } | |
3584 | ||
3585 | bits = mask + BITS_TO_LONGS(chip->ngpio); | |
3586 | bitmap_zero(mask, chip->ngpio); | |
3587 | ||
38e003f4 | 3588 | if (!can_sleep) |
5f424243 | 3589 | WARN_ON(chip->can_sleep); |
38e003f4 | 3590 | |
5f424243 RI |
3591 | do { |
3592 | struct gpio_desc *desc = desc_array[i]; | |
3593 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 3594 | int value = test_bit(i, value_bitmap); |
5f424243 | 3595 | |
b17566a6 JK |
3596 | /* |
3597 | * Pins applicable for fast input but not for | |
3598 | * fast output processing may have been already | |
3599 | * inverted inside the fast path, skip them. | |
3600 | */ | |
3601 | if (!raw && !(array_info && | |
3602 | test_bit(i, array_info->invert_mask)) && | |
3603 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
3604 | value = !value; |
3605 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
3606 | /* | |
3607 | * collect all normal outputs belonging to the same chip | |
3608 | * open drain and open source outputs are set individually | |
3609 | */ | |
02e47980 | 3610 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 3611 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 3612 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 3613 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
3614 | } else { |
3615 | __set_bit(hwgpio, mask); | |
38e003f4 | 3616 | if (value) |
5f424243 | 3617 | __set_bit(hwgpio, bits); |
38e003f4 | 3618 | else |
5f424243 | 3619 | __clear_bit(hwgpio, bits); |
5f424243 RI |
3620 | count++; |
3621 | } | |
3622 | i++; | |
b17566a6 JK |
3623 | |
3624 | if (array_info) | |
35ae7f96 JK |
3625 | i = find_next_zero_bit(array_info->set_mask, |
3626 | array_size, i); | |
fdeb8e15 LW |
3627 | } while ((i < array_size) && |
3628 | (desc_array[i]->gdev->chip == chip)); | |
5f424243 | 3629 | /* push collected bits to outputs */ |
38e003f4 | 3630 | if (count != 0) |
5f424243 | 3631 | gpio_chip_set_multiple(chip, mask, bits); |
3027743f LA |
3632 | |
3633 | if (mask != fastpath) | |
3634 | kfree(mask); | |
5f424243 | 3635 | } |
3027743f | 3636 | return 0; |
5f424243 RI |
3637 | } |
3638 | ||
d2876d08 | 3639 | /** |
79a9becd AC |
3640 | * gpiod_set_raw_value() - assign a gpio's raw value |
3641 | * @desc: gpio whose value will be assigned | |
d2876d08 | 3642 | * @value: value to assign |
d2876d08 | 3643 | * |
79a9becd AC |
3644 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
3645 | * regard for its ACTIVE_LOW status. | |
3646 | * | |
827a9b8b | 3647 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3648 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3649 | */ |
79a9becd | 3650 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 3651 | { |
fdeb8e15 | 3652 | VALIDATE_DESC_VOID(desc); |
3285170f | 3653 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 3654 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3655 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 3656 | } |
79a9becd | 3657 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 3658 | |
1e77fc82 GU |
3659 | /** |
3660 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
3661 | * @desc: the descriptor to set the value on | |
3662 | * @value: value to set | |
3663 | * | |
3664 | * This sets the value of a GPIO line backing a descriptor, applying | |
3665 | * different semantic quirks like active low and open drain/source | |
3666 | * handling. | |
3667 | */ | |
3668 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
3669 | { | |
3670 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3671 | value = !value; | |
3672 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
3673 | gpio_set_open_drain_value_commit(desc, value); | |
3674 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
3675 | gpio_set_open_source_value_commit(desc, value); | |
3676 | else | |
3677 | gpiod_set_raw_value_commit(desc, value); | |
3678 | } | |
3679 | ||
d2876d08 | 3680 | /** |
79a9becd AC |
3681 | * gpiod_set_value() - assign a gpio's value |
3682 | * @desc: gpio whose value will be assigned | |
3683 | * @value: value to assign | |
3684 | * | |
02e47980 LW |
3685 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
3686 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 3687 | * |
827a9b8b | 3688 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3689 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3690 | */ |
79a9becd | 3691 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 3692 | { |
fdeb8e15 | 3693 | VALIDATE_DESC_VOID(desc); |
3285170f | 3694 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 3695 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 3696 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3697 | } |
79a9becd | 3698 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 3699 | |
5f424243 | 3700 | /** |
3fff99bc | 3701 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 3702 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3703 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3704 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3705 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3706 | * |
3707 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3708 | * without regard for their ACTIVE_LOW status. | |
3709 | * | |
827a9b8b | 3710 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3711 | * complain if the GPIO chip functions potentially sleep. |
3712 | */ | |
3027743f | 3713 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
3714 | struct gpio_desc **desc_array, |
3715 | struct gpio_array *array_info, | |
3716 | unsigned long *value_bitmap) | |
5f424243 RI |
3717 | { |
3718 | if (!desc_array) | |
3027743f LA |
3719 | return -EINVAL; |
3720 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 3721 | desc_array, array_info, value_bitmap); |
5f424243 | 3722 | } |
3fff99bc | 3723 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
3724 | |
3725 | /** | |
3fff99bc | 3726 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 3727 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3728 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3729 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3730 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3731 | * |
3732 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3733 | * into account. | |
3734 | * | |
827a9b8b | 3735 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3736 | * complain if the GPIO chip functions potentially sleep. |
3737 | */ | |
cf9af0d5 GU |
3738 | int gpiod_set_array_value(unsigned int array_size, |
3739 | struct gpio_desc **desc_array, | |
3740 | struct gpio_array *array_info, | |
3741 | unsigned long *value_bitmap) | |
5f424243 RI |
3742 | { |
3743 | if (!desc_array) | |
cf9af0d5 GU |
3744 | return -EINVAL; |
3745 | return gpiod_set_array_value_complex(false, false, array_size, | |
3746 | desc_array, array_info, | |
3747 | value_bitmap); | |
5f424243 | 3748 | } |
3fff99bc | 3749 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3750 | |
d2876d08 | 3751 | /** |
79a9becd AC |
3752 | * gpiod_cansleep() - report whether gpio value access may sleep |
3753 | * @desc: gpio to check | |
d2876d08 | 3754 | * |
d2876d08 | 3755 | */ |
79a9becd | 3756 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3757 | { |
fdeb8e15 LW |
3758 | VALIDATE_DESC(desc); |
3759 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3760 | } |
79a9becd | 3761 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3762 | |
90b39402 LW |
3763 | /** |
3764 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3765 | * @desc: gpio to set the consumer name on | |
3766 | * @name: the new consumer name | |
3767 | */ | |
18534df4 | 3768 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3769 | { |
18534df4 MS |
3770 | VALIDATE_DESC(desc); |
3771 | if (name) { | |
3772 | name = kstrdup_const(name, GFP_KERNEL); | |
3773 | if (!name) | |
3774 | return -ENOMEM; | |
3775 | } | |
3776 | ||
3777 | kfree_const(desc->label); | |
3778 | desc_set_label(desc, name); | |
3779 | ||
3780 | return 0; | |
90b39402 LW |
3781 | } |
3782 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3783 | ||
0f6d504e | 3784 | /** |
79a9becd AC |
3785 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3786 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3787 | * |
79a9becd AC |
3788 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3789 | * error. | |
0f6d504e | 3790 | */ |
79a9becd | 3791 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3792 | { |
4c37ce86 LW |
3793 | struct gpio_chip *chip; |
3794 | int offset; | |
0f6d504e | 3795 | |
79bb71bd LW |
3796 | /* |
3797 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3798 | * requires this function to not return zero on an invalid descriptor | |
3799 | * but rather a negative error number. | |
3800 | */ | |
bfbbe44d | 3801 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3802 | return -EINVAL; |
3803 | ||
fdeb8e15 | 3804 | chip = desc->gdev->chip; |
372e722e | 3805 | offset = gpio_chip_hwgpio(desc); |
4c37ce86 LW |
3806 | if (chip->to_irq) { |
3807 | int retirq = chip->to_irq(chip, offset); | |
3808 | ||
3809 | /* Zero means NO_IRQ */ | |
3810 | if (!retirq) | |
3811 | return -ENXIO; | |
3812 | ||
3813 | return retirq; | |
3814 | } | |
3815 | return -ENXIO; | |
0f6d504e | 3816 | } |
79a9becd | 3817 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3818 | |
d468bf9e | 3819 | /** |
e3a2e878 | 3820 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
d74be6df AC |
3821 | * @chip: the chip the GPIO to lock belongs to |
3822 | * @offset: the offset of the GPIO to lock as IRQ | |
d468bf9e LW |
3823 | * |
3824 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3825 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3826 | */ |
e3a2e878 | 3827 | int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) |
372e722e | 3828 | { |
9c10280d LW |
3829 | struct gpio_desc *desc; |
3830 | ||
3831 | desc = gpiochip_get_desc(chip, offset); | |
3832 | if (IS_ERR(desc)) | |
3833 | return PTR_ERR(desc); | |
3834 | ||
60f8339e LW |
3835 | /* |
3836 | * If it's fast: flush the direction setting if something changed | |
3837 | * behind our back | |
3838 | */ | |
3839 | if (!chip->can_sleep && chip->get_direction) { | |
80956790 | 3840 | int dir = gpiod_get_direction(desc); |
9c10280d | 3841 | |
36b31279 AS |
3842 | if (dir < 0) { |
3843 | chip_err(chip, "%s: cannot get GPIO direction\n", | |
3844 | __func__); | |
3845 | return dir; | |
3846 | } | |
9c10280d | 3847 | } |
d468bf9e | 3848 | |
9c10280d | 3849 | if (test_bit(FLAG_IS_OUT, &desc->flags)) { |
d74be6df | 3850 | chip_err(chip, |
b1911710 AS |
3851 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3852 | __func__); | |
d468bf9e LW |
3853 | return -EIO; |
3854 | } | |
3855 | ||
9c10280d | 3856 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3857 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3858 | |
3859 | /* | |
3860 | * If the consumer has not set up a label (such as when the | |
3861 | * IRQ is referenced from .to_irq()) we set up a label here | |
3862 | * so it is clear this is used as an interrupt. | |
3863 | */ | |
3864 | if (!desc->label) | |
3865 | desc_set_label(desc, "interrupt"); | |
3866 | ||
d468bf9e | 3867 | return 0; |
372e722e | 3868 | } |
e3a2e878 | 3869 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3870 | |
d468bf9e | 3871 | /** |
e3a2e878 | 3872 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
d74be6df AC |
3873 | * @chip: the chip the GPIO to lock belongs to |
3874 | * @offset: the offset of the GPIO to lock as IRQ | |
d468bf9e LW |
3875 | * |
3876 | * This is used directly by GPIO drivers that want to indicate | |
3877 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3878 | */ |
e3a2e878 | 3879 | void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) |
d468bf9e | 3880 | { |
3940c34a LW |
3881 | struct gpio_desc *desc; |
3882 | ||
3883 | desc = gpiochip_get_desc(chip, offset); | |
3884 | if (IS_ERR(desc)) | |
d468bf9e | 3885 | return; |
d2876d08 | 3886 | |
3940c34a | 3887 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3888 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3889 | |
3890 | /* If we only had this marking, erase it */ | |
3891 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3892 | desc_set_label(desc, NULL); | |
d468bf9e | 3893 | } |
e3a2e878 | 3894 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3895 | |
4e9439dd HV |
3896 | void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset) |
3897 | { | |
3898 | struct gpio_desc *desc = gpiochip_get_desc(chip, offset); | |
3899 | ||
3900 | if (!IS_ERR(desc) && | |
3901 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3902 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3903 | } | |
3904 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3905 | ||
3906 | void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset) | |
3907 | { | |
3908 | struct gpio_desc *desc = gpiochip_get_desc(chip, offset); | |
3909 | ||
3910 | if (!IS_ERR(desc) && | |
3911 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
3912 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags)); | |
3913 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3914 | } | |
3915 | } | |
3916 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3917 | ||
6cee3821 LW |
3918 | bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset) |
3919 | { | |
3920 | if (offset >= chip->ngpio) | |
3921 | return false; | |
3922 | ||
3923 | return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags); | |
3924 | } | |
3925 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3926 | ||
4e6b8238 HV |
3927 | int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset) |
3928 | { | |
3929 | int ret; | |
3930 | ||
3931 | if (!try_module_get(chip->gpiodev->owner)) | |
3932 | return -ENODEV; | |
3933 | ||
3934 | ret = gpiochip_lock_as_irq(chip, offset); | |
3935 | if (ret) { | |
3936 | chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset); | |
3937 | module_put(chip->gpiodev->owner); | |
3938 | return ret; | |
3939 | } | |
3940 | return 0; | |
3941 | } | |
3942 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3943 | ||
3944 | void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset) | |
3945 | { | |
3946 | gpiochip_unlock_as_irq(chip, offset); | |
3947 | module_put(chip->gpiodev->owner); | |
3948 | } | |
3949 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3950 | ||
143b65d6 LW |
3951 | bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset) |
3952 | { | |
3953 | if (offset >= chip->ngpio) | |
3954 | return false; | |
3955 | ||
3956 | return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags); | |
3957 | } | |
3958 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3959 | ||
3960 | bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset) | |
3961 | { | |
3962 | if (offset >= chip->ngpio) | |
3963 | return false; | |
3964 | ||
3965 | return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags); | |
3966 | } | |
3967 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3968 | ||
05f479bf CK |
3969 | bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset) |
3970 | { | |
3971 | if (offset >= chip->ngpio) | |
3972 | return false; | |
3973 | ||
e10f72bf | 3974 | return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags); |
05f479bf CK |
3975 | } |
3976 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3977 | ||
79a9becd AC |
3978 | /** |
3979 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3980 | * @desc: gpio whose value will be returned | |
3981 | * | |
3982 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3983 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3984 | * |
3985 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3986 | */ |
79a9becd | 3987 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3988 | { |
d2876d08 | 3989 | might_sleep_if(extra_checks); |
fdeb8e15 | 3990 | VALIDATE_DESC(desc); |
fac9d885 | 3991 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3992 | } |
79a9becd | 3993 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3994 | |
79a9becd AC |
3995 | /** |
3996 | * gpiod_get_value_cansleep() - return a gpio's value | |
3997 | * @desc: gpio whose value will be returned | |
3998 | * | |
3999 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 4000 | * account, or negative errno on failure. |
79a9becd AC |
4001 | * |
4002 | * This function is to be called from contexts that can sleep. | |
4003 | */ | |
4004 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 4005 | { |
3f397c21 | 4006 | int value; |
d2876d08 DB |
4007 | |
4008 | might_sleep_if(extra_checks); | |
fdeb8e15 | 4009 | VALIDATE_DESC(desc); |
fac9d885 | 4010 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
4011 | if (value < 0) |
4012 | return value; | |
4013 | ||
79a9becd AC |
4014 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
4015 | value = !value; | |
4016 | ||
3f397c21 | 4017 | return value; |
d2876d08 | 4018 | } |
79a9becd | 4019 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 4020 | |
eec1d566 LW |
4021 | /** |
4022 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 4023 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 4024 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 4025 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4026 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
4027 | * |
4028 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
4029 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
4030 | * else an error code. | |
4031 | * | |
4032 | * This function is to be called from contexts that can sleep. | |
4033 | */ | |
4034 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
4035 | struct gpio_desc **desc_array, | |
77588c14 | 4036 | struct gpio_array *array_info, |
b9762beb | 4037 | unsigned long *value_bitmap) |
eec1d566 LW |
4038 | { |
4039 | might_sleep_if(extra_checks); | |
4040 | if (!desc_array) | |
4041 | return -EINVAL; | |
4042 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
4043 | desc_array, array_info, |
4044 | value_bitmap); | |
eec1d566 LW |
4045 | } |
4046 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
4047 | ||
4048 | /** | |
4049 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 4050 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 4051 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 4052 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4053 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
4054 | * |
4055 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4056 | * into account. Return 0 in case of success, else an error code. | |
4057 | * | |
4058 | * This function is to be called from contexts that can sleep. | |
4059 | */ | |
4060 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
4061 | struct gpio_desc **desc_array, | |
77588c14 | 4062 | struct gpio_array *array_info, |
b9762beb | 4063 | unsigned long *value_bitmap) |
eec1d566 LW |
4064 | { |
4065 | might_sleep_if(extra_checks); | |
4066 | if (!desc_array) | |
4067 | return -EINVAL; | |
4068 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
4069 | desc_array, array_info, |
4070 | value_bitmap); | |
eec1d566 LW |
4071 | } |
4072 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
4073 | ||
79a9becd AC |
4074 | /** |
4075 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
4076 | * @desc: gpio whose value will be assigned | |
4077 | * @value: value to assign | |
4078 | * | |
4079 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
4080 | * regard for its ACTIVE_LOW status. | |
4081 | * | |
4082 | * This function is to be called from contexts that can sleep. | |
4083 | */ | |
4084 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 4085 | { |
d2876d08 | 4086 | might_sleep_if(extra_checks); |
fdeb8e15 | 4087 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 4088 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 4089 | } |
79a9becd | 4090 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 4091 | |
79a9becd AC |
4092 | /** |
4093 | * gpiod_set_value_cansleep() - assign a gpio's value | |
4094 | * @desc: gpio whose value will be assigned | |
4095 | * @value: value to assign | |
4096 | * | |
4097 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
4098 | * account | |
4099 | * | |
4100 | * This function is to be called from contexts that can sleep. | |
4101 | */ | |
4102 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 4103 | { |
d2876d08 | 4104 | might_sleep_if(extra_checks); |
fdeb8e15 | 4105 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 4106 | gpiod_set_value_nocheck(desc, value); |
372e722e | 4107 | } |
79a9becd | 4108 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 4109 | |
5f424243 | 4110 | /** |
3fff99bc | 4111 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 4112 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4113 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4114 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4115 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4116 | * |
4117 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
4118 | * without regard for their ACTIVE_LOW status. | |
4119 | * | |
4120 | * This function is to be called from contexts that can sleep. | |
4121 | */ | |
3027743f | 4122 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
4123 | struct gpio_desc **desc_array, |
4124 | struct gpio_array *array_info, | |
4125 | unsigned long *value_bitmap) | |
5f424243 RI |
4126 | { |
4127 | might_sleep_if(extra_checks); | |
4128 | if (!desc_array) | |
3027743f LA |
4129 | return -EINVAL; |
4130 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 4131 | array_info, value_bitmap); |
5f424243 | 4132 | } |
3fff99bc | 4133 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 4134 | |
3946d187 DT |
4135 | /** |
4136 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
4137 | * @tables: list of tables of consumers to register | |
4138 | * @n: number of tables in the list | |
4139 | */ | |
4140 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
4141 | { | |
4142 | unsigned int i; | |
4143 | ||
4144 | mutex_lock(&gpio_lookup_lock); | |
4145 | ||
4146 | for (i = 0; i < n; i++) | |
4147 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
4148 | ||
4149 | mutex_unlock(&gpio_lookup_lock); | |
4150 | } | |
4151 | ||
5f424243 | 4152 | /** |
3fff99bc | 4153 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 4154 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4155 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4156 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4157 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4158 | * |
4159 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4160 | * into account. | |
4161 | * | |
4162 | * This function is to be called from contexts that can sleep. | |
4163 | */ | |
cf9af0d5 GU |
4164 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
4165 | struct gpio_desc **desc_array, | |
4166 | struct gpio_array *array_info, | |
4167 | unsigned long *value_bitmap) | |
5f424243 RI |
4168 | { |
4169 | might_sleep_if(extra_checks); | |
4170 | if (!desc_array) | |
cf9af0d5 GU |
4171 | return -EINVAL; |
4172 | return gpiod_set_array_value_complex(false, true, array_size, | |
4173 | desc_array, array_info, | |
4174 | value_bitmap); | |
5f424243 | 4175 | } |
3fff99bc | 4176 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 4177 | |
bae48da2 | 4178 | /** |
ad824783 AC |
4179 | * gpiod_add_lookup_table() - register GPIO device consumers |
4180 | * @table: table of consumers to register | |
bae48da2 | 4181 | */ |
ad824783 | 4182 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 AC |
4183 | { |
4184 | mutex_lock(&gpio_lookup_lock); | |
4185 | ||
ad824783 | 4186 | list_add_tail(&table->list, &gpio_lookup_list); |
bae48da2 AC |
4187 | |
4188 | mutex_unlock(&gpio_lookup_lock); | |
4189 | } | |
226b2242 | 4190 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 4191 | |
be9015ab SK |
4192 | /** |
4193 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
4194 | * @table: table of consumers to unregister | |
4195 | */ | |
4196 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
4197 | { | |
4198 | mutex_lock(&gpio_lookup_lock); | |
4199 | ||
4200 | list_del(&table->list); | |
4201 | ||
4202 | mutex_unlock(&gpio_lookup_lock); | |
4203 | } | |
226b2242 | 4204 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 4205 | |
a411e81e BG |
4206 | /** |
4207 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
4208 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
4209 | */ | |
4210 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
4211 | { | |
4212 | struct gpio_chip *chip; | |
4213 | struct gpiod_hog *hog; | |
4214 | ||
4215 | mutex_lock(&gpio_machine_hogs_mutex); | |
4216 | ||
4217 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
4218 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
4219 | ||
4220 | /* | |
4221 | * The chip may have been registered earlier, so check if it | |
4222 | * exists and, if so, try to hog the line now. | |
4223 | */ | |
4224 | chip = find_chip_by_name(hog->chip_label); | |
4225 | if (chip) | |
4226 | gpiochip_machine_hog(chip, hog); | |
4227 | } | |
4228 | ||
4229 | mutex_unlock(&gpio_machine_hogs_mutex); | |
4230 | } | |
4231 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
4232 | ||
ad824783 | 4233 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
4234 | { |
4235 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 4236 | struct gpiod_lookup_table *table; |
bae48da2 AC |
4237 | |
4238 | mutex_lock(&gpio_lookup_lock); | |
4239 | ||
ad824783 AC |
4240 | list_for_each_entry(table, &gpio_lookup_list, list) { |
4241 | if (table->dev_id && dev_id) { | |
4242 | /* | |
4243 | * Valid strings on both ends, must be identical to have | |
4244 | * a match | |
4245 | */ | |
4246 | if (!strcmp(table->dev_id, dev_id)) | |
4247 | goto found; | |
4248 | } else { | |
4249 | /* | |
4250 | * One of the pointers is NULL, so both must be to have | |
4251 | * a match | |
4252 | */ | |
4253 | if (dev_id == table->dev_id) | |
4254 | goto found; | |
4255 | } | |
4256 | } | |
4257 | table = NULL; | |
bae48da2 | 4258 | |
ad824783 AC |
4259 | found: |
4260 | mutex_unlock(&gpio_lookup_lock); | |
4261 | return table; | |
4262 | } | |
bae48da2 | 4263 | |
ad824783 | 4264 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 4265 | unsigned int idx, unsigned long *flags) |
ad824783 | 4266 | { |
2a3cf6a3 | 4267 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
4268 | struct gpiod_lookup_table *table; |
4269 | struct gpiod_lookup *p; | |
bae48da2 | 4270 | |
ad824783 AC |
4271 | table = gpiod_find_lookup_table(dev); |
4272 | if (!table) | |
4273 | return desc; | |
bae48da2 | 4274 | |
ad824783 AC |
4275 | for (p = &table->table[0]; p->chip_label; p++) { |
4276 | struct gpio_chip *chip; | |
bae48da2 | 4277 | |
ad824783 | 4278 | /* idx must always match exactly */ |
bae48da2 AC |
4279 | if (p->idx != idx) |
4280 | continue; | |
4281 | ||
ad824783 AC |
4282 | /* If the lookup entry has a con_id, require exact match */ |
4283 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
4284 | continue; | |
bae48da2 | 4285 | |
ad824783 | 4286 | chip = find_chip_by_name(p->chip_label); |
bae48da2 | 4287 | |
ad824783 | 4288 | if (!chip) { |
8853daf3 JK |
4289 | /* |
4290 | * As the lookup table indicates a chip with | |
4291 | * p->chip_label should exist, assume it may | |
4292 | * still appear later and let the interested | |
4293 | * consumer be probed again or let the Deferred | |
4294 | * Probe infrastructure handle the error. | |
4295 | */ | |
4296 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4297 | p->chip_label); | |
4298 | return ERR_PTR(-EPROBE_DEFER); | |
ad824783 | 4299 | } |
bae48da2 | 4300 | |
ad824783 | 4301 | if (chip->ngpio <= p->chip_hwnum) { |
2a3cf6a3 AC |
4302 | dev_err(dev, |
4303 | "requested GPIO %d is out of range [0..%d] for chip %s\n", | |
4304 | idx, chip->ngpio, chip->label); | |
4305 | return ERR_PTR(-EINVAL); | |
bae48da2 | 4306 | } |
bae48da2 | 4307 | |
bb1e88cc | 4308 | desc = gpiochip_get_desc(chip, p->chip_hwnum); |
ad824783 | 4309 | *flags = p->flags; |
bae48da2 | 4310 | |
2a3cf6a3 | 4311 | return desc; |
bae48da2 AC |
4312 | } |
4313 | ||
bae48da2 AC |
4314 | return desc; |
4315 | } | |
4316 | ||
66858527 RI |
4317 | static int platform_gpio_count(struct device *dev, const char *con_id) |
4318 | { | |
4319 | struct gpiod_lookup_table *table; | |
4320 | struct gpiod_lookup *p; | |
4321 | unsigned int count = 0; | |
4322 | ||
4323 | table = gpiod_find_lookup_table(dev); | |
4324 | if (!table) | |
4325 | return -ENOENT; | |
4326 | ||
4327 | for (p = &table->table[0]; p->chip_label; p++) { | |
4328 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || | |
4329 | (!con_id && !p->con_id)) | |
4330 | count++; | |
4331 | } | |
4332 | if (!count) | |
4333 | return -ENOENT; | |
4334 | ||
4335 | return count; | |
4336 | } | |
4337 | ||
4338 | /** | |
4339 | * gpiod_count - return the number of GPIOs associated with a device / function | |
4340 | * or -ENOENT if no GPIO has been assigned to the requested function | |
4341 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4342 | * @con_id: function within the GPIO consumer | |
4343 | */ | |
4344 | int gpiod_count(struct device *dev, const char *con_id) | |
4345 | { | |
4346 | int count = -ENOENT; | |
4347 | ||
4348 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) | |
f626d6df | 4349 | count = of_gpio_get_count(dev, con_id); |
66858527 RI |
4350 | else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) |
4351 | count = acpi_gpio_count(dev, con_id); | |
4352 | ||
4353 | if (count < 0) | |
4354 | count = platform_gpio_count(dev, con_id); | |
4355 | ||
4356 | return count; | |
4357 | } | |
4358 | EXPORT_SYMBOL_GPL(gpiod_count); | |
4359 | ||
bae48da2 | 4360 | /** |
0879162f | 4361 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 4362 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 4363 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 4364 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4365 | * |
4366 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 4367 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 4368 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 4369 | */ |
b17d1bf1 | 4370 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 4371 | enum gpiod_flags flags) |
bae48da2 | 4372 | { |
39b2bbe3 | 4373 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 4374 | } |
b17d1bf1 | 4375 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 4376 | |
29a1f233 TR |
4377 | /** |
4378 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
4379 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4380 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 4381 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4382 | * |
4383 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
4384 | * the requested function it will return NULL. This is convenient for drivers | |
4385 | * that need to handle optional GPIOs. | |
4386 | */ | |
b17d1bf1 | 4387 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
4388 | const char *con_id, |
4389 | enum gpiod_flags flags) | |
29a1f233 | 4390 | { |
39b2bbe3 | 4391 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 4392 | } |
b17d1bf1 | 4393 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 4394 | |
f625d460 BP |
4395 | |
4396 | /** | |
4397 | * gpiod_configure_flags - helper function to configure a given GPIO | |
4398 | * @desc: gpio whose value will be assigned | |
4399 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
4400 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4401 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4402 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4403 | * | |
4404 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
4405 | * requested function and/or index, or another IS_ERR() code if an error | |
4406 | * occurred while trying to acquire the GPIO. | |
4407 | */ | |
c29fd9eb | 4408 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 4409 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 4410 | { |
d377f56f | 4411 | int ret; |
f625d460 | 4412 | |
85b03b30 JH |
4413 | if (lflags & GPIO_ACTIVE_LOW) |
4414 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 4415 | |
85b03b30 JH |
4416 | if (lflags & GPIO_OPEN_DRAIN) |
4417 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
4418 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
4419 | /* | |
4420 | * This enforces open drain mode from the consumer side. | |
4421 | * This is necessary for some busses like I2C, but the lookup | |
4422 | * should *REALLY* have specified them as open drain in the | |
4423 | * first place, so print a little warning here. | |
4424 | */ | |
4425 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
4426 | gpiod_warn(desc, | |
4427 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
4428 | } | |
4429 | ||
85b03b30 JH |
4430 | if (lflags & GPIO_OPEN_SOURCE) |
4431 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 4432 | |
d449991c TP |
4433 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
4434 | gpiod_err(desc, | |
4435 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
4436 | return -EINVAL; | |
4437 | } | |
4438 | ||
4439 | if (lflags & GPIO_PULL_UP) | |
4440 | set_bit(FLAG_PULL_UP, &desc->flags); | |
4441 | else if (lflags & GPIO_PULL_DOWN) | |
4442 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
4443 | ||
d377f56f LW |
4444 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
4445 | if (ret < 0) | |
4446 | return ret; | |
85b03b30 | 4447 | |
f625d460 BP |
4448 | /* No particular flag request, return here... */ |
4449 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
4450 | pr_debug("no flags found for %s\n", con_id); | |
4451 | return 0; | |
4452 | } | |
4453 | ||
4454 | /* Process flags */ | |
4455 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 4456 | ret = gpiod_direction_output(desc, |
ad17731d | 4457 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 4458 | else |
d377f56f | 4459 | ret = gpiod_direction_input(desc); |
f625d460 | 4460 | |
d377f56f | 4461 | return ret; |
f625d460 BP |
4462 | } |
4463 | ||
bae48da2 AC |
4464 | /** |
4465 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 4466 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
4467 | * @con_id: function within the GPIO consumer |
4468 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4469 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4470 | * |
4471 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
4472 | * defined one for functions that define several GPIOs. | |
4473 | * | |
2a3cf6a3 AC |
4474 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
4475 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 4476 | * occurred while trying to acquire the GPIO. |
bae48da2 | 4477 | */ |
b17d1bf1 | 4478 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 4479 | const char *con_id, |
39b2bbe3 AC |
4480 | unsigned int idx, |
4481 | enum gpiod_flags flags) | |
bae48da2 | 4482 | { |
2d6c06f5 | 4483 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 4484 | struct gpio_desc *desc = NULL; |
d377f56f | 4485 | int ret; |
7d18f0a1 LW |
4486 | /* Maybe we have a device name, maybe not */ |
4487 | const char *devname = dev ? dev_name(dev) : "?"; | |
bae48da2 AC |
4488 | |
4489 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
4490 | ||
4d8440b9 RW |
4491 | if (dev) { |
4492 | /* Using device tree? */ | |
4493 | if (IS_ENABLED(CONFIG_OF) && dev->of_node) { | |
4494 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
4495 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
4496 | } else if (ACPI_COMPANION(dev)) { | |
4497 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
a31f5c3a | 4498 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); |
4d8440b9 | 4499 | } |
35c5d7fd AC |
4500 | } |
4501 | ||
4502 | /* | |
4503 | * Either we are not using DT or ACPI, or their lookup did not return | |
4504 | * a result. In that case, use platform lookup as a fallback. | |
4505 | */ | |
2a3cf6a3 | 4506 | if (!desc || desc == ERR_PTR(-ENOENT)) { |
43a8785a | 4507 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 4508 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
4509 | } |
4510 | ||
4511 | if (IS_ERR(desc)) { | |
9d5a1f2c | 4512 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
4513 | return desc; |
4514 | } | |
4515 | ||
7d18f0a1 LW |
4516 | /* |
4517 | * If a connection label was passed use that, else attempt to use | |
4518 | * the device name as label | |
4519 | */ | |
d377f56f LW |
4520 | ret = gpiod_request(desc, con_id ? con_id : devname); |
4521 | if (ret < 0) { | |
4522 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { | |
b0ce7b29 LW |
4523 | /* |
4524 | * This happens when there are several consumers for | |
4525 | * the same GPIO line: we just return here without | |
4526 | * further initialization. It is a bit if a hack. | |
4527 | * This is necessary to support fixed regulators. | |
4528 | * | |
4529 | * FIXME: Make this more sane and safe. | |
4530 | */ | |
4531 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
4532 | con_id ? con_id : devname); | |
4533 | return desc; | |
4534 | } else { | |
d377f56f | 4535 | return ERR_PTR(ret); |
b0ce7b29 LW |
4536 | } |
4537 | } | |
bae48da2 | 4538 | |
d377f56f | 4539 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 4540 | if (ret < 0) { |
39b2bbe3 | 4541 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
4542 | gpiod_put(desc); |
4543 | return ERR_PTR(ret); | |
4544 | } | |
4545 | ||
4546 | return desc; | |
4547 | } | |
b17d1bf1 | 4548 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 4549 | |
40b73183 MW |
4550 | /** |
4551 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
4552 | * @fwnode: handle of the firmware node | |
4553 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 4554 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 4555 | * @dflags: GPIO initialization flags |
950d55f5 | 4556 | * @label: label to attach to the requested GPIO |
40b73183 MW |
4557 | * |
4558 | * This function can be used for drivers that get their configuration | |
6392cca4 | 4559 | * from opaque firmware. |
40b73183 | 4560 | * |
6392cca4 | 4561 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
4562 | * underlying firmware interface and then makes sure that the GPIO |
4563 | * descriptor is requested before it is returned to the caller. | |
4564 | * | |
950d55f5 | 4565 | * Returns: |
ff21378a | 4566 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
4567 | * provided @dflags. |
4568 | * | |
40b73183 MW |
4569 | * In case of error an ERR_PTR() is returned. |
4570 | */ | |
4571 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 4572 | const char *propname, int index, |
b2987d74 AS |
4573 | enum gpiod_flags dflags, |
4574 | const char *label) | |
40b73183 | 4575 | { |
2d6c06f5 | 4576 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 4577 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
4578 | int ret; |
4579 | ||
4580 | if (!fwnode) | |
4581 | return ERR_PTR(-EINVAL); | |
4582 | ||
4583 | if (is_of_node(fwnode)) { | |
6392cca4 LW |
4584 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
4585 | propname, index, | |
4586 | dflags, | |
4587 | label); | |
4588 | return desc; | |
40b73183 MW |
4589 | } else if (is_acpi_node(fwnode)) { |
4590 | struct acpi_gpio_info info; | |
4591 | ||
537b94da | 4592 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
4593 | if (IS_ERR(desc)) |
4594 | return desc; | |
40b73183 | 4595 | |
6392cca4 | 4596 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 4597 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
6392cca4 | 4598 | } |
40b73183 | 4599 | |
6392cca4 | 4600 | /* Currently only ACPI takes this path */ |
b2987d74 | 4601 | ret = gpiod_request(desc, label); |
85b03b30 JH |
4602 | if (ret) |
4603 | return ERR_PTR(ret); | |
4604 | ||
a264d10f AS |
4605 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
4606 | if (ret < 0) { | |
4607 | gpiod_put(desc); | |
4608 | return ERR_PTR(ret); | |
90b665f6 LP |
4609 | } |
4610 | ||
40b73183 MW |
4611 | return desc; |
4612 | } | |
4613 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
4614 | ||
29a1f233 TR |
4615 | /** |
4616 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
4617 | * function | |
4618 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4619 | * @con_id: function within the GPIO consumer | |
4620 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4621 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4622 | * |
4623 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
4624 | * specified index was assigned to the requested function it will return NULL. | |
4625 | * This is convenient for drivers that need to handle optional GPIOs. | |
4626 | */ | |
b17d1bf1 | 4627 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 4628 | const char *con_id, |
39b2bbe3 AC |
4629 | unsigned int index, |
4630 | enum gpiod_flags flags) | |
29a1f233 TR |
4631 | { |
4632 | struct gpio_desc *desc; | |
4633 | ||
39b2bbe3 | 4634 | desc = gpiod_get_index(dev, con_id, index, flags); |
29a1f233 TR |
4635 | if (IS_ERR(desc)) { |
4636 | if (PTR_ERR(desc) == -ENOENT) | |
4637 | return NULL; | |
4638 | } | |
4639 | ||
4640 | return desc; | |
4641 | } | |
b17d1bf1 | 4642 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 4643 | |
f625d460 BP |
4644 | /** |
4645 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
4646 | * @desc: gpio whose value will be assigned | |
4647 | * @name: gpio line name | |
fed7026a AS |
4648 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4649 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4650 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4651 | */ | |
4652 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
4653 | unsigned long lflags, enum gpiod_flags dflags) | |
4654 | { | |
4655 | struct gpio_chip *chip; | |
4656 | struct gpio_desc *local_desc; | |
4657 | int hwnum; | |
d377f56f | 4658 | int ret; |
f625d460 BP |
4659 | |
4660 | chip = gpiod_to_chip(desc); | |
4661 | hwnum = gpio_chip_hwgpio(desc); | |
4662 | ||
5923ea6c LW |
4663 | local_desc = gpiochip_request_own_desc(chip, hwnum, name, |
4664 | lflags, dflags); | |
f625d460 | 4665 | if (IS_ERR(local_desc)) { |
d377f56f | 4666 | ret = PTR_ERR(local_desc); |
c31a571d | 4667 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
d377f56f LW |
4668 | name, chip->label, hwnum, ret); |
4669 | return ret; | |
f625d460 BP |
4670 | } |
4671 | ||
f625d460 BP |
4672 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4673 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4674 | ||
4675 | pr_info("GPIO line %d (%s) hogged as %s%s\n", | |
4676 | desc_to_gpio(desc), name, | |
4677 | (dflags&GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", | |
4678 | (dflags&GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4679 | (dflags&GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low":""); | |
4680 | ||
4681 | return 0; | |
4682 | } | |
4683 | ||
4684 | /** | |
4685 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
4686 | * @chip: gpio chip to act on | |
f625d460 BP |
4687 | */ |
4688 | static void gpiochip_free_hogs(struct gpio_chip *chip) | |
4689 | { | |
4690 | int id; | |
4691 | ||
4692 | for (id = 0; id < chip->ngpio; id++) { | |
1c3cdb18 LW |
4693 | if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags)) |
4694 | gpiochip_free_own_desc(&chip->gpiodev->descs[id]); | |
f625d460 BP |
4695 | } |
4696 | } | |
4697 | ||
66858527 RI |
4698 | /** |
4699 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4700 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4701 | * @con_id: function within the GPIO consumer | |
4702 | * @flags: optional GPIO initialization flags | |
4703 | * | |
4704 | * This function acquires all the GPIOs defined under a given function. | |
4705 | * | |
4706 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4707 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4708 | * code if an error occurred while trying to acquire the GPIOs. | |
4709 | */ | |
4710 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4711 | const char *con_id, | |
4712 | enum gpiod_flags flags) | |
4713 | { | |
4714 | struct gpio_desc *desc; | |
4715 | struct gpio_descs *descs; | |
bf9346f5 JK |
4716 | struct gpio_array *array_info = NULL; |
4717 | struct gpio_chip *chip; | |
4718 | int count, bitmap_size; | |
66858527 RI |
4719 | |
4720 | count = gpiod_count(dev, con_id); | |
4721 | if (count < 0) | |
4722 | return ERR_PTR(count); | |
4723 | ||
acafe7e3 | 4724 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4725 | if (!descs) |
4726 | return ERR_PTR(-ENOMEM); | |
4727 | ||
4728 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4729 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4730 | if (IS_ERR(desc)) { | |
4731 | gpiod_put_array(descs); | |
4732 | return ERR_CAST(desc); | |
4733 | } | |
bf9346f5 | 4734 | |
66858527 | 4735 | descs->desc[descs->ndescs] = desc; |
bf9346f5 JK |
4736 | |
4737 | chip = gpiod_to_chip(desc); | |
4738 | /* | |
c4c958aa JK |
4739 | * If pin hardware number of array member 0 is also 0, select |
4740 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4741 | */ |
c4c958aa | 4742 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4743 | struct gpio_descs *array; |
4744 | ||
4745 | bitmap_size = BITS_TO_LONGS(chip->ngpio > count ? | |
4746 | chip->ngpio : count); | |
4747 | ||
4748 | array = kzalloc(struct_size(descs, desc, count) + | |
4749 | struct_size(array_info, invert_mask, | |
4750 | 3 * bitmap_size), GFP_KERNEL); | |
4751 | if (!array) { | |
4752 | gpiod_put_array(descs); | |
4753 | return ERR_PTR(-ENOMEM); | |
4754 | } | |
4755 | ||
4756 | memcpy(array, descs, | |
4757 | struct_size(descs, desc, descs->ndescs + 1)); | |
4758 | kfree(descs); | |
4759 | ||
4760 | descs = array; | |
4761 | array_info = (void *)(descs->desc + count); | |
4762 | array_info->get_mask = array_info->invert_mask + | |
4763 | bitmap_size; | |
4764 | array_info->set_mask = array_info->get_mask + | |
4765 | bitmap_size; | |
4766 | ||
4767 | array_info->desc = descs->desc; | |
4768 | array_info->size = count; | |
4769 | array_info->chip = chip; | |
4770 | bitmap_set(array_info->get_mask, descs->ndescs, | |
4771 | count - descs->ndescs); | |
4772 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4773 | count - descs->ndescs); | |
4774 | descs->info = array_info; | |
4775 | } | |
c4c958aa JK |
4776 | /* Unmark array members which don't belong to the 'fast' chip */ |
4777 | if (array_info && array_info->chip != chip) { | |
bf9346f5 JK |
4778 | __clear_bit(descs->ndescs, array_info->get_mask); |
4779 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4780 | } |
4781 | /* | |
4782 | * Detect array members which belong to the 'fast' chip | |
4783 | * but their pins are not in hardware order. | |
4784 | */ | |
4785 | else if (array_info && | |
4786 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
4787 | /* | |
4788 | * Don't use fast path if all array members processed so | |
4789 | * far belong to the same chip as this one but its pin | |
4790 | * hardware number is different from its array index. | |
4791 | */ | |
4792 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4793 | array_info = NULL; | |
4794 | } else { | |
4795 | __clear_bit(descs->ndescs, | |
4796 | array_info->get_mask); | |
4797 | __clear_bit(descs->ndescs, | |
4798 | array_info->set_mask); | |
4799 | } | |
bf9346f5 JK |
4800 | } else if (array_info) { |
4801 | /* Exclude open drain or open source from fast output */ | |
4802 | if (gpiochip_line_is_open_drain(chip, descs->ndescs) || | |
4803 | gpiochip_line_is_open_source(chip, descs->ndescs)) | |
4804 | __clear_bit(descs->ndescs, | |
4805 | array_info->set_mask); | |
4806 | /* Identify 'fast' pins which require invertion */ | |
4807 | if (gpiod_is_active_low(desc)) | |
4808 | __set_bit(descs->ndescs, | |
4809 | array_info->invert_mask); | |
4810 | } | |
4811 | ||
66858527 RI |
4812 | descs->ndescs++; |
4813 | } | |
bf9346f5 JK |
4814 | if (array_info) |
4815 | dev_dbg(dev, | |
4816 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4817 | array_info->chip->label, array_info->size, | |
4818 | *array_info->get_mask, *array_info->set_mask, | |
4819 | *array_info->invert_mask); | |
66858527 RI |
4820 | return descs; |
4821 | } | |
4822 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4823 | ||
4824 | /** | |
4825 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4826 | * function | |
4827 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4828 | * @con_id: function within the GPIO consumer | |
4829 | * @flags: optional GPIO initialization flags | |
4830 | * | |
4831 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4832 | * assigned to the requested function it will return NULL. | |
4833 | */ | |
4834 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4835 | const char *con_id, | |
4836 | enum gpiod_flags flags) | |
4837 | { | |
4838 | struct gpio_descs *descs; | |
4839 | ||
4840 | descs = gpiod_get_array(dev, con_id, flags); | |
4841 | if (IS_ERR(descs) && (PTR_ERR(descs) == -ENOENT)) | |
4842 | return NULL; | |
4843 | ||
4844 | return descs; | |
4845 | } | |
4846 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4847 | ||
bae48da2 AC |
4848 | /** |
4849 | * gpiod_put - dispose of a GPIO descriptor | |
4850 | * @desc: GPIO descriptor to dispose of | |
4851 | * | |
4852 | * No descriptor can be used after gpiod_put() has been called on it. | |
4853 | */ | |
4854 | void gpiod_put(struct gpio_desc *desc) | |
4855 | { | |
1d7765ba AS |
4856 | if (desc) |
4857 | gpiod_free(desc); | |
372e722e | 4858 | } |
bae48da2 | 4859 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4860 | |
66858527 RI |
4861 | /** |
4862 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4863 | * @descs: struct gpio_descs containing an array of descriptors | |
4864 | */ | |
4865 | void gpiod_put_array(struct gpio_descs *descs) | |
4866 | { | |
4867 | unsigned int i; | |
4868 | ||
4869 | for (i = 0; i < descs->ndescs; i++) | |
4870 | gpiod_put(descs->desc[i]); | |
4871 | ||
4872 | kfree(descs); | |
4873 | } | |
4874 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4875 | ||
3c702e99 LW |
4876 | static int __init gpiolib_dev_init(void) |
4877 | { | |
4878 | int ret; | |
4879 | ||
4880 | /* Register GPIO sysfs bus */ | |
b1911710 | 4881 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4882 | if (ret < 0) { |
4883 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4884 | return ret; | |
4885 | } | |
4886 | ||
4887 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpiochip"); | |
4888 | if (ret < 0) { | |
4889 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4890 | bus_unregister(&gpio_bus_type); | |
159f3cd9 GR |
4891 | } else { |
4892 | gpiolib_initialized = true; | |
4893 | gpiochip_setup_devs(); | |
3c702e99 LW |
4894 | } |
4895 | return ret; | |
4896 | } | |
4897 | core_initcall(gpiolib_dev_init); | |
4898 | ||
d2876d08 DB |
4899 | #ifdef CONFIG_DEBUG_FS |
4900 | ||
fdeb8e15 | 4901 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
4902 | { |
4903 | unsigned i; | |
fdeb8e15 LW |
4904 | struct gpio_chip *chip = gdev->chip; |
4905 | unsigned gpio = gdev->base; | |
4906 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
4907 | bool is_out; |
4908 | bool is_irq; | |
4909 | bool active_low; | |
d2876d08 | 4910 | |
fdeb8e15 | 4911 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
4912 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
4913 | if (gdesc->name) { | |
4914 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
4915 | gpio, gdesc->name); | |
4916 | } | |
d2876d08 | 4917 | continue; |
ced433e2 | 4918 | } |
d2876d08 | 4919 | |
372e722e | 4920 | gpiod_get_direction(gdesc); |
d2876d08 | 4921 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 4922 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
4923 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
4924 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 4925 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 4926 | is_out ? "out" : "in ", |
1c22a252 | 4927 | chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
4928 | is_irq ? "IRQ " : "", |
4929 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
4930 | seq_printf(s, "\n"); |
4931 | } | |
4932 | } | |
4933 | ||
f9c4a31f | 4934 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4935 | { |
362432ae | 4936 | unsigned long flags; |
ff2b1359 | 4937 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4938 | loff_t index = *pos; |
d2876d08 | 4939 | |
f9c4a31f | 4940 | s->private = ""; |
d2876d08 | 4941 | |
362432ae | 4942 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4943 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4944 | if (index-- == 0) { |
4945 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4946 | return gdev; |
f9c4a31f | 4947 | } |
362432ae | 4948 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4949 | |
cb1650d4 | 4950 | return NULL; |
f9c4a31f TR |
4951 | } |
4952 | ||
4953 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4954 | { | |
362432ae | 4955 | unsigned long flags; |
ff2b1359 | 4956 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4957 | void *ret = NULL; |
4958 | ||
362432ae | 4959 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4960 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4961 | ret = NULL; |
4962 | else | |
ff2b1359 | 4963 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 4964 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4965 | |
4966 | s->private = "\n"; | |
4967 | ++*pos; | |
4968 | ||
4969 | return ret; | |
4970 | } | |
4971 | ||
4972 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4973 | { | |
4974 | } | |
4975 | ||
4976 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4977 | { | |
ff2b1359 LW |
4978 | struct gpio_device *gdev = v; |
4979 | struct gpio_chip *chip = gdev->chip; | |
4980 | struct device *parent; | |
4981 | ||
4982 | if (!chip) { | |
4983 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, | |
4984 | dev_name(&gdev->dev)); | |
4985 | return 0; | |
4986 | } | |
f9c4a31f | 4987 | |
ff2b1359 LW |
4988 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4989 | dev_name(&gdev->dev), | |
fdeb8e15 | 4990 | gdev->base, gdev->base + gdev->ngpio - 1); |
ff2b1359 LW |
4991 | parent = chip->parent; |
4992 | if (parent) | |
4993 | seq_printf(s, ", parent: %s/%s", | |
4994 | parent->bus ? parent->bus->name : "no-bus", | |
4995 | dev_name(parent)); | |
f9c4a31f TR |
4996 | if (chip->label) |
4997 | seq_printf(s, ", %s", chip->label); | |
4998 | if (chip->can_sleep) | |
4999 | seq_printf(s, ", can sleep"); | |
5000 | seq_printf(s, ":\n"); | |
5001 | ||
5002 | if (chip->dbg_show) | |
5003 | chip->dbg_show(s, chip); | |
5004 | else | |
fdeb8e15 | 5005 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 5006 | |
d2876d08 DB |
5007 | return 0; |
5008 | } | |
5009 | ||
f9c4a31f TR |
5010 | static const struct seq_operations gpiolib_seq_ops = { |
5011 | .start = gpiolib_seq_start, | |
5012 | .next = gpiolib_seq_next, | |
5013 | .stop = gpiolib_seq_stop, | |
5014 | .show = gpiolib_seq_show, | |
5015 | }; | |
5016 | ||
d2876d08 DB |
5017 | static int gpiolib_open(struct inode *inode, struct file *file) |
5018 | { | |
f9c4a31f | 5019 | return seq_open(file, &gpiolib_seq_ops); |
d2876d08 DB |
5020 | } |
5021 | ||
828c0950 | 5022 | static const struct file_operations gpiolib_operations = { |
f9c4a31f | 5023 | .owner = THIS_MODULE, |
d2876d08 DB |
5024 | .open = gpiolib_open, |
5025 | .read = seq_read, | |
5026 | .llseek = seq_lseek, | |
f9c4a31f | 5027 | .release = seq_release, |
d2876d08 DB |
5028 | }; |
5029 | ||
5030 | static int __init gpiolib_debugfs_init(void) | |
5031 | { | |
5032 | /* /sys/kernel/debug/gpio */ | |
acc68b0e GKH |
5033 | debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL, |
5034 | &gpiolib_operations); | |
d2876d08 DB |
5035 | return 0; |
5036 | } | |
5037 | subsys_initcall(gpiolib_debugfs_init); | |
5038 | ||
5039 | #endif /* DEBUG_FS */ |