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d38ceaf9 AD |
1 | /* |
2 | * Copyright 2009 Jerome Glisse. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Jerome Glisse | |
23 | */ | |
24 | #include <drm/drmP.h> | |
25 | #include <drm/amdgpu_drm.h> | |
26 | #include "amdgpu.h" | |
27 | ||
28 | #define AMDGPU_BENCHMARK_ITERATIONS 1024 | |
29 | #define AMDGPU_BENCHMARK_COMMON_MODES_N 17 | |
30 | ||
31 | static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size, | |
32 | uint64_t saddr, uint64_t daddr, int n) | |
33 | { | |
34 | unsigned long start_jiffies; | |
35 | unsigned long end_jiffies; | |
f54d1867 | 36 | struct dma_fence *fence = NULL; |
d38ceaf9 AD |
37 | int i, r; |
38 | ||
39 | start_jiffies = jiffies; | |
40 | for (i = 0; i < n; i++) { | |
41 | struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; | |
e24db985 CZ |
42 | r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence, |
43 | false); | |
d38ceaf9 AD |
44 | if (r) |
45 | goto exit_do_move; | |
f54d1867 | 46 | r = dma_fence_wait(fence, false); |
d38ceaf9 AD |
47 | if (r) |
48 | goto exit_do_move; | |
f54d1867 | 49 | dma_fence_put(fence); |
d38ceaf9 AD |
50 | } |
51 | end_jiffies = jiffies; | |
52 | r = jiffies_to_msecs(end_jiffies - start_jiffies); | |
53 | ||
54 | exit_do_move: | |
55 | if (fence) | |
f54d1867 | 56 | dma_fence_put(fence); |
d38ceaf9 AD |
57 | return r; |
58 | } | |
59 | ||
60 | ||
61 | static void amdgpu_benchmark_log_results(int n, unsigned size, | |
62 | unsigned int time, | |
63 | unsigned sdomain, unsigned ddomain, | |
64 | char *kind) | |
65 | { | |
66 | unsigned int throughput = (n * (size >> 10)) / time; | |
67 | DRM_INFO("amdgpu: %s %u bo moves of %u kB from" | |
68 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n", | |
69 | kind, n, size >> 10, sdomain, ddomain, time, | |
70 | throughput * 8, throughput); | |
71 | } | |
72 | ||
73 | static void amdgpu_benchmark_move(struct amdgpu_device *adev, unsigned size, | |
74 | unsigned sdomain, unsigned ddomain) | |
75 | { | |
76 | struct amdgpu_bo *dobj = NULL; | |
77 | struct amdgpu_bo *sobj = NULL; | |
78 | uint64_t saddr, daddr; | |
79 | int r, n; | |
80 | int time; | |
81 | ||
82 | n = AMDGPU_BENCHMARK_ITERATIONS; | |
72d7668b CK |
83 | r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, sdomain, 0, NULL, |
84 | NULL, &sobj); | |
d38ceaf9 AD |
85 | if (r) { |
86 | goto out_cleanup; | |
87 | } | |
88 | r = amdgpu_bo_reserve(sobj, false); | |
89 | if (unlikely(r != 0)) | |
90 | goto out_cleanup; | |
91 | r = amdgpu_bo_pin(sobj, sdomain, &saddr); | |
92 | amdgpu_bo_unreserve(sobj); | |
93 | if (r) { | |
94 | goto out_cleanup; | |
95 | } | |
72d7668b CK |
96 | r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, ddomain, 0, NULL, |
97 | NULL, &dobj); | |
d38ceaf9 AD |
98 | if (r) { |
99 | goto out_cleanup; | |
100 | } | |
101 | r = amdgpu_bo_reserve(dobj, false); | |
102 | if (unlikely(r != 0)) | |
103 | goto out_cleanup; | |
104 | r = amdgpu_bo_pin(dobj, ddomain, &daddr); | |
105 | amdgpu_bo_unreserve(dobj); | |
106 | if (r) { | |
107 | goto out_cleanup; | |
108 | } | |
109 | ||
110 | if (adev->mman.buffer_funcs) { | |
111 | time = amdgpu_benchmark_do_move(adev, size, saddr, daddr, n); | |
112 | if (time < 0) | |
113 | goto out_cleanup; | |
114 | if (time > 0) | |
115 | amdgpu_benchmark_log_results(n, size, time, | |
116 | sdomain, ddomain, "dma"); | |
117 | } | |
118 | ||
119 | out_cleanup: | |
120 | if (sobj) { | |
121 | r = amdgpu_bo_reserve(sobj, false); | |
122 | if (likely(r == 0)) { | |
123 | amdgpu_bo_unpin(sobj); | |
124 | amdgpu_bo_unreserve(sobj); | |
125 | } | |
126 | amdgpu_bo_unref(&sobj); | |
127 | } | |
128 | if (dobj) { | |
129 | r = amdgpu_bo_reserve(dobj, false); | |
130 | if (likely(r == 0)) { | |
131 | amdgpu_bo_unpin(dobj); | |
132 | amdgpu_bo_unreserve(dobj); | |
133 | } | |
134 | amdgpu_bo_unref(&dobj); | |
135 | } | |
136 | ||
137 | if (r) { | |
138 | DRM_ERROR("Error while benchmarking BO move.\n"); | |
139 | } | |
140 | } | |
141 | ||
142 | void amdgpu_benchmark(struct amdgpu_device *adev, int test_number) | |
143 | { | |
144 | int i; | |
aeba709a | 145 | static const int common_modes[AMDGPU_BENCHMARK_COMMON_MODES_N] = { |
d38ceaf9 AD |
146 | 640 * 480 * 4, |
147 | 720 * 480 * 4, | |
148 | 800 * 600 * 4, | |
149 | 848 * 480 * 4, | |
150 | 1024 * 768 * 4, | |
151 | 1152 * 768 * 4, | |
152 | 1280 * 720 * 4, | |
153 | 1280 * 800 * 4, | |
154 | 1280 * 854 * 4, | |
155 | 1280 * 960 * 4, | |
156 | 1280 * 1024 * 4, | |
157 | 1440 * 900 * 4, | |
158 | 1400 * 1050 * 4, | |
159 | 1680 * 1050 * 4, | |
160 | 1600 * 1200 * 4, | |
161 | 1920 * 1080 * 4, | |
162 | 1920 * 1200 * 4 | |
163 | }; | |
164 | ||
165 | switch (test_number) { | |
166 | case 1: | |
167 | /* simple test, VRAM to GTT and GTT to VRAM */ | |
168 | amdgpu_benchmark_move(adev, 1024*1024, AMDGPU_GEM_DOMAIN_GTT, | |
169 | AMDGPU_GEM_DOMAIN_VRAM); | |
170 | amdgpu_benchmark_move(adev, 1024*1024, AMDGPU_GEM_DOMAIN_VRAM, | |
171 | AMDGPU_GEM_DOMAIN_GTT); | |
172 | break; | |
173 | case 2: | |
174 | /* simple test, VRAM to VRAM */ | |
175 | amdgpu_benchmark_move(adev, 1024*1024, AMDGPU_GEM_DOMAIN_VRAM, | |
176 | AMDGPU_GEM_DOMAIN_VRAM); | |
177 | break; | |
178 | case 3: | |
179 | /* GTT to VRAM, buffer size sweep, powers of 2 */ | |
180 | for (i = 1; i <= 16384; i <<= 1) | |
181 | amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, | |
182 | AMDGPU_GEM_DOMAIN_GTT, | |
183 | AMDGPU_GEM_DOMAIN_VRAM); | |
184 | break; | |
185 | case 4: | |
186 | /* VRAM to GTT, buffer size sweep, powers of 2 */ | |
187 | for (i = 1; i <= 16384; i <<= 1) | |
188 | amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, | |
189 | AMDGPU_GEM_DOMAIN_VRAM, | |
190 | AMDGPU_GEM_DOMAIN_GTT); | |
191 | break; | |
192 | case 5: | |
193 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ | |
194 | for (i = 1; i <= 16384; i <<= 1) | |
195 | amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, | |
196 | AMDGPU_GEM_DOMAIN_VRAM, | |
197 | AMDGPU_GEM_DOMAIN_VRAM); | |
198 | break; | |
199 | case 6: | |
200 | /* GTT to VRAM, buffer size sweep, common modes */ | |
201 | for (i = 0; i < AMDGPU_BENCHMARK_COMMON_MODES_N; i++) | |
202 | amdgpu_benchmark_move(adev, common_modes[i], | |
203 | AMDGPU_GEM_DOMAIN_GTT, | |
204 | AMDGPU_GEM_DOMAIN_VRAM); | |
205 | break; | |
206 | case 7: | |
207 | /* VRAM to GTT, buffer size sweep, common modes */ | |
208 | for (i = 0; i < AMDGPU_BENCHMARK_COMMON_MODES_N; i++) | |
209 | amdgpu_benchmark_move(adev, common_modes[i], | |
210 | AMDGPU_GEM_DOMAIN_VRAM, | |
211 | AMDGPU_GEM_DOMAIN_GTT); | |
212 | break; | |
213 | case 8: | |
214 | /* VRAM to VRAM, buffer size sweep, common modes */ | |
215 | for (i = 0; i < AMDGPU_BENCHMARK_COMMON_MODES_N; i++) | |
216 | amdgpu_benchmark_move(adev, common_modes[i], | |
217 | AMDGPU_GEM_DOMAIN_VRAM, | |
218 | AMDGPU_GEM_DOMAIN_VRAM); | |
219 | break; | |
220 | ||
221 | default: | |
222 | DRM_ERROR("Unknown benchmark\n"); | |
223 | } | |
224 | } |