]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'regulator/fix/max77802' into regulator-linus
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_drv.c
CommitLineData
d38ceaf9
AD		 1/**
2 * \file amdgpu_drv.c
3 * AMD Amdgpu driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32#include <drm/drmP.h>
33#include <drm/amdgpu_drm.h>
34#include <drm/drm_gem.h>
35#include "amdgpu_drv.h"
36
37#include <drm/drm_pciids.h>
38#include <linux/console.h>
39#include <linux/module.h>
40#include <linux/pm_runtime.h>
41#include <linux/vga_switcheroo.h>
42#include "drm_crtc_helper.h"
43
44#include "amdgpu.h"
45#include "amdgpu_irq.h"
46
130e0371
OG		 47#include "amdgpu_amdkfd.h"
48
d38ceaf9
AD		 49/*
50 * KMS wrapper.
51 * - 3.0.0 - initial driver
6055f37a 52 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
f84e63f2
MO		 53 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
54 * at the end of IBs.
d347ce66 55 * - 3.3.0 - Add VM support for UVD on supported hardware.
83a59b63 56 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
8dd31d74 57 * - 3.5.0 - Add support for new UVD_NO_OP register.
753ad49c 58 * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
9cee3c1f 59 * - 3.7.0 - Add support for VCE clock list packet
b62b5931 60 * - 3.8.0 - Add support raster config init in the kernel
ef704318 61 * - 3.9.0 - Add support for memory query info about VRAM and GTT.
a5b11dac 62 * - 3.10.0 - Add support for new fences ioctl, new gem ioctl flags
5ebbac4b 63 * - 3.11.0 - Add support for sensor query info (clocks, temp, etc).
dfe38bd8 64 * - 3.12.0 - Add query for double offchip LDS buffers
8eafd505 65 * - 3.13.0 - Add PRT support
203eb0cb 66 * - 3.14.0 - Fix race in amdgpu_ctx_get_fence() and note new functionality
44eb8c1b 67 * - 3.15.0 - Export more gpu info for gfx9
d38ceaf9
AD		 68 */
69#define KMS_DRIVER_MAJOR 3
44eb8c1b 70#define KMS_DRIVER_MINOR 15
d38ceaf9
AD		 71#define KMS_DRIVER_PATCHLEVEL 0
72
73int amdgpu_vram_limit = 0;
74int amdgpu_gart_size = -1; /* auto */
95844d20 75int amdgpu_moverate = -1; /* auto */
d38ceaf9
AD		 76int amdgpu_benchmarking = 0;
77int amdgpu_testing = 0;
78int amdgpu_audio = -1;
79int amdgpu_disp_priority = 0;
80int amdgpu_hw_i2c = 0;
81int amdgpu_pcie_gen2 = -1;
82int amdgpu_msi = -1;
a895c222 83int amdgpu_lockup_timeout = 0;
d38ceaf9 84int amdgpu_dpm = -1;
e635ee07 85int amdgpu_fw_load_type = -1;
d38ceaf9
AD		 86int amdgpu_aspm = -1;
87int amdgpu_runtime_pm = -1;
d38ceaf9
AD		 88unsigned amdgpu_ip_block_mask = 0xffffffff;
89int amdgpu_bapm = -1;
90int amdgpu_deep_color = 0;
bab4fee7 91int amdgpu_vm_size = -1;
d38ceaf9 92int amdgpu_vm_block_size = -1;
d9c13156 93int amdgpu_vm_fault_stop = 0;
b495bd3a 94int amdgpu_vm_debug = 0;
6a7f76e7 95int amdgpu_vram_page_split = 1024;
d38ceaf9 96int amdgpu_exp_hw_support = 0;
b70f014d 97int amdgpu_sched_jobs = 32;
4afcb303 98int amdgpu_sched_hw_submission = 2;
3ca67300
RZ		 99int amdgpu_no_evict = 0;
100int amdgpu_direct_gma_size = 0;
cd474ba0
AD		 101unsigned amdgpu_pcie_gen_cap = 0;
102unsigned amdgpu_pcie_lane_cap = 0;
395d1fb9
NH		 103unsigned amdgpu_cg_mask = 0xffffffff;
104unsigned amdgpu_pg_mask = 0xffffffff;
6f8941a2 105char *amdgpu_disable_cu = NULL;
9accf2fd 106char *amdgpu_virtual_display = NULL;
5141e9d2 107unsigned amdgpu_pp_feature_mask = 0xffffffff;
bce23e00
AD		 108int amdgpu_ngg = 0;
109int amdgpu_prim_buf_per_se = 0;
110int amdgpu_pos_buf_per_se = 0;
111int amdgpu_cntl_sb_buf_per_se = 0;
112int amdgpu_param_buf_per_se = 0;
d38ceaf9
AD		 113
114MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
115module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
116
117MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
118module_param_named(gartsize, amdgpu_gart_size, int, 0600);
119
95844d20
MO		 120MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");
121module_param_named(moverate, amdgpu_moverate, int, 0600);
122
d38ceaf9
AD		 123MODULE_PARM_DESC(benchmark, "Run benchmark");
124module_param_named(benchmark, amdgpu_benchmarking, int, 0444);
125
126MODULE_PARM_DESC(test, "Run tests");
127module_param_named(test, amdgpu_testing, int, 0444);
128
129MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
130module_param_named(audio, amdgpu_audio, int, 0444);
131
132MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
133module_param_named(disp_priority, amdgpu_disp_priority, int, 0444);
134
135MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
136module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444);
137
138MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
139module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);
140
141MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
142module_param_named(msi, amdgpu_msi, int, 0444);
143
a895c222 144MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 0 = disable)");
d38ceaf9
AD		 145module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);
146
147MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
148module_param_named(dpm, amdgpu_dpm, int, 0444);
149
e635ee07
HR		 150MODULE_PARM_DESC(fw_load_type, "firmware loading type (0 = direct, 1 = SMU, 2 = PSP, -1 = auto)");
151module_param_named(fw_load_type, amdgpu_fw_load_type, int, 0444);
d38ceaf9
AD		 152
153MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
154module_param_named(aspm, amdgpu_aspm, int, 0444);
155
156MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
157module_param_named(runpm, amdgpu_runtime_pm, int, 0444);
158
d38ceaf9
AD		 159MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))");
160module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);
161
162MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
163module_param_named(bapm, amdgpu_bapm, int, 0444);
164
165MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
166module_param_named(deep_color, amdgpu_deep_color, int, 0444);
167
ed885b21 168MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)");
d38ceaf9
AD		 169module_param_named(vm_size, amdgpu_vm_size, int, 0444);
170
171MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
172module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444);
173
d9c13156
CK		 174MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always)");
175module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444);
176
b495bd3a
CK		 177MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)");
178module_param_named(vm_debug, amdgpu_vm_debug, int, 0644);
179
6a7f76e7
CK		 180MODULE_PARM_DESC(vram_page_split, "Number of pages after we split VRAM allocations (default 1024, -1 = disable)");
181module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444);
182
d38ceaf9
AD		 183MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");
184module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);
185
b70f014d 186MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)");
1333f723
JZ		 187module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);
188
4afcb303
JZ		 189MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)");
190module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444);
191
5141e9d2
RZ		 192MODULE_PARM_DESC(ppfeaturemask, "all power features enabled (default))");
193module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, int, 0444);
3a74f6f2 194
3ca67300
RZ		 195MODULE_PARM_DESC(no_evict, "Support pinning request from user space (1 = enable, 0 = disable (default))");
196module_param_named(no_evict, amdgpu_no_evict, int, 0444);
197
198MODULE_PARM_DESC(direct_gma_size, "Direct GMA size in megabytes (max 96MB)");
199module_param_named(direct_gma_size, amdgpu_direct_gma_size, int, 0444);
af223dfa 200
cd474ba0
AD		 201MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");
202module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444);
203
204MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
205module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
206
395d1fb9
NH		 207MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");
208module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
209
210MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
211module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
212
6f8941a2
NH		 213MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");
214module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);
215
0f66356d
ED		 216MODULE_PARM_DESC(virtual_display,
217 "Enable virtual display feature (the virtual_display will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x)");
9accf2fd 218module_param_named(virtual_display, amdgpu_virtual_display, charp, 0444);
e443059d 219
bce23e00
AD		 220MODULE_PARM_DESC(ngg, "Next Generation Graphics (1 = enable, 0 = disable(default depending on gfx))");
221module_param_named(ngg, amdgpu_ngg, int, 0444);
222
223MODULE_PARM_DESC(prim_buf_per_se, "the size of Primitive Buffer per Shader Engine (default depending on gfx)");
224module_param_named(prim_buf_per_se, amdgpu_prim_buf_per_se, int, 0444);
225
226MODULE_PARM_DESC(pos_buf_per_se, "the size of Position Buffer per Shader Engine (default depending on gfx)");
227module_param_named(pos_buf_per_se, amdgpu_pos_buf_per_se, int, 0444);
228
229MODULE_PARM_DESC(cntl_sb_buf_per_se, "the size of Control Sideband per Shader Engine (default depending on gfx)");
230module_param_named(cntl_sb_buf_per_se, amdgpu_cntl_sb_buf_per_se, int, 0444);
231
232MODULE_PARM_DESC(param_buf_per_se, "the size of Off-Chip Pramater Cache per Shader Engine (default depending on gfx)");
233module_param_named(param_buf_per_se, amdgpu_param_buf_per_se, int, 0444);
234
235
f498d9ed 236static const struct pci_device_id pciidlist[] = {
78fbb685
KW		 237#ifdef CONFIG_DRM_AMDGPU_SI
238 {0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
239 {0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
240 {0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
241 {0x1002, 0x678A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
242 {0x1002, 0x6790, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
243 {0x1002, 0x6791, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
244 {0x1002, 0x6792, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
245 {0x1002, 0x6798, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
246 {0x1002, 0x6799, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
247 {0x1002, 0x679A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
248 {0x1002, 0x679B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
249 {0x1002, 0x679E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
250 {0x1002, 0x679F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
251 {0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
252 {0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
253 {0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
254 {0x1002, 0x6806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
255 {0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
256 {0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
257 {0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
258 {0x1002, 0x6811, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
259 {0x1002, 0x6816, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
260 {0x1002, 0x6817, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
261 {0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
262 {0x1002, 0x6819, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
263 {0x1002, 0x6600, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
264 {0x1002, 0x6601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
265 {0x1002, 0x6602, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
266 {0x1002, 0x6603, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
267 {0x1002, 0x6604, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
268 {0x1002, 0x6605, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
269 {0x1002, 0x6606, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
270 {0x1002, 0x6607, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
271 {0x1002, 0x6608, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
272 {0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
273 {0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
274 {0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
275 {0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
276 {0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
277 {0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
278 {0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
279 {0x1002, 0x6631, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
280 {0x1002, 0x6820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
281 {0x1002, 0x6821, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
282 {0x1002, 0x6822, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
283 {0x1002, 0x6823, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
284 {0x1002, 0x6824, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
285 {0x1002, 0x6825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
286 {0x1002, 0x6826, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
287 {0x1002, 0x6827, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
288 {0x1002, 0x6828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
289 {0x1002, 0x6829, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
290 {0x1002, 0x682A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
291 {0x1002, 0x682B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
292 {0x1002, 0x682C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
293 {0x1002, 0x682D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
294 {0x1002, 0x682F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
295 {0x1002, 0x6830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
296 {0x1002, 0x6831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
297 {0x1002, 0x6835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
298 {0x1002, 0x6837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
299 {0x1002, 0x6838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
300 {0x1002, 0x6839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
301 {0x1002, 0x683B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
302 {0x1002, 0x683D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
303 {0x1002, 0x683F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
304 {0x1002, 0x6660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
305 {0x1002, 0x6663, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
306 {0x1002, 0x6664, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
307 {0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
308 {0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
309 {0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
310#endif
89330c39
AD		 311#ifdef CONFIG_DRM_AMDGPU_CIK
312 /* Kaveri */
2f7d10b3
JZ		 313 {0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
314 {0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
315 {0x1002, 0x1306, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
316 {0x1002, 0x1307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
317 {0x1002, 0x1309, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
318 {0x1002, 0x130A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
319 {0x1002, 0x130B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
320 {0x1002, 0x130C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
321 {0x1002, 0x130D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
322 {0x1002, 0x130E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
323 {0x1002, 0x130F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
324 {0x1002, 0x1310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
325 {0x1002, 0x1311, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
326 {0x1002, 0x1312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
327 {0x1002, 0x1313, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
328 {0x1002, 0x1315, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
329 {0x1002, 0x1316, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
330 {0x1002, 0x1317, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
331 {0x1002, 0x1318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
332 {0x1002, 0x131B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
333 {0x1002, 0x131C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
334 {0x1002, 0x131D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
89330c39 335 /* Bonaire */
2f7d10b3
JZ		 336 {0x1002, 0x6640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
337 {0x1002, 0x6641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
338 {0x1002, 0x6646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
339 {0x1002, 0x6647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
89330c39
AD		 340 {0x1002, 0x6649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
341 {0x1002, 0x6650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
342 {0x1002, 0x6651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
343 {0x1002, 0x6658, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
344 {0x1002, 0x665c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
345 {0x1002, 0x665d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
fb4f1737 346 {0x1002, 0x665f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
89330c39
AD		 347 /* Hawaii */
348 {0x1002, 0x67A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
349 {0x1002, 0x67A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
350 {0x1002, 0x67A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
351 {0x1002, 0x67A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
352 {0x1002, 0x67A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
353 {0x1002, 0x67AA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
354 {0x1002, 0x67B0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
355 {0x1002, 0x67B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
356 {0x1002, 0x67B8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
357 {0x1002, 0x67B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
358 {0x1002, 0x67BA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
359 {0x1002, 0x67BE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
360 /* Kabini */
2f7d10b3
JZ		 361 {0x1002, 0x9830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
362 {0x1002, 0x9831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
363 {0x1002, 0x9832, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
364 {0x1002, 0x9833, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
365 {0x1002, 0x9834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
366 {0x1002, 0x9835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
367 {0x1002, 0x9836, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
368 {0x1002, 0x9837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
369 {0x1002, 0x9838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
370 {0x1002, 0x9839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
371 {0x1002, 0x983a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
372 {0x1002, 0x983b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
373 {0x1002, 0x983c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
374 {0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
375 {0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
376 {0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
89330c39 377 /* mullins */
2f7d10b3
JZ		 378 {0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
379 {0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
380 {0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
381 {0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
382 {0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
383 {0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
384 {0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
385 {0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
386 {0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
387 {0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
388 {0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
389 {0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
390 {0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
391 {0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
392 {0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
393 {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
89330c39 394#endif
1256a8b8 395 /* topaz */
dba280b2
AD		 396 {0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
397 {0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
398 {0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
399 {0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
400 {0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1256a8b8
AD		 401 /* tonga */
402 {0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
403 {0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
404 {0x1002, 0x6928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1f8d9625 405 {0x1002, 0x6929, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1256a8b8
AD		 406 {0x1002, 0x692B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
407 {0x1002, 0x692F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1f8d9625 408 {0x1002, 0x6930, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1256a8b8
AD		 409 {0x1002, 0x6938, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
410 {0x1002, 0x6939, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2da78e21
DZ		 411 /* fiji */
412 {0x1002, 0x7300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
e1d99217 413 {0x1002, 0x730F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
1256a8b8 414 /* carrizo */
2f7d10b3
JZ		 415 {0x1002, 0x9870, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
416 {0x1002, 0x9874, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
417 {0x1002, 0x9875, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
418 {0x1002, 0x9876, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
419 {0x1002, 0x9877, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
81b1509a
SL		 420 /* stoney */
421 {0x1002, 0x98E4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_STONEY|AMD_IS_APU},
2cc0c0b5
FC		 422 /* Polaris11 */
423 {0x1002, 0x67E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
35621b80 424 {0x1002, 0x67E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5 425 {0x1002, 0x67E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5 426 {0x1002, 0x67EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
35621b80 427 {0x1002, 0x67EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5 428 {0x1002, 0x67FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
35621b80
FC		 429 {0x1002, 0x67E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
430 {0x1002, 0x67E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
431 {0x1002, 0x67E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5
FC		 432 /* Polaris10 */
433 {0x1002, 0x67C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1dcf4801
FC		 434 {0x1002, 0x67C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
435 {0x1002, 0x67C2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
436 {0x1002, 0x67C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
437 {0x1002, 0x67C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
7dae6181 438 {0x1002, 0x67D0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2cc0c0b5 439 {0x1002, 0x67DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1dcf4801
FC		 440 {0x1002, 0x67C8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
441 {0x1002, 0x67C9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
442 {0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
443 {0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
444 {0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
fc8e9c54
JZ		 445 /* Polaris12 */
446 {0x1002, 0x6980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
447 {0x1002, 0x6981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
448 {0x1002, 0x6985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
449 {0x1002, 0x6986, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
450 {0x1002, 0x6987, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
cf8c73af 451 {0x1002, 0x6995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
6e88491c 452 {0x1002, 0x6997, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
fc8e9c54 453 {0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
ca2f1cca
JZ		 454 /* Vega 10 */
455 {0x1002, 0x6860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
456 {0x1002, 0x6861, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
457 {0x1002, 0x6862, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
458 {0x1002, 0x6863, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
09062ae1 459 {0x1002, 0x6864, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
ca2f1cca 460 {0x1002, 0x6867, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
09062ae1 461 {0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
ca2f1cca
JZ		 462 {0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
463 {0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
d38ceaf9
AD		 464 {0, 0, 0}
465};
466
467MODULE_DEVICE_TABLE(pci, pciidlist);
468
469static struct drm_driver kms_driver;
470
471static int amdgpu_kick_out_firmware_fb(struct pci_dev *pdev)
472{
473 struct apertures_struct *ap;
474 bool primary = false;
475
476 ap = alloc_apertures(1);
477 if (!ap)
478 return -ENOMEM;
479
480 ap->ranges[0].base = pci_resource_start(pdev, 0);
481 ap->ranges[0].size = pci_resource_len(pdev, 0);
482
483#ifdef CONFIG_X86
484 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
485#endif
44adece5 486 drm_fb_helper_remove_conflicting_framebuffers(ap, "amdgpudrmfb", primary);
d38ceaf9
AD		 487 kfree(ap);
488
489 return 0;
490}
491
492static int amdgpu_pci_probe(struct pci_dev *pdev,
493 const struct pci_device_id *ent)
494{
495 unsigned long flags = ent->driver_data;
496 int ret;
497
2f7d10b3 498 if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
d38ceaf9
AD		 499 DRM_INFO("This hardware requires experimental hardware support.\n"
500 "See modparam exp_hw_support\n");
501 return -ENODEV;
502 }
503
efb1c658
OG		 504 /*
505 * Initialize amdkfd before starting radeon. If it was not loaded yet,
506 * defer radeon probing
507 */
508 ret = amdgpu_amdkfd_init();
509 if (ret == -EPROBE_DEFER)
510 return ret;
511
d38ceaf9
AD		 512 /* Get rid of things like offb */
513 ret = amdgpu_kick_out_firmware_fb(pdev);
514 if (ret)
515 return ret;
516
517 return drm_get_pci_dev(pdev, ent, &kms_driver);
518}
519
520static void
521amdgpu_pci_remove(struct pci_dev *pdev)
522{
523 struct drm_device *dev = pci_get_drvdata(pdev);
524
525 drm_put_dev(dev);
526}
527
61e11306
AD		 528static void
529amdgpu_pci_shutdown(struct pci_dev *pdev)
530{
faefba95
AD		 531 struct drm_device *dev = pci_get_drvdata(pdev);
532 struct amdgpu_device *adev = dev->dev_private;
533
61e11306 534 /* if we are running in a VM, make sure the device
00ea8cba
AD		 535 * torn down properly on reboot/shutdown.
536 * unfortunately we can't detect certain
537 * hypervisors so just do this all the time.
61e11306 538 */
faefba95 539 amdgpu_suspend(adev);
61e11306
AD		 540}
541
d38ceaf9
AD		 542static int amdgpu_pmops_suspend(struct device *dev)
543{
544 struct pci_dev *pdev = to_pci_dev(dev);
74b0b157 545
d38ceaf9 546 struct drm_device *drm_dev = pci_get_drvdata(pdev);
810ddc3a 547 return amdgpu_device_suspend(drm_dev, true, true);
d38ceaf9
AD		 548}
549
550static int amdgpu_pmops_resume(struct device *dev)
551{
552 struct pci_dev *pdev = to_pci_dev(dev);
553 struct drm_device *drm_dev = pci_get_drvdata(pdev);
85e154c2
AD		 554
555 /* GPU comes up enabled by the bios on resume */
556 if (amdgpu_device_is_px(drm_dev)) {
557 pm_runtime_disable(dev);
558 pm_runtime_set_active(dev);
559 pm_runtime_enable(dev);
560 }
561
810ddc3a 562 return amdgpu_device_resume(drm_dev, true, true);
d38ceaf9
AD		 563}
564
565static int amdgpu_pmops_freeze(struct device *dev)
566{
567 struct pci_dev *pdev = to_pci_dev(dev);
74b0b157 568
d38ceaf9 569 struct drm_device *drm_dev = pci_get_drvdata(pdev);
810ddc3a 570 return amdgpu_device_suspend(drm_dev, false, true);
d38ceaf9
AD		 571}
572
573static int amdgpu_pmops_thaw(struct device *dev)
574{
575 struct pci_dev *pdev = to_pci_dev(dev);
74b0b157 576
577 struct drm_device *drm_dev = pci_get_drvdata(pdev);
578 return amdgpu_device_resume(drm_dev, false, true);
579}
580
581static int amdgpu_pmops_poweroff(struct device *dev)
582{
583 struct pci_dev *pdev = to_pci_dev(dev);
584
585 struct drm_device *drm_dev = pci_get_drvdata(pdev);
586 return amdgpu_device_suspend(drm_dev, true, true);
587}
588
589static int amdgpu_pmops_restore(struct device *dev)
590{
591 struct pci_dev *pdev = to_pci_dev(dev);
592
d38ceaf9 593 struct drm_device *drm_dev = pci_get_drvdata(pdev);
810ddc3a 594 return amdgpu_device_resume(drm_dev, false, true);
d38ceaf9
AD		 595}
596
597static int amdgpu_pmops_runtime_suspend(struct device *dev)
598{
599 struct pci_dev *pdev = to_pci_dev(dev);
600 struct drm_device *drm_dev = pci_get_drvdata(pdev);
601 int ret;
602
603 if (!amdgpu_device_is_px(drm_dev)) {
604 pm_runtime_forbid(dev);
605 return -EBUSY;
606 }
607
608 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
609 drm_kms_helper_poll_disable(drm_dev);
610 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
611
810ddc3a 612 ret = amdgpu_device_suspend(drm_dev, false, false);
d38ceaf9
AD		 613 pci_save_state(pdev);
614 pci_disable_device(pdev);
615 pci_ignore_hotplug(pdev);
11670975
AD		 616 if (amdgpu_is_atpx_hybrid())
617 pci_set_power_state(pdev, PCI_D3cold);
522761cb 618 else if (!amdgpu_has_atpx_dgpu_power_cntl())
7e32aa61 619 pci_set_power_state(pdev, PCI_D3hot);
d38ceaf9
AD		 620 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
621
622 return 0;
623}
624
625static int amdgpu_pmops_runtime_resume(struct device *dev)
626{
627 struct pci_dev *pdev = to_pci_dev(dev);
628 struct drm_device *drm_dev = pci_get_drvdata(pdev);
629 int ret;
630
631 if (!amdgpu_device_is_px(drm_dev))
632 return -EINVAL;
633
634 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
635
522761cb
AD		 636 if (amdgpu_is_atpx_hybrid() ||
637 !amdgpu_has_atpx_dgpu_power_cntl())
638 pci_set_power_state(pdev, PCI_D0);
d38ceaf9
AD		 639 pci_restore_state(pdev);
640 ret = pci_enable_device(pdev);
641 if (ret)
642 return ret;
643 pci_set_master(pdev);
644
810ddc3a 645 ret = amdgpu_device_resume(drm_dev, false, false);
d38ceaf9
AD		 646 drm_kms_helper_poll_enable(drm_dev);
647 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
648 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
649 return 0;
650}
651
652static int amdgpu_pmops_runtime_idle(struct device *dev)
653{
654 struct pci_dev *pdev = to_pci_dev(dev);
655 struct drm_device *drm_dev = pci_get_drvdata(pdev);
656 struct drm_crtc *crtc;
657
658 if (!amdgpu_device_is_px(drm_dev)) {
659 pm_runtime_forbid(dev);
660 return -EBUSY;
661 }
662
663 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
664 if (crtc->enabled) {
665 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
666 return -EBUSY;
667 }
668 }
669
670 pm_runtime_mark_last_busy(dev);
671 pm_runtime_autosuspend(dev);
672 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
673 return 1;
674}
675
676long amdgpu_drm_ioctl(struct file *filp,
677 unsigned int cmd, unsigned long arg)
678{
679 struct drm_file *file_priv = filp->private_data;
680 struct drm_device *dev;
681 long ret;
682 dev = file_priv->minor->dev;
683 ret = pm_runtime_get_sync(dev->dev);
684 if (ret < 0)
685 return ret;
686
687 ret = drm_ioctl(filp, cmd, arg);
688
689 pm_runtime_mark_last_busy(dev->dev);
690 pm_runtime_put_autosuspend(dev->dev);
691 return ret;
692}
693
694static const struct dev_pm_ops amdgpu_pm_ops = {
695 .suspend = amdgpu_pmops_suspend,
696 .resume = amdgpu_pmops_resume,
697 .freeze = amdgpu_pmops_freeze,
698 .thaw = amdgpu_pmops_thaw,
74b0b157 699 .poweroff = amdgpu_pmops_poweroff,
700 .restore = amdgpu_pmops_restore,
d38ceaf9
AD		 701 .runtime_suspend = amdgpu_pmops_runtime_suspend,
702 .runtime_resume = amdgpu_pmops_runtime_resume,
703 .runtime_idle = amdgpu_pmops_runtime_idle,
704};
705
706static const struct file_operations amdgpu_driver_kms_fops = {
707 .owner = THIS_MODULE,
708 .open = drm_open,
709 .release = drm_release,
710 .unlocked_ioctl = amdgpu_drm_ioctl,
711 .mmap = amdgpu_mmap,
712 .poll = drm_poll,
713 .read = drm_read,
714#ifdef CONFIG_COMPAT
715 .compat_ioctl = amdgpu_kms_compat_ioctl,
716#endif
717};
718
719static struct drm_driver kms_driver = {
720 .driver_features =
721 DRIVER_USE_AGP |
722 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
7056bb5c 723 DRIVER_PRIME | DRIVER_RENDER | DRIVER_MODESET,
d38ceaf9
AD		 724 .load = amdgpu_driver_load_kms,
725 .open = amdgpu_driver_open_kms,
d38ceaf9
AD		 726 .postclose = amdgpu_driver_postclose_kms,
727 .lastclose = amdgpu_driver_lastclose_kms,
728 .set_busid = drm_pci_set_busid,
729 .unload = amdgpu_driver_unload_kms,
730 .get_vblank_counter = amdgpu_get_vblank_counter_kms,
731 .enable_vblank = amdgpu_enable_vblank_kms,
732 .disable_vblank = amdgpu_disable_vblank_kms,
733 .get_vblank_timestamp = amdgpu_get_vblank_timestamp_kms,
734 .get_scanout_position = amdgpu_get_crtc_scanoutpos,
735#if defined(CONFIG_DEBUG_FS)
736 .debugfs_init = amdgpu_debugfs_init,
d38ceaf9
AD		 737#endif
738 .irq_preinstall = amdgpu_irq_preinstall,
739 .irq_postinstall = amdgpu_irq_postinstall,
740 .irq_uninstall = amdgpu_irq_uninstall,
741 .irq_handler = amdgpu_irq_handler,
742 .ioctls = amdgpu_ioctls_kms,
e7294dee 743 .gem_free_object_unlocked = amdgpu_gem_object_free,
d38ceaf9
AD		 744 .gem_open_object = amdgpu_gem_object_open,
745 .gem_close_object = amdgpu_gem_object_close,
746 .dumb_create = amdgpu_mode_dumb_create,
747 .dumb_map_offset = amdgpu_mode_dumb_mmap,
748 .dumb_destroy = drm_gem_dumb_destroy,
749 .fops = &amdgpu_driver_kms_fops,
750
751 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
752 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
753 .gem_prime_export = amdgpu_gem_prime_export,
754 .gem_prime_import = drm_gem_prime_import,
755 .gem_prime_pin = amdgpu_gem_prime_pin,
756 .gem_prime_unpin = amdgpu_gem_prime_unpin,
757 .gem_prime_res_obj = amdgpu_gem_prime_res_obj,
758 .gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table,
759 .gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
760 .gem_prime_vmap = amdgpu_gem_prime_vmap,
761 .gem_prime_vunmap = amdgpu_gem_prime_vunmap,
762
763 .name = DRIVER_NAME,
764 .desc = DRIVER_DESC,
765 .date = DRIVER_DATE,
766 .major = KMS_DRIVER_MAJOR,
767 .minor = KMS_DRIVER_MINOR,
768 .patchlevel = KMS_DRIVER_PATCHLEVEL,
769};
770
771static struct drm_driver *driver;
772static struct pci_driver *pdriver;
773
774static struct pci_driver amdgpu_kms_pci_driver = {
775 .name = DRIVER_NAME,
776 .id_table = pciidlist,
777 .probe = amdgpu_pci_probe,
778 .remove = amdgpu_pci_remove,
61e11306 779 .shutdown = amdgpu_pci_shutdown,
d38ceaf9
AD		 780 .driver.pm = &amdgpu_pm_ops,
781};
782
d573de2d
RZ		 783
784
d38ceaf9
AD		 785static int __init amdgpu_init(void)
786{
245ae5e9
CK		 787 int r;
788
789 r = amdgpu_sync_init();
790 if (r)
791 goto error_sync;
792
793 r = amdgpu_fence_slab_init();
794 if (r)
795 goto error_fence;
796
797 r = amd_sched_fence_slab_init();
798 if (r)
799 goto error_sched;
800
d38ceaf9
AD		 801 if (vgacon_text_force()) {
802 DRM_ERROR("VGACON disables amdgpu kernel modesetting.\n");
803 return -EINVAL;
804 }
d38ceaf9
AD		 805 DRM_INFO("amdgpu kernel modesetting enabled.\n");
806 driver = &kms_driver;
807 pdriver = &amdgpu_kms_pci_driver;
d38ceaf9
AD		 808 driver->num_ioctls = amdgpu_max_kms_ioctl;
809 amdgpu_register_atpx_handler();
d38ceaf9
AD		 810 /* let modprobe override vga console setting */
811 return drm_pci_init(driver, pdriver);
245ae5e9
CK		 812
813error_sched:
814 amdgpu_fence_slab_fini();
815
816error_fence:
817 amdgpu_sync_fini();
818
819error_sync:
820 return r;
d38ceaf9
AD		 821}
822
823static void __exit amdgpu_exit(void)
824{
130e0371 825 amdgpu_amdkfd_fini();
d38ceaf9
AD		 826 drm_pci_exit(driver, pdriver);
827 amdgpu_unregister_atpx_handler();
257bf15a 828 amdgpu_sync_fini();
c24784f0 829 amd_sched_fence_slab_fini();
d573de2d 830 amdgpu_fence_slab_fini();
d38ceaf9
AD		 831}
832
833module_init(amdgpu_init);
834module_exit(amdgpu_exit);
835
836MODULE_AUTHOR(DRIVER_AUTHOR);
837MODULE_DESCRIPTION(DRIVER_DESC);
838MODULE_LICENSE("GPL and additional rights");
Ubuntu Artful kernel mirror