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d38ceaf9 AD |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
15 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
16 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
17 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
18 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
19 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
20 | * | |
21 | * The above copyright notice and this permission notice (including the | |
22 | * next paragraph) shall be included in all copies or substantial portions | |
23 | * of the Software. | |
24 | * | |
25 | */ | |
26 | /* | |
27 | * Authors: | |
28 | * Christian König <christian.koenig@amd.com> | |
29 | */ | |
30 | ||
31 | #include <drm/drmP.h> | |
32 | #include "amdgpu.h" | |
33 | #include "amdgpu_trace.h" | |
34 | ||
35 | /** | |
36 | * amdgpu_sync_create - zero init sync object | |
37 | * | |
38 | * @sync: sync object to initialize | |
39 | * | |
40 | * Just clear the sync object for now. | |
41 | */ | |
42 | void amdgpu_sync_create(struct amdgpu_sync *sync) | |
43 | { | |
44 | unsigned i; | |
45 | ||
46 | for (i = 0; i < AMDGPU_NUM_SYNCS; ++i) | |
47 | sync->semaphores[i] = NULL; | |
48 | ||
49 | for (i = 0; i < AMDGPU_MAX_RINGS; ++i) | |
50 | sync->sync_to[i] = NULL; | |
51 | ||
52 | sync->last_vm_update = NULL; | |
53 | } | |
54 | ||
55 | /** | |
56 | * amdgpu_sync_fence - use the semaphore to sync to a fence | |
57 | * | |
58 | * @sync: sync object to add fence to | |
59 | * @fence: fence to sync to | |
60 | * | |
61 | * Sync to the fence using the semaphore objects | |
62 | */ | |
63 | void amdgpu_sync_fence(struct amdgpu_sync *sync, | |
64 | struct amdgpu_fence *fence) | |
65 | { | |
66 | struct amdgpu_fence *other; | |
67 | ||
68 | if (!fence) | |
69 | return; | |
70 | ||
71 | other = sync->sync_to[fence->ring->idx]; | |
72 | sync->sync_to[fence->ring->idx] = amdgpu_fence_ref( | |
73 | amdgpu_fence_later(fence, other)); | |
74 | amdgpu_fence_unref(&other); | |
75 | ||
76 | if (fence->owner == AMDGPU_FENCE_OWNER_VM) { | |
77 | other = sync->last_vm_update; | |
78 | sync->last_vm_update = amdgpu_fence_ref( | |
79 | amdgpu_fence_later(fence, other)); | |
80 | amdgpu_fence_unref(&other); | |
81 | } | |
82 | } | |
83 | ||
84 | /** | |
85 | * amdgpu_sync_resv - use the semaphores to sync to a reservation object | |
86 | * | |
87 | * @sync: sync object to add fences from reservation object to | |
88 | * @resv: reservation object with embedded fence | |
89 | * @shared: true if we should only sync to the exclusive fence | |
90 | * | |
91 | * Sync to the fence using the semaphore objects | |
92 | */ | |
93 | int amdgpu_sync_resv(struct amdgpu_device *adev, | |
94 | struct amdgpu_sync *sync, | |
95 | struct reservation_object *resv, | |
96 | void *owner) | |
97 | { | |
98 | struct reservation_object_list *flist; | |
99 | struct fence *f; | |
100 | struct amdgpu_fence *fence; | |
101 | unsigned i; | |
102 | int r = 0; | |
103 | ||
4b095304 JZ |
104 | if (resv == NULL) |
105 | return -EINVAL; | |
106 | ||
d38ceaf9 AD |
107 | /* always sync to the exclusive fence */ |
108 | f = reservation_object_get_excl(resv); | |
109 | fence = f ? to_amdgpu_fence(f) : NULL; | |
110 | if (fence && fence->ring->adev == adev) | |
111 | amdgpu_sync_fence(sync, fence); | |
112 | else if (f) | |
113 | r = fence_wait(f, true); | |
114 | ||
115 | flist = reservation_object_get_list(resv); | |
116 | if (!flist || r) | |
117 | return r; | |
118 | ||
119 | for (i = 0; i < flist->shared_count; ++i) { | |
120 | f = rcu_dereference_protected(flist->shared[i], | |
121 | reservation_object_held(resv)); | |
4b095304 | 122 | fence = f ? to_amdgpu_fence(f) : NULL; |
d38ceaf9 AD |
123 | if (fence && fence->ring->adev == adev) { |
124 | if (fence->owner != owner || | |
125 | fence->owner == AMDGPU_FENCE_OWNER_UNDEFINED) | |
126 | amdgpu_sync_fence(sync, fence); | |
4b095304 | 127 | } else if (f) { |
d38ceaf9 AD |
128 | r = fence_wait(f, true); |
129 | if (r) | |
130 | break; | |
131 | } | |
132 | } | |
133 | return r; | |
134 | } | |
135 | ||
136 | /** | |
137 | * amdgpu_sync_rings - sync ring to all registered fences | |
138 | * | |
139 | * @sync: sync object to use | |
140 | * @ring: ring that needs sync | |
141 | * | |
142 | * Ensure that all registered fences are signaled before letting | |
143 | * the ring continue. The caller must hold the ring lock. | |
144 | */ | |
145 | int amdgpu_sync_rings(struct amdgpu_sync *sync, | |
146 | struct amdgpu_ring *ring) | |
147 | { | |
148 | struct amdgpu_device *adev = ring->adev; | |
149 | unsigned count = 0; | |
150 | int i, r; | |
151 | ||
152 | for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { | |
153 | struct amdgpu_fence *fence = sync->sync_to[i]; | |
154 | struct amdgpu_semaphore *semaphore; | |
155 | struct amdgpu_ring *other = adev->rings[i]; | |
156 | ||
157 | /* check if we really need to sync */ | |
158 | if (!amdgpu_fence_need_sync(fence, ring)) | |
159 | continue; | |
160 | ||
161 | /* prevent GPU deadlocks */ | |
162 | if (!other->ready) { | |
163 | dev_err(adev->dev, "Syncing to a disabled ring!"); | |
164 | return -EINVAL; | |
165 | } | |
166 | ||
167 | if (count >= AMDGPU_NUM_SYNCS) { | |
168 | /* not enough room, wait manually */ | |
169 | r = amdgpu_fence_wait(fence, false); | |
170 | if (r) | |
171 | return r; | |
172 | continue; | |
173 | } | |
174 | r = amdgpu_semaphore_create(adev, &semaphore); | |
175 | if (r) | |
176 | return r; | |
177 | ||
178 | sync->semaphores[count++] = semaphore; | |
179 | ||
180 | /* allocate enough space for sync command */ | |
181 | r = amdgpu_ring_alloc(other, 16); | |
182 | if (r) | |
183 | return r; | |
184 | ||
185 | /* emit the signal semaphore */ | |
186 | if (!amdgpu_semaphore_emit_signal(other, semaphore)) { | |
187 | /* signaling wasn't successful wait manually */ | |
188 | amdgpu_ring_undo(other); | |
189 | r = amdgpu_fence_wait(fence, false); | |
190 | if (r) | |
191 | return r; | |
192 | continue; | |
193 | } | |
194 | ||
195 | /* we assume caller has already allocated space on waiters ring */ | |
196 | if (!amdgpu_semaphore_emit_wait(ring, semaphore)) { | |
197 | /* waiting wasn't successful wait manually */ | |
198 | amdgpu_ring_undo(other); | |
199 | r = amdgpu_fence_wait(fence, false); | |
200 | if (r) | |
201 | return r; | |
202 | continue; | |
203 | } | |
204 | ||
205 | amdgpu_ring_commit(other); | |
206 | amdgpu_fence_note_sync(fence, ring); | |
207 | } | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | /** | |
213 | * amdgpu_sync_free - free the sync object | |
214 | * | |
215 | * @adev: amdgpu_device pointer | |
216 | * @sync: sync object to use | |
217 | * @fence: fence to use for the free | |
218 | * | |
219 | * Free the sync object by freeing all semaphores in it. | |
220 | */ | |
221 | void amdgpu_sync_free(struct amdgpu_device *adev, | |
222 | struct amdgpu_sync *sync, | |
223 | struct amdgpu_fence *fence) | |
224 | { | |
225 | unsigned i; | |
226 | ||
227 | for (i = 0; i < AMDGPU_NUM_SYNCS; ++i) | |
228 | amdgpu_semaphore_free(adev, &sync->semaphores[i], fence); | |
229 | ||
230 | for (i = 0; i < AMDGPU_MAX_RINGS; ++i) | |
231 | amdgpu_fence_unref(&sync->sync_to[i]); | |
232 | ||
233 | amdgpu_fence_unref(&sync->last_vm_update); | |
234 | } |