[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_trace.h

#if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define _AMDGPU_TRACE_H_

#include <linux/stringify.h>
#include <linux/types.h>
#include <linux/tracepoint.h>

#include <drm/drmP.h>

#undef TRACE_SYSTEM
#define TRACE_SYSTEM amdgpu
#define TRACE_INCLUDE_FILE amdgpu_trace

#define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
	 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)

TRACE_EVENT(amdgpu_ttm_tt_populate,
	    TP_PROTO(struct amdgpu_device *adev, uint64_t dma_address, uint64_t phys_address),
	    TP_ARGS(adev, dma_address, phys_address),
	    TP_STRUCT__entry(
				__field(uint16_t, domain)
				__field(uint8_t, bus)
				__field(uint8_t, slot)
				__field(uint8_t, func)
				__field(uint64_t, dma)
				__field(uint64_t, phys)
			    ),
	    TP_fast_assign(
			   __entry->domain = pci_domain_nr(adev->pdev->bus);
			   __entry->bus = adev->pdev->bus->number;
			   __entry->slot = PCI_SLOT(adev->pdev->devfn);
			   __entry->func = PCI_FUNC(adev->pdev->devfn);
			   __entry->dma = dma_address;
			   __entry->phys = phys_address;
			   ),
	    TP_printk("%04x:%02x:%02x.%x: 0x%llx => 0x%llx",
		      (unsigned)__entry->domain,
		      (unsigned)__entry->bus,
		      (unsigned)__entry->slot,
		      (unsigned)__entry->func,
		      (unsigned long long)__entry->dma,
		      (unsigned long long)__entry->phys)
);

TRACE_EVENT(amdgpu_ttm_tt_unpopulate,
	    TP_PROTO(struct amdgpu_device *adev, uint64_t dma_address, uint64_t phys_address),
	    TP_ARGS(adev, dma_address, phys_address),
	    TP_STRUCT__entry(
				__field(uint16_t, domain)
				__field(uint8_t, bus)
				__field(uint8_t, slot)
				__field(uint8_t, func)
				__field(uint64_t, dma)
				__field(uint64_t, phys)
			    ),
	    TP_fast_assign(
			   __entry->domain = pci_domain_nr(adev->pdev->bus);
			   __entry->bus = adev->pdev->bus->number;
			   __entry->slot = PCI_SLOT(adev->pdev->devfn);
			   __entry->func = PCI_FUNC(adev->pdev->devfn);
			   __entry->dma = dma_address;
			   __entry->phys = phys_address;
			   ),
	    TP_printk("%04x:%02x:%02x.%x: 0x%llx => 0x%llx",
		      (unsigned)__entry->domain,
		      (unsigned)__entry->bus,
		      (unsigned)__entry->slot,
		      (unsigned)__entry->func,
		      (unsigned long long)__entry->dma,
		      (unsigned long long)__entry->phys)
);

TRACE_EVENT(amdgpu_mm_rreg,
	    TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
	    TP_ARGS(did, reg, value),
	    TP_STRUCT__entry(
				__field(unsigned, did)
				__field(uint32_t, reg)
				__field(uint32_t, value)
			    ),
	    TP_fast_assign(
			   __entry->did = did;
			   __entry->reg = reg;
			   __entry->value = value;
			   ),
	    TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
		      (unsigned long)__entry->did,
		      (unsigned long)__entry->reg,
		      (unsigned long)__entry->value)
);

TRACE_EVENT(amdgpu_mm_wreg,
	    TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
	    TP_ARGS(did, reg, value),
	    TP_STRUCT__entry(
				__field(unsigned, did)
				__field(uint32_t, reg)
				__field(uint32_t, value)
			    ),
	    TP_fast_assign(
			   __entry->did = did;
			   __entry->reg = reg;
			   __entry->value = value;
			   ),
	    TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
		      (unsigned long)__entry->did,
		      (unsigned long)__entry->reg,
		      (unsigned long)__entry->value)
);

TRACE_EVENT(amdgpu_iv,
	    TP_PROTO(struct amdgpu_iv_entry *iv),
	    TP_ARGS(iv),
	    TP_STRUCT__entry(
			     __field(unsigned, client_id)
			     __field(unsigned, src_id)
			     __field(unsigned, ring_id)
			     __field(unsigned, vm_id)
			     __field(unsigned, vm_id_src)
			     __field(uint64_t, timestamp)
			     __field(unsigned, timestamp_src)
			     __field(unsigned, pas_id)
			     __array(unsigned, src_data, 4)
			    ),
	    TP_fast_assign(
			   __entry->client_id = iv->client_id;
			   __entry->src_id = iv->src_id;
			   __entry->ring_id = iv->ring_id;
			   __entry->vm_id = iv->vm_id;
			   __entry->vm_id_src = iv->vm_id_src;
			   __entry->timestamp = iv->timestamp;
			   __entry->timestamp_src = iv->timestamp_src;
			   __entry->pas_id = iv->pas_id;
			   __entry->src_data[0] = iv->src_data[0];
			   __entry->src_data[1] = iv->src_data[1];
			   __entry->src_data[2] = iv->src_data[2];
			   __entry->src_data[3] = iv->src_data[3];
			   ),
	    TP_printk("client_id:%u src_id:%u ring:%u vm_id:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n",
		      __entry->client_id, __entry->src_id,
		      __entry->ring_id, __entry->vm_id,
		      __entry->timestamp, __entry->pas_id,
		      __entry->src_data[0], __entry->src_data[1],
		      __entry->src_data[2], __entry->src_data[3])
);


TRACE_EVENT(amdgpu_bo_create,
	    TP_PROTO(struct amdgpu_bo *bo),
	    TP_ARGS(bo),
	    TP_STRUCT__entry(
			     __field(struct amdgpu_bo *, bo)
			     __field(u32, pages)
			     __field(u32, type)
			     __field(u32, prefer)
			     __field(u32, allow)
			     __field(u32, visible)
			     ),

	    TP_fast_assign(
			   __entry->bo = bo;
			   __entry->pages = bo->tbo.num_pages;
			   __entry->type = bo->tbo.mem.mem_type;
			   __entry->prefer = bo->preferred_domains;
			   __entry->allow = bo->allowed_domains;
			   __entry->visible = bo->flags;
			   ),

	    TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d",
		       __entry->bo, __entry->pages, __entry->type,
		       __entry->prefer, __entry->allow, __entry->visible)
);

TRACE_EVENT(amdgpu_cs,
	    TP_PROTO(struct amdgpu_cs_parser *p, int i),
	    TP_ARGS(p, i),
	    TP_STRUCT__entry(
			     __field(struct amdgpu_bo_list *, bo_list)
			     __field(u32, ring)
			     __field(u32, dw)
			     __field(u32, fences)
			     ),

	    TP_fast_assign(
			   __entry->bo_list = p->bo_list;
			   __entry->ring = p->job->ring->idx;
			   __entry->dw = p->job->ibs[i].length_dw;
			   __entry->fences = amdgpu_fence_count_emitted(
				p->job->ring);
			   ),
	    TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
		      __entry->bo_list, __entry->ring, __entry->dw,
		      __entry->fences)
);

TRACE_EVENT(amdgpu_cs_ioctl,
	    TP_PROTO(struct amdgpu_job *job),
	    TP_ARGS(job),
	    TP_STRUCT__entry(
			     __field(uint64_t, sched_job_id)
			     __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
			     __field(unsigned int, context)
			     __field(unsigned int, seqno)
			     __field(struct dma_fence *, fence)
			     __field(char *, ring_name)
			     __field(u32, num_ibs)
			     ),

	    TP_fast_assign(
			   __entry->sched_job_id = job->base.id;
			   __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
			   __entry->context = job->base.s_fence->finished.context;
			   __entry->seqno = job->base.s_fence->finished.seqno;
			   __entry->ring_name = job->ring->name;
			   __entry->num_ibs = job->num_ibs;
			   ),
	    TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
		      __entry->sched_job_id, __get_str(timeline), __entry->context,
		      __entry->seqno, __entry->ring_name, __entry->num_ibs)
);

TRACE_EVENT(amdgpu_sched_run_job,
	    TP_PROTO(struct amdgpu_job *job),
	    TP_ARGS(job),
	    TP_STRUCT__entry(
			     __field(uint64_t, sched_job_id)
			     __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
			     __field(unsigned int, context)
			     __field(unsigned int, seqno)
			     __field(char *, ring_name)
			     __field(u32, num_ibs)
			     ),

	    TP_fast_assign(
			   __entry->sched_job_id = job->base.id;
			   __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
			   __entry->context = job->base.s_fence->finished.context;
			   __entry->seqno = job->base.s_fence->finished.seqno;
			   __entry->ring_name = job->ring->name;
			   __entry->num_ibs = job->num_ibs;
			   ),
	    TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
		      __entry->sched_job_id, __get_str(timeline), __entry->context,
		      __entry->seqno, __entry->ring_name, __entry->num_ibs)
);


TRACE_EVENT(amdgpu_vm_grab_id,
	    TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
		     struct amdgpu_job *job),
	    TP_ARGS(vm, ring, job),
	    TP_STRUCT__entry(
			     __field(struct amdgpu_vm *, vm)
			     __field(u32, ring)
			     __field(u32, vm_id)
			     __field(u32, vm_hub)
			     __field(u64, pd_addr)
			     __field(u32, needs_flush)
			     ),

	    TP_fast_assign(
			   __entry->vm = vm;
			   __entry->ring = ring->idx;
			   __entry->vm_id = job->vm_id;
			   __entry->vm_hub = ring->funcs->vmhub,
			   __entry->pd_addr = job->vm_pd_addr;
			   __entry->needs_flush = job->vm_needs_flush;
			   ),
	    TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
		      __entry->vm, __entry->ring, __entry->vm_id,
		      __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
);

TRACE_EVENT(amdgpu_vm_bo_map,
	    TP_PROTO(struct amdgpu_bo_va *bo_va,
		     struct amdgpu_bo_va_mapping *mapping),
	    TP_ARGS(bo_va, mapping),
	    TP_STRUCT__entry(
			     __field(struct amdgpu_bo *, bo)
			     __field(long, start)
			     __field(long, last)
			     __field(u64, offset)
			     __field(u64, flags)
			     ),

	    TP_fast_assign(
			   __entry->bo = bo_va ? bo_va->bo : NULL;
			   __entry->start = mapping->start;
			   __entry->last = mapping->last;
			   __entry->offset = mapping->offset;
			   __entry->flags = mapping->flags;
			   ),
	    TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
		      __entry->bo, __entry->start, __entry->last,
		      __entry->offset, __entry->flags)
);

TRACE_EVENT(amdgpu_vm_bo_unmap,
	    TP_PROTO(struct amdgpu_bo_va *bo_va,
		     struct amdgpu_bo_va_mapping *mapping),
	    TP_ARGS(bo_va, mapping),
	    TP_STRUCT__entry(
			     __field(struct amdgpu_bo *, bo)
			     __field(long, start)
			     __field(long, last)
			     __field(u64, offset)
			     __field(u64, flags)
			     ),

	    TP_fast_assign(
			   __entry->bo = bo_va->bo;
			   __entry->start = mapping->start;
			   __entry->last = mapping->last;
			   __entry->offset = mapping->offset;
			   __entry->flags = mapping->flags;
			   ),
	    TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
		      __entry->bo, __entry->start, __entry->last,
		      __entry->offset, __entry->flags)
);

DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
	    TP_ARGS(mapping),
	    TP_STRUCT__entry(
			     __field(u64, soffset)
			     __field(u64, eoffset)
			     __field(u64, flags)
			     ),

	    TP_fast_assign(
			   __entry->soffset = mapping->start;
			   __entry->eoffset = mapping->last + 1;
			   __entry->flags = mapping->flags;
			   ),
	    TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx",
		      __entry->soffset, __entry->eoffset, __entry->flags)
);

DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
	    TP_ARGS(mapping)
);

DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
	    TP_ARGS(mapping)
);

TRACE_EVENT(amdgpu_vm_set_ptes,
	    TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
		     uint32_t incr, uint64_t flags),
	    TP_ARGS(pe, addr, count, incr, flags),
	    TP_STRUCT__entry(
			     __field(u64, pe)
			     __field(u64, addr)
			     __field(u32, count)
			     __field(u32, incr)
			     __field(u64, flags)
			     ),

	    TP_fast_assign(
			   __entry->pe = pe;
			   __entry->addr = addr;
			   __entry->count = count;
			   __entry->incr = incr;
			   __entry->flags = flags;
			   ),
	    TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u",
		      __entry->pe, __entry->addr, __entry->incr,
		      __entry->flags, __entry->count)
);

TRACE_EVENT(amdgpu_vm_copy_ptes,
	    TP_PROTO(uint64_t pe, uint64_t src, unsigned count),
	    TP_ARGS(pe, src, count),
	    TP_STRUCT__entry(
			     __field(u64, pe)
			     __field(u64, src)
			     __field(u32, count)
			     ),

	    TP_fast_assign(
			   __entry->pe = pe;
			   __entry->src = src;
			   __entry->count = count;
			   ),
	    TP_printk("pe=%010Lx, src=%010Lx, count=%u",
		      __entry->pe, __entry->src, __entry->count)
);

TRACE_EVENT(amdgpu_vm_flush,
	    TP_PROTO(struct amdgpu_ring *ring, unsigned vm_id,
		     uint64_t pd_addr),
	    TP_ARGS(ring, vm_id, pd_addr),
	    TP_STRUCT__entry(
			     __field(u32, ring)
			     __field(u32, vm_id)
			     __field(u32, vm_hub)
			     __field(u64, pd_addr)
			     ),

	    TP_fast_assign(
			   __entry->ring = ring->idx;
			   __entry->vm_id = vm_id;
			   __entry->vm_hub = ring->funcs->vmhub;
			   __entry->pd_addr = pd_addr;
			   ),
	    TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx",
		      __entry->ring, __entry->vm_id,
		      __entry->vm_hub,__entry->pd_addr)
);

TRACE_EVENT(amdgpu_bo_list_set,
	    TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
	    TP_ARGS(list, bo),
	    TP_STRUCT__entry(
			     __field(struct amdgpu_bo_list *, list)
			     __field(struct amdgpu_bo *, bo)
			     __field(u64, bo_size)
			     ),

	    TP_fast_assign(
			   __entry->list = list;
			   __entry->bo = bo;
			   __entry->bo_size = amdgpu_bo_size(bo);
			   ),
	    TP_printk("list=%p, bo=%p, bo_size=%Ld",
		      __entry->list,
		      __entry->bo,
		      __entry->bo_size)
);

TRACE_EVENT(amdgpu_cs_bo_status,
	    TP_PROTO(uint64_t total_bo, uint64_t total_size),
	    TP_ARGS(total_bo, total_size),
	    TP_STRUCT__entry(
			__field(u64, total_bo)
			__field(u64, total_size)
			),

	    TP_fast_assign(
			__entry->total_bo = total_bo;
			__entry->total_size = total_size;
			),
	    TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
			__entry->total_bo, __entry->total_size)
);

TRACE_EVENT(amdgpu_ttm_bo_move,
	    TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
	    TP_ARGS(bo, new_placement, old_placement),
	    TP_STRUCT__entry(
			__field(struct amdgpu_bo *, bo)
			__field(u64, bo_size)
			__field(u32, new_placement)
			__field(u32, old_placement)
			),

	    TP_fast_assign(
			__entry->bo      = bo;
			__entry->bo_size = amdgpu_bo_size(bo);
			__entry->new_placement = new_placement;
			__entry->old_placement = old_placement;
			),
	    TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
			__entry->bo, __entry->old_placement,
			__entry->new_placement, __entry->bo_size)
);

#undef AMDGPU_JOB_GET_TIMELINE_NAME
#endif

/* This part must be outside protection */
#undef TRACE_INCLUDE_PATH
#define TRACE_INCLUDE_PATH .
#include <trace/define_trace.h>
Commit	Line	Data
d38ceaf9 AD	1	#if !defined(_AMDGPU_TRACE_H) \|\| defined(TRACE_HEADER_MULTI_READ)
	2	#define _AMDGPU_TRACE_H_
	3
	4	#include <linux/stringify.h>
	5	#include <linux/types.h>
	6	#include <linux/tracepoint.h>
	7
	8	#include <drm/drmP.h>
	9
	10	#undef TRACE_SYSTEM
	11	#define TRACE_SYSTEM amdgpu
d38ceaf9 AD	12	#define TRACE_INCLUDE_FILE amdgpu_trace
d38ceaf9 AD	13
c98b5c97 AR	14	#define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
	15	job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
	16
aca81718 TSD	17	TRACE_EVENT(amdgpu_ttm_tt_populate,
	18	TP_PROTO(struct amdgpu_device *adev, uint64_t dma_address, uint64_t phys_address),
	19	TP_ARGS(adev, dma_address, phys_address),
	20	TP_STRUCT__entry(
	21	__field(uint16_t, domain)
	22	__field(uint8_t, bus)
	23	__field(uint8_t, slot)
	24	__field(uint8_t, func)
	25	__field(uint64_t, dma)
	26	__field(uint64_t, phys)
	27	),
	28	TP_fast_assign(
	29	__entry->domain = pci_domain_nr(adev->pdev->bus);
	30	__entry->bus = adev->pdev->bus->number;
	31	__entry->slot = PCI_SLOT(adev->pdev->devfn);
	32	__entry->func = PCI_FUNC(adev->pdev->devfn);
	33	__entry->dma = dma_address;
	34	__entry->phys = phys_address;
	35	),
	36	TP_printk("%04x:%02x:%02x.%x: 0x%llx => 0x%llx",
	37	(unsigned)__entry->domain,
	38	(unsigned)__entry->bus,
	39	(unsigned)__entry->slot,
	40	(unsigned)__entry->func,
	41	(unsigned long long)__entry->dma,
	42	(unsigned long long)__entry->phys)
	43	);
	44
	45	TRACE_EVENT(amdgpu_ttm_tt_unpopulate,
	46	TP_PROTO(struct amdgpu_device *adev, uint64_t dma_address, uint64_t phys_address),
	47	TP_ARGS(adev, dma_address, phys_address),
	48	TP_STRUCT__entry(
	49	__field(uint16_t, domain)
	50	__field(uint8_t, bus)
	51	__field(uint8_t, slot)
	52	__field(uint8_t, func)
	53	__field(uint64_t, dma)
	54	__field(uint64_t, phys)
	55	),
	56	TP_fast_assign(
	57	__entry->domain = pci_domain_nr(adev->pdev->bus);
	58	__entry->bus = adev->pdev->bus->number;
	59	__entry->slot = PCI_SLOT(adev->pdev->devfn);
	60	__entry->func = PCI_FUNC(adev->pdev->devfn);
	61	__entry->dma = dma_address;
	62	__entry->phys = phys_address;
	63	),
	64	TP_printk("%04x:%02x:%02x.%x: 0x%llx => 0x%llx",
	65	(unsigned)__entry->domain,
	66	(unsigned)__entry->bus,
	67	(unsigned)__entry->slot,
	68	(unsigned)__entry->func,
	69	(unsigned long long)__entry->dma,
	70	(unsigned long long)__entry->phys)
	71	);
	72
f4b373f4 TSD	73	TRACE_EVENT(amdgpu_mm_rreg,
	74	TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
	75	TP_ARGS(did, reg, value),
	76	TP_STRUCT__entry(
	77	__field(unsigned, did)
	78	__field(uint32_t, reg)
	79	__field(uint32_t, value)
	80	),
	81	TP_fast_assign(
	82	__entry->did = did;
	83	__entry->reg = reg;
	84	__entry->value = value;
	85	),
e11666eb	86	TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
f4b373f4 TSD	87	(unsigned long)__entry->did,
	88	(unsigned long)__entry->reg,
	89	(unsigned long)__entry->value)
	90	);
	91
	92	TRACE_EVENT(amdgpu_mm_wreg,
	93	TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
	94	TP_ARGS(did, reg, value),
	95	TP_STRUCT__entry(
	96	__field(unsigned, did)
	97	__field(uint32_t, reg)
	98	__field(uint32_t, value)
	99	),
	100	TP_fast_assign(
	101	__entry->did = did;
	102	__entry->reg = reg;
	103	__entry->value = value;
	104	),
e11666eb	105	TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
f4b373f4 TSD	106	(unsigned long)__entry->did,
	107	(unsigned long)__entry->reg,
	108	(unsigned long)__entry->value)
	109	);
	110
cef105f7 CK	111	TRACE_EVENT(amdgpu_iv,
	112	TP_PROTO(struct amdgpu_iv_entry *iv),
	113	TP_ARGS(iv),
	114	TP_STRUCT__entry(
	115	__field(unsigned, client_id)
	116	__field(unsigned, src_id)
	117	__field(unsigned, ring_id)
	118	__field(unsigned, vm_id)
	119	__field(unsigned, vm_id_src)
	120	__field(uint64_t, timestamp)
	121	__field(unsigned, timestamp_src)
	122	__field(unsigned, pas_id)
	123	__array(unsigned, src_data, 4)
	124	),
	125	TP_fast_assign(
	126	__entry->client_id = iv->client_id;
	127	__entry->src_id = iv->src_id;
	128	__entry->ring_id = iv->ring_id;
	129	__entry->vm_id = iv->vm_id;
	130	__entry->vm_id_src = iv->vm_id_src;
	131	__entry->timestamp = iv->timestamp;
	132	__entry->timestamp_src = iv->timestamp_src;
	133	__entry->pas_id = iv->pas_id;
	134	__entry->src_data[0] = iv->src_data[0];
	135	__entry->src_data[1] = iv->src_data[1];
	136	__entry->src_data[2] = iv->src_data[2];
	137	__entry->src_data[3] = iv->src_data[3];
	138	),
	139	TP_printk("client_id:%u src_id:%u ring:%u vm_id:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n",
	140	__entry->client_id, __entry->src_id,
	141	__entry->ring_id, __entry->vm_id,
	142	__entry->timestamp, __entry->pas_id,
	143	__entry->src_data[0], __entry->src_data[1],
	144	__entry->src_data[2], __entry->src_data[3])
	145	);
	146
	147
d38ceaf9 AD	148	TRACE_EVENT(amdgpu_bo_create,
	149	TP_PROTO(struct amdgpu_bo *bo),
	150	TP_ARGS(bo),
	151	TP_STRUCT__entry(
	152	__field(struct amdgpu_bo *, bo)
	153	__field(u32, pages)
42ffb582 DM	154	__field(u32, type)
	155	__field(u32, prefer)
	156	__field(u32, allow)
	157	__field(u32, visible)
d38ceaf9 AD	158	),
	159
	160	TP_fast_assign(
	161	__entry->bo = bo;
	162	__entry->pages = bo->tbo.num_pages;
42ffb582	163	__entry->type = bo->tbo.mem.mem_type;
6d7d9c5a	164	__entry->prefer = bo->preferred_domains;
42ffb582 DM	165	__entry->allow = bo->allowed_domains;
42ffb582 DM	166	__entry->visible = bo->flags;
d38ceaf9	167	),
42ffb582	168
6d7d9c5a	169	TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d",
42ffb582 DM	170	__entry->bo, __entry->pages, __entry->type,
42ffb582 DM	171	__entry->prefer, __entry->allow, __entry->visible)
d38ceaf9 AD	172	);
	173
	174	TRACE_EVENT(amdgpu_cs,
	175	TP_PROTO(struct amdgpu_cs_parser *p, int i),
	176	TP_ARGS(p, i),
	177	TP_STRUCT__entry(
e30590e6	178	__field(struct amdgpu_bo_list *, bo_list)
d38ceaf9 AD	179	__field(u32, ring)
	180	__field(u32, dw)
	181	__field(u32, fences)
	182	),
	183
	184	TP_fast_assign(
e30590e6	185	__entry->bo_list = p->bo_list;
b07c60c0	186	__entry->ring = p->job->ring->idx;
50838c8c	187	__entry->dw = p->job->ibs[i].length_dw;
d38ceaf9	188	__entry->fences = amdgpu_fence_count_emitted(
b07c60c0	189	p->job->ring);
d38ceaf9	190	),
e30590e6 CK	191	TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
e30590e6 CK	192	__entry->bo_list, __entry->ring, __entry->dw,
d38ceaf9 AD	193	__entry->fences)
	194	);
	195
7034decf CZ	196	TRACE_EVENT(amdgpu_cs_ioctl,
	197	TP_PROTO(struct amdgpu_job *job),
	198	TP_ARGS(job),
	199	TP_STRUCT__entry(
f6fd2030	200	__field(uint64_t, sched_job_id)
c98b5c97	201	__string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
ced2ef66 AR	202	__field(unsigned int, context)
ced2ef66 AR	203	__field(unsigned int, seqno)
f54d1867	204	__field(struct dma_fence *, fence)
7034decf CZ	205	__field(char *, ring_name)
	206	__field(u32, num_ibs)
	207	),
	208
	209	TP_fast_assign(
f6fd2030	210	__entry->sched_job_id = job->base.id;
c98b5c97	211	__assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
ced2ef66 AR	212	__entry->context = job->base.s_fence->finished.context;
ced2ef66 AR	213	__entry->seqno = job->base.s_fence->finished.seqno;
b07c60c0	214	__entry->ring_name = job->ring->name;
7034decf CZ	215	__entry->num_ibs = job->num_ibs;
7034decf CZ	216	),
ced2ef66 AR	217	TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
	218	__entry->sched_job_id, __get_str(timeline), __entry->context,
	219	__entry->seqno, __entry->ring_name, __entry->num_ibs)
7034decf CZ	220	);
	221
	222	TRACE_EVENT(amdgpu_sched_run_job,
	223	TP_PROTO(struct amdgpu_job *job),
	224	TP_ARGS(job),
	225	TP_STRUCT__entry(
f6fd2030	226	__field(uint64_t, sched_job_id)
c98b5c97	227	__string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
82c6bd46 AR	228	__field(unsigned int, context)
82c6bd46 AR	229	__field(unsigned int, seqno)
7034decf CZ	230	__field(char *, ring_name)
	231	__field(u32, num_ibs)
	232	),
	233
	234	TP_fast_assign(
f6fd2030	235	__entry->sched_job_id = job->base.id;
c98b5c97	236	__assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
82c6bd46 AR	237	__entry->context = job->base.s_fence->finished.context;
82c6bd46 AR	238	__entry->seqno = job->base.s_fence->finished.seqno;
b07c60c0	239	__entry->ring_name = job->ring->name;
7034decf CZ	240	__entry->num_ibs = job->num_ibs;
7034decf CZ	241	),
2359419f AR	242	TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
	243	__entry->sched_job_id, __get_str(timeline), __entry->context,
	244	__entry->seqno, __entry->ring_name, __entry->num_ibs)
7034decf CZ	245	);
	246
	247
d38ceaf9	248	TRACE_EVENT(amdgpu_vm_grab_id,
c5296d14 CK	249	TP_PROTO(struct amdgpu_vm vm, struct amdgpu_ring ring,
c5296d14 CK	250	struct amdgpu_job *job),
0c0fdf14	251	TP_ARGS(vm, ring, job),
d38ceaf9	252	TP_STRUCT__entry(
165e4e07	253	__field(struct amdgpu_vm *, vm)
d38ceaf9	254	__field(u32, ring)
c5296d14 CK	255	__field(u32, vm_id)
c5296d14 CK	256	__field(u32, vm_hub)
22073fe7	257	__field(u64, pd_addr)
0c0fdf14	258	__field(u32, needs_flush)
d38ceaf9 AD	259	),
	260
	261	TP_fast_assign(
165e4e07	262	__entry->vm = vm;
c5296d14 CK	263	__entry->ring = ring->idx;
	264	__entry->vm_id = job->vm_id;
	265	__entry->vm_hub = ring->funcs->vmhub,
0c0fdf14 CK	266	__entry->pd_addr = job->vm_pd_addr;
0c0fdf14 CK	267	__entry->needs_flush = job->vm_needs_flush;
d38ceaf9	268	),
c5296d14 CK	269	TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
	270	__entry->vm, __entry->ring, __entry->vm_id,
	271	__entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
d38ceaf9 AD	272	);
d38ceaf9 AD	273
93e3e438 CK	274	TRACE_EVENT(amdgpu_vm_bo_map,
	275	TP_PROTO(struct amdgpu_bo_va *bo_va,
	276	struct amdgpu_bo_va_mapping *mapping),
	277	TP_ARGS(bo_va, mapping),
	278	TP_STRUCT__entry(
	279	__field(struct amdgpu_bo *, bo)
	280	__field(long, start)
	281	__field(long, last)
	282	__field(u64, offset)
663ebbf6	283	__field(u64, flags)
93e3e438 CK	284	),
	285
	286	TP_fast_assign(
dc54d3d1	287	__entry->bo = bo_va ? bo_va->bo : NULL;
a9f87f64 CK	288	__entry->start = mapping->start;
a9f87f64 CK	289	__entry->last = mapping->last;
93e3e438 CK	290	__entry->offset = mapping->offset;
	291	__entry->flags = mapping->flags;
	292	),
663ebbf6	293	TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
93e3e438 CK	294	__entry->bo, __entry->start, __entry->last,
	295	__entry->offset, __entry->flags)
	296	);
	297
	298	TRACE_EVENT(amdgpu_vm_bo_unmap,
	299	TP_PROTO(struct amdgpu_bo_va *bo_va,
	300	struct amdgpu_bo_va_mapping *mapping),
	301	TP_ARGS(bo_va, mapping),
	302	TP_STRUCT__entry(
	303	__field(struct amdgpu_bo *, bo)
	304	__field(long, start)
	305	__field(long, last)
	306	__field(u64, offset)
663ebbf6	307	__field(u64, flags)
93e3e438 CK	308	),
	309
	310	TP_fast_assign(
	311	__entry->bo = bo_va->bo;
a9f87f64 CK	312	__entry->start = mapping->start;
a9f87f64 CK	313	__entry->last = mapping->last;
93e3e438 CK	314	__entry->offset = mapping->offset;
	315	__entry->flags = mapping->flags;
	316	),
663ebbf6	317	TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
93e3e438 CK	318	__entry->bo, __entry->start, __entry->last,
	319	__entry->offset, __entry->flags)
	320	);
	321
d6c10f6b	322	DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
d38ceaf9 AD	323	TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
	324	TP_ARGS(mapping),
	325	TP_STRUCT__entry(
	326	__field(u64, soffset)
	327	__field(u64, eoffset)
663ebbf6	328	__field(u64, flags)
d38ceaf9 AD	329	),
	330
	331	TP_fast_assign(
a9f87f64 CK	332	__entry->soffset = mapping->start;
a9f87f64 CK	333	__entry->eoffset = mapping->last + 1;
d38ceaf9 AD	334	__entry->flags = mapping->flags;
d38ceaf9 AD	335	),
663ebbf6	336	TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx",
d38ceaf9 AD	337	__entry->soffset, __entry->eoffset, __entry->flags)
	338	);
	339
d6c10f6b CK	340	DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
	341	TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
	342	TP_ARGS(mapping)
	343	);
	344
	345	DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
	346	TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
	347	TP_ARGS(mapping)
	348	);
	349
ec2f05f0	350	TRACE_EVENT(amdgpu_vm_set_ptes,
d38ceaf9	351	TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
663ebbf6	352	uint32_t incr, uint64_t flags),
d38ceaf9 AD	353	TP_ARGS(pe, addr, count, incr, flags),
	354	TP_STRUCT__entry(
	355	__field(u64, pe)
	356	__field(u64, addr)
	357	__field(u32, count)
	358	__field(u32, incr)
663ebbf6	359	__field(u64, flags)
d38ceaf9 AD	360	),
	361
	362	TP_fast_assign(
	363	__entry->pe = pe;
	364	__entry->addr = addr;
	365	__entry->count = count;
	366	__entry->incr = incr;
	367	__entry->flags = flags;
	368	),
663ebbf6	369	TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u",
d38ceaf9 AD	370	__entry->pe, __entry->addr, __entry->incr,
	371	__entry->flags, __entry->count)
	372	);
	373
ec2f05f0 CK	374	TRACE_EVENT(amdgpu_vm_copy_ptes,
	375	TP_PROTO(uint64_t pe, uint64_t src, unsigned count),
	376	TP_ARGS(pe, src, count),
	377	TP_STRUCT__entry(
	378	__field(u64, pe)
	379	__field(u64, src)
	380	__field(u32, count)
	381	),
	382
	383	TP_fast_assign(
	384	__entry->pe = pe;
	385	__entry->src = src;
	386	__entry->count = count;
	387	),
	388	TP_printk("pe=%010Lx, src=%010Lx, count=%u",
	389	__entry->pe, __entry->src, __entry->count)
	390	);
	391
d38ceaf9	392	TRACE_EVENT(amdgpu_vm_flush,
5f1bcf51 CK	393	TP_PROTO(struct amdgpu_ring *ring, unsigned vm_id,
	394	uint64_t pd_addr),
	395	TP_ARGS(ring, vm_id, pd_addr),
d38ceaf9	396	TP_STRUCT__entry(
d38ceaf9	397	__field(u32, ring)
5f1bcf51 CK	398	__field(u32, vm_id)
	399	__field(u32, vm_hub)
	400	__field(u64, pd_addr)
d38ceaf9 AD	401	),
	402
	403	TP_fast_assign(
5f1bcf51 CK	404	__entry->ring = ring->idx;
	405	__entry->vm_id = vm_id;
	406	__entry->vm_hub = ring->funcs->vmhub;
d38ceaf9	407	__entry->pd_addr = pd_addr;
d38ceaf9	408	),
5f1bcf51 CK	409	TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx",
	410	__entry->ring, __entry->vm_id,
	411	__entry->vm_hub,__entry->pd_addr)
d38ceaf9 AD	412	);
d38ceaf9 AD	413
ec74407a CK	414	TRACE_EVENT(amdgpu_bo_list_set,
	415	TP_PROTO(struct amdgpu_bo_list list, struct amdgpu_bo bo),
	416	TP_ARGS(list, bo),
	417	TP_STRUCT__entry(
	418	__field(struct amdgpu_bo_list *, list)
	419	__field(struct amdgpu_bo *, bo)
42ffb582	420	__field(u64, bo_size)
ec74407a CK	421	),
	422
	423	TP_fast_assign(
	424	__entry->list = list;
	425	__entry->bo = bo;
42ffb582	426	__entry->bo_size = amdgpu_bo_size(bo);
ec74407a	427	),
373eadfa	428	TP_printk("list=%p, bo=%p, bo_size=%Ld",
42ffb582 DM	429	__entry->list,
	430	__entry->bo,
	431	__entry->bo_size)
ec74407a CK	432	);
ec74407a CK	433
15da301d DM	434	TRACE_EVENT(amdgpu_cs_bo_status,
	435	TP_PROTO(uint64_t total_bo, uint64_t total_size),
	436	TP_ARGS(total_bo, total_size),
	437	TP_STRUCT__entry(
	438	__field(u64, total_bo)
	439	__field(u64, total_size)
	440	),
	441
	442	TP_fast_assign(
	443	__entry->total_bo = total_bo;
	444	__entry->total_size = total_size;
	445	),
373eadfa	446	TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
15da301d DM	447	__entry->total_bo, __entry->total_size)
	448	);
	449
	450	TRACE_EVENT(amdgpu_ttm_bo_move,
	451	TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
	452	TP_ARGS(bo, new_placement, old_placement),
	453	TP_STRUCT__entry(
	454	__field(struct amdgpu_bo *, bo)
	455	__field(u64, bo_size)
	456	__field(u32, new_placement)
	457	__field(u32, old_placement)
	458	),
	459
	460	TP_fast_assign(
	461	__entry->bo = bo;
	462	__entry->bo_size = amdgpu_bo_size(bo);
	463	__entry->new_placement = new_placement;
	464	__entry->old_placement = old_placement;
	465	),
f8d56901	466	TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
15da301d DM	467	__entry->bo, __entry->old_placement,
	468	__entry->new_placement, __entry->bo_size)
	469	);
	470
c98b5c97	471	#undef AMDGPU_JOB_GET_TIMELINE_NAME
d38ceaf9 AD	472	#endif
	473
	474	/* This part must be outside protection */
	475	#undef TRACE_INCLUDE_PATH
	476	#define TRACE_INCLUDE_PATH .
	477	#include <trace/define_trace.h>