]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
projects / mirror_ubuntu-eoan-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
drm/amdkfd: Update queue_count before mapping queues
[mirror_ubuntu-eoan-kernel.git] / drivers / gpu / drm / amd / amdkfd / kfd_device_queue_manager.c
CommitLineData
64c7f8cf
BG		 1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#include <linux/slab.h>
25#include <linux/list.h>
26#include <linux/types.h>
27#include <linux/printk.h>
28#include <linux/bitops.h>
99331a51 29#include <linux/sched.h>
64c7f8cf
BG		 30#include "kfd_priv.h"
31#include "kfd_device_queue_manager.h"
32#include "kfd_mqd_manager.h"
33#include "cik_regs.h"
34#include "kfd_kernel_queue.h"
64c7f8cf
BG		 35
36/* Size of the per-pipe EOP queue */
37#define CIK_HPD_EOP_BYTES_LOG2 11
38#define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2)
39
64c7f8cf
BG		 40static int set_pasid_vmid_mapping(struct device_queue_manager *dqm,
41 unsigned int pasid, unsigned int vmid);
42
43static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
44 struct queue *q,
45 struct qcm_process_device *qpd);
bcea3081 46
c4744e24
YZ		 47static int execute_queues_cpsch(struct device_queue_manager *dqm,
48 enum kfd_unmap_queues_filter filter,
49 uint32_t filter_param);
7da2bcf8 50static int unmap_queues_cpsch(struct device_queue_manager *dqm,
4465f466
YZ		 51 enum kfd_unmap_queues_filter filter,
52 uint32_t filter_param);
64c7f8cf 53
60a00956
FK		 54static int map_queues_cpsch(struct device_queue_manager *dqm);
55
bcea3081
BG		 56static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
57 struct queue *q,
58 struct qcm_process_device *qpd);
59
60static void deallocate_sdma_queue(struct device_queue_manager *dqm,
61 unsigned int sdma_queue_id);
64c7f8cf 62
bcea3081
BG		 63static inline
64enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
64c7f8cf 65{
bcea3081 66 if (type == KFD_QUEUE_TYPE_SDMA)
85d258f9
BG		 67 return KFD_MQD_TYPE_SDMA;
68 return KFD_MQD_TYPE_CP;
64c7f8cf
BG		 69}
70
d0b63bb3
AR		 71static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)
72{
73 int i;
74 int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec
75 + pipe * dqm->dev->shared_resources.num_queue_per_pipe;
76
77 /* queue is available for KFD usage if bit is 1 */
78 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i)
79 if (test_bit(pipe_offset + i,
80 dqm->dev->shared_resources.queue_bitmap))
81 return true;
82 return false;
83}
84
d0b63bb3 85unsigned int get_queues_num(struct device_queue_manager *dqm)
64ea8f4a 86{
d0b63bb3
AR		 87 return bitmap_weight(dqm->dev->shared_resources.queue_bitmap,
88 KGD_MAX_QUEUES);
64ea8f4a
OG		 89}
90
d0b63bb3 91unsigned int get_queues_per_pipe(struct device_queue_manager *dqm)
64c7f8cf 92{
d0b63bb3
AR		 93 return dqm->dev->shared_resources.num_queue_per_pipe;
94}
95
96unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
97{
d0b63bb3 98 return dqm->dev->shared_resources.num_pipe_per_mec;
64c7f8cf
BG		 99}
100
a22fc854 101void program_sh_mem_settings(struct device_queue_manager *dqm,
64c7f8cf
BG		 102 struct qcm_process_device *qpd)
103{
cea405b1
XZ		 104 return dqm->dev->kfd2kgd->program_sh_mem_settings(
105 dqm->dev->kgd, qpd->vmid,
64c7f8cf
BG		 106 qpd->sh_mem_config,
107 qpd->sh_mem_ape1_base,
108 qpd->sh_mem_ape1_limit,
109 qpd->sh_mem_bases);
110}
111
112static int allocate_vmid(struct device_queue_manager *dqm,
113 struct qcm_process_device *qpd,
114 struct queue *q)
115{
116 int bit, allocated_vmid;
117
118 if (dqm->vmid_bitmap == 0)
119 return -ENOMEM;
120
44008d7a
YZ		 121 bit = find_first_bit((unsigned long *)&dqm->vmid_bitmap,
122 dqm->dev->vm_info.vmid_num_kfd);
64c7f8cf
BG		 123 clear_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
124
44008d7a 125 allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd;
79775b62 126 pr_debug("vmid allocation %d\n", allocated_vmid);
64c7f8cf
BG		 127 qpd->vmid = allocated_vmid;
128 q->properties.vmid = allocated_vmid;
129
130 set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid);
131 program_sh_mem_settings(dqm, qpd);
132
133 return 0;
134}
135
136static void deallocate_vmid(struct device_queue_manager *dqm,
137 struct qcm_process_device *qpd,
138 struct queue *q)
139{
44008d7a 140 int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd;
64c7f8cf 141
2030664b
BG		 142 /* Release the vmid mapping */
143 set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
144
64c7f8cf
BG		 145 set_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
146 qpd->vmid = 0;
147 q->properties.vmid = 0;
148}
149
150static int create_queue_nocpsch(struct device_queue_manager *dqm,
151 struct queue *q,
152 struct qcm_process_device *qpd,
153 int *allocated_vmid)
154{
155 int retval;
156
64c7f8cf
BG		 157 print_queue(q);
158
159 mutex_lock(&dqm->lock);
160
b8cbab04 161 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
79775b62 162 pr_warn("Can't create new usermode queue because %d queues were already created\n",
b8cbab04 163 dqm->total_queue_count);
ab7c1648
KR		 164 retval = -EPERM;
165 goto out_unlock;
b8cbab04
OG		 166 }
167
64c7f8cf
BG		 168 if (list_empty(&qpd->queues_list)) {
169 retval = allocate_vmid(dqm, qpd, q);
ab7c1648
KR		 170 if (retval)
171 goto out_unlock;
64c7f8cf
BG		 172 }
173 *allocated_vmid = qpd->vmid;
174 q->properties.vmid = qpd->vmid;
175
bcea3081
BG		 176 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
177 retval = create_compute_queue_nocpsch(dqm, q, qpd);
ab7c1648 178 else if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
bcea3081 179 retval = create_sdma_queue_nocpsch(dqm, q, qpd);
ab7c1648
KR		 180 else
181 retval = -EINVAL;
64c7f8cf 182
4eacc26b 183 if (retval) {
64c7f8cf
BG		 184 if (list_empty(&qpd->queues_list)) {
185 deallocate_vmid(dqm, qpd, q);
186 *allocated_vmid = 0;
187 }
ab7c1648 188 goto out_unlock;
64c7f8cf
BG		 189 }
190
191 list_add(&q->list, &qpd->queues_list);
bc920fd4 192 qpd->queue_count++;
b6819cec
JC		 193 if (q->properties.is_active)
194 dqm->queue_count++;
64c7f8cf 195
bcea3081
BG		 196 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
197 dqm->sdma_queue_count++;
64c7f8cf 198
b8cbab04
OG		 199 /*
200 * Unconditionally increment this counter, regardless of the queue's
201 * type or whether the queue is active.
202 */
203 dqm->total_queue_count++;
204 pr_debug("Total of %d queues are accountable so far\n",
205 dqm->total_queue_count);
206
ab7c1648 207out_unlock:
64c7f8cf 208 mutex_unlock(&dqm->lock);
ab7c1648 209 return retval;
64c7f8cf
BG		 210}
211
212static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
213{
214 bool set;
f0ec5b99 215 int pipe, bit, i;
64c7f8cf
BG		 216
217 set = false;
218
8eabaf54
KR		 219 for (pipe = dqm->next_pipe_to_allocate, i = 0;
220 i < get_pipes_per_mec(dqm);
d0b63bb3
AR		 221 pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
222
223 if (!is_pipe_enabled(dqm, 0, pipe))
224 continue;
225
64c7f8cf
BG		 226 if (dqm->allocated_queues[pipe] != 0) {
227 bit = find_first_bit(
228 (unsigned long *)&dqm->allocated_queues[pipe],
d0b63bb3 229 get_queues_per_pipe(dqm));
64c7f8cf
BG		 230
231 clear_bit(bit,
232 (unsigned long *)&dqm->allocated_queues[pipe]);
233 q->pipe = pipe;
234 q->queue = bit;
235 set = true;
236 break;
237 }
238 }
239
991ca8ee 240 if (!set)
64c7f8cf
BG		 241 return -EBUSY;
242
79775b62 243 pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue);
64c7f8cf 244 /* horizontal hqd allocation */
d0b63bb3 245 dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);
64c7f8cf
BG		 246
247 return 0;
248}
249
250static inline void deallocate_hqd(struct device_queue_manager *dqm,
251 struct queue *q)
252{
253 set_bit(q->queue, (unsigned long *)&dqm->allocated_queues[q->pipe]);
254}
255
256static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
257 struct queue *q,
258 struct qcm_process_device *qpd)
259{
260 int retval;
261 struct mqd_manager *mqd;
262
45c9a5e4 263 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
4eacc26b 264 if (!mqd)
64c7f8cf
BG		 265 return -ENOMEM;
266
267 retval = allocate_hqd(dqm, q);
4eacc26b 268 if (retval)
64c7f8cf
BG		 269 return retval;
270
271 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
272 &q->gart_mqd_addr, &q->properties);
ab7c1648
KR		 273 if (retval)
274 goto out_deallocate_hqd;
64c7f8cf 275
79775b62
KR		 276 pr_debug("Loading mqd to hqd on pipe %d, queue %d\n",
277 q->pipe, q->queue);
030e416b 278
6a1c9510
MR		 279 dqm->dev->kfd2kgd->set_scratch_backing_va(
280 dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid);
281
60a00956
FK		 282 if (!q->properties.is_active)
283 return 0;
284
70539bd7
FK		 285 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue, &q->properties,
286 q->process->mm);
ab7c1648
KR		 287 if (retval)
288 goto out_uninit_mqd;
030e416b 289
64c7f8cf 290 return 0;
ab7c1648
KR		 291
292out_uninit_mqd:
293 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
294out_deallocate_hqd:
295 deallocate_hqd(dqm, q);
296
297 return retval;
64c7f8cf
BG		 298}
299
9fd3f1bf
FK		 300/* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked
301 * to avoid asynchronized access
302 */
303static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm,
64c7f8cf
BG		 304 struct qcm_process_device *qpd,
305 struct queue *q)
306{
307 int retval;
308 struct mqd_manager *mqd;
309
9fd3f1bf
FK		 310 mqd = dqm->ops.get_mqd_manager(dqm,
311 get_mqd_type_from_queue_type(q->properties.type));
312 if (!mqd)
313 return -ENOMEM;
64c7f8cf 314
c2e1b3a4 315 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
c2e1b3a4
BG		 316 deallocate_hqd(dqm, q);
317 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
c2e1b3a4
BG		 318 dqm->sdma_queue_count--;
319 deallocate_sdma_queue(dqm, q->sdma_id);
7113cd65 320 } else {
79775b62 321 pr_debug("q->properties.type %d is invalid\n",
7113cd65 322 q->properties.type);
9fd3f1bf 323 return -EINVAL;
64c7f8cf 324 }
9fd3f1bf 325 dqm->total_queue_count--;
64c7f8cf
BG		 326
327 retval = mqd->destroy_mqd(mqd, q->mqd,
c2e1b3a4 328 KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
b90e3fbe 329 KFD_UNMAP_LATENCY_MS,
64c7f8cf 330 q->pipe, q->queue);
9fd3f1bf
FK		 331 if (retval == -ETIME)
332 qpd->reset_wavefronts = true;
64c7f8cf 333
64c7f8cf
BG		 334 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
335
336 list_del(&q->list);
9fd3f1bf
FK		 337 if (list_empty(&qpd->queues_list)) {
338 if (qpd->reset_wavefronts) {
339 pr_warn("Resetting wave fronts (nocpsch) on dev %p\n",
340 dqm->dev);
341 /* dbgdev_wave_reset_wavefronts has to be called before
342 * deallocate_vmid(), i.e. when vmid is still in use.
343 */
344 dbgdev_wave_reset_wavefronts(dqm->dev,
345 qpd->pqm->process);
346 qpd->reset_wavefronts = false;
347 }
348
64c7f8cf 349 deallocate_vmid(dqm, qpd, q);
9fd3f1bf 350 }
bc920fd4 351 qpd->queue_count--;
b6819cec
JC		 352 if (q->properties.is_active)
353 dqm->queue_count--;
b8cbab04 354
9fd3f1bf
FK		 355 return retval;
356}
b8cbab04 357
9fd3f1bf
FK		 358static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
359 struct qcm_process_device *qpd,
360 struct queue *q)
361{
362 int retval;
363
364 mutex_lock(&dqm->lock);
365 retval = destroy_queue_nocpsch_locked(dqm, qpd, q);
64c7f8cf 366 mutex_unlock(&dqm->lock);
9fd3f1bf 367
64c7f8cf
BG		 368 return retval;
369}
370
371static int update_queue(struct device_queue_manager *dqm, struct queue *q)
372{
373 int retval;
374 struct mqd_manager *mqd;
b6ffbab8 375 bool prev_active = false;
64c7f8cf 376
64c7f8cf 377 mutex_lock(&dqm->lock);
0b3674ae
OG		 378 mqd = dqm->ops.get_mqd_manager(dqm,
379 get_mqd_type_from_queue_type(q->properties.type));
4eacc26b 380 if (!mqd) {
ab7c1648
KR		 381 retval = -ENOMEM;
382 goto out_unlock;
64c7f8cf
BG		 383 }
384
60a00956
FK		 385 /* Save previous activity state for counters */
386 prev_active = q->properties.is_active;
387
388 /* Make sure the queue is unmapped before updating the MQD */
389 if (sched_policy != KFD_SCHED_POLICY_NO_HWS) {
390 retval = unmap_queues_cpsch(dqm,
391 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
392 if (retval != 0) {
393 pr_err("unmap queue failed\n");
394 goto out_unlock;
395 }
396 } else if (sched_policy == KFD_SCHED_POLICY_NO_HWS &&
397 prev_active &&
398 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
399 q->properties.type == KFD_QUEUE_TYPE_SDMA)) {
400 retval = mqd->destroy_mqd(mqd, q->mqd,
401 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
402 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
403 if (retval) {
404 pr_err("destroy mqd failed\n");
405 goto out_unlock;
406 }
407 }
408
409 retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
410
096d1a3e
FK		 411 /*
412 * check active state vs. the previous state and modify
413 * counter accordingly. map_queues_cpsch uses the
414 * dqm->queue_count to determine whether a new runlist must be
415 * uploaded.
416 */
417 if (q->properties.is_active && !prev_active)
418 dqm->queue_count++;
419 else if (!q->properties.is_active && prev_active)
420 dqm->queue_count--;
421
60a00956
FK		 422 if (sched_policy != KFD_SCHED_POLICY_NO_HWS)
423 retval = map_queues_cpsch(dqm);
424 else if (sched_policy == KFD_SCHED_POLICY_NO_HWS &&
425 q->properties.is_active &&
426 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
427 q->properties.type == KFD_QUEUE_TYPE_SDMA))
428 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue,
429 &q->properties, q->process->mm);
b6ffbab8 430
ab7c1648 431out_unlock:
64c7f8cf
BG		 432 mutex_unlock(&dqm->lock);
433 return retval;
434}
435
58dcd5bf 436static struct mqd_manager *get_mqd_manager(
64c7f8cf
BG		 437 struct device_queue_manager *dqm, enum KFD_MQD_TYPE type)
438{
439 struct mqd_manager *mqd;
440
32fa8219
FK		 441 if (WARN_ON(type >= KFD_MQD_TYPE_MAX))
442 return NULL;
64c7f8cf 443
79775b62 444 pr_debug("mqd type %d\n", type);
64c7f8cf
BG		 445
446 mqd = dqm->mqds[type];
447 if (!mqd) {
448 mqd = mqd_manager_init(type, dqm->dev);
4eacc26b 449 if (!mqd)
79775b62 450 pr_err("mqd manager is NULL");
64c7f8cf
BG		 451 dqm->mqds[type] = mqd;
452 }
453
454 return mqd;
455}
456
58dcd5bf 457static int register_process(struct device_queue_manager *dqm,
64c7f8cf
BG		 458 struct qcm_process_device *qpd)
459{
460 struct device_process_node *n;
a22fc854 461 int retval;
64c7f8cf 462
dbf56ab1 463 n = kzalloc(sizeof(*n), GFP_KERNEL);
64c7f8cf
BG		 464 if (!n)
465 return -ENOMEM;
466
467 n->qpd = qpd;
468
469 mutex_lock(&dqm->lock);
470 list_add(&n->list, &dqm->queues);
471
bfd5e378 472 retval = dqm->asic_ops.update_qpd(dqm, qpd);
a22fc854 473
64c7f8cf
BG		 474 dqm->processes_count++;
475
476 mutex_unlock(&dqm->lock);
477
a22fc854 478 return retval;
64c7f8cf
BG		 479}
480
58dcd5bf 481static int unregister_process(struct device_queue_manager *dqm,
64c7f8cf
BG		 482 struct qcm_process_device *qpd)
483{
484 int retval;
485 struct device_process_node *cur, *next;
486
1e5ec956
OG		 487 pr_debug("qpd->queues_list is %s\n",
488 list_empty(&qpd->queues_list) ? "empty" : "not empty");
64c7f8cf
BG		 489
490 retval = 0;
491 mutex_lock(&dqm->lock);
492
493 list_for_each_entry_safe(cur, next, &dqm->queues, list) {
494 if (qpd == cur->qpd) {
495 list_del(&cur->list);
f5d896bb 496 kfree(cur);
64c7f8cf
BG		 497 dqm->processes_count--;
498 goto out;
499 }
500 }
501 /* qpd not found in dqm list */
502 retval = 1;
503out:
504 mutex_unlock(&dqm->lock);
505 return retval;
506}
507
508static int
509set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid,
510 unsigned int vmid)
511{
512 uint32_t pasid_mapping;
513
cea405b1
XZ		 514 pasid_mapping = (pasid == 0) ? 0 :
515 (uint32_t)pasid |
516 ATC_VMID_PASID_MAPPING_VALID;
517
518 return dqm->dev->kfd2kgd->set_pasid_vmid_mapping(
519 dqm->dev->kgd, pasid_mapping,
64c7f8cf
BG		 520 vmid);
521}
522
2249d558
AL		 523static void init_interrupts(struct device_queue_manager *dqm)
524{
525 unsigned int i;
526
d0b63bb3
AR		 527 for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++)
528 if (is_pipe_enabled(dqm, 0, i))
529 dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i);
2249d558
AL		 530}
531
64c7f8cf
BG		 532static int initialize_nocpsch(struct device_queue_manager *dqm)
533{
86194cf8 534 int pipe, queue;
64c7f8cf 535
79775b62 536 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
64c7f8cf 537
ab7c1648
KR		 538 dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm),
539 sizeof(unsigned int), GFP_KERNEL);
540 if (!dqm->allocated_queues)
541 return -ENOMEM;
542
64c7f8cf
BG		 543 mutex_init(&dqm->lock);
544 INIT_LIST_HEAD(&dqm->queues);
545 dqm->queue_count = dqm->next_pipe_to_allocate = 0;
bcea3081 546 dqm->sdma_queue_count = 0;
64c7f8cf 547
86194cf8
FK		 548 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
549 int pipe_offset = pipe * get_queues_per_pipe(dqm);
550
551 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++)
552 if (test_bit(pipe_offset + queue,
553 dqm->dev->shared_resources.queue_bitmap))
554 dqm->allocated_queues[pipe] |= 1 << queue;
555 }
64c7f8cf 556
44008d7a 557 dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;
bcea3081 558 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
64c7f8cf 559
64c7f8cf
BG		 560 return 0;
561}
562
58dcd5bf 563static void uninitialize(struct device_queue_manager *dqm)
64c7f8cf 564{
6f9d54fd
OG		 565 int i;
566
32fa8219 567 WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0);
64c7f8cf
BG		 568
569 kfree(dqm->allocated_queues);
6f9d54fd
OG		 570 for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++)
571 kfree(dqm->mqds[i]);
64c7f8cf 572 mutex_destroy(&dqm->lock);
a86aa3ca 573 kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem);
64c7f8cf
BG		 574}
575
576static int start_nocpsch(struct device_queue_manager *dqm)
577{
2249d558 578 init_interrupts(dqm);
64c7f8cf
BG		 579 return 0;
580}
581
582static int stop_nocpsch(struct device_queue_manager *dqm)
583{
584 return 0;
585}
586
bcea3081
BG		 587static int allocate_sdma_queue(struct device_queue_manager *dqm,
588 unsigned int *sdma_queue_id)
589{
590 int bit;
591
592 if (dqm->sdma_bitmap == 0)
593 return -ENOMEM;
594
595 bit = find_first_bit((unsigned long *)&dqm->sdma_bitmap,
596 CIK_SDMA_QUEUES);
597
598 clear_bit(bit, (unsigned long *)&dqm->sdma_bitmap);
599 *sdma_queue_id = bit;
600
601 return 0;
602}
603
604static void deallocate_sdma_queue(struct device_queue_manager *dqm,
605 unsigned int sdma_queue_id)
606{
010b82e7 607 if (sdma_queue_id >= CIK_SDMA_QUEUES)
bcea3081
BG		 608 return;
609 set_bit(sdma_queue_id, (unsigned long *)&dqm->sdma_bitmap);
610}
611
bcea3081
BG		 612static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
613 struct queue *q,
614 struct qcm_process_device *qpd)
615{
616 struct mqd_manager *mqd;
617 int retval;
618
45c9a5e4 619 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA);
bcea3081
BG		 620 if (!mqd)
621 return -ENOMEM;
622
623 retval = allocate_sdma_queue(dqm, &q->sdma_id);
4eacc26b 624 if (retval)
bcea3081
BG		 625 return retval;
626
e139cd2a 627 q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
628 q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
bcea3081 629
79775b62
KR		 630 pr_debug("SDMA id is: %d\n", q->sdma_id);
631 pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id);
632 pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id);
bcea3081 633
bfd5e378 634 dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
bcea3081
BG		 635 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
636 &q->gart_mqd_addr, &q->properties);
ab7c1648
KR		 637 if (retval)
638 goto out_deallocate_sdma_queue;
bcea3081 639
70539bd7 640 retval = mqd->load_mqd(mqd, q->mqd, 0, 0, &q->properties, NULL);
ab7c1648
KR		 641 if (retval)
642 goto out_uninit_mqd;
4fadf6b6 643
bcea3081 644 return 0;
ab7c1648
KR		 645
646out_uninit_mqd:
647 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
648out_deallocate_sdma_queue:
649 deallocate_sdma_queue(dqm, q->sdma_id);
650
651 return retval;
bcea3081
BG		 652}
653
64c7f8cf
BG		 654/*
655 * Device Queue Manager implementation for cp scheduler
656 */
657
658static int set_sched_resources(struct device_queue_manager *dqm)
659{
d0b63bb3 660 int i, mec;
64c7f8cf 661 struct scheduling_resources res;
64c7f8cf 662
44008d7a 663 res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap;
d0b63bb3
AR		 664
665 res.queue_mask = 0;
666 for (i = 0; i < KGD_MAX_QUEUES; ++i) {
667 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe)
668 / dqm->dev->shared_resources.num_pipe_per_mec;
669
670 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap))
671 continue;
672
673 /* only acquire queues from the first MEC */
674 if (mec > 0)
675 continue;
676
677 /* This situation may be hit in the future if a new HW
678 * generation exposes more than 64 queues. If so, the
8eabaf54
KR		 679 * definition of res.queue_mask needs updating
680 */
1d11ee89 681 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
d0b63bb3
AR		 682 pr_err("Invalid queue enabled by amdgpu: %d\n", i);
683 break;
684 }
685
686 res.queue_mask |= (1ull << i);
687 }
64c7f8cf
BG		 688 res.gws_mask = res.oac_mask = res.gds_heap_base =
689 res.gds_heap_size = 0;
690
79775b62
KR		 691 pr_debug("Scheduling resources:\n"
692 "vmid mask: 0x%8X\n"
693 "queue mask: 0x%8llX\n",
64c7f8cf
BG		 694 res.vmid_mask, res.queue_mask);
695
696 return pm_send_set_resources(&dqm->packets, &res);
697}
698
699static int initialize_cpsch(struct device_queue_manager *dqm)
700{
79775b62 701 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
64c7f8cf
BG		 702
703 mutex_init(&dqm->lock);
704 INIT_LIST_HEAD(&dqm->queues);
705 dqm->queue_count = dqm->processes_count = 0;
bcea3081 706 dqm->sdma_queue_count = 0;
64c7f8cf 707 dqm->active_runlist = false;
e139cd2a 708 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
64c7f8cf 709
bfd5e378 710 return 0;
64c7f8cf
BG		 711}
712
713static int start_cpsch(struct device_queue_manager *dqm)
714{
64c7f8cf
BG		 715 int retval;
716
64c7f8cf
BG		 717 retval = 0;
718
719 retval = pm_init(&dqm->packets, dqm);
4eacc26b 720 if (retval)
64c7f8cf
BG		 721 goto fail_packet_manager_init;
722
723 retval = set_sched_resources(dqm);
4eacc26b 724 if (retval)
64c7f8cf
BG		 725 goto fail_set_sched_resources;
726
79775b62 727 pr_debug("Allocating fence memory\n");
64c7f8cf
BG		 728
729 /* allocate fence memory on the gart */
a86aa3ca
OG		 730 retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr),
731 &dqm->fence_mem);
64c7f8cf 732
4eacc26b 733 if (retval)
64c7f8cf
BG		 734 goto fail_allocate_vidmem;
735
736 dqm->fence_addr = dqm->fence_mem->cpu_ptr;
737 dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;
2249d558
AL		 738
739 init_interrupts(dqm);
740
ac30c783 741 mutex_lock(&dqm->lock);
c4744e24 742 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
ac30c783 743 mutex_unlock(&dqm->lock);
64c7f8cf
BG		 744
745 return 0;
746fail_allocate_vidmem:
747fail_set_sched_resources:
748 pm_uninit(&dqm->packets);
749fail_packet_manager_init:
750 return retval;
751}
752
753static int stop_cpsch(struct device_queue_manager *dqm)
754{
ac30c783 755 mutex_lock(&dqm->lock);
4465f466 756 unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
ac30c783 757 mutex_unlock(&dqm->lock);
64c7f8cf 758
a86aa3ca 759 kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
64c7f8cf
BG		 760 pm_uninit(&dqm->packets);
761
762 return 0;
763}
764
765static int create_kernel_queue_cpsch(struct device_queue_manager *dqm,
766 struct kernel_queue *kq,
767 struct qcm_process_device *qpd)
768{
64c7f8cf 769 mutex_lock(&dqm->lock);
b8cbab04 770 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
79775b62 771 pr_warn("Can't create new kernel queue because %d queues were already created\n",
b8cbab04
OG		 772 dqm->total_queue_count);
773 mutex_unlock(&dqm->lock);
774 return -EPERM;
775 }
776
777 /*
778 * Unconditionally increment this counter, regardless of the queue's
779 * type or whether the queue is active.
780 */
781 dqm->total_queue_count++;
782 pr_debug("Total of %d queues are accountable so far\n",
783 dqm->total_queue_count);
784
64c7f8cf
BG		 785 list_add(&kq->list, &qpd->priv_queue_list);
786 dqm->queue_count++;
787 qpd->is_debug = true;
c4744e24 788 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
64c7f8cf
BG		 789 mutex_unlock(&dqm->lock);
790
791 return 0;
792}
793
794static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm,
795 struct kernel_queue *kq,
796 struct qcm_process_device *qpd)
797{
64c7f8cf 798 mutex_lock(&dqm->lock);
64c7f8cf
BG		 799 list_del(&kq->list);
800 dqm->queue_count--;
801 qpd->is_debug = false;
c4744e24 802 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
b8cbab04
OG		 803 /*
804 * Unconditionally decrement this counter, regardless of the queue's
805 * type.
806 */
8b58f261 807 dqm->total_queue_count--;
b8cbab04
OG		 808 pr_debug("Total of %d queues are accountable so far\n",
809 dqm->total_queue_count);
64c7f8cf
BG		 810 mutex_unlock(&dqm->lock);
811}
812
813static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
814 struct qcm_process_device *qpd, int *allocate_vmid)
815{
816 int retval;
817 struct mqd_manager *mqd;
818
64c7f8cf
BG		 819 retval = 0;
820
821 if (allocate_vmid)
822 *allocate_vmid = 0;
823
824 mutex_lock(&dqm->lock);
825
b8cbab04 826 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
79775b62 827 pr_warn("Can't create new usermode queue because %d queues were already created\n",
b8cbab04
OG		 828 dqm->total_queue_count);
829 retval = -EPERM;
830 goto out;
831 }
832
e139cd2a 833 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
834 retval = allocate_sdma_queue(dqm, &q->sdma_id);
835 if (retval != 0)
836 goto out;
837 q->properties.sdma_queue_id =
838 q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
839 q->properties.sdma_engine_id =
840 q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
841 }
45c9a5e4 842 mqd = dqm->ops.get_mqd_manager(dqm,
bcea3081
BG		 843 get_mqd_type_from_queue_type(q->properties.type));
844
4eacc26b 845 if (!mqd) {
ab7c1648
KR		 846 retval = -ENOMEM;
847 goto out;
64c7f8cf
BG		 848 }
849
bfd5e378 850 dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
64c7f8cf
BG		 851 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
852 &q->gart_mqd_addr, &q->properties);
4eacc26b 853 if (retval)
64c7f8cf
BG		 854 goto out;
855
856 list_add(&q->list, &qpd->queues_list);
bc920fd4 857 qpd->queue_count++;
64c7f8cf
BG		 858 if (q->properties.is_active) {
859 dqm->queue_count++;
c4744e24
YZ		 860 retval = execute_queues_cpsch(dqm,
861 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
64c7f8cf
BG		 862 }
863
bcea3081 864 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
8eabaf54 865 dqm->sdma_queue_count++;
b8cbab04
OG		 866 /*
867 * Unconditionally increment this counter, regardless of the queue's
868 * type or whether the queue is active.
869 */
870 dqm->total_queue_count++;
871
872 pr_debug("Total of %d queues are accountable so far\n",
873 dqm->total_queue_count);
874
64c7f8cf
BG		 875out:
876 mutex_unlock(&dqm->lock);
877 return retval;
878}
879
788bf83d 880int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
d80d19bd 881 unsigned int fence_value,
8c72c3d7 882 unsigned int timeout_ms)
64c7f8cf 883{
8c72c3d7 884 unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies;
64c7f8cf
BG		 885
886 while (*fence_addr != fence_value) {
8c72c3d7 887 if (time_after(jiffies, end_jiffies)) {
79775b62 888 pr_err("qcm fence wait loop timeout expired\n");
64c7f8cf
BG		 889 return -ETIME;
890 }
99331a51 891 schedule();
64c7f8cf
BG		 892 }
893
894 return 0;
895}
896
7da2bcf8 897static int unmap_sdma_queues(struct device_queue_manager *dqm,
bcea3081
BG		 898 unsigned int sdma_engine)
899{
900 return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA,
7da2bcf8 901 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false,
bcea3081
BG		 902 sdma_engine);
903}
904
60a00956
FK		 905/* dqm->lock mutex has to be locked before calling this function */
906static int map_queues_cpsch(struct device_queue_manager *dqm)
907{
908 int retval;
909
910 if (dqm->queue_count <= 0 || dqm->processes_count <= 0)
911 return 0;
912
913 if (dqm->active_runlist)
914 return 0;
915
916 retval = pm_send_runlist(&dqm->packets, &dqm->queues);
917 if (retval) {
918 pr_err("failed to execute runlist\n");
919 return retval;
920 }
921 dqm->active_runlist = true;
922
923 return retval;
924}
925
ac30c783 926/* dqm->lock mutex has to be locked before calling this function */
7da2bcf8 927static int unmap_queues_cpsch(struct device_queue_manager *dqm,
4465f466
YZ		 928 enum kfd_unmap_queues_filter filter,
929 uint32_t filter_param)
64c7f8cf 930{
9fd3f1bf 931 int retval = 0;
64c7f8cf 932
991ca8ee 933 if (!dqm->active_runlist)
ac30c783 934 return retval;
bcea3081 935
79775b62 936 pr_debug("Before destroying queues, sdma queue count is : %u\n",
bcea3081
BG		 937 dqm->sdma_queue_count);
938
939 if (dqm->sdma_queue_count > 0) {
7da2bcf8
YZ		 940 unmap_sdma_queues(dqm, 0);
941 unmap_sdma_queues(dqm, 1);
bcea3081
BG		 942 }
943
64c7f8cf 944 retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE,
4465f466 945 filter, filter_param, false, 0);
4eacc26b 946 if (retval)
ac30c783 947 return retval;
64c7f8cf
BG		 948
949 *dqm->fence_addr = KFD_FENCE_INIT;
950 pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr,
951 KFD_FENCE_COMPLETED);
952 /* should be timed out */
c3447e81 953 retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED,
64c7f8cf 954 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS);
9fd3f1bf 955 if (retval)
ac30c783 956 return retval;
9fd3f1bf 957
64c7f8cf
BG		 958 pm_release_ib(&dqm->packets);
959 dqm->active_runlist = false;
960
64c7f8cf
BG		 961 return retval;
962}
963
ac30c783 964/* dqm->lock mutex has to be locked before calling this function */
c4744e24
YZ		 965static int execute_queues_cpsch(struct device_queue_manager *dqm,
966 enum kfd_unmap_queues_filter filter,
967 uint32_t filter_param)
64c7f8cf
BG		 968{
969 int retval;
970
c4744e24 971 retval = unmap_queues_cpsch(dqm, filter, filter_param);
4eacc26b 972 if (retval) {
c4744e24 973 pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n");
ac30c783 974 return retval;
64c7f8cf
BG		 975 }
976
60a00956 977 return map_queues_cpsch(dqm);
64c7f8cf
BG		 978}
979
980static int destroy_queue_cpsch(struct device_queue_manager *dqm,
981 struct qcm_process_device *qpd,
982 struct queue *q)
983{
984 int retval;
985 struct mqd_manager *mqd;
992839ad 986 bool preempt_all_queues;
64c7f8cf 987
992839ad
YS		 988 preempt_all_queues = false;
989
64c7f8cf
BG		 990 retval = 0;
991
992 /* remove queue from list to prevent rescheduling after preemption */
993 mutex_lock(&dqm->lock);
992839ad
YS		 994
995 if (qpd->is_debug) {
996 /*
997 * error, currently we do not allow to destroy a queue
998 * of a currently debugged process
999 */
1000 retval = -EBUSY;
1001 goto failed_try_destroy_debugged_queue;
1002
1003 }
1004
45c9a5e4 1005 mqd = dqm->ops.get_mqd_manager(dqm,
bcea3081 1006 get_mqd_type_from_queue_type(q->properties.type));
64c7f8cf
BG		 1007 if (!mqd) {
1008 retval = -ENOMEM;
1009 goto failed;
1010 }
1011
e139cd2a 1012 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
bcea3081 1013 dqm->sdma_queue_count--;
e139cd2a 1014 deallocate_sdma_queue(dqm, q->sdma_id);
1015 }
bcea3081 1016
64c7f8cf 1017 list_del(&q->list);
bc920fd4 1018 qpd->queue_count--;
b6819cec
JC		 1019 if (q->properties.is_active)
1020 dqm->queue_count--;
64c7f8cf 1021
9fd3f1bf
FK		 1022 retval = execute_queues_cpsch(dqm,
1023 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
1024 if (retval == -ETIME)
1025 qpd->reset_wavefronts = true;
64c7f8cf
BG		 1026
1027 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
b8cbab04
OG		 1028
1029 /*
1030 * Unconditionally decrement this counter, regardless of the queue's
1031 * type
1032 */
1033 dqm->total_queue_count--;
1034 pr_debug("Total of %d queues are accountable so far\n",
1035 dqm->total_queue_count);
64c7f8cf
BG		 1036
1037 mutex_unlock(&dqm->lock);
1038
1039 return 0;
1040
1041failed:
992839ad
YS		 1042failed_try_destroy_debugged_queue:
1043
64c7f8cf
BG		 1044 mutex_unlock(&dqm->lock);
1045 return retval;
1046}
1047
1048/*
1049 * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to
1050 * stay in user mode.
1051 */
1052#define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL
1053/* APE1 limit is inclusive and 64K aligned. */
1054#define APE1_LIMIT_ALIGNMENT 0xFFFF
1055
1056static bool set_cache_memory_policy(struct device_queue_manager *dqm,
1057 struct qcm_process_device *qpd,
1058 enum cache_policy default_policy,
1059 enum cache_policy alternate_policy,
1060 void __user *alternate_aperture_base,
1061 uint64_t alternate_aperture_size)
1062{
a22fc854 1063 bool retval;
64c7f8cf 1064
64c7f8cf
BG		 1065 mutex_lock(&dqm->lock);
1066
1067 if (alternate_aperture_size == 0) {
1068 /* base > limit disables APE1 */
1069 qpd->sh_mem_ape1_base = 1;
1070 qpd->sh_mem_ape1_limit = 0;
1071 } else {
1072 /*
1073 * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]},
1074 * SH_MEM_APE1_BASE[31:0], 0x0000 }
1075 * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
1076 * SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
1077 * Verify that the base and size parameters can be
1078 * represented in this format and convert them.
1079 * Additionally restrict APE1 to user-mode addresses.
1080 */
1081
1082 uint64_t base = (uintptr_t)alternate_aperture_base;
1083 uint64_t limit = base + alternate_aperture_size - 1;
1084
ab7c1648
KR		 1085 if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 ||
1086 (limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) {
1087 retval = false;
64c7f8cf 1088 goto out;
ab7c1648 1089 }
64c7f8cf
BG		 1090
1091 qpd->sh_mem_ape1_base = base >> 16;
1092 qpd->sh_mem_ape1_limit = limit >> 16;
1093 }
1094
bfd5e378 1095 retval = dqm->asic_ops.set_cache_memory_policy(
a22fc854
BG		 1096 dqm,
1097 qpd,
1098 default_policy,
1099 alternate_policy,
1100 alternate_aperture_base,
1101 alternate_aperture_size);
64c7f8cf
BG		 1102
1103 if ((sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0))
1104 program_sh_mem_settings(dqm, qpd);
1105
79775b62 1106 pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n",
64c7f8cf
BG		 1107 qpd->sh_mem_config, qpd->sh_mem_ape1_base,
1108 qpd->sh_mem_ape1_limit);
1109
64c7f8cf
BG		 1110out:
1111 mutex_unlock(&dqm->lock);
ab7c1648 1112 return retval;
64c7f8cf
BG		 1113}
1114
9fd3f1bf
FK		 1115static int process_termination_nocpsch(struct device_queue_manager *dqm,
1116 struct qcm_process_device *qpd)
1117{
1118 struct queue *q, *next;
1119 struct device_process_node *cur, *next_dpn;
1120 int retval = 0;
1121
1122 mutex_lock(&dqm->lock);
1123
1124 /* Clear all user mode queues */
1125 list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1126 int ret;
1127
1128 ret = destroy_queue_nocpsch_locked(dqm, qpd, q);
1129 if (ret)
1130 retval = ret;
1131 }
1132
1133 /* Unregister process */
1134 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1135 if (qpd == cur->qpd) {
1136 list_del(&cur->list);
1137 kfree(cur);
1138 dqm->processes_count--;
1139 break;
1140 }
1141 }
1142
1143 mutex_unlock(&dqm->lock);
1144 return retval;
1145}
1146
1147
1148static int process_termination_cpsch(struct device_queue_manager *dqm,
1149 struct qcm_process_device *qpd)
1150{
1151 int retval;
1152 struct queue *q, *next;
1153 struct kernel_queue *kq, *kq_next;
1154 struct mqd_manager *mqd;
1155 struct device_process_node *cur, *next_dpn;
1156 enum kfd_unmap_queues_filter filter =
1157 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES;
1158
1159 retval = 0;
1160
1161 mutex_lock(&dqm->lock);
1162
1163 /* Clean all kernel queues */
1164 list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) {
1165 list_del(&kq->list);
1166 dqm->queue_count--;
1167 qpd->is_debug = false;
1168 dqm->total_queue_count--;
1169 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES;
1170 }
1171
1172 /* Clear all user mode queues */
1173 list_for_each_entry(q, &qpd->queues_list, list) {
1174 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
1175 dqm->sdma_queue_count--;
1176
1177 if (q->properties.is_active)
1178 dqm->queue_count--;
1179
1180 dqm->total_queue_count--;
1181 }
1182
1183 /* Unregister process */
1184 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1185 if (qpd == cur->qpd) {
1186 list_del(&cur->list);
1187 kfree(cur);
1188 dqm->processes_count--;
1189 break;
1190 }
1191 }
1192
1193 retval = execute_queues_cpsch(dqm, filter, 0);
1194 if (retval || qpd->reset_wavefronts) {
1195 pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev);
1196 dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process);
1197 qpd->reset_wavefronts = false;
1198 }
1199
1200 /* lastly, free mqd resources */
1201 list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1202 mqd = dqm->ops.get_mqd_manager(dqm,
1203 get_mqd_type_from_queue_type(q->properties.type));
1204 if (!mqd) {
1205 retval = -ENOMEM;
1206 goto out;
1207 }
1208 list_del(&q->list);
bc920fd4 1209 qpd->queue_count--;
9fd3f1bf
FK		 1210 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
1211 }
1212
1213out:
1214 mutex_unlock(&dqm->lock);
1215 return retval;
1216}
1217
64c7f8cf
BG		 1218struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
1219{
1220 struct device_queue_manager *dqm;
1221
79775b62 1222 pr_debug("Loading device queue manager\n");
a22fc854 1223
dbf56ab1 1224 dqm = kzalloc(sizeof(*dqm), GFP_KERNEL);
64c7f8cf
BG		 1225 if (!dqm)
1226 return NULL;
1227
1228 dqm->dev = dev;
1229 switch (sched_policy) {
1230 case KFD_SCHED_POLICY_HWS:
1231 case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION:
1232 /* initialize dqm for cp scheduling */
45c9a5e4
OG		 1233 dqm->ops.create_queue = create_queue_cpsch;
1234 dqm->ops.initialize = initialize_cpsch;
1235 dqm->ops.start = start_cpsch;
1236 dqm->ops.stop = stop_cpsch;
1237 dqm->ops.destroy_queue = destroy_queue_cpsch;
1238 dqm->ops.update_queue = update_queue;
58dcd5bf
YZ		 1239 dqm->ops.get_mqd_manager = get_mqd_manager;
1240 dqm->ops.register_process = register_process;
1241 dqm->ops.unregister_process = unregister_process;
1242 dqm->ops.uninitialize = uninitialize;
45c9a5e4
OG		 1243 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;
1244 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;
1245 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
9fd3f1bf 1246 dqm->ops.process_termination = process_termination_cpsch;
64c7f8cf
BG		 1247 break;
1248 case KFD_SCHED_POLICY_NO_HWS:
1249 /* initialize dqm for no cp scheduling */
45c9a5e4
OG		 1250 dqm->ops.start = start_nocpsch;
1251 dqm->ops.stop = stop_nocpsch;
1252 dqm->ops.create_queue = create_queue_nocpsch;
1253 dqm->ops.destroy_queue = destroy_queue_nocpsch;
1254 dqm->ops.update_queue = update_queue;
58dcd5bf
YZ		 1255 dqm->ops.get_mqd_manager = get_mqd_manager;
1256 dqm->ops.register_process = register_process;
1257 dqm->ops.unregister_process = unregister_process;
45c9a5e4 1258 dqm->ops.initialize = initialize_nocpsch;
58dcd5bf 1259 dqm->ops.uninitialize = uninitialize;
45c9a5e4 1260 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
9fd3f1bf 1261 dqm->ops.process_termination = process_termination_nocpsch;
64c7f8cf
BG		 1262 break;
1263 default:
32fa8219
FK		 1264 pr_err("Invalid scheduling policy %d\n", sched_policy);
1265 goto out_free;
64c7f8cf
BG		 1266 }
1267
a22fc854
BG		 1268 switch (dev->device_info->asic_family) {
1269 case CHIP_CARRIZO:
bfd5e378 1270 device_queue_manager_init_vi(&dqm->asic_ops);
300dec95
OG		 1271 break;
1272
a22fc854 1273 case CHIP_KAVERI:
bfd5e378 1274 device_queue_manager_init_cik(&dqm->asic_ops);
300dec95 1275 break;
e596b903
YZ		 1276 default:
1277 WARN(1, "Unexpected ASIC family %u",
1278 dev->device_info->asic_family);
1279 goto out_free;
a22fc854
BG		 1280 }
1281
32fa8219
FK		 1282 if (!dqm->ops.initialize(dqm))
1283 return dqm;
64c7f8cf 1284
32fa8219
FK		 1285out_free:
1286 kfree(dqm);
1287 return NULL;
64c7f8cf
BG		 1288}
1289
1290void device_queue_manager_uninit(struct device_queue_manager *dqm)
1291{
45c9a5e4 1292 dqm->ops.uninitialize(dqm);
64c7f8cf
BG		 1293 kfree(dqm);
1294}
Ubuntu Eoan Linux kernel mirror