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4562236b | 1 | /* |
9ce6aae1 | 2 | * Copyright 2012-15 Advanced Micro Devices, Inc. |
4562236b HW |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: AMD | |
23 | * | |
24 | */ | |
4fc4dca8 SR |
25 | |
26 | #include <linux/slab.h> | |
27 | ||
4562236b HW |
28 | #include "dm_services.h" |
29 | ||
30 | #include "resource.h" | |
31 | #include "include/irq_service_interface.h" | |
32 | #include "link_encoder.h" | |
33 | #include "stream_encoder.h" | |
34 | #include "opp.h" | |
35 | #include "timing_generator.h" | |
36 | #include "transform.h" | |
33d7598d JL |
37 | #include "dccg.h" |
38 | #include "dchubbub.h" | |
d94585a0 | 39 | #include "dpp.h" |
5ac3d3c9 | 40 | #include "core_types.h" |
4562236b | 41 | #include "set_mode_types.h" |
4562236b | 42 | #include "virtual/virtual_stream_encoder.h" |
3b94a400 | 43 | #include "dpcd_defs.h" |
4562236b HW |
44 | |
45 | #include "dce80/dce80_resource.h" | |
46 | #include "dce100/dce100_resource.h" | |
47 | #include "dce110/dce110_resource.h" | |
48 | #include "dce112/dce112_resource.h" | |
cf2156e2 | 49 | #include "dce120/dce120_resource.h" |
b86a1aa3 | 50 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
ff5ef992 | 51 | #include "dcn10/dcn10_resource.h" |
7ed4e635 | 52 | #include "dcn20/dcn20_resource.h" |
e22ece54 | 53 | #include "dcn21/dcn21_resource.h" |
cf2156e2 | 54 | #endif |
5d4b05dd BL |
55 | |
56 | #define DC_LOGGER_INIT(logger) | |
57 | ||
4562236b HW |
58 | enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) |
59 | { | |
60 | enum dce_version dc_version = DCE_VERSION_UNKNOWN; | |
61 | switch (asic_id.chip_family) { | |
62 | ||
63 | case FAMILY_CI: | |
4562236b HW |
64 | dc_version = DCE_VERSION_8_0; |
65 | break; | |
ebfdf0d0 AD |
66 | case FAMILY_KV: |
67 | if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev) || | |
68 | ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev) || | |
69 | ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev)) | |
70 | dc_version = DCE_VERSION_8_3; | |
71 | else | |
72 | dc_version = DCE_VERSION_8_1; | |
73 | break; | |
4562236b HW |
74 | case FAMILY_CZ: |
75 | dc_version = DCE_VERSION_11_0; | |
76 | break; | |
77 | ||
78 | case FAMILY_VI: | |
79 | if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || | |
80 | ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) { | |
81 | dc_version = DCE_VERSION_10_0; | |
82 | break; | |
83 | } | |
84 | if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) || | |
b264d345 JL |
85 | ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) || |
86 | ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { | |
4562236b HW |
87 | dc_version = DCE_VERSION_11_2; |
88 | } | |
0c75d5ac JFZ |
89 | if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) |
90 | dc_version = DCE_VERSION_11_22; | |
4562236b | 91 | break; |
2c8ad2d5 | 92 | case FAMILY_AI: |
b8b6ce89 LL |
93 | if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)) |
94 | dc_version = DCE_VERSION_12_1; | |
95 | else | |
96 | dc_version = DCE_VERSION_12_0; | |
2c8ad2d5 | 97 | break; |
b86a1aa3 | 98 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
ff5ef992 AD |
99 | case FAMILY_RV: |
100 | dc_version = DCN_VERSION_1_0; | |
0e3d73f1 BL |
101 | if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) |
102 | dc_version = DCN_VERSION_1_01; | |
e22ece54 BL |
103 | if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) |
104 | dc_version = DCN_VERSION_2_1; | |
ff5ef992 AD |
105 | break; |
106 | #endif | |
7ed4e635 | 107 | |
7ed4e635 HW |
108 | case FAMILY_NV: |
109 | dc_version = DCN_VERSION_2_0; | |
110 | break; | |
4562236b HW |
111 | default: |
112 | dc_version = DCE_VERSION_UNKNOWN; | |
113 | break; | |
114 | } | |
115 | return dc_version; | |
116 | } | |
117 | ||
d9673c92 HW |
118 | struct resource_pool *dc_create_resource_pool(struct dc *dc, |
119 | const struct dc_init_data *init_data, | |
120 | enum dce_version dc_version) | |
4562236b | 121 | { |
5ac3d3c9 | 122 | struct resource_pool *res_pool = NULL; |
4562236b HW |
123 | |
124 | switch (dc_version) { | |
125 | case DCE_VERSION_8_0: | |
7992a629 | 126 | res_pool = dce80_create_resource_pool( |
d9673c92 | 127 | init_data->num_virtual_links, dc); |
7992a629 | 128 | break; |
ebfdf0d0 | 129 | case DCE_VERSION_8_1: |
7992a629 | 130 | res_pool = dce81_create_resource_pool( |
d9673c92 | 131 | init_data->num_virtual_links, dc); |
7992a629 | 132 | break; |
ebfdf0d0 | 133 | case DCE_VERSION_8_3: |
7992a629 | 134 | res_pool = dce83_create_resource_pool( |
d9673c92 | 135 | init_data->num_virtual_links, dc); |
5ac3d3c9 | 136 | break; |
4562236b | 137 | case DCE_VERSION_10_0: |
5ac3d3c9 | 138 | res_pool = dce100_create_resource_pool( |
d9673c92 | 139 | init_data->num_virtual_links, dc); |
5ac3d3c9 | 140 | break; |
4562236b | 141 | case DCE_VERSION_11_0: |
5ac3d3c9 | 142 | res_pool = dce110_create_resource_pool( |
d9673c92 HW |
143 | init_data->num_virtual_links, dc, |
144 | init_data->asic_id); | |
5ac3d3c9 | 145 | break; |
4562236b | 146 | case DCE_VERSION_11_2: |
0c75d5ac | 147 | case DCE_VERSION_11_22: |
5ac3d3c9 | 148 | res_pool = dce112_create_resource_pool( |
d9673c92 | 149 | init_data->num_virtual_links, dc); |
5ac3d3c9 | 150 | break; |
2c8ad2d5 | 151 | case DCE_VERSION_12_0: |
b8b6ce89 | 152 | case DCE_VERSION_12_1: |
2c8ad2d5 | 153 | res_pool = dce120_create_resource_pool( |
d9673c92 | 154 | init_data->num_virtual_links, dc); |
2c8ad2d5 | 155 | break; |
ff5ef992 | 156 | |
b86a1aa3 | 157 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
ff5ef992 | 158 | case DCN_VERSION_1_0: |
0e3d73f1 | 159 | case DCN_VERSION_1_01: |
d9673c92 | 160 | res_pool = dcn10_create_resource_pool(init_data, dc); |
ff5ef992 | 161 | break; |
3639fa68 ZF |
162 | |
163 | ||
7ed4e635 HW |
164 | case DCN_VERSION_2_0: |
165 | res_pool = dcn20_create_resource_pool(init_data, dc); | |
166 | break; | |
e22ece54 BL |
167 | case DCN_VERSION_2_1: |
168 | res_pool = dcn21_create_resource_pool(init_data, dc); | |
169 | break; | |
170 | #endif | |
7ed4e635 | 171 | |
4562236b HW |
172 | default: |
173 | break; | |
174 | } | |
f49cfa27 | 175 | |
5ac3d3c9 | 176 | if (res_pool != NULL) { |
9adc8050 | 177 | if (dc->ctx->dc_bios->fw_info_valid) { |
41a5a2a8 | 178 | res_pool->ref_clocks.xtalin_clock_inKhz = |
9adc8050 | 179 | dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; |
41a5a2a8 | 180 | /* initialize with firmware data first, no all |
181 | * ASIC have DCCG SW component. FPGA or | |
182 | * simulation need initialization of | |
183 | * dccg_ref_clock_inKhz, dchub_ref_clock_inKhz | |
184 | * with xtalin_clock_inKhz | |
185 | */ | |
186 | res_pool->ref_clocks.dccg_ref_clock_inKhz = | |
187 | res_pool->ref_clocks.xtalin_clock_inKhz; | |
188 | res_pool->ref_clocks.dchub_ref_clock_inKhz = | |
189 | res_pool->ref_clocks.xtalin_clock_inKhz; | |
190 | } else | |
191 | ASSERT_CRITICAL(false); | |
5ac3d3c9 | 192 | } |
4562236b | 193 | |
5ac3d3c9 | 194 | return res_pool; |
4562236b HW |
195 | } |
196 | ||
fb3466a4 | 197 | void dc_destroy_resource_pool(struct dc *dc) |
4562236b HW |
198 | { |
199 | if (dc) { | |
200 | if (dc->res_pool) | |
201 | dc->res_pool->funcs->destroy(&dc->res_pool); | |
202 | ||
d029810c | 203 | kfree(dc->hwseq); |
4562236b HW |
204 | } |
205 | } | |
206 | ||
207 | static void update_num_audio( | |
208 | const struct resource_straps *straps, | |
209 | unsigned int *num_audio, | |
210 | struct audio_support *aud_support) | |
211 | { | |
b8e9eb72 CL |
212 | aud_support->dp_audio = true; |
213 | aud_support->hdmi_audio_native = false; | |
214 | aud_support->hdmi_audio_on_dongle = false; | |
215 | ||
4562236b | 216 | if (straps->hdmi_disable == 0) { |
4562236b HW |
217 | if (straps->dc_pinstraps_audio & 0x2) { |
218 | aud_support->hdmi_audio_on_dongle = true; | |
b8e9eb72 | 219 | aud_support->hdmi_audio_native = true; |
4562236b HW |
220 | } |
221 | } | |
222 | ||
223 | switch (straps->audio_stream_number) { | |
224 | case 0: /* multi streams supported */ | |
225 | break; | |
226 | case 1: /* multi streams not supported */ | |
227 | *num_audio = 1; | |
228 | break; | |
229 | default: | |
230 | DC_ERR("DC: unexpected audio fuse!\n"); | |
17a96033 | 231 | } |
4562236b HW |
232 | } |
233 | ||
234 | bool resource_construct( | |
235 | unsigned int num_virtual_links, | |
fb3466a4 | 236 | struct dc *dc, |
4562236b HW |
237 | struct resource_pool *pool, |
238 | const struct resource_create_funcs *create_funcs) | |
239 | { | |
240 | struct dc_context *ctx = dc->ctx; | |
241 | const struct resource_caps *caps = pool->res_cap; | |
242 | int i; | |
243 | unsigned int num_audio = caps->num_audio; | |
244 | struct resource_straps straps = {0}; | |
245 | ||
246 | if (create_funcs->read_dce_straps) | |
247 | create_funcs->read_dce_straps(dc->ctx, &straps); | |
248 | ||
249 | pool->audio_count = 0; | |
250 | if (create_funcs->create_audio) { | |
251 | /* find the total number of streams available via the | |
252 | * AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT | |
253 | * registers (one for each pin) starting from pin 1 | |
254 | * up to the max number of audio pins. | |
255 | * We stop on the first pin where | |
256 | * PORT_CONNECTIVITY == 1 (as instructed by HW team). | |
257 | */ | |
258 | update_num_audio(&straps, &num_audio, &pool->audio_support); | |
5feb9f07 | 259 | for (i = 0; i < caps->num_audio; i++) { |
4562236b HW |
260 | struct audio *aud = create_funcs->create_audio(ctx, i); |
261 | ||
262 | if (aud == NULL) { | |
263 | DC_ERR("DC: failed to create audio!\n"); | |
264 | return false; | |
265 | } | |
4562236b HW |
266 | if (!aud->funcs->endpoint_valid(aud)) { |
267 | aud->funcs->destroy(&aud); | |
268 | break; | |
269 | } | |
4562236b HW |
270 | pool->audios[i] = aud; |
271 | pool->audio_count++; | |
272 | } | |
273 | } | |
274 | ||
275 | pool->stream_enc_count = 0; | |
276 | if (create_funcs->create_stream_encoder) { | |
277 | for (i = 0; i < caps->num_stream_encoder; i++) { | |
278 | pool->stream_enc[i] = create_funcs->create_stream_encoder(i, ctx); | |
279 | if (pool->stream_enc[i] == NULL) | |
280 | DC_ERR("DC: failed to create stream_encoder!\n"); | |
281 | pool->stream_enc_count++; | |
282 | } | |
283 | } | |
929c3aaa | 284 | |
4176664b CL |
285 | dc->caps.dynamic_audio = false; |
286 | if (pool->audio_count < pool->stream_enc_count) { | |
287 | dc->caps.dynamic_audio = true; | |
288 | } | |
4562236b HW |
289 | for (i = 0; i < num_virtual_links; i++) { |
290 | pool->stream_enc[pool->stream_enc_count] = | |
291 | virtual_stream_encoder_create( | |
292 | ctx, ctx->dc_bios); | |
293 | if (pool->stream_enc[pool->stream_enc_count] == NULL) { | |
294 | DC_ERR("DC: failed to create stream_encoder!\n"); | |
295 | return false; | |
296 | } | |
297 | pool->stream_enc_count++; | |
298 | } | |
299 | ||
300 | dc->hwseq = create_funcs->create_hwseq(ctx); | |
301 | ||
302 | return true; | |
303 | } | |
ad8960a6 ML |
304 | static int find_matching_clock_source( |
305 | const struct resource_pool *pool, | |
306 | struct clock_source *clock_source) | |
307 | { | |
4562236b | 308 | |
ad8960a6 ML |
309 | int i; |
310 | ||
311 | for (i = 0; i < pool->clk_src_count; i++) { | |
312 | if (pool->clock_sources[i] == clock_source) | |
313 | return i; | |
314 | } | |
315 | return -1; | |
316 | } | |
4562236b | 317 | |
21e67d4d | 318 | void resource_unreference_clock_source( |
4562236b | 319 | struct resource_context *res_ctx, |
a2b8659d | 320 | const struct resource_pool *pool, |
4a629536 | 321 | struct clock_source *clock_source) |
4562236b | 322 | { |
ad8960a6 | 323 | int i = find_matching_clock_source(pool, clock_source); |
4562236b | 324 | |
ad8960a6 | 325 | if (i > -1) |
4562236b HW |
326 | res_ctx->clock_source_ref_count[i]--; |
327 | ||
21e67d4d | 328 | if (pool->dp_clock_source == clock_source) |
4562236b | 329 | res_ctx->dp_clock_source_ref_count--; |
4562236b HW |
330 | } |
331 | ||
332 | void resource_reference_clock_source( | |
333 | struct resource_context *res_ctx, | |
a2b8659d | 334 | const struct resource_pool *pool, |
4562236b HW |
335 | struct clock_source *clock_source) |
336 | { | |
ad8960a6 | 337 | int i = find_matching_clock_source(pool, clock_source); |
4562236b | 338 | |
ad8960a6 | 339 | if (i > -1) |
4562236b | 340 | res_ctx->clock_source_ref_count[i]++; |
4562236b | 341 | |
a2b8659d | 342 | if (pool->dp_clock_source == clock_source) |
4562236b HW |
343 | res_ctx->dp_clock_source_ref_count++; |
344 | } | |
345 | ||
ad8960a6 ML |
346 | int resource_get_clock_source_reference( |
347 | struct resource_context *res_ctx, | |
348 | const struct resource_pool *pool, | |
349 | struct clock_source *clock_source) | |
350 | { | |
351 | int i = find_matching_clock_source(pool, clock_source); | |
352 | ||
353 | if (i > -1) | |
354 | return res_ctx->clock_source_ref_count[i]; | |
355 | ||
356 | if (pool->dp_clock_source == clock_source) | |
357 | return res_ctx->dp_clock_source_ref_count; | |
358 | ||
359 | return -1; | |
360 | } | |
361 | ||
4562236b | 362 | bool resource_are_streams_timing_synchronizable( |
0971c40e HW |
363 | struct dc_stream_state *stream1, |
364 | struct dc_stream_state *stream2) | |
4562236b | 365 | { |
4fa086b9 | 366 | if (stream1->timing.h_total != stream2->timing.h_total) |
4562236b HW |
367 | return false; |
368 | ||
4fa086b9 | 369 | if (stream1->timing.v_total != stream2->timing.v_total) |
4562236b HW |
370 | return false; |
371 | ||
4fa086b9 LSL |
372 | if (stream1->timing.h_addressable |
373 | != stream2->timing.h_addressable) | |
4562236b HW |
374 | return false; |
375 | ||
4fa086b9 LSL |
376 | if (stream1->timing.v_addressable |
377 | != stream2->timing.v_addressable) | |
4562236b HW |
378 | return false; |
379 | ||
380604e2 KC |
380 | if (stream1->timing.pix_clk_100hz |
381 | != stream2->timing.pix_clk_100hz) | |
4562236b HW |
382 | return false; |
383 | ||
3e27e10e ML |
384 | if (stream1->clamping.c_depth != stream2->clamping.c_depth) |
385 | return false; | |
386 | ||
4562236b | 387 | if (stream1->phy_pix_clk != stream2->phy_pix_clk |
7e2fe319 CL |
388 | && (!dc_is_dp_signal(stream1->signal) |
389 | || !dc_is_dp_signal(stream2->signal))) | |
4562236b HW |
390 | return false; |
391 | ||
d77f778e CL |
392 | if (stream1->view_format != stream2->view_format) |
393 | return false; | |
394 | ||
0460f9ab JL |
395 | if (stream1->ignore_msa_timing_param || stream2->ignore_msa_timing_param) |
396 | return false; | |
397 | ||
4562236b HW |
398 | return true; |
399 | } | |
3e27e10e ML |
400 | static bool is_dp_and_hdmi_sharable( |
401 | struct dc_stream_state *stream1, | |
402 | struct dc_stream_state *stream2) | |
403 | { | |
404 | if (stream1->ctx->dc->caps.disable_dp_clk_share) | |
405 | return false; | |
406 | ||
407 | if (stream1->clamping.c_depth != COLOR_DEPTH_888 || | |
d77f778e | 408 | stream2->clamping.c_depth != COLOR_DEPTH_888) |
43fbbe89 | 409 | return false; |
3e27e10e ML |
410 | |
411 | return true; | |
412 | ||
413 | } | |
4562236b HW |
414 | |
415 | static bool is_sharable_clk_src( | |
416 | const struct pipe_ctx *pipe_with_clk_src, | |
417 | const struct pipe_ctx *pipe) | |
418 | { | |
419 | if (pipe_with_clk_src->clock_source == NULL) | |
420 | return false; | |
421 | ||
422 | if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL) | |
423 | return false; | |
424 | ||
3e27e10e ML |
425 | if (dc_is_dp_signal(pipe_with_clk_src->stream->signal) || |
426 | (dc_is_dp_signal(pipe->stream->signal) && | |
427 | !is_dp_and_hdmi_sharable(pipe_with_clk_src->stream, | |
428 | pipe->stream))) | |
4562236b HW |
429 | return false; |
430 | ||
431 | if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal) | |
fc69009e | 432 | && dc_is_dual_link_signal(pipe->stream->signal)) |
4562236b HW |
433 | return false; |
434 | ||
435 | if (dc_is_hdmi_signal(pipe->stream->signal) | |
fc69009e | 436 | && dc_is_dual_link_signal(pipe_with_clk_src->stream->signal)) |
4562236b HW |
437 | return false; |
438 | ||
439 | if (!resource_are_streams_timing_synchronizable( | |
440 | pipe_with_clk_src->stream, pipe->stream)) | |
441 | return false; | |
442 | ||
443 | return true; | |
444 | } | |
445 | ||
446 | struct clock_source *resource_find_used_clk_src_for_sharing( | |
447 | struct resource_context *res_ctx, | |
448 | struct pipe_ctx *pipe_ctx) | |
449 | { | |
450 | int i; | |
451 | ||
452 | for (i = 0; i < MAX_PIPES; i++) { | |
453 | if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx)) | |
454 | return res_ctx->pipe_ctx[i].clock_source; | |
455 | } | |
456 | ||
457 | return NULL; | |
458 | } | |
459 | ||
460 | static enum pixel_format convert_pixel_format_to_dalsurface( | |
461 | enum surface_pixel_format surface_pixel_format) | |
462 | { | |
463 | enum pixel_format dal_pixel_format = PIXEL_FORMAT_UNKNOWN; | |
464 | ||
465 | switch (surface_pixel_format) { | |
466 | case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS: | |
467 | dal_pixel_format = PIXEL_FORMAT_INDEX8; | |
468 | break; | |
469 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555: | |
470 | dal_pixel_format = PIXEL_FORMAT_RGB565; | |
471 | break; | |
472 | case SURFACE_PIXEL_FORMAT_GRPH_RGB565: | |
473 | dal_pixel_format = PIXEL_FORMAT_RGB565; | |
474 | break; | |
475 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888: | |
476 | dal_pixel_format = PIXEL_FORMAT_ARGB8888; | |
477 | break; | |
8693049a | 478 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888: |
4562236b HW |
479 | dal_pixel_format = PIXEL_FORMAT_ARGB8888; |
480 | break; | |
481 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010: | |
482 | dal_pixel_format = PIXEL_FORMAT_ARGB2101010; | |
483 | break; | |
484 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010: | |
485 | dal_pixel_format = PIXEL_FORMAT_ARGB2101010; | |
486 | break; | |
487 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS: | |
488 | dal_pixel_format = PIXEL_FORMAT_ARGB2101010_XRBIAS; | |
489 | break; | |
490 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F: | |
491 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F: | |
492 | dal_pixel_format = PIXEL_FORMAT_FP16; | |
493 | break; | |
494 | case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr: | |
4562236b | 495 | case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb: |
87449a90 | 496 | dal_pixel_format = PIXEL_FORMAT_420BPP8; |
4562236b | 497 | break; |
ffbcd19a VP |
498 | case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr: |
499 | case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb: | |
87449a90 | 500 | dal_pixel_format = PIXEL_FORMAT_420BPP10; |
ffbcd19a | 501 | break; |
4562236b HW |
502 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616: |
503 | default: | |
504 | dal_pixel_format = PIXEL_FORMAT_UNKNOWN; | |
505 | break; | |
506 | } | |
507 | return dal_pixel_format; | |
508 | } | |
509 | ||
9b6067c0 DL |
510 | static inline void get_vp_scan_direction( |
511 | enum dc_rotation_angle rotation, | |
512 | bool horizontal_mirror, | |
513 | bool *orthogonal_rotation, | |
514 | bool *flip_vert_scan_dir, | |
515 | bool *flip_horz_scan_dir) | |
4562236b | 516 | { |
9b6067c0 DL |
517 | *orthogonal_rotation = false; |
518 | *flip_vert_scan_dir = false; | |
519 | *flip_horz_scan_dir = false; | |
520 | if (rotation == ROTATION_ANGLE_180) { | |
521 | *flip_vert_scan_dir = true; | |
522 | *flip_horz_scan_dir = true; | |
523 | } else if (rotation == ROTATION_ANGLE_90) { | |
524 | *orthogonal_rotation = true; | |
525 | *flip_horz_scan_dir = true; | |
526 | } else if (rotation == ROTATION_ANGLE_270) { | |
527 | *orthogonal_rotation = true; | |
528 | *flip_vert_scan_dir = true; | |
529 | } | |
530 | ||
531 | if (horizontal_mirror) | |
532 | *flip_horz_scan_dir = !*flip_horz_scan_dir; | |
4562236b HW |
533 | } |
534 | ||
228a10d4 AD |
535 | int get_num_odm_splits(struct pipe_ctx *pipe) |
536 | { | |
537 | int odm_split_count = 0; | |
538 | struct pipe_ctx *next_pipe = pipe->next_odm_pipe; | |
539 | while (next_pipe) { | |
540 | odm_split_count++; | |
541 | next_pipe = next_pipe->next_odm_pipe; | |
542 | } | |
543 | pipe = pipe->prev_odm_pipe; | |
544 | while (pipe) { | |
545 | odm_split_count++; | |
546 | pipe = pipe->prev_odm_pipe; | |
547 | } | |
548 | return odm_split_count; | |
549 | } | |
550 | ||
5bf24270 DL |
551 | static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int *split_count, int *split_idx) |
552 | { | |
553 | *split_count = get_num_odm_splits(pipe_ctx); | |
554 | *split_idx = 0; | |
555 | if (*split_count == 0) { | |
556 | /*Check for mpc split*/ | |
557 | struct pipe_ctx *split_pipe = pipe_ctx->top_pipe; | |
558 | ||
559 | while (split_pipe && split_pipe->plane_state == pipe_ctx->plane_state) { | |
560 | (*split_idx)++; | |
561 | (*split_count)++; | |
562 | split_pipe = split_pipe->top_pipe; | |
563 | } | |
564 | split_pipe = pipe_ctx->bottom_pipe; | |
565 | while (split_pipe && split_pipe->plane_state == pipe_ctx->plane_state) { | |
566 | (*split_count)++; | |
567 | split_pipe = split_pipe->bottom_pipe; | |
568 | } | |
569 | } else { | |
570 | /*Get odm split index*/ | |
571 | struct pipe_ctx *split_pipe = pipe_ctx->prev_odm_pipe; | |
572 | ||
573 | while (split_pipe) { | |
574 | (*split_idx)++; | |
575 | split_pipe = split_pipe->prev_odm_pipe; | |
576 | } | |
577 | } | |
578 | } | |
579 | ||
b2d0a103 | 580 | static void calculate_viewport(struct pipe_ctx *pipe_ctx) |
4562236b | 581 | { |
3be5262e | 582 | const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
0971c40e | 583 | const struct dc_stream_state *stream = pipe_ctx->stream; |
6702a9ac | 584 | struct scaler_data *data = &pipe_ctx->plane_res.scl_data; |
3be5262e | 585 | struct rect surf_src = plane_state->src_rect; |
9b6067c0 | 586 | struct rect clip, dest; |
87449a90 AK |
587 | int vpc_div = (data->format == PIXEL_FORMAT_420BPP8 |
588 | || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1; | |
5bf24270 DL |
589 | int split_count = 0; |
590 | int split_idx = 0; | |
9b6067c0 | 591 | bool orthogonal_rotation, flip_y_start, flip_x_start; |
83d40659 | 592 | |
5bf24270 DL |
593 | calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx); |
594 | ||
7f5c22d1 VP |
595 | if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE || |
596 | stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) { | |
5bf24270 DL |
597 | split_count = 0; |
598 | split_idx = 0; | |
7b779c99 | 599 | } |
86006a7f | 600 | |
4562236b HW |
601 | /* The actual clip is an intersection between stream |
602 | * source and surface clip | |
603 | */ | |
9b6067c0 | 604 | dest = plane_state->dst_rect; |
3be5262e HW |
605 | clip.x = stream->src.x > plane_state->clip_rect.x ? |
606 | stream->src.x : plane_state->clip_rect.x; | |
4562236b | 607 | |
1fbd2cfc | 608 | clip.width = stream->src.x + stream->src.width < |
3be5262e | 609 | plane_state->clip_rect.x + plane_state->clip_rect.width ? |
1fbd2cfc | 610 | stream->src.x + stream->src.width - clip.x : |
3be5262e | 611 | plane_state->clip_rect.x + plane_state->clip_rect.width - clip.x ; |
4562236b | 612 | |
3be5262e HW |
613 | clip.y = stream->src.y > plane_state->clip_rect.y ? |
614 | stream->src.y : plane_state->clip_rect.y; | |
4562236b | 615 | |
1fbd2cfc | 616 | clip.height = stream->src.y + stream->src.height < |
3be5262e | 617 | plane_state->clip_rect.y + plane_state->clip_rect.height ? |
1fbd2cfc | 618 | stream->src.y + stream->src.height - clip.y : |
3be5262e | 619 | plane_state->clip_rect.y + plane_state->clip_rect.height - clip.y ; |
4562236b | 620 | |
9b6067c0 DL |
621 | /* |
622 | * Need to calculate how scan origin is shifted in vp space | |
623 | * to correctly rotate clip and dst | |
624 | */ | |
625 | get_vp_scan_direction( | |
626 | plane_state->rotation, | |
627 | plane_state->horizontal_mirror, | |
628 | &orthogonal_rotation, | |
629 | &flip_y_start, | |
630 | &flip_x_start); | |
631 | ||
632 | if (orthogonal_rotation) { | |
633 | swap(clip.x, clip.y); | |
634 | swap(clip.width, clip.height); | |
635 | swap(dest.x, dest.y); | |
636 | swap(dest.width, dest.height); | |
637 | } | |
638 | if (flip_x_start) { | |
639 | clip.x = dest.x + dest.width - clip.x - clip.width; | |
640 | dest.x = 0; | |
641 | } | |
642 | if (flip_y_start) { | |
643 | clip.y = dest.y + dest.height - clip.y - clip.height; | |
644 | dest.y = 0; | |
645 | } | |
646 | ||
86006a7f | 647 | /* offset = surf_src.ofs + (clip.ofs - surface->dst_rect.ofs) * scl_ratio |
4562236b HW |
648 | * num_pixels = clip.num_pix * scl_ratio |
649 | */ | |
9b6067c0 DL |
650 | data->viewport.x = surf_src.x + (clip.x - dest.x) * surf_src.width / dest.width; |
651 | data->viewport.width = clip.width * surf_src.width / dest.width; | |
652 | ||
653 | data->viewport.y = surf_src.y + (clip.y - dest.y) * surf_src.height / dest.height; | |
654 | data->viewport.height = clip.height * surf_src.height / dest.height; | |
655 | ||
656 | /* Handle split */ | |
5bf24270 DL |
657 | if (split_count) { |
658 | /* extra pixels in the division remainder need to go to pipes after | |
659 | * the extra pixel index minus one(epimo) defined here as: | |
660 | */ | |
661 | int epimo = 0; | |
662 | ||
9b6067c0 | 663 | if (orthogonal_rotation) { |
5bf24270 DL |
664 | if (flip_y_start) |
665 | split_idx = split_count - split_idx; | |
666 | ||
667 | epimo = split_count - data->viewport.height % (split_count + 1); | |
668 | ||
669 | data->viewport.y += (data->viewport.height / (split_count + 1)) * split_idx; | |
670 | if (split_idx > epimo) | |
671 | data->viewport.y += split_idx - epimo - 1; | |
672 | data->viewport.height = data->viewport.height / (split_count + 1) + (split_idx > epimo ? 1 : 0); | |
9b6067c0 | 673 | } else { |
5bf24270 DL |
674 | if (flip_x_start) |
675 | split_idx = split_count - split_idx; | |
676 | ||
677 | epimo = split_count - data->viewport.width % (split_count + 1); | |
678 | ||
679 | data->viewport.x += (data->viewport.width / (split_count + 1)) * split_idx; | |
680 | if (split_idx > epimo) | |
681 | data->viewport.x += split_idx - epimo - 1; | |
682 | data->viewport.width = data->viewport.width / (split_count + 1) + (split_idx > epimo ? 1 : 0); | |
9b6067c0 DL |
683 | } |
684 | } | |
9b5349f7 | 685 | |
b2d0a103 DL |
686 | /* Round down, compensate in init */ |
687 | data->viewport_c.x = data->viewport.x / vpc_div; | |
688 | data->viewport_c.y = data->viewport.y / vpc_div; | |
9b6067c0 DL |
689 | data->inits.h_c = (data->viewport.x % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero; |
690 | data->inits.v_c = (data->viewport.y % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero; | |
691 | ||
b2d0a103 DL |
692 | /* Round up, assume original video size always even dimensions */ |
693 | data->viewport_c.width = (data->viewport.width + vpc_div - 1) / vpc_div; | |
694 | data->viewport_c.height = (data->viewport.height + vpc_div - 1) / vpc_div; | |
fa90219a DL |
695 | |
696 | data->viewport_unadjusted = data->viewport; | |
697 | data->viewport_c_unadjusted = data->viewport_c; | |
4562236b HW |
698 | } |
699 | ||
9b6067c0 | 700 | static void calculate_recout(struct pipe_ctx *pipe_ctx) |
4562236b | 701 | { |
3be5262e | 702 | const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
0971c40e | 703 | const struct dc_stream_state *stream = pipe_ctx->stream; |
5bf24270 | 704 | struct scaler_data *data = &pipe_ctx->plane_res.scl_data; |
3be5262e | 705 | struct rect surf_clip = plane_state->clip_rect; |
5bf24270 DL |
706 | bool pri_split_tb = pipe_ctx->bottom_pipe && |
707 | pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state && | |
708 | stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM; | |
709 | bool sec_split_tb = pipe_ctx->top_pipe && | |
710 | pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state && | |
711 | stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM; | |
712 | int split_count = 0; | |
713 | int split_idx = 0; | |
714 | ||
715 | calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx); | |
716 | ||
717 | data->recout.x = stream->dst.x; | |
4fa086b9 | 718 | if (stream->src.x < surf_clip.x) |
5bf24270 | 719 | data->recout.x += (surf_clip.x - stream->src.x) * stream->dst.width |
4fa086b9 | 720 | / stream->src.width; |
4562236b | 721 | |
5bf24270 DL |
722 | data->recout.width = surf_clip.width * stream->dst.width / stream->src.width; |
723 | if (data->recout.width + data->recout.x > stream->dst.x + stream->dst.width) | |
724 | data->recout.width = stream->dst.x + stream->dst.width - data->recout.x; | |
4562236b | 725 | |
5bf24270 | 726 | data->recout.y = stream->dst.y; |
4fa086b9 | 727 | if (stream->src.y < surf_clip.y) |
5bf24270 | 728 | data->recout.y += (surf_clip.y - stream->src.y) * stream->dst.height |
4fa086b9 | 729 | / stream->src.height; |
4562236b | 730 | |
5bf24270 DL |
731 | data->recout.height = surf_clip.height * stream->dst.height / stream->src.height; |
732 | if (data->recout.height + data->recout.y > stream->dst.y + stream->dst.height) | |
733 | data->recout.height = stream->dst.y + stream->dst.height - data->recout.y; | |
b2d0a103 | 734 | |
9b6067c0 | 735 | /* Handle h & v split, handle rotation using viewport */ |
5bf24270 DL |
736 | if (sec_split_tb) { |
737 | data->recout.y += data->recout.height / 2; | |
0c31a821 | 738 | /* Floor primary pipe, ceil 2ndary pipe */ |
5bf24270 DL |
739 | data->recout.height = (data->recout.height + 1) / 2; |
740 | } else if (pri_split_tb) | |
741 | data->recout.height /= 2; | |
742 | else if (split_count) { | |
743 | /* extra pixels in the division remainder need to go to pipes after | |
744 | * the extra pixel index minus one(epimo) defined here as: | |
745 | */ | |
746 | int epimo = split_count - data->recout.width % (split_count + 1); | |
747 | ||
748 | /*no recout offset due to odm */ | |
749 | if (!pipe_ctx->next_odm_pipe && !pipe_ctx->prev_odm_pipe) { | |
750 | data->recout.x += (data->recout.width / (split_count + 1)) * split_idx; | |
751 | if (split_idx > epimo) | |
752 | data->recout.x += split_idx - epimo - 1; | |
753 | } | |
754 | data->recout.width = data->recout.width / (split_count + 1) + (split_idx > epimo ? 1 : 0); | |
755 | } | |
4562236b HW |
756 | } |
757 | ||
b2d0a103 | 758 | static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx) |
4562236b | 759 | { |
3be5262e | 760 | const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
0971c40e | 761 | const struct dc_stream_state *stream = pipe_ctx->stream; |
3be5262e | 762 | struct rect surf_src = plane_state->src_rect; |
4fa086b9 LSL |
763 | const int in_w = stream->src.width; |
764 | const int in_h = stream->src.height; | |
765 | const int out_w = stream->dst.width; | |
766 | const int out_h = stream->dst.height; | |
4562236b | 767 | |
9b6067c0 | 768 | /*Swap surf_src height and width since scaling ratios are in recout rotation*/ |
3be5262e HW |
769 | if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 || |
770 | pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) | |
9b6067c0 | 771 | swap(surf_src.height, surf_src.width); |
86006a7f | 772 | |
eb0e5154 | 773 | pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction( |
86006a7f | 774 | surf_src.width, |
3be5262e | 775 | plane_state->dst_rect.width); |
eb0e5154 | 776 | pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction( |
86006a7f | 777 | surf_src.height, |
3be5262e | 778 | plane_state->dst_rect.height); |
4562236b | 779 | |
4fa086b9 | 780 | if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE) |
6702a9ac | 781 | pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2; |
4fa086b9 | 782 | else if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) |
6702a9ac | 783 | pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2; |
4562236b | 784 | |
6702a9ac HW |
785 | pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64( |
786 | pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h); | |
787 | pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64( | |
788 | pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w); | |
4562236b | 789 | |
6702a9ac HW |
790 | pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz; |
791 | pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert; | |
4562236b | 792 | |
6702a9ac HW |
793 | if (pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP8 |
794 | || pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP10) { | |
795 | pipe_ctx->plane_res.scl_data.ratios.horz_c.value /= 2; | |
796 | pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2; | |
4562236b | 797 | } |
0002d3ac DL |
798 | pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_truncate( |
799 | pipe_ctx->plane_res.scl_data.ratios.horz, 19); | |
800 | pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_truncate( | |
801 | pipe_ctx->plane_res.scl_data.ratios.vert, 19); | |
802 | pipe_ctx->plane_res.scl_data.ratios.horz_c = dc_fixpt_truncate( | |
803 | pipe_ctx->plane_res.scl_data.ratios.horz_c, 19); | |
804 | pipe_ctx->plane_res.scl_data.ratios.vert_c = dc_fixpt_truncate( | |
805 | pipe_ctx->plane_res.scl_data.ratios.vert_c, 19); | |
4562236b HW |
806 | } |
807 | ||
9b6067c0 DL |
808 | static inline void adjust_vp_and_init_for_seamless_clip( |
809 | bool flip_scan_dir, | |
810 | int recout_skip, | |
811 | int src_size, | |
812 | int taps, | |
813 | struct fixed31_32 ratio, | |
814 | struct fixed31_32 *init, | |
815 | int *vp_offset, | |
816 | int *vp_size) | |
b2d0a103 | 817 | { |
9b6067c0 | 818 | if (!flip_scan_dir) { |
9a08f51f | 819 | /* Adjust for viewport end clip-off */ |
9b6067c0 DL |
820 | if ((*vp_offset + *vp_size) < src_size) { |
821 | int vp_clip = src_size - *vp_size - *vp_offset; | |
822 | int int_part = dc_fixpt_floor(dc_fixpt_sub(*init, ratio)); | |
9a08f51f DL |
823 | |
824 | int_part = int_part > 0 ? int_part : 0; | |
9b6067c0 | 825 | *vp_size += int_part < vp_clip ? int_part : vp_clip; |
9a08f51f | 826 | } |
b2d0a103 | 827 | |
9a08f51f | 828 | /* Adjust for non-0 viewport offset */ |
9b6067c0 | 829 | if (*vp_offset) { |
9a08f51f DL |
830 | int int_part; |
831 | ||
9b6067c0 DL |
832 | *init = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_skip)); |
833 | int_part = dc_fixpt_floor(*init) - *vp_offset; | |
834 | if (int_part < taps) { | |
835 | int int_adj = *vp_offset >= (taps - int_part) ? | |
836 | (taps - int_part) : *vp_offset; | |
837 | *vp_offset -= int_adj; | |
838 | *vp_size += int_adj; | |
9a08f51f | 839 | int_part += int_adj; |
9b6067c0 DL |
840 | } else if (int_part > taps) { |
841 | *vp_offset += int_part - taps; | |
842 | *vp_size -= int_part - taps; | |
843 | int_part = taps; | |
9a08f51f | 844 | } |
9b6067c0 DL |
845 | init->value &= 0xffffffff; |
846 | *init = dc_fixpt_add_int(*init, int_part); | |
9a08f51f DL |
847 | } |
848 | } else { | |
849 | /* Adjust for non-0 viewport offset */ | |
9b6067c0 DL |
850 | if (*vp_offset) { |
851 | int int_part = dc_fixpt_floor(dc_fixpt_sub(*init, ratio)); | |
b2d0a103 | 852 | |
9a08f51f | 853 | int_part = int_part > 0 ? int_part : 0; |
9b6067c0 DL |
854 | *vp_size += int_part < *vp_offset ? int_part : *vp_offset; |
855 | *vp_offset -= int_part < *vp_offset ? int_part : *vp_offset; | |
9a08f51f | 856 | } |
b2d0a103 | 857 | |
9a08f51f | 858 | /* Adjust for viewport end clip-off */ |
9b6067c0 | 859 | if ((*vp_offset + *vp_size) < src_size) { |
9a08f51f | 860 | int int_part; |
9b6067c0 | 861 | int end_offset = src_size - *vp_offset - *vp_size; |
9a08f51f DL |
862 | |
863 | /* | |
864 | * this is init if vp had no offset, keep in mind this is from the | |
865 | * right side of vp due to scan direction | |
866 | */ | |
9b6067c0 | 867 | *init = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_skip)); |
9a08f51f DL |
868 | /* |
869 | * this is the difference between first pixel of viewport available to read | |
870 | * and init position, takning into account scan direction | |
871 | */ | |
9b6067c0 DL |
872 | int_part = dc_fixpt_floor(*init) - end_offset; |
873 | if (int_part < taps) { | |
874 | int int_adj = end_offset >= (taps - int_part) ? | |
875 | (taps - int_part) : end_offset; | |
876 | *vp_size += int_adj; | |
9a08f51f | 877 | int_part += int_adj; |
9b6067c0 DL |
878 | } else if (int_part > taps) { |
879 | *vp_size += int_part - taps; | |
880 | int_part = taps; | |
9a08f51f | 881 | } |
9b6067c0 DL |
882 | init->value &= 0xffffffff; |
883 | *init = dc_fixpt_add_int(*init, int_part); | |
b2d0a103 | 884 | } |
b2d0a103 | 885 | } |
9b6067c0 | 886 | } |
9a08f51f | 887 | |
9b6067c0 DL |
888 | static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx) |
889 | { | |
890 | const struct dc_plane_state *plane_state = pipe_ctx->plane_state; | |
891 | const struct dc_stream_state *stream = pipe_ctx->stream; | |
5bf24270 | 892 | struct pipe_ctx *odm_pipe = pipe_ctx->prev_odm_pipe; |
9b6067c0 DL |
893 | struct scaler_data *data = &pipe_ctx->plane_res.scl_data; |
894 | struct rect src = pipe_ctx->plane_state->src_rect; | |
895 | int recout_skip_h, recout_skip_v, surf_size_h, surf_size_v; | |
896 | int vpc_div = (data->format == PIXEL_FORMAT_420BPP8 | |
897 | || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1; | |
898 | bool orthogonal_rotation, flip_vert_scan_dir, flip_horz_scan_dir; | |
7287a675 | 899 | int odm_idx = 0; |
9a08f51f | 900 | |
9b6067c0 DL |
901 | /* |
902 | * Need to calculate the scan direction for viewport to make adjustments | |
903 | */ | |
904 | get_vp_scan_direction( | |
905 | plane_state->rotation, | |
906 | plane_state->horizontal_mirror, | |
907 | &orthogonal_rotation, | |
908 | &flip_vert_scan_dir, | |
909 | &flip_horz_scan_dir); | |
910 | ||
911 | /* Calculate src rect rotation adjusted to recout space */ | |
912 | surf_size_h = src.x + src.width; | |
913 | surf_size_v = src.y + src.height; | |
914 | if (flip_horz_scan_dir) | |
915 | src.x = 0; | |
916 | if (flip_vert_scan_dir) | |
917 | src.y = 0; | |
918 | if (orthogonal_rotation) { | |
919 | swap(src.x, src.y); | |
920 | swap(src.width, src.height); | |
921 | } | |
9a08f51f | 922 | |
9b6067c0 DL |
923 | /* Recout matching initial vp offset = recout_offset - (stream dst offset + |
924 | * ((surf dst offset - stream src offset) * 1/ stream scaling ratio) | |
925 | * - (surf surf_src offset * 1/ full scl ratio)) | |
926 | */ | |
927 | recout_skip_h = data->recout.x - (stream->dst.x + (plane_state->dst_rect.x - stream->src.x) | |
928 | * stream->dst.width / stream->src.width - | |
929 | src.x * plane_state->dst_rect.width / src.width | |
930 | * stream->dst.width / stream->src.width); | |
7287a675 | 931 | /*modified recout_skip_h calculation due to odm having no recout offset*/ |
5bf24270 | 932 | while (odm_pipe) { |
7287a675 | 933 | odm_idx++; |
5bf24270 DL |
934 | odm_pipe = odm_pipe->prev_odm_pipe; |
935 | } | |
7287a675 DL |
936 | if (odm_idx) |
937 | recout_skip_h += odm_idx * data->recout.width; | |
5bf24270 | 938 | |
9b6067c0 DL |
939 | recout_skip_v = data->recout.y - (stream->dst.y + (plane_state->dst_rect.y - stream->src.y) |
940 | * stream->dst.height / stream->src.height - | |
941 | src.y * plane_state->dst_rect.height / src.height | |
942 | * stream->dst.height / stream->src.height); | |
943 | if (orthogonal_rotation) | |
944 | swap(recout_skip_h, recout_skip_v); | |
945 | /* | |
946 | * Init calculated according to formula: | |
947 | * init = (scaling_ratio + number_of_taps + 1) / 2 | |
948 | * init_bot = init + scaling_ratio | |
949 | * init_c = init + truncated_vp_c_offset(from calculate viewport) | |
950 | */ | |
951 | data->inits.h = dc_fixpt_truncate(dc_fixpt_div_int( | |
952 | dc_fixpt_add_int(data->ratios.horz, data->taps.h_taps + 1), 2), 19); | |
b2d0a103 | 953 | |
9b6067c0 DL |
954 | data->inits.h_c = dc_fixpt_truncate(dc_fixpt_add(data->inits.h_c, dc_fixpt_div_int( |
955 | dc_fixpt_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2)), 19); | |
9a08f51f | 956 | |
9b6067c0 DL |
957 | data->inits.v = dc_fixpt_truncate(dc_fixpt_div_int( |
958 | dc_fixpt_add_int(data->ratios.vert, data->taps.v_taps + 1), 2), 19); | |
9a08f51f | 959 | |
9b6067c0 DL |
960 | data->inits.v_c = dc_fixpt_truncate(dc_fixpt_add(data->inits.v_c, dc_fixpt_div_int( |
961 | dc_fixpt_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2)), 19); | |
9a08f51f | 962 | |
9b6067c0 DL |
963 | /* |
964 | * Taps, inits and scaling ratios are in recout space need to rotate | |
965 | * to viewport rotation before adjustment | |
966 | */ | |
967 | adjust_vp_and_init_for_seamless_clip( | |
968 | flip_horz_scan_dir, | |
969 | recout_skip_h, | |
970 | surf_size_h, | |
971 | orthogonal_rotation ? data->taps.v_taps : data->taps.h_taps, | |
972 | orthogonal_rotation ? data->ratios.vert : data->ratios.horz, | |
973 | orthogonal_rotation ? &data->inits.v : &data->inits.h, | |
974 | &data->viewport.x, | |
975 | &data->viewport.width); | |
976 | adjust_vp_and_init_for_seamless_clip( | |
977 | flip_horz_scan_dir, | |
978 | recout_skip_h, | |
979 | surf_size_h / vpc_div, | |
980 | orthogonal_rotation ? data->taps.v_taps_c : data->taps.h_taps_c, | |
981 | orthogonal_rotation ? data->ratios.vert_c : data->ratios.horz_c, | |
982 | orthogonal_rotation ? &data->inits.v_c : &data->inits.h_c, | |
983 | &data->viewport_c.x, | |
984 | &data->viewport_c.width); | |
985 | adjust_vp_and_init_for_seamless_clip( | |
986 | flip_vert_scan_dir, | |
987 | recout_skip_v, | |
988 | surf_size_v, | |
989 | orthogonal_rotation ? data->taps.h_taps : data->taps.v_taps, | |
990 | orthogonal_rotation ? data->ratios.horz : data->ratios.vert, | |
991 | orthogonal_rotation ? &data->inits.h : &data->inits.v, | |
992 | &data->viewport.y, | |
993 | &data->viewport.height); | |
994 | adjust_vp_and_init_for_seamless_clip( | |
995 | flip_vert_scan_dir, | |
996 | recout_skip_v, | |
997 | surf_size_v / vpc_div, | |
998 | orthogonal_rotation ? data->taps.h_taps_c : data->taps.v_taps_c, | |
999 | orthogonal_rotation ? data->ratios.horz_c : data->ratios.vert_c, | |
1000 | orthogonal_rotation ? &data->inits.h_c : &data->inits.v_c, | |
1001 | &data->viewport_c.y, | |
1002 | &data->viewport_c.height); | |
b2d0a103 DL |
1003 | |
1004 | /* Interlaced inits based on final vert inits */ | |
eb0e5154 DL |
1005 | data->inits.v_bot = dc_fixpt_add(data->inits.v, data->ratios.vert); |
1006 | data->inits.v_c_bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c); | |
1fbd2cfc | 1007 | |
b2d0a103 | 1008 | } |
3b733278 | 1009 | |
89d07b66 ST |
1010 | /* |
1011 | * When handling 270 rotation in mixed SLS mode, we have | |
1012 | * stream->timing.h_border_left that is non zero. If we are doing | |
1013 | * pipe-splitting, this h_border_left value gets added to recout.x and when it | |
1014 | * calls calculate_inits_and_adj_vp() and | |
1015 | * adjust_vp_and_init_for_seamless_clip(), it can cause viewport.height for a | |
1016 | * pipe to be incorrect. | |
1017 | * | |
1018 | * To fix this, instead of using stream->timing.h_border_left, we can use | |
1019 | * stream->dst.x to represent the border instead. So we will set h_border_left | |
1020 | * to 0 and shift the appropriate amount in stream->dst.x. We will then | |
1021 | * perform all calculations in resource_build_scaling_params() based on this | |
1022 | * and then restore the h_border_left and stream->dst.x to their original | |
1023 | * values. | |
1024 | * | |
1025 | * shift_border_left_to_dst() will shift the amount of h_border_left to | |
1026 | * stream->dst.x and set h_border_left to 0. restore_border_left_from_dst() | |
1027 | * will restore h_border_left and stream->dst.x back to their original values | |
1028 | * We also need to make sure pipe_ctx->plane_res.scl_data.h_active uses the | |
1029 | * original h_border_left value in its calculation. | |
1030 | */ | |
1031 | int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx) | |
1032 | { | |
1033 | int store_h_border_left = pipe_ctx->stream->timing.h_border_left; | |
1034 | ||
1035 | if (store_h_border_left) { | |
1036 | pipe_ctx->stream->timing.h_border_left = 0; | |
1037 | pipe_ctx->stream->dst.x += store_h_border_left; | |
1038 | } | |
1039 | return store_h_border_left; | |
1040 | } | |
1041 | ||
1042 | void restore_border_left_from_dst(struct pipe_ctx *pipe_ctx, | |
1043 | int store_h_border_left) | |
1044 | { | |
1045 | pipe_ctx->stream->dst.x -= store_h_border_left; | |
1046 | pipe_ctx->stream->timing.h_border_left = store_h_border_left; | |
1047 | } | |
1048 | ||
b2d0a103 | 1049 | bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) |
4562236b | 1050 | { |
3be5262e | 1051 | const struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
4fa086b9 | 1052 | struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; |
b2d0a103 | 1053 | bool res = false; |
89d07b66 | 1054 | int store_h_border_left = shift_border_left_to_dst(pipe_ctx); |
5d4b05dd | 1055 | DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger); |
4562236b HW |
1056 | /* Important: scaling ratio calculation requires pixel format, |
1057 | * lb depth calculation requires recout and taps require scaling ratios. | |
b2d0a103 | 1058 | * Inits require viewport, taps, ratios and recout of split pipe |
4562236b | 1059 | */ |
6702a9ac | 1060 | pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface( |
3be5262e | 1061 | pipe_ctx->plane_state->format); |
b2d0a103 DL |
1062 | |
1063 | calculate_scaling_ratios(pipe_ctx); | |
4562236b | 1064 | |
b2d0a103 | 1065 | calculate_viewport(pipe_ctx); |
4562236b | 1066 | |
3a4837fb SL |
1067 | if (pipe_ctx->plane_res.scl_data.viewport.height < 12 || |
1068 | pipe_ctx->plane_res.scl_data.viewport.width < 12) { | |
89d07b66 ST |
1069 | if (store_h_border_left) { |
1070 | restore_border_left_from_dst(pipe_ctx, | |
1071 | store_h_border_left); | |
1072 | } | |
4562236b | 1073 | return false; |
89d07b66 | 1074 | } |
4562236b | 1075 | |
9b6067c0 | 1076 | calculate_recout(pipe_ctx); |
4562236b HW |
1077 | |
1078 | /** | |
1079 | * Setting line buffer pixel depth to 24bpp yields banding | |
1080 | * on certain displays, such as the Sharp 4k | |
1081 | */ | |
6702a9ac | 1082 | pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; |
33eef72f | 1083 | pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; |
4562236b | 1084 | |
199e458a | 1085 | pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left; |
58bb0e63 | 1086 | pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top; |
199e458a | 1087 | |
89d07b66 ST |
1088 | pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + |
1089 | store_h_border_left + timing->h_border_right; | |
1090 | pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + | |
1091 | timing->v_border_top + timing->v_border_bottom; | |
5bf24270 DL |
1092 | if (pipe_ctx->next_odm_pipe || pipe_ctx->prev_odm_pipe) |
1093 | pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1; | |
1b6c8067 | 1094 | |
4562236b | 1095 | /* Taps calculations */ |
d94585a0 YHL |
1096 | if (pipe_ctx->plane_res.xfm != NULL) |
1097 | res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( | |
1098 | pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); | |
1099 | ||
1100 | if (pipe_ctx->plane_res.dpp != NULL) | |
1101 | res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( | |
1102 | pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); | |
f7938bc0 | 1103 | |
f7938bc0 | 1104 | |
4562236b HW |
1105 | if (!res) { |
1106 | /* Try 24 bpp linebuffer */ | |
6702a9ac | 1107 | pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP; |
4562236b | 1108 | |
1b6c8067 BL |
1109 | if (pipe_ctx->plane_res.xfm != NULL) |
1110 | res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( | |
1111 | pipe_ctx->plane_res.xfm, | |
1112 | &pipe_ctx->plane_res.scl_data, | |
1113 | &plane_state->scaling_quality); | |
1114 | ||
1115 | if (pipe_ctx->plane_res.dpp != NULL) | |
1116 | res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( | |
1117 | pipe_ctx->plane_res.dpp, | |
1118 | &pipe_ctx->plane_res.scl_data, | |
1119 | &plane_state->scaling_quality); | |
4562236b HW |
1120 | } |
1121 | ||
b2d0a103 | 1122 | if (res) |
1fbd2cfc | 1123 | /* May need to re-check lb size after this in some obscure scenario */ |
9b6067c0 | 1124 | calculate_inits_and_adj_vp(pipe_ctx); |
b2d0a103 | 1125 | |
1296423b | 1126 | DC_LOG_SCALER( |
4562236b HW |
1127 | "%s: Viewport:\nheight:%d width:%d x:%d " |
1128 | "y:%d\n dst_rect:\nheight:%d width:%d x:%d " | |
1129 | "y:%d\n", | |
1130 | __func__, | |
6702a9ac HW |
1131 | pipe_ctx->plane_res.scl_data.viewport.height, |
1132 | pipe_ctx->plane_res.scl_data.viewport.width, | |
1133 | pipe_ctx->plane_res.scl_data.viewport.x, | |
1134 | pipe_ctx->plane_res.scl_data.viewport.y, | |
3be5262e HW |
1135 | plane_state->dst_rect.height, |
1136 | plane_state->dst_rect.width, | |
1137 | plane_state->dst_rect.x, | |
1138 | plane_state->dst_rect.y); | |
4562236b | 1139 | |
89d07b66 ST |
1140 | if (store_h_border_left) |
1141 | restore_border_left_from_dst(pipe_ctx, store_h_border_left); | |
1142 | ||
4562236b HW |
1143 | return res; |
1144 | } | |
1145 | ||
1146 | ||
1147 | enum dc_status resource_build_scaling_params_for_context( | |
fb3466a4 | 1148 | const struct dc *dc, |
608ac7bb | 1149 | struct dc_state *context) |
4562236b HW |
1150 | { |
1151 | int i; | |
1152 | ||
1153 | for (i = 0; i < MAX_PIPES; i++) { | |
3be5262e | 1154 | if (context->res_ctx.pipe_ctx[i].plane_state != NULL && |
4562236b | 1155 | context->res_ctx.pipe_ctx[i].stream != NULL) |
b2d0a103 | 1156 | if (!resource_build_scaling_params(&context->res_ctx.pipe_ctx[i])) |
f84a8161 | 1157 | return DC_FAIL_SCALING; |
4562236b HW |
1158 | } |
1159 | ||
1160 | return DC_OK; | |
1161 | } | |
1162 | ||
a2b8659d TC |
1163 | struct pipe_ctx *find_idle_secondary_pipe( |
1164 | struct resource_context *res_ctx, | |
5581192d JL |
1165 | const struct resource_pool *pool, |
1166 | const struct pipe_ctx *primary_pipe) | |
4562236b HW |
1167 | { |
1168 | int i; | |
1169 | struct pipe_ctx *secondary_pipe = NULL; | |
1170 | ||
1171 | /* | |
5581192d JL |
1172 | * We add a preferred pipe mapping to avoid the chance that |
1173 | * MPCCs already in use will need to be reassigned to other trees. | |
1174 | * For example, if we went with the strict, assign backwards logic: | |
1175 | * | |
1176 | * (State 1) | |
1177 | * Display A on, no surface, top pipe = 0 | |
1178 | * Display B on, no surface, top pipe = 1 | |
1179 | * | |
1180 | * (State 2) | |
1181 | * Display A on, no surface, top pipe = 0 | |
1182 | * Display B on, surface enable, top pipe = 1, bottom pipe = 5 | |
1183 | * | |
1184 | * (State 3) | |
1185 | * Display A on, surface enable, top pipe = 0, bottom pipe = 5 | |
1186 | * Display B on, surface enable, top pipe = 1, bottom pipe = 4 | |
1187 | * | |
1188 | * The state 2->3 transition requires remapping MPCC 5 from display B | |
1189 | * to display A. | |
1190 | * | |
1191 | * However, with the preferred pipe logic, state 2 would look like: | |
1192 | * | |
1193 | * (State 2) | |
1194 | * Display A on, no surface, top pipe = 0 | |
1195 | * Display B on, surface enable, top pipe = 1, bottom pipe = 4 | |
1196 | * | |
1197 | * This would then cause 2->3 to not require remapping any MPCCs. | |
4562236b | 1198 | */ |
5581192d JL |
1199 | if (primary_pipe) { |
1200 | int preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx; | |
1201 | if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL) { | |
1202 | secondary_pipe = &res_ctx->pipe_ctx[preferred_pipe_idx]; | |
1203 | secondary_pipe->pipe_idx = preferred_pipe_idx; | |
4562236b HW |
1204 | } |
1205 | } | |
1206 | ||
5581192d JL |
1207 | /* |
1208 | * search backwards for the second pipe to keep pipe | |
1209 | * assignment more consistent | |
1210 | */ | |
1211 | if (!secondary_pipe) | |
1212 | for (i = pool->pipe_count - 1; i >= 0; i--) { | |
1213 | if (res_ctx->pipe_ctx[i].stream == NULL) { | |
1214 | secondary_pipe = &res_ctx->pipe_ctx[i]; | |
1215 | secondary_pipe->pipe_idx = i; | |
1216 | break; | |
1217 | } | |
1218 | } | |
4562236b HW |
1219 | |
1220 | return secondary_pipe; | |
1221 | } | |
1222 | ||
1223 | struct pipe_ctx *resource_get_head_pipe_for_stream( | |
1224 | struct resource_context *res_ctx, | |
0971c40e | 1225 | struct dc_stream_state *stream) |
4562236b HW |
1226 | { |
1227 | int i; | |
22498036 | 1228 | |
a2b8659d | 1229 | for (i = 0; i < MAX_PIPES; i++) { |
b1f6d01c DL |
1230 | if (res_ctx->pipe_ctx[i].stream == stream |
1231 | && !res_ctx->pipe_ctx[i].top_pipe | |
22498036 | 1232 | && !res_ctx->pipe_ctx[i].prev_odm_pipe) |
4562236b | 1233 | return &res_ctx->pipe_ctx[i]; |
4562236b HW |
1234 | } |
1235 | return NULL; | |
1236 | } | |
1237 | ||
b1f6d01c | 1238 | static struct pipe_ctx *resource_get_tail_pipe( |
19f89e23 | 1239 | struct resource_context *res_ctx, |
b1f6d01c | 1240 | struct pipe_ctx *head_pipe) |
19f89e23 | 1241 | { |
b1f6d01c | 1242 | struct pipe_ctx *tail_pipe; |
19f89e23 AG |
1243 | |
1244 | tail_pipe = head_pipe->bottom_pipe; | |
1245 | ||
1246 | while (tail_pipe) { | |
1247 | head_pipe = tail_pipe; | |
1248 | tail_pipe = tail_pipe->bottom_pipe; | |
1249 | } | |
1250 | ||
1251 | return head_pipe; | |
1252 | } | |
1253 | ||
4562236b | 1254 | /* |
ab2541b6 AC |
1255 | * A free_pipe for a stream is defined here as a pipe |
1256 | * that has no surface attached yet | |
4562236b | 1257 | */ |
b1f6d01c | 1258 | static struct pipe_ctx *acquire_free_pipe_for_head( |
608ac7bb | 1259 | struct dc_state *context, |
a2b8659d | 1260 | const struct resource_pool *pool, |
b1f6d01c | 1261 | struct pipe_ctx *head_pipe) |
4562236b HW |
1262 | { |
1263 | int i; | |
745cc746 | 1264 | struct resource_context *res_ctx = &context->res_ctx; |
4562236b | 1265 | |
3be5262e | 1266 | if (!head_pipe->plane_state) |
4562236b HW |
1267 | return head_pipe; |
1268 | ||
1269 | /* Re-use pipe already acquired for this stream if available*/ | |
a2b8659d | 1270 | for (i = pool->pipe_count - 1; i >= 0; i--) { |
b1f6d01c | 1271 | if (res_ctx->pipe_ctx[i].stream == head_pipe->stream && |
3be5262e | 1272 | !res_ctx->pipe_ctx[i].plane_state) { |
4562236b HW |
1273 | return &res_ctx->pipe_ctx[i]; |
1274 | } | |
1275 | } | |
1276 | ||
1277 | /* | |
1278 | * At this point we have no re-useable pipe for this stream and we need | |
1279 | * to acquire an idle one to satisfy the request | |
1280 | */ | |
1281 | ||
a2b8659d | 1282 | if (!pool->funcs->acquire_idle_pipe_for_layer) |
4562236b HW |
1283 | return NULL; |
1284 | ||
b1f6d01c | 1285 | return pool->funcs->acquire_idle_pipe_for_layer(context, pool, head_pipe->stream); |
4562236b HW |
1286 | } |
1287 | ||
b86a1aa3 | 1288 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
0f9a536f DL |
1289 | static int acquire_first_split_pipe( |
1290 | struct resource_context *res_ctx, | |
1291 | const struct resource_pool *pool, | |
0971c40e | 1292 | struct dc_stream_state *stream) |
0f9a536f DL |
1293 | { |
1294 | int i; | |
1295 | ||
1296 | for (i = 0; i < pool->pipe_count; i++) { | |
79592db3 DL |
1297 | struct pipe_ctx *split_pipe = &res_ctx->pipe_ctx[i]; |
1298 | ||
b1f6d01c | 1299 | if (split_pipe->top_pipe && |
79592db3 DL |
1300 | split_pipe->top_pipe->plane_state == split_pipe->plane_state) { |
1301 | split_pipe->top_pipe->bottom_pipe = split_pipe->bottom_pipe; | |
1302 | if (split_pipe->bottom_pipe) | |
1303 | split_pipe->bottom_pipe->top_pipe = split_pipe->top_pipe; | |
1304 | ||
1305 | if (split_pipe->top_pipe->plane_state) | |
1306 | resource_build_scaling_params(split_pipe->top_pipe); | |
1307 | ||
1308 | memset(split_pipe, 0, sizeof(*split_pipe)); | |
1309 | split_pipe->stream_res.tg = pool->timing_generators[i]; | |
1310 | split_pipe->plane_res.hubp = pool->hubps[i]; | |
1311 | split_pipe->plane_res.ipp = pool->ipps[i]; | |
1312 | split_pipe->plane_res.dpp = pool->dpps[i]; | |
1313 | split_pipe->stream_res.opp = pool->opps[i]; | |
1314 | split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst; | |
1315 | split_pipe->pipe_idx = i; | |
1316 | ||
1317 | split_pipe->stream = stream; | |
0f9a536f DL |
1318 | return i; |
1319 | } | |
1320 | } | |
1321 | return -1; | |
1322 | } | |
1323 | #endif | |
1324 | ||
19f89e23 AG |
1325 | bool dc_add_plane_to_context( |
1326 | const struct dc *dc, | |
0971c40e | 1327 | struct dc_stream_state *stream, |
19f89e23 | 1328 | struct dc_plane_state *plane_state, |
608ac7bb | 1329 | struct dc_state *context) |
4562236b HW |
1330 | { |
1331 | int i; | |
19f89e23 AG |
1332 | struct resource_pool *pool = dc->res_pool; |
1333 | struct pipe_ctx *head_pipe, *tail_pipe, *free_pipe; | |
ab2541b6 | 1334 | struct dc_stream_status *stream_status = NULL; |
4562236b | 1335 | |
19f89e23 AG |
1336 | for (i = 0; i < context->stream_count; i++) |
1337 | if (context->streams[i] == stream) { | |
1338 | stream_status = &context->stream_status[i]; | |
1339 | break; | |
1340 | } | |
1341 | if (stream_status == NULL) { | |
1342 | dm_error("Existing stream not found; failed to attach surface!\n"); | |
1343 | return false; | |
1344 | } | |
1345 | ||
4562236b | 1346 | |
19f89e23 AG |
1347 | if (stream_status->plane_count == MAX_SURFACE_NUM) { |
1348 | dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n", | |
1349 | plane_state, MAX_SURFACE_NUM); | |
4562236b HW |
1350 | return false; |
1351 | } | |
1352 | ||
19f89e23 AG |
1353 | head_pipe = resource_get_head_pipe_for_stream(&context->res_ctx, stream); |
1354 | ||
1355 | if (!head_pipe) { | |
1356 | dm_error("Head pipe not found for stream_state %p !\n", stream); | |
1357 | return false; | |
1358 | } | |
1359 | ||
b1f6d01c DL |
1360 | /* retain new surface, but only once per stream */ |
1361 | dc_plane_state_retain(plane_state); | |
00737c59 | 1362 | |
b1f6d01c | 1363 | while (head_pipe) { |
b1f6d01c | 1364 | free_pipe = acquire_free_pipe_for_head(context, pool, head_pipe); |
19f89e23 | 1365 | |
b86a1aa3 | 1366 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
b1f6d01c DL |
1367 | if (!free_pipe) { |
1368 | int pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream); | |
1369 | if (pipe_idx >= 0) | |
1370 | free_pipe = &context->res_ctx.pipe_ctx[pipe_idx]; | |
1371 | } | |
1372 | #endif | |
1373 | if (!free_pipe) { | |
1374 | dc_plane_state_release(plane_state); | |
1375 | return false; | |
1376 | } | |
19f89e23 | 1377 | |
b1f6d01c DL |
1378 | free_pipe->plane_state = plane_state; |
1379 | ||
1380 | if (head_pipe != free_pipe) { | |
5b5c1777 JP |
1381 | tail_pipe = resource_get_tail_pipe(&context->res_ctx, head_pipe); |
1382 | ASSERT(tail_pipe); | |
b1f6d01c DL |
1383 | free_pipe->stream_res.tg = tail_pipe->stream_res.tg; |
1384 | free_pipe->stream_res.abm = tail_pipe->stream_res.abm; | |
1385 | free_pipe->stream_res.opp = tail_pipe->stream_res.opp; | |
1386 | free_pipe->stream_res.stream_enc = tail_pipe->stream_res.stream_enc; | |
1387 | free_pipe->stream_res.audio = tail_pipe->stream_res.audio; | |
1388 | free_pipe->clock_source = tail_pipe->clock_source; | |
1389 | free_pipe->top_pipe = tail_pipe; | |
1390 | tail_pipe->bottom_pipe = free_pipe; | |
1391 | } | |
1392 | head_pipe = head_pipe->next_odm_pipe; | |
1393 | } | |
19f89e23 AG |
1394 | /* assign new surfaces*/ |
1395 | stream_status->plane_states[stream_status->plane_count] = plane_state; | |
1396 | ||
1397 | stream_status->plane_count++; | |
1398 | ||
1399 | return true; | |
1400 | } | |
1401 | ||
1402 | bool dc_remove_plane_from_context( | |
1403 | const struct dc *dc, | |
1404 | struct dc_stream_state *stream, | |
1405 | struct dc_plane_state *plane_state, | |
608ac7bb | 1406 | struct dc_state *context) |
19f89e23 AG |
1407 | { |
1408 | int i; | |
1409 | struct dc_stream_status *stream_status = NULL; | |
1410 | struct resource_pool *pool = dc->res_pool; | |
1411 | ||
ab2541b6 | 1412 | for (i = 0; i < context->stream_count; i++) |
4fa086b9 | 1413 | if (context->streams[i] == stream) { |
ab2541b6 | 1414 | stream_status = &context->stream_status[i]; |
4562236b HW |
1415 | break; |
1416 | } | |
19f89e23 | 1417 | |
ab2541b6 | 1418 | if (stream_status == NULL) { |
19f89e23 | 1419 | dm_error("Existing stream not found; failed to remove plane.\n"); |
4562236b HW |
1420 | return false; |
1421 | } | |
1422 | ||
19f89e23 AG |
1423 | /* release pipe for plane*/ |
1424 | for (i = pool->pipe_count - 1; i >= 0; i--) { | |
6ffaa6fc | 1425 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
4562236b | 1426 | |
6ffaa6fc | 1427 | if (pipe_ctx->plane_state == plane_state) { |
19f89e23 AG |
1428 | if (pipe_ctx->top_pipe) |
1429 | pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe; | |
4562236b | 1430 | |
19f89e23 AG |
1431 | /* Second condition is to avoid setting NULL to top pipe |
1432 | * of tail pipe making it look like head pipe in subsequent | |
1433 | * deletes | |
1434 | */ | |
1435 | if (pipe_ctx->bottom_pipe && pipe_ctx->top_pipe) | |
1436 | pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe; | |
4562236b | 1437 | |
19f89e23 AG |
1438 | /* |
1439 | * For head pipe detach surfaces from pipe for tail | |
1440 | * pipe just zero it out | |
1441 | */ | |
b1f6d01c | 1442 | if (!pipe_ctx->top_pipe) |
19f89e23 | 1443 | pipe_ctx->plane_state = NULL; |
b1f6d01c | 1444 | else |
19f89e23 | 1445 | memset(pipe_ctx, 0, sizeof(*pipe_ctx)); |
4562236b | 1446 | } |
19f89e23 | 1447 | } |
4562236b | 1448 | |
4562236b | 1449 | |
19f89e23 AG |
1450 | for (i = 0; i < stream_status->plane_count; i++) { |
1451 | if (stream_status->plane_states[i] == plane_state) { | |
1452 | ||
1453 | dc_plane_state_release(stream_status->plane_states[i]); | |
1454 | break; | |
4562236b | 1455 | } |
19f89e23 | 1456 | } |
4562236b | 1457 | |
19f89e23 AG |
1458 | if (i == stream_status->plane_count) { |
1459 | dm_error("Existing plane_state not found; failed to detach it!\n"); | |
1460 | return false; | |
4562236b HW |
1461 | } |
1462 | ||
19f89e23 | 1463 | stream_status->plane_count--; |
4562236b | 1464 | |
abb4986e AJ |
1465 | /* Start at the plane we've just released, and move all the planes one index forward to "trim" the array */ |
1466 | for (; i < stream_status->plane_count; i++) | |
19f89e23 AG |
1467 | stream_status->plane_states[i] = stream_status->plane_states[i + 1]; |
1468 | ||
1469 | stream_status->plane_states[stream_status->plane_count] = NULL; | |
1470 | ||
1471 | return true; | |
1472 | } | |
1473 | ||
1474 | bool dc_rem_all_planes_for_stream( | |
1475 | const struct dc *dc, | |
1476 | struct dc_stream_state *stream, | |
608ac7bb | 1477 | struct dc_state *context) |
19f89e23 AG |
1478 | { |
1479 | int i, old_plane_count; | |
1480 | struct dc_stream_status *stream_status = NULL; | |
1481 | struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 }; | |
1482 | ||
1483 | for (i = 0; i < context->stream_count; i++) | |
1484 | if (context->streams[i] == stream) { | |
1485 | stream_status = &context->stream_status[i]; | |
1486 | break; | |
1487 | } | |
1488 | ||
1489 | if (stream_status == NULL) { | |
1490 | dm_error("Existing stream %p not found!\n", stream); | |
1491 | return false; | |
1492 | } | |
1493 | ||
1494 | old_plane_count = stream_status->plane_count; | |
1495 | ||
1496 | for (i = 0; i < old_plane_count; i++) | |
1497 | del_planes[i] = stream_status->plane_states[i]; | |
1498 | ||
1499 | for (i = 0; i < old_plane_count; i++) | |
1500 | if (!dc_remove_plane_from_context(dc, stream, del_planes[i], context)) | |
1501 | return false; | |
1502 | ||
1503 | return true; | |
1504 | } | |
1505 | ||
1506 | static bool add_all_planes_for_stream( | |
1507 | const struct dc *dc, | |
1508 | struct dc_stream_state *stream, | |
1509 | const struct dc_validation_set set[], | |
1510 | int set_count, | |
608ac7bb | 1511 | struct dc_state *context) |
19f89e23 AG |
1512 | { |
1513 | int i, j; | |
1514 | ||
1515 | for (i = 0; i < set_count; i++) | |
1516 | if (set[i].stream == stream) | |
1517 | break; | |
1518 | ||
1519 | if (i == set_count) { | |
1520 | dm_error("Stream %p not found in set!\n", stream); | |
1521 | return false; | |
1522 | } | |
4562236b | 1523 | |
19f89e23 AG |
1524 | for (j = 0; j < set[i].plane_count; j++) |
1525 | if (!dc_add_plane_to_context(dc, stream, set[i].plane_states[j], context)) | |
1526 | return false; | |
4562236b HW |
1527 | |
1528 | return true; | |
1529 | } | |
1530 | ||
19f89e23 AG |
1531 | bool dc_add_all_planes_for_stream( |
1532 | const struct dc *dc, | |
1533 | struct dc_stream_state *stream, | |
1534 | struct dc_plane_state * const *plane_states, | |
1535 | int plane_count, | |
608ac7bb | 1536 | struct dc_state *context) |
19f89e23 AG |
1537 | { |
1538 | struct dc_validation_set set; | |
1539 | int i; | |
1540 | ||
1541 | set.stream = stream; | |
1542 | set.plane_count = plane_count; | |
1543 | ||
1544 | for (i = 0; i < plane_count; i++) | |
1545 | set.plane_states[i] = plane_states[i]; | |
1546 | ||
1547 | return add_all_planes_for_stream(dc, stream, &set, 1, context); | |
1548 | } | |
1549 | ||
0971c40e HW |
1550 | static bool is_timing_changed(struct dc_stream_state *cur_stream, |
1551 | struct dc_stream_state *new_stream) | |
4562236b HW |
1552 | { |
1553 | if (cur_stream == NULL) | |
1554 | return true; | |
1555 | ||
1556 | /* If sink pointer changed, it means this is a hotplug, we should do | |
1557 | * full hw setting. | |
1558 | */ | |
1559 | if (cur_stream->sink != new_stream->sink) | |
1560 | return true; | |
1561 | ||
1562 | /* If output color space is changed, need to reprogram info frames */ | |
4fa086b9 | 1563 | if (cur_stream->output_color_space != new_stream->output_color_space) |
4562236b HW |
1564 | return true; |
1565 | ||
1566 | return memcmp( | |
4fa086b9 LSL |
1567 | &cur_stream->timing, |
1568 | &new_stream->timing, | |
4562236b HW |
1569 | sizeof(struct dc_crtc_timing)) != 0; |
1570 | } | |
1571 | ||
1572 | static bool are_stream_backends_same( | |
0971c40e | 1573 | struct dc_stream_state *stream_a, struct dc_stream_state *stream_b) |
4562236b HW |
1574 | { |
1575 | if (stream_a == stream_b) | |
1576 | return true; | |
1577 | ||
1578 | if (stream_a == NULL || stream_b == NULL) | |
1579 | return false; | |
1580 | ||
1581 | if (is_timing_changed(stream_a, stream_b)) | |
1582 | return false; | |
1583 | ||
1e7e86c4 ST |
1584 | if (stream_a->dpms_off != stream_b->dpms_off) |
1585 | return false; | |
1586 | ||
4562236b HW |
1587 | return true; |
1588 | } | |
1589 | ||
2119aa17 DF |
1590 | /** |
1591 | * dc_is_stream_unchanged() - Compare two stream states for equivalence. | |
1592 | * | |
1593 | * Checks if there a difference between the two states | |
1594 | * that would require a mode change. | |
1595 | * | |
1596 | * Does not compare cursor position or attributes. | |
1597 | */ | |
d54d29db | 1598 | bool dc_is_stream_unchanged( |
0971c40e | 1599 | struct dc_stream_state *old_stream, struct dc_stream_state *stream) |
4562236b | 1600 | { |
4562236b | 1601 | |
ab2541b6 AC |
1602 | if (!are_stream_backends_same(old_stream, stream)) |
1603 | return false; | |
4562236b | 1604 | |
0460f9ab JL |
1605 | if (old_stream->ignore_msa_timing_param != stream->ignore_msa_timing_param) |
1606 | return false; | |
1607 | ||
4562236b HW |
1608 | return true; |
1609 | } | |
1610 | ||
2119aa17 DF |
1611 | /** |
1612 | * dc_is_stream_scaling_unchanged() - Compare scaling rectangles of two streams. | |
1613 | */ | |
9a5d9c48 LSL |
1614 | bool dc_is_stream_scaling_unchanged( |
1615 | struct dc_stream_state *old_stream, struct dc_stream_state *stream) | |
1616 | { | |
1617 | if (old_stream == stream) | |
1618 | return true; | |
1619 | ||
1620 | if (old_stream == NULL || stream == NULL) | |
1621 | return false; | |
1622 | ||
1623 | if (memcmp(&old_stream->src, | |
1624 | &stream->src, | |
1625 | sizeof(struct rect)) != 0) | |
1626 | return false; | |
1627 | ||
1628 | if (memcmp(&old_stream->dst, | |
1629 | &stream->dst, | |
1630 | sizeof(struct rect)) != 0) | |
1631 | return false; | |
1632 | ||
1633 | return true; | |
1634 | } | |
1635 | ||
1dc90497 | 1636 | static void update_stream_engine_usage( |
4562236b | 1637 | struct resource_context *res_ctx, |
a2b8659d | 1638 | const struct resource_pool *pool, |
1dc90497 AG |
1639 | struct stream_encoder *stream_enc, |
1640 | bool acquired) | |
4562236b HW |
1641 | { |
1642 | int i; | |
1643 | ||
a2b8659d TC |
1644 | for (i = 0; i < pool->stream_enc_count; i++) { |
1645 | if (pool->stream_enc[i] == stream_enc) | |
1dc90497 | 1646 | res_ctx->is_stream_enc_acquired[i] = acquired; |
4562236b HW |
1647 | } |
1648 | } | |
1649 | ||
1650 | /* TODO: release audio object */ | |
4176664b | 1651 | void update_audio_usage( |
4562236b | 1652 | struct resource_context *res_ctx, |
a2b8659d | 1653 | const struct resource_pool *pool, |
1dc90497 AG |
1654 | struct audio *audio, |
1655 | bool acquired) | |
4562236b HW |
1656 | { |
1657 | int i; | |
a2b8659d TC |
1658 | for (i = 0; i < pool->audio_count; i++) { |
1659 | if (pool->audios[i] == audio) | |
1dc90497 | 1660 | res_ctx->is_audio_acquired[i] = acquired; |
4562236b HW |
1661 | } |
1662 | } | |
1663 | ||
1664 | static int acquire_first_free_pipe( | |
1665 | struct resource_context *res_ctx, | |
a2b8659d | 1666 | const struct resource_pool *pool, |
0971c40e | 1667 | struct dc_stream_state *stream) |
4562236b HW |
1668 | { |
1669 | int i; | |
1670 | ||
a2b8659d | 1671 | for (i = 0; i < pool->pipe_count; i++) { |
4562236b HW |
1672 | if (!res_ctx->pipe_ctx[i].stream) { |
1673 | struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; | |
1674 | ||
6b670fa9 | 1675 | pipe_ctx->stream_res.tg = pool->timing_generators[i]; |
86a66c4e | 1676 | pipe_ctx->plane_res.mi = pool->mis[i]; |
8feabd03 | 1677 | pipe_ctx->plane_res.hubp = pool->hubps[i]; |
86a66c4e HW |
1678 | pipe_ctx->plane_res.ipp = pool->ipps[i]; |
1679 | pipe_ctx->plane_res.xfm = pool->transforms[i]; | |
d94585a0 | 1680 | pipe_ctx->plane_res.dpp = pool->dpps[i]; |
a6a6cb34 | 1681 | pipe_ctx->stream_res.opp = pool->opps[i]; |
bc373a89 RL |
1682 | if (pool->dpps[i]) |
1683 | pipe_ctx->plane_res.mpcc_inst = pool->dpps[i]->inst; | |
4562236b HW |
1684 | pipe_ctx->pipe_idx = i; |
1685 | ||
ff5ef992 | 1686 | |
4562236b HW |
1687 | pipe_ctx->stream = stream; |
1688 | return i; | |
1689 | } | |
1690 | } | |
1691 | return -1; | |
1692 | } | |
1693 | ||
a2b8659d TC |
1694 | static struct audio *find_first_free_audio( |
1695 | struct resource_context *res_ctx, | |
cfb071f7 | 1696 | const struct resource_pool *pool, |
f24b0522 PH |
1697 | enum engine_id id, |
1698 | enum dce_version dc_version) | |
4562236b | 1699 | { |
b5a41620 CL |
1700 | int i, available_audio_count; |
1701 | ||
1702 | available_audio_count = pool->audio_count; | |
1703 | ||
1704 | for (i = 0; i < available_audio_count; i++) { | |
66bfd4fd | 1705 | if ((res_ctx->is_audio_acquired[i] == false) && (res_ctx->is_stream_enc_acquired[i] == true)) { |
cfb071f7 CL |
1706 | /*we have enough audio endpoint, find the matching inst*/ |
1707 | if (id != i) | |
1708 | continue; | |
66bfd4fd | 1709 | return pool->audios[i]; |
4562236b | 1710 | } |
66bfd4fd | 1711 | } |
5feb9f07 | 1712 | |
b5a41620 CL |
1713 | /* use engine id to find free audio */ |
1714 | if ((id < available_audio_count) && (res_ctx->is_audio_acquired[id] == false)) { | |
5feb9f07 TM |
1715 | return pool->audios[id]; |
1716 | } | |
66bfd4fd | 1717 | /*not found the matching one, first come first serve*/ |
b5a41620 | 1718 | for (i = 0; i < available_audio_count; i++) { |
66bfd4fd CL |
1719 | if (res_ctx->is_audio_acquired[i] == false) { |
1720 | return pool->audios[i]; | |
4176664b CL |
1721 | } |
1722 | } | |
4562236b HW |
1723 | return 0; |
1724 | } | |
1725 | ||
2119aa17 DF |
1726 | /** |
1727 | * dc_add_stream_to_ctx() - Add a new dc_stream_state to a dc_state. | |
1728 | */ | |
13ab1b44 | 1729 | enum dc_status dc_add_stream_to_ctx( |
1dc90497 | 1730 | struct dc *dc, |
608ac7bb | 1731 | struct dc_state *new_ctx, |
1dc90497 AG |
1732 | struct dc_stream_state *stream) |
1733 | { | |
1dc90497 | 1734 | enum dc_status res; |
eb9714a2 | 1735 | DC_LOGGER_INIT(dc->ctx->logger); |
1dc90497 | 1736 | |
ece4147f | 1737 | if (new_ctx->stream_count >= dc->res_pool->timing_generator_count) { |
eb9714a2 | 1738 | DC_LOG_WARNING("Max streams reached, can't add stream %p !\n", stream); |
1dc90497 AG |
1739 | return DC_ERROR_UNEXPECTED; |
1740 | } | |
1741 | ||
1742 | new_ctx->streams[new_ctx->stream_count] = stream; | |
1743 | dc_stream_retain(stream); | |
1744 | new_ctx->stream_count++; | |
1745 | ||
1746 | res = dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream); | |
1747 | if (res != DC_OK) | |
eb9714a2 | 1748 | DC_LOG_WARNING("Adding stream %p to context failed with err %d!\n", stream, res); |
1dc90497 | 1749 | |
13ab1b44 | 1750 | return res; |
1dc90497 AG |
1751 | } |
1752 | ||
2119aa17 DF |
1753 | /** |
1754 | * dc_remove_stream_from_ctx() - Remove a stream from a dc_state. | |
1755 | */ | |
62c933f9 | 1756 | enum dc_status dc_remove_stream_from_ctx( |
1dc90497 | 1757 | struct dc *dc, |
608ac7bb | 1758 | struct dc_state *new_ctx, |
1dc90497 AG |
1759 | struct dc_stream_state *stream) |
1760 | { | |
19f89e23 | 1761 | int i; |
1dc90497 | 1762 | struct dc_context *dc_ctx = dc->ctx; |
22498036 DL |
1763 | struct pipe_ctx *del_pipe = resource_get_head_pipe_for_stream(&new_ctx->res_ctx, stream); |
1764 | struct pipe_ctx *odm_pipe; | |
1dc90497 AG |
1765 | |
1766 | if (!del_pipe) { | |
1767 | DC_ERROR("Pipe not found for stream %p !\n", stream); | |
1768 | return DC_ERROR_UNEXPECTED; | |
1769 | } | |
1770 | ||
22498036 DL |
1771 | odm_pipe = del_pipe->next_odm_pipe; |
1772 | ||
1773 | /* Release primary pipe */ | |
1774 | ASSERT(del_pipe->stream_res.stream_enc); | |
1775 | update_stream_engine_usage( | |
1776 | &new_ctx->res_ctx, | |
1777 | dc->res_pool, | |
1778 | del_pipe->stream_res.stream_enc, | |
1779 | false); | |
1780 | ||
1781 | if (del_pipe->stream_res.audio) | |
1782 | update_audio_usage( | |
1783 | &new_ctx->res_ctx, | |
1784 | dc->res_pool, | |
1785 | del_pipe->stream_res.audio, | |
1786 | false); | |
1787 | ||
1788 | resource_unreference_clock_source(&new_ctx->res_ctx, | |
1789 | dc->res_pool, | |
1790 | del_pipe->clock_source); | |
1791 | ||
1792 | if (dc->res_pool->funcs->remove_stream_from_ctx) | |
1793 | dc->res_pool->funcs->remove_stream_from_ctx(dc, new_ctx, stream); | |
1794 | ||
1795 | while (odm_pipe) { | |
1796 | struct pipe_ctx *next_odm_pipe = odm_pipe->next_odm_pipe; | |
1797 | ||
1798 | memset(odm_pipe, 0, sizeof(*odm_pipe)); | |
1799 | odm_pipe = next_odm_pipe; | |
1800 | } | |
1801 | memset(del_pipe, 0, sizeof(*del_pipe)); | |
1802 | ||
1dc90497 AG |
1803 | for (i = 0; i < new_ctx->stream_count; i++) |
1804 | if (new_ctx->streams[i] == stream) | |
1805 | break; | |
1806 | ||
1807 | if (new_ctx->streams[i] != stream) { | |
1808 | DC_ERROR("Context doesn't have stream %p !\n", stream); | |
1809 | return DC_ERROR_UNEXPECTED; | |
1810 | } | |
1811 | ||
1812 | dc_stream_release(new_ctx->streams[i]); | |
1813 | new_ctx->stream_count--; | |
1814 | ||
1dc90497 AG |
1815 | /* Trim back arrays */ |
1816 | for (; i < new_ctx->stream_count; i++) { | |
1817 | new_ctx->streams[i] = new_ctx->streams[i + 1]; | |
1818 | new_ctx->stream_status[i] = new_ctx->stream_status[i + 1]; | |
1819 | } | |
1820 | ||
1821 | new_ctx->streams[new_ctx->stream_count] = NULL; | |
1822 | memset( | |
1823 | &new_ctx->stream_status[new_ctx->stream_count], | |
1824 | 0, | |
1825 | sizeof(new_ctx->stream_status[0])); | |
1826 | ||
1827 | return DC_OK; | |
1828 | } | |
1829 | ||
0971c40e HW |
1830 | static struct dc_stream_state *find_pll_sharable_stream( |
1831 | struct dc_stream_state *stream_needs_pll, | |
608ac7bb | 1832 | struct dc_state *context) |
4562236b | 1833 | { |
ab2541b6 | 1834 | int i; |
4562236b | 1835 | |
ab2541b6 | 1836 | for (i = 0; i < context->stream_count; i++) { |
0971c40e | 1837 | struct dc_stream_state *stream_has_pll = context->streams[i]; |
4562236b | 1838 | |
ab2541b6 AC |
1839 | /* We are looking for non dp, non virtual stream */ |
1840 | if (resource_are_streams_timing_synchronizable( | |
1841 | stream_needs_pll, stream_has_pll) | |
1842 | && !dc_is_dp_signal(stream_has_pll->signal) | |
ceb3dbb4 | 1843 | && stream_has_pll->link->connector_signal |
ab2541b6 AC |
1844 | != SIGNAL_TYPE_VIRTUAL) |
1845 | return stream_has_pll; | |
4562236b | 1846 | |
4562236b HW |
1847 | } |
1848 | ||
1849 | return NULL; | |
1850 | } | |
1851 | ||
1852 | static int get_norm_pix_clk(const struct dc_crtc_timing *timing) | |
1853 | { | |
380604e2 | 1854 | uint32_t pix_clk = timing->pix_clk_100hz; |
4562236b HW |
1855 | uint32_t normalized_pix_clk = pix_clk; |
1856 | ||
1857 | if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) | |
1858 | pix_clk /= 2; | |
cc4d99b8 CL |
1859 | if (timing->pixel_encoding != PIXEL_ENCODING_YCBCR422) { |
1860 | switch (timing->display_color_depth) { | |
8897810a | 1861 | case COLOR_DEPTH_666: |
cc4d99b8 CL |
1862 | case COLOR_DEPTH_888: |
1863 | normalized_pix_clk = pix_clk; | |
1864 | break; | |
1865 | case COLOR_DEPTH_101010: | |
1866 | normalized_pix_clk = (pix_clk * 30) / 24; | |
1867 | break; | |
1868 | case COLOR_DEPTH_121212: | |
1869 | normalized_pix_clk = (pix_clk * 36) / 24; | |
4562236b | 1870 | break; |
cc4d99b8 CL |
1871 | case COLOR_DEPTH_161616: |
1872 | normalized_pix_clk = (pix_clk * 48) / 24; | |
4562236b | 1873 | break; |
cc4d99b8 CL |
1874 | default: |
1875 | ASSERT(0); | |
4562236b | 1876 | break; |
cc4d99b8 | 1877 | } |
4562236b | 1878 | } |
4562236b HW |
1879 | return normalized_pix_clk; |
1880 | } | |
1881 | ||
0971c40e | 1882 | static void calculate_phy_pix_clks(struct dc_stream_state *stream) |
4562236b | 1883 | { |
9345d987 AG |
1884 | /* update actual pixel clock on all streams */ |
1885 | if (dc_is_hdmi_signal(stream->signal)) | |
1886 | stream->phy_pix_clk = get_norm_pix_clk( | |
380604e2 | 1887 | &stream->timing) / 10; |
9345d987 AG |
1888 | else |
1889 | stream->phy_pix_clk = | |
380604e2 | 1890 | stream->timing.pix_clk_100hz / 10; |
39c03e00 CL |
1891 | |
1892 | if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING) | |
1893 | stream->phy_pix_clk *= 2; | |
4562236b HW |
1894 | } |
1895 | ||
d2d7885f AK |
1896 | static int acquire_resource_from_hw_enabled_state( |
1897 | struct resource_context *res_ctx, | |
1898 | const struct resource_pool *pool, | |
1899 | struct dc_stream_state *stream) | |
1900 | { | |
1901 | struct dc_link *link = stream->link; | |
08b66279 | 1902 | unsigned int i, inst, tg_inst = 0; |
d2d7885f AK |
1903 | |
1904 | /* Check for enabled DIG to identify enabled display */ | |
1905 | if (!link->link_enc->funcs->is_dig_enabled(link->link_enc)) | |
1906 | return -1; | |
1907 | ||
5ec43eda | 1908 | inst = link->link_enc->funcs->get_dig_frontend(link->link_enc); |
d2d7885f | 1909 | |
7f7652ee | 1910 | if (inst == ENGINE_ID_UNKNOWN) |
75441d9d | 1911 | return -1; |
d2d7885f | 1912 | |
7f7652ee ML |
1913 | for (i = 0; i < pool->stream_enc_count; i++) { |
1914 | if (pool->stream_enc[i]->id == inst) { | |
1915 | tg_inst = pool->stream_enc[i]->funcs->dig_source_otg( | |
1916 | pool->stream_enc[i]); | |
1917 | break; | |
1918 | } | |
1919 | } | |
5ec43eda | 1920 | |
7f7652ee ML |
1921 | // tg_inst not found |
1922 | if (i == pool->stream_enc_count) | |
75441d9d | 1923 | return -1; |
5ec43eda ML |
1924 | |
1925 | if (tg_inst >= pool->timing_generator_count) | |
75441d9d | 1926 | return -1; |
5ec43eda ML |
1927 | |
1928 | if (!res_ctx->pipe_ctx[tg_inst].stream) { | |
1929 | struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; | |
1930 | ||
1931 | pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; | |
1932 | pipe_ctx->plane_res.mi = pool->mis[tg_inst]; | |
1933 | pipe_ctx->plane_res.hubp = pool->hubps[tg_inst]; | |
1934 | pipe_ctx->plane_res.ipp = pool->ipps[tg_inst]; | |
1935 | pipe_ctx->plane_res.xfm = pool->transforms[tg_inst]; | |
1936 | pipe_ctx->plane_res.dpp = pool->dpps[tg_inst]; | |
1937 | pipe_ctx->stream_res.opp = pool->opps[tg_inst]; | |
d2d7885f | 1938 | |
ccce745c | 1939 | if (pool->dpps[tg_inst]) { |
5ec43eda | 1940 | pipe_ctx->plane_res.mpcc_inst = pool->dpps[tg_inst]->inst; |
ccce745c ML |
1941 | |
1942 | // Read DPP->MPCC->OPP Pipe from HW State | |
1943 | if (pool->mpc->funcs->read_mpcc_state) { | |
1944 | struct mpcc_state s = {0}; | |
1945 | ||
1946 | pool->mpc->funcs->read_mpcc_state(pool->mpc, pipe_ctx->plane_res.mpcc_inst, &s); | |
1947 | ||
1948 | if (s.dpp_id < MAX_MPCC) | |
1949 | pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].dpp_id = s.dpp_id; | |
1950 | ||
1951 | if (s.bot_mpcc_id < MAX_MPCC) | |
1952 | pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].mpcc_bot = | |
1953 | &pool->mpc->mpcc_array[s.bot_mpcc_id]; | |
1954 | ||
1955 | if (s.opp_id < MAX_OPP) | |
1956 | pipe_ctx->stream_res.opp->mpc_tree_params.opp_id = s.opp_id; | |
1957 | } | |
1958 | } | |
5ec43eda | 1959 | pipe_ctx->pipe_idx = tg_inst; |
d2d7885f AK |
1960 | |
1961 | pipe_ctx->stream = stream; | |
5ec43eda | 1962 | return tg_inst; |
d2d7885f AK |
1963 | } |
1964 | ||
1965 | return -1; | |
1966 | } | |
1967 | ||
4562236b | 1968 | enum dc_status resource_map_pool_resources( |
fb3466a4 | 1969 | const struct dc *dc, |
608ac7bb | 1970 | struct dc_state *context, |
1dc90497 | 1971 | struct dc_stream_state *stream) |
4562236b | 1972 | { |
a2b8659d | 1973 | const struct resource_pool *pool = dc->res_pool; |
1dc90497 AG |
1974 | int i; |
1975 | struct dc_context *dc_ctx = dc->ctx; | |
1976 | struct pipe_ctx *pipe_ctx = NULL; | |
1977 | int pipe_idx = -1; | |
46570f09 | 1978 | struct dc_bios *dcb = dc->ctx->dc_bios; |
4562236b | 1979 | |
08e1c28d YMM |
1980 | calculate_phy_pix_clks(stream); |
1981 | ||
46570f09 AK |
1982 | /* TODO: Check Linux */ |
1983 | if (dc->config.allow_seamless_boot_optimization && | |
1984 | !dcb->funcs->is_accelerated_mode(dcb)) { | |
1985 | if (dc_validate_seamless_boot_timing(dc, stream->sink, &stream->timing)) | |
1986 | stream->apply_seamless_boot_optimization = true; | |
1987 | } | |
1988 | ||
d2d7885f AK |
1989 | if (stream->apply_seamless_boot_optimization) |
1990 | pipe_idx = acquire_resource_from_hw_enabled_state( | |
1991 | &context->res_ctx, | |
1992 | pool, | |
1993 | stream); | |
1994 | ||
1995 | if (pipe_idx < 0) | |
1996 | /* acquire new resources */ | |
1997 | pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream); | |
8c737fcc | 1998 | |
b86a1aa3 | 1999 | #ifdef CONFIG_DRM_AMD_DC_DCN |
1dc90497 | 2000 | if (pipe_idx < 0) |
13ab1b44 | 2001 | pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream); |
94c6d735 | 2002 | #endif |
13ab1b44 | 2003 | |
c5b38aec | 2004 | if (pipe_idx < 0 || context->res_ctx.pipe_ctx[pipe_idx].stream_res.tg == NULL) |
1dc90497 AG |
2005 | return DC_NO_CONTROLLER_RESOURCE; |
2006 | ||
2007 | pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; | |
2008 | ||
2009 | pipe_ctx->stream_res.stream_enc = | |
78cc70b1 | 2010 | dc->res_pool->funcs->find_first_free_match_stream_enc_for_link( |
1dc90497 AG |
2011 | &context->res_ctx, pool, stream); |
2012 | ||
2013 | if (!pipe_ctx->stream_res.stream_enc) | |
38684e46 | 2014 | return DC_NO_STREAM_ENC_RESOURCE; |
1dc90497 AG |
2015 | |
2016 | update_stream_engine_usage( | |
2017 | &context->res_ctx, pool, | |
2018 | pipe_ctx->stream_res.stream_enc, | |
2019 | true); | |
2020 | ||
2021 | /* TODO: Add check if ASIC support and EDID audio */ | |
ceb3dbb4 | 2022 | if (!stream->converter_disable_audio && |
1dc90497 | 2023 | dc_is_audio_capable_signal(pipe_ctx->stream->signal) && |
ce08aad3 | 2024 | stream->audio_info.mode_count && stream->audio_info.flags.all) { |
1dc90497 | 2025 | pipe_ctx->stream_res.audio = find_first_free_audio( |
f24b0522 | 2026 | &context->res_ctx, pool, pipe_ctx->stream_res.stream_enc->id, dc_ctx->dce_version); |
1dc90497 AG |
2027 | |
2028 | /* | |
2029 | * Audio assigned in order first come first get. | |
2030 | * There are asics which has number of audio | |
2031 | * resources less then number of pipes | |
2032 | */ | |
2033 | if (pipe_ctx->stream_res.audio) | |
2034 | update_audio_usage(&context->res_ctx, pool, | |
2035 | pipe_ctx->stream_res.audio, true); | |
2036 | } | |
268cadbd | 2037 | |
9aef1a31 S |
2038 | /* Add ABM to the resource if on EDP */ |
2039 | if (pipe_ctx->stream && dc_is_embedded_signal(pipe_ctx->stream->signal)) | |
2040 | pipe_ctx->stream_res.abm = pool->abm; | |
2041 | ||
1dc90497 AG |
2042 | for (i = 0; i < context->stream_count; i++) |
2043 | if (context->streams[i] == stream) { | |
2044 | context->stream_status[i].primary_otg_inst = pipe_ctx->stream_res.tg->inst; | |
3f0940f8 | 2045 | context->stream_status[i].stream_enc_inst = pipe_ctx->stream_res.stream_enc->stream_enc_inst; |
5fdb7c4c NK |
2046 | context->stream_status[i].audio_inst = |
2047 | pipe_ctx->stream_res.audio ? pipe_ctx->stream_res.audio->inst : -1; | |
2048 | ||
1dc90497 AG |
2049 | return DC_OK; |
2050 | } | |
4562236b | 2051 | |
1dc90497 AG |
2052 | DC_ERROR("Stream %p not found in new ctx!\n", stream); |
2053 | return DC_ERROR_UNEXPECTED; | |
2054 | } | |
4562236b | 2055 | |
2119aa17 DF |
2056 | /** |
2057 | * dc_resource_state_copy_construct_current() - Creates a new dc_state from existing state | |
2058 | * Is a shallow copy. Increments refcounts on existing streams and planes. | |
2059 | * @dc: copy out of dc->current_state | |
2060 | * @dst_ctx: copy into this | |
2061 | */ | |
f36cc577 | 2062 | void dc_resource_state_copy_construct_current( |
1dc90497 | 2063 | const struct dc *dc, |
608ac7bb | 2064 | struct dc_state *dst_ctx) |
1dc90497 | 2065 | { |
f36cc577 | 2066 | dc_resource_state_copy_construct(dc->current_state, dst_ctx); |
1dc90497 AG |
2067 | } |
2068 | ||
ab8db3e1 AG |
2069 | |
2070 | void dc_resource_state_construct( | |
2071 | const struct dc *dc, | |
2072 | struct dc_state *dst_ctx) | |
2073 | { | |
dc88b4a6 | 2074 | dst_ctx->clk_mgr = dc->clk_mgr; |
ab8db3e1 AG |
2075 | } |
2076 | ||
6d822156 NC |
2077 | |
2078 | bool dc_resource_is_dsc_encoding_supported(const struct dc *dc) | |
2079 | { | |
2080 | return dc->res_pool->res_cap->num_dsc > 0; | |
2081 | } | |
2082 | ||
2083 | ||
2119aa17 DF |
2084 | /** |
2085 | * dc_validate_global_state() - Determine if HW can support a given state | |
2086 | * Checks HW resource availability and bandwidth requirement. | |
2087 | * @dc: dc struct for this driver | |
2088 | * @new_ctx: state to be validated | |
afcd526b | 2089 | * @fast_validate: set to true if only yes/no to support matters |
2119aa17 DF |
2090 | * |
2091 | * Return: DC_OK if the result can be programmed. Otherwise, an error code. | |
2092 | */ | |
e750d56d | 2093 | enum dc_status dc_validate_global_state( |
1dc90497 | 2094 | struct dc *dc, |
afcd526b JA |
2095 | struct dc_state *new_ctx, |
2096 | bool fast_validate) | |
4562236b | 2097 | { |
1dc90497 | 2098 | enum dc_status result = DC_ERROR_UNEXPECTED; |
1dc90497 | 2099 | int i, j; |
4562236b | 2100 | |
e41ab030 HW |
2101 | if (!new_ctx) |
2102 | return DC_ERROR_UNEXPECTED; | |
2103 | ||
d596e5d0 | 2104 | if (dc->res_pool->funcs->validate_global) { |
ada8ce15 HW |
2105 | result = dc->res_pool->funcs->validate_global(dc, new_ctx); |
2106 | if (result != DC_OK) | |
2107 | return result; | |
d596e5d0 | 2108 | } |
4562236b | 2109 | |
e41ab030 | 2110 | for (i = 0; i < new_ctx->stream_count; i++) { |
1dc90497 AG |
2111 | struct dc_stream_state *stream = new_ctx->streams[i]; |
2112 | ||
2113 | for (j = 0; j < dc->res_pool->pipe_count; j++) { | |
2114 | struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[j]; | |
2115 | ||
2116 | if (pipe_ctx->stream != stream) | |
2117 | continue; | |
2118 | ||
8d8c82b6 | 2119 | if (dc->res_pool->funcs->patch_unknown_plane_state && |
74eac5f3 SSC |
2120 | pipe_ctx->plane_state && |
2121 | pipe_ctx->plane_state->tiling_info.gfx9.swizzle == DC_SW_UNKNOWN) { | |
8d8c82b6 | 2122 | result = dc->res_pool->funcs->patch_unknown_plane_state(pipe_ctx->plane_state); |
74eac5f3 SSC |
2123 | if (result != DC_OK) |
2124 | return result; | |
2125 | } | |
2126 | ||
1dc90497 AG |
2127 | /* Switch to dp clock source only if there is |
2128 | * no non dp stream that shares the same timing | |
2129 | * with the dp stream. | |
2130 | */ | |
2131 | if (dc_is_dp_signal(pipe_ctx->stream->signal) && | |
2132 | !find_pll_sharable_stream(stream, new_ctx)) { | |
2133 | ||
9d0dcecd | 2134 | resource_unreference_clock_source( |
1dc90497 AG |
2135 | &new_ctx->res_ctx, |
2136 | dc->res_pool, | |
9d0dcecd | 2137 | pipe_ctx->clock_source); |
4a629536 | 2138 | |
1dc90497 AG |
2139 | pipe_ctx->clock_source = dc->res_pool->dp_clock_source; |
2140 | resource_reference_clock_source( | |
2141 | &new_ctx->res_ctx, | |
2142 | dc->res_pool, | |
2143 | pipe_ctx->clock_source); | |
2144 | } | |
2145 | } | |
2146 | } | |
2147 | ||
1dc90497 AG |
2148 | result = resource_build_scaling_params_for_context(dc, new_ctx); |
2149 | ||
2150 | if (result == DC_OK) | |
afcd526b | 2151 | if (!dc->res_pool->funcs->validate_bandwidth(dc, new_ctx, fast_validate)) |
1dc90497 AG |
2152 | result = DC_FAIL_BANDWIDTH_VALIDATE; |
2153 | ||
2154 | return result; | |
4562236b HW |
2155 | } |
2156 | ||
6e4d6bee | 2157 | static void patch_gamut_packet_checksum( |
e09b6473 | 2158 | struct dc_info_packet *gamut_packet) |
4562236b | 2159 | { |
4562236b | 2160 | /* For gamut we recalc checksum */ |
6e4d6bee | 2161 | if (gamut_packet->valid) { |
4562236b HW |
2162 | uint8_t chk_sum = 0; |
2163 | uint8_t *ptr; | |
2164 | uint8_t i; | |
2165 | ||
4562236b | 2166 | /*start of the Gamut data. */ |
6e4d6bee | 2167 | ptr = &gamut_packet->sb[3]; |
4562236b | 2168 | |
6e4d6bee | 2169 | for (i = 0; i <= gamut_packet->sb[1]; i++) |
4562236b HW |
2170 | chk_sum += ptr[i]; |
2171 | ||
6e4d6bee | 2172 | gamut_packet->sb[2] = (uint8_t) (0x100 - chk_sum); |
1646a6fe | 2173 | } |
4562236b HW |
2174 | } |
2175 | ||
2176 | static void set_avi_info_frame( | |
e09b6473 | 2177 | struct dc_info_packet *info_packet, |
4562236b HW |
2178 | struct pipe_ctx *pipe_ctx) |
2179 | { | |
0971c40e | 2180 | struct dc_stream_state *stream = pipe_ctx->stream; |
4562236b | 2181 | enum dc_color_space color_space = COLOR_SPACE_UNKNOWN; |
4562236b HW |
2182 | uint32_t pixel_encoding = 0; |
2183 | enum scanning_type scan_type = SCANNING_TYPE_NODATA; | |
2184 | enum dc_aspect_ratio aspect = ASPECT_RATIO_NO_DATA; | |
2185 | bool itc = false; | |
50e27654 | 2186 | uint8_t itc_value = 0; |
4562236b | 2187 | uint8_t cn0_cn1 = 0; |
50e27654 | 2188 | unsigned int cn0_cn1_value = 0; |
4562236b HW |
2189 | uint8_t *check_sum = NULL; |
2190 | uint8_t byte_index = 0; | |
754e3673 | 2191 | union hdmi_info_packet hdmi_info; |
50e27654 | 2192 | union display_content_support support = {0}; |
4fa086b9 | 2193 | unsigned int vic = pipe_ctx->stream->timing.vic; |
15e17335 | 2194 | enum dc_timing_3d_format format; |
4562236b | 2195 | |
754e3673 AK |
2196 | memset(&hdmi_info, 0, sizeof(union hdmi_info_packet)); |
2197 | ||
4fa086b9 | 2198 | color_space = pipe_ctx->stream->output_color_space; |
e5f2038e | 2199 | if (color_space == COLOR_SPACE_UNKNOWN) |
4fa086b9 | 2200 | color_space = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ? |
e5f2038e | 2201 | COLOR_SPACE_SRGB:COLOR_SPACE_YCBCR709; |
4562236b HW |
2202 | |
2203 | /* Initialize header */ | |
e09b6473 | 2204 | hdmi_info.bits.header.info_frame_type = HDMI_INFOFRAME_TYPE_AVI; |
4562236b HW |
2205 | /* InfoFrameVersion_3 is defined by CEA861F (Section 6.4), but shall |
2206 | * not be used in HDMI 2.0 (Section 10.1) */ | |
e09b6473 AK |
2207 | hdmi_info.bits.header.version = 2; |
2208 | hdmi_info.bits.header.length = HDMI_AVI_INFOFRAME_SIZE; | |
4562236b HW |
2209 | |
2210 | /* | |
2211 | * IDO-defined (Y2,Y1,Y0 = 1,1,1) shall not be used by devices built | |
2212 | * according to HDMI 2.0 spec (Section 10.1) | |
2213 | */ | |
2214 | ||
4fa086b9 | 2215 | switch (stream->timing.pixel_encoding) { |
4562236b HW |
2216 | case PIXEL_ENCODING_YCBCR422: |
2217 | pixel_encoding = 1; | |
2218 | break; | |
2219 | ||
2220 | case PIXEL_ENCODING_YCBCR444: | |
2221 | pixel_encoding = 2; | |
2222 | break; | |
2223 | case PIXEL_ENCODING_YCBCR420: | |
2224 | pixel_encoding = 3; | |
2225 | break; | |
2226 | ||
2227 | case PIXEL_ENCODING_RGB: | |
2228 | default: | |
2229 | pixel_encoding = 0; | |
2230 | } | |
2231 | ||
2232 | /* Y0_Y1_Y2 : The pixel encoding */ | |
2233 | /* H14b AVI InfoFrame has extension on Y-field from 2 bits to 3 bits */ | |
e09b6473 | 2234 | hdmi_info.bits.Y0_Y1_Y2 = pixel_encoding; |
4562236b HW |
2235 | |
2236 | /* A0 = 1 Active Format Information valid */ | |
e09b6473 | 2237 | hdmi_info.bits.A0 = ACTIVE_FORMAT_VALID; |
4562236b HW |
2238 | |
2239 | /* B0, B1 = 3; Bar info data is valid */ | |
e09b6473 | 2240 | hdmi_info.bits.B0_B1 = BAR_INFO_BOTH_VALID; |
4562236b | 2241 | |
e09b6473 | 2242 | hdmi_info.bits.SC0_SC1 = PICTURE_SCALING_UNIFORM; |
4562236b HW |
2243 | |
2244 | /* S0, S1 : Underscan / Overscan */ | |
2245 | /* TODO: un-hardcode scan type */ | |
2246 | scan_type = SCANNING_TYPE_UNDERSCAN; | |
e09b6473 | 2247 | hdmi_info.bits.S0_S1 = scan_type; |
4562236b HW |
2248 | |
2249 | /* C0, C1 : Colorimetry */ | |
8fde5884 | 2250 | if (color_space == COLOR_SPACE_YCBCR709 || |
15e17335 | 2251 | color_space == COLOR_SPACE_YCBCR709_LIMITED) |
e09b6473 | 2252 | hdmi_info.bits.C0_C1 = COLORIMETRY_ITU709; |
8fde5884 CL |
2253 | else if (color_space == COLOR_SPACE_YCBCR601 || |
2254 | color_space == COLOR_SPACE_YCBCR601_LIMITED) | |
e09b6473 | 2255 | hdmi_info.bits.C0_C1 = COLORIMETRY_ITU601; |
8fde5884 | 2256 | else { |
e09b6473 | 2257 | hdmi_info.bits.C0_C1 = COLORIMETRY_NO_DATA; |
8fde5884 | 2258 | } |
534db198 | 2259 | if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE || |
8fde5884 CL |
2260 | color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE || |
2261 | color_space == COLOR_SPACE_2020_YCBCR) { | |
e09b6473 AK |
2262 | hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_BT2020RGBYCBCR; |
2263 | hdmi_info.bits.C0_C1 = COLORIMETRY_EXTENDED; | |
534db198 | 2264 | } else if (color_space == COLOR_SPACE_ADOBERGB) { |
e09b6473 AK |
2265 | hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_ADOBERGB; |
2266 | hdmi_info.bits.C0_C1 = COLORIMETRY_EXTENDED; | |
534db198 AZ |
2267 | } |
2268 | ||
4562236b | 2269 | /* TODO: un-hardcode aspect ratio */ |
4fa086b9 | 2270 | aspect = stream->timing.aspect_ratio; |
4562236b HW |
2271 | |
2272 | switch (aspect) { | |
2273 | case ASPECT_RATIO_4_3: | |
2274 | case ASPECT_RATIO_16_9: | |
e09b6473 | 2275 | hdmi_info.bits.M0_M1 = aspect; |
4562236b HW |
2276 | break; |
2277 | ||
2278 | case ASPECT_RATIO_NO_DATA: | |
2279 | case ASPECT_RATIO_64_27: | |
2280 | case ASPECT_RATIO_256_135: | |
2281 | default: | |
e09b6473 | 2282 | hdmi_info.bits.M0_M1 = 0; |
4562236b HW |
2283 | } |
2284 | ||
2285 | /* Active Format Aspect ratio - same as Picture Aspect Ratio. */ | |
e09b6473 | 2286 | hdmi_info.bits.R0_R3 = ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE; |
4562236b HW |
2287 | |
2288 | /* TODO: un-hardcode cn0_cn1 and itc */ | |
50e27654 | 2289 | |
4562236b | 2290 | cn0_cn1 = 0; |
50e27654 ZF |
2291 | cn0_cn1_value = 0; |
2292 | ||
2293 | itc = true; | |
2294 | itc_value = 1; | |
2295 | ||
ceb3dbb4 | 2296 | support = stream->content_support; |
4562236b HW |
2297 | |
2298 | if (itc) { | |
50e27654 ZF |
2299 | if (!support.bits.valid_content_type) { |
2300 | cn0_cn1_value = 0; | |
2301 | } else { | |
2302 | if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GRAPHICS) { | |
2303 | if (support.bits.graphics_content == 1) { | |
2304 | cn0_cn1_value = 0; | |
2305 | } | |
2306 | } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_PHOTO) { | |
2307 | if (support.bits.photo_content == 1) { | |
2308 | cn0_cn1_value = 1; | |
2309 | } else { | |
2310 | cn0_cn1_value = 0; | |
2311 | itc_value = 0; | |
2312 | } | |
2313 | } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_CINEMA) { | |
2314 | if (support.bits.cinema_content == 1) { | |
2315 | cn0_cn1_value = 2; | |
2316 | } else { | |
2317 | cn0_cn1_value = 0; | |
2318 | itc_value = 0; | |
2319 | } | |
2320 | } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GAME) { | |
2321 | if (support.bits.game_content == 1) { | |
2322 | cn0_cn1_value = 3; | |
2323 | } else { | |
2324 | cn0_cn1_value = 0; | |
2325 | itc_value = 0; | |
2326 | } | |
2327 | } | |
2328 | } | |
e09b6473 AK |
2329 | hdmi_info.bits.CN0_CN1 = cn0_cn1_value; |
2330 | hdmi_info.bits.ITC = itc_value; | |
4562236b HW |
2331 | } |
2332 | ||
2333 | /* TODO : We should handle YCC quantization */ | |
2334 | /* but we do not have matrix calculation */ | |
ceb3dbb4 JL |
2335 | if (stream->qs_bit == 1 && |
2336 | stream->qy_bit == 1) { | |
50e27654 ZF |
2337 | if (color_space == COLOR_SPACE_SRGB || |
2338 | color_space == COLOR_SPACE_2020_RGB_FULLRANGE) { | |
e09b6473 | 2339 | hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_FULL_RANGE; |
993dca3e | 2340 | hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE; |
50e27654 ZF |
2341 | } else if (color_space == COLOR_SPACE_SRGB_LIMITED || |
2342 | color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) { | |
e09b6473 AK |
2343 | hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_LIMITED_RANGE; |
2344 | hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE; | |
50e27654 | 2345 | } else { |
e09b6473 AK |
2346 | hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_DEFAULT_RANGE; |
2347 | hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE; | |
50e27654 | 2348 | } |
4562236b | 2349 | } else { |
e09b6473 AK |
2350 | hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_DEFAULT_RANGE; |
2351 | hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE; | |
4562236b | 2352 | } |
50e27654 | 2353 | |
15e17335 | 2354 | ///VIC |
4fa086b9 | 2355 | format = stream->timing.timing_3d_format; |
15e17335 CL |
2356 | /*todo, add 3DStereo support*/ |
2357 | if (format != TIMING_3D_FORMAT_NONE) { | |
2358 | // Based on HDMI specs hdmi vic needs to be converted to cea vic when 3D is enabled | |
4fa086b9 | 2359 | switch (pipe_ctx->stream->timing.hdmi_vic) { |
15e17335 CL |
2360 | case 1: |
2361 | vic = 95; | |
2362 | break; | |
2363 | case 2: | |
2364 | vic = 94; | |
2365 | break; | |
2366 | case 3: | |
2367 | vic = 93; | |
2368 | break; | |
2369 | case 4: | |
2370 | vic = 98; | |
2371 | break; | |
2372 | default: | |
2373 | break; | |
2374 | } | |
2375 | } | |
efa02336 | 2376 | /* If VIC >= 128, the Source shall use AVI InfoFrame Version 3*/ |
e09b6473 | 2377 | hdmi_info.bits.VIC0_VIC7 = vic; |
efa02336 CP |
2378 | if (vic >= 128) |
2379 | hdmi_info.bits.header.version = 3; | |
2380 | /* If (C1, C0)=(1, 1) and (EC2, EC1, EC0)=(1, 1, 1), | |
2381 | * the Source shall use 20 AVI InfoFrame Version 4 | |
2382 | */ | |
2383 | if (hdmi_info.bits.C0_C1 == COLORIMETRY_EXTENDED && | |
2384 | hdmi_info.bits.EC0_EC2 == COLORIMETRYEX_RESERVED) { | |
2385 | hdmi_info.bits.header.version = 4; | |
2386 | hdmi_info.bits.header.length = 14; | |
2387 | } | |
4562236b HW |
2388 | |
2389 | /* pixel repetition | |
2390 | * PR0 - PR3 start from 0 whereas pHwPathMode->mode.timing.flags.pixel | |
2391 | * repetition start from 1 */ | |
e09b6473 | 2392 | hdmi_info.bits.PR0_PR3 = 0; |
4562236b HW |
2393 | |
2394 | /* Bar Info | |
2395 | * barTop: Line Number of End of Top Bar. | |
2396 | * barBottom: Line Number of Start of Bottom Bar. | |
2397 | * barLeft: Pixel Number of End of Left Bar. | |
2398 | * barRight: Pixel Number of Start of Right Bar. */ | |
e09b6473 AK |
2399 | hdmi_info.bits.bar_top = stream->timing.v_border_top; |
2400 | hdmi_info.bits.bar_bottom = (stream->timing.v_total | |
4fa086b9 | 2401 | - stream->timing.v_border_bottom + 1); |
e09b6473 AK |
2402 | hdmi_info.bits.bar_left = stream->timing.h_border_left; |
2403 | hdmi_info.bits.bar_right = (stream->timing.h_total | |
4fa086b9 | 2404 | - stream->timing.h_border_right + 1); |
4562236b | 2405 | |
2f482c4f CP |
2406 | /* Additional Colorimetry Extension |
2407 | * Used in conduction with C0-C1 and EC0-EC2 | |
2408 | * 0 = DCI-P3 RGB (D65) | |
2409 | * 1 = DCI-P3 RGB (theater) | |
2410 | */ | |
2411 | hdmi_info.bits.ACE0_ACE3 = 0; | |
2412 | ||
4562236b | 2413 | /* check_sum - Calculate AFMT_AVI_INFO0 ~ AFMT_AVI_INFO3 */ |
e09b6473 | 2414 | check_sum = &hdmi_info.packet_raw_data.sb[0]; |
e8d726b7 | 2415 | |
efa02336 | 2416 | *check_sum = HDMI_INFOFRAME_TYPE_AVI + hdmi_info.bits.header.length + hdmi_info.bits.header.version; |
4562236b | 2417 | |
efa02336 | 2418 | for (byte_index = 1; byte_index <= hdmi_info.bits.header.length; byte_index++) |
e09b6473 | 2419 | *check_sum += hdmi_info.packet_raw_data.sb[byte_index]; |
4562236b HW |
2420 | |
2421 | /* one byte complement */ | |
2422 | *check_sum = (uint8_t) (0x100 - *check_sum); | |
2423 | ||
2424 | /* Store in hw_path_mode */ | |
e09b6473 AK |
2425 | info_packet->hb0 = hdmi_info.packet_raw_data.hb0; |
2426 | info_packet->hb1 = hdmi_info.packet_raw_data.hb1; | |
2427 | info_packet->hb2 = hdmi_info.packet_raw_data.hb2; | |
4562236b | 2428 | |
e09b6473 AK |
2429 | for (byte_index = 0; byte_index < sizeof(hdmi_info.packet_raw_data.sb); byte_index++) |
2430 | info_packet->sb[byte_index] = hdmi_info.packet_raw_data.sb[byte_index]; | |
4562236b HW |
2431 | |
2432 | info_packet->valid = true; | |
2433 | } | |
2434 | ||
6e4d6bee | 2435 | static void set_vendor_info_packet( |
e09b6473 | 2436 | struct dc_info_packet *info_packet, |
0971c40e | 2437 | struct dc_stream_state *stream) |
4562236b | 2438 | { |
ecd0136b | 2439 | /* SPD info packet for FreeSync */ |
4562236b | 2440 | |
ecd0136b HT |
2441 | /* Check if Freesync is supported. Return if false. If true, |
2442 | * set the corresponding bit in the info packet | |
2443 | */ | |
2444 | if (!stream->vsp_infopacket.valid) | |
4562236b HW |
2445 | return; |
2446 | ||
ecd0136b | 2447 | *info_packet = stream->vsp_infopacket; |
4562236b HW |
2448 | } |
2449 | ||
6e4d6bee | 2450 | static void set_spd_info_packet( |
e09b6473 | 2451 | struct dc_info_packet *info_packet, |
0971c40e | 2452 | struct dc_stream_state *stream) |
4562236b HW |
2453 | { |
2454 | /* SPD info packet for FreeSync */ | |
2455 | ||
4562236b HW |
2456 | /* Check if Freesync is supported. Return if false. If true, |
2457 | * set the corresponding bit in the info packet | |
2458 | */ | |
98e6436d | 2459 | if (!stream->vrr_infopacket.valid) |
4562236b HW |
2460 | return; |
2461 | ||
98e6436d | 2462 | *info_packet = stream->vrr_infopacket; |
4562236b HW |
2463 | } |
2464 | ||
1646a6fe | 2465 | static void set_hdr_static_info_packet( |
e09b6473 | 2466 | struct dc_info_packet *info_packet, |
0971c40e | 2467 | struct dc_stream_state *stream) |
1646a6fe | 2468 | { |
0eeef690 | 2469 | /* HDR Static Metadata info packet for HDR10 */ |
1646a6fe | 2470 | |
a10dc97a KK |
2471 | if (!stream->hdr_static_metadata.valid || |
2472 | stream->use_dynamic_meta) | |
10bff005 YS |
2473 | return; |
2474 | ||
0eeef690 | 2475 | *info_packet = stream->hdr_static_metadata; |
1646a6fe AW |
2476 | } |
2477 | ||
6e4d6bee | 2478 | static void set_vsc_info_packet( |
e09b6473 | 2479 | struct dc_info_packet *info_packet, |
0971c40e | 2480 | struct dc_stream_state *stream) |
4562236b | 2481 | { |
1336926f | 2482 | if (!stream->vsc_infopacket.valid) |
4562236b HW |
2483 | return; |
2484 | ||
1336926f | 2485 | *info_packet = stream->vsc_infopacket; |
4562236b HW |
2486 | } |
2487 | ||
f36cc577 | 2488 | void dc_resource_state_destruct(struct dc_state *context) |
4562236b HW |
2489 | { |
2490 | int i, j; | |
2491 | ||
ab2541b6 | 2492 | for (i = 0; i < context->stream_count; i++) { |
3be5262e HW |
2493 | for (j = 0; j < context->stream_status[i].plane_count; j++) |
2494 | dc_plane_state_release( | |
2495 | context->stream_status[i].plane_states[j]); | |
4562236b | 2496 | |
3be5262e | 2497 | context->stream_status[i].plane_count = 0; |
4fa086b9 | 2498 | dc_stream_release(context->streams[i]); |
ab2541b6 | 2499 | context->streams[i] = NULL; |
4562236b HW |
2500 | } |
2501 | } | |
2502 | ||
f36cc577 | 2503 | void dc_resource_state_copy_construct( |
608ac7bb JZ |
2504 | const struct dc_state *src_ctx, |
2505 | struct dc_state *dst_ctx) | |
4562236b HW |
2506 | { |
2507 | int i, j; | |
8ee5702a | 2508 | struct kref refcount = dst_ctx->refcount; |
4562236b HW |
2509 | |
2510 | *dst_ctx = *src_ctx; | |
2511 | ||
a2b8659d | 2512 | for (i = 0; i < MAX_PIPES; i++) { |
4562236b HW |
2513 | struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i]; |
2514 | ||
2515 | if (cur_pipe->top_pipe) | |
2516 | cur_pipe->top_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; | |
2517 | ||
2518 | if (cur_pipe->bottom_pipe) | |
2519 | cur_pipe->bottom_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; | |
b1f6d01c DL |
2520 | |
2521 | if (cur_pipe->next_odm_pipe) | |
2522 | cur_pipe->next_odm_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx]; | |
2523 | ||
2524 | if (cur_pipe->prev_odm_pipe) | |
2525 | cur_pipe->prev_odm_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx]; | |
4562236b HW |
2526 | } |
2527 | ||
ab2541b6 | 2528 | for (i = 0; i < dst_ctx->stream_count; i++) { |
4fa086b9 | 2529 | dc_stream_retain(dst_ctx->streams[i]); |
3be5262e HW |
2530 | for (j = 0; j < dst_ctx->stream_status[i].plane_count; j++) |
2531 | dc_plane_state_retain( | |
2532 | dst_ctx->stream_status[i].plane_states[j]); | |
4562236b | 2533 | } |
9a3afbb3 AG |
2534 | |
2535 | /* context refcount should not be overridden */ | |
8ee5702a | 2536 | dst_ctx->refcount = refcount; |
9a3afbb3 | 2537 | |
4562236b HW |
2538 | } |
2539 | ||
2540 | struct clock_source *dc_resource_find_first_free_pll( | |
a2b8659d TC |
2541 | struct resource_context *res_ctx, |
2542 | const struct resource_pool *pool) | |
4562236b HW |
2543 | { |
2544 | int i; | |
2545 | ||
a2b8659d | 2546 | for (i = 0; i < pool->clk_src_count; ++i) { |
4562236b | 2547 | if (res_ctx->clock_source_ref_count[i] == 0) |
a2b8659d | 2548 | return pool->clock_sources[i]; |
4562236b HW |
2549 | } |
2550 | ||
2551 | return NULL; | |
2552 | } | |
2553 | ||
2554 | void resource_build_info_frame(struct pipe_ctx *pipe_ctx) | |
2555 | { | |
2556 | enum signal_type signal = SIGNAL_TYPE_NONE; | |
96c50c0d | 2557 | struct encoder_info_frame *info = &pipe_ctx->stream_res.encoder_info_frame; |
4562236b HW |
2558 | |
2559 | /* default all packets to invalid */ | |
6e4d6bee TC |
2560 | info->avi.valid = false; |
2561 | info->gamut.valid = false; | |
2562 | info->vendor.valid = false; | |
630e3573 | 2563 | info->spd.valid = false; |
6e4d6bee TC |
2564 | info->hdrsmd.valid = false; |
2565 | info->vsc.valid = false; | |
4562236b HW |
2566 | |
2567 | signal = pipe_ctx->stream->signal; | |
2568 | ||
2569 | /* HDMi and DP have different info packets*/ | |
2570 | if (dc_is_hdmi_signal(signal)) { | |
6e4d6bee TC |
2571 | set_avi_info_frame(&info->avi, pipe_ctx); |
2572 | ||
2573 | set_vendor_info_packet(&info->vendor, pipe_ctx->stream); | |
2574 | ||
2575 | set_spd_info_packet(&info->spd, pipe_ctx->stream); | |
2576 | ||
56ef6ed9 | 2577 | set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream); |
6e4d6bee | 2578 | |
a33fa99d | 2579 | } else if (dc_is_dp_signal(signal)) { |
6e4d6bee TC |
2580 | set_vsc_info_packet(&info->vsc, pipe_ctx->stream); |
2581 | ||
2582 | set_spd_info_packet(&info->spd, pipe_ctx->stream); | |
2583 | ||
56ef6ed9 | 2584 | set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream); |
a33fa99d | 2585 | } |
4562236b | 2586 | |
6e4d6bee | 2587 | patch_gamut_packet_checksum(&info->gamut); |
4562236b HW |
2588 | } |
2589 | ||
2590 | enum dc_status resource_map_clock_resources( | |
fb3466a4 | 2591 | const struct dc *dc, |
608ac7bb | 2592 | struct dc_state *context, |
1dc90497 | 2593 | struct dc_stream_state *stream) |
4562236b | 2594 | { |
4562236b | 2595 | /* acquire new resources */ |
1dc90497 AG |
2596 | const struct resource_pool *pool = dc->res_pool; |
2597 | struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream( | |
2598 | &context->res_ctx, stream); | |
ab2541b6 | 2599 | |
1dc90497 AG |
2600 | if (!pipe_ctx) |
2601 | return DC_ERROR_UNEXPECTED; | |
4562236b | 2602 | |
1dc90497 AG |
2603 | if (dc_is_dp_signal(pipe_ctx->stream->signal) |
2604 | || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL) | |
2605 | pipe_ctx->clock_source = pool->dp_clock_source; | |
2606 | else { | |
2607 | pipe_ctx->clock_source = NULL; | |
4562236b | 2608 | |
1dc90497 | 2609 | if (!dc->config.disable_disp_pll_sharing) |
4ed4e51b | 2610 | pipe_ctx->clock_source = resource_find_used_clk_src_for_sharing( |
1dc90497 AG |
2611 | &context->res_ctx, |
2612 | pipe_ctx); | |
4562236b | 2613 | |
1dc90497 AG |
2614 | if (pipe_ctx->clock_source == NULL) |
2615 | pipe_ctx->clock_source = | |
2616 | dc_resource_find_first_free_pll( | |
2617 | &context->res_ctx, | |
2618 | pool); | |
2619 | } | |
4562236b | 2620 | |
1dc90497 AG |
2621 | if (pipe_ctx->clock_source == NULL) |
2622 | return DC_NO_CLOCK_SOURCE_RESOURCE; | |
4562236b | 2623 | |
1dc90497 AG |
2624 | resource_reference_clock_source( |
2625 | &context->res_ctx, pool, | |
2626 | pipe_ctx->clock_source); | |
4562236b HW |
2627 | |
2628 | return DC_OK; | |
2629 | } | |
2630 | ||
2631 | /* | |
2632 | * Note: We need to disable output if clock sources change, | |
2633 | * since bios does optimization and doesn't apply if changing | |
2634 | * PHY when not already disabled. | |
2635 | */ | |
2636 | bool pipe_need_reprogram( | |
2637 | struct pipe_ctx *pipe_ctx_old, | |
2638 | struct pipe_ctx *pipe_ctx) | |
2639 | { | |
cfe4645e DL |
2640 | if (!pipe_ctx_old->stream) |
2641 | return false; | |
2642 | ||
4562236b HW |
2643 | if (pipe_ctx_old->stream->sink != pipe_ctx->stream->sink) |
2644 | return true; | |
2645 | ||
2646 | if (pipe_ctx_old->stream->signal != pipe_ctx->stream->signal) | |
2647 | return true; | |
2648 | ||
afaacef4 | 2649 | if (pipe_ctx_old->stream_res.audio != pipe_ctx->stream_res.audio) |
4562236b HW |
2650 | return true; |
2651 | ||
2652 | if (pipe_ctx_old->clock_source != pipe_ctx->clock_source | |
2653 | && pipe_ctx_old->stream != pipe_ctx->stream) | |
2654 | return true; | |
2655 | ||
8e9c4c8c | 2656 | if (pipe_ctx_old->stream_res.stream_enc != pipe_ctx->stream_res.stream_enc) |
4562236b HW |
2657 | return true; |
2658 | ||
2659 | if (is_timing_changed(pipe_ctx_old->stream, pipe_ctx->stream)) | |
2660 | return true; | |
2661 | ||
1e7e86c4 ST |
2662 | if (pipe_ctx_old->stream->dpms_off != pipe_ctx->stream->dpms_off) |
2663 | return true; | |
2664 | ||
eed928dc CL |
2665 | if (false == pipe_ctx_old->stream->link->link_state_valid && |
2666 | false == pipe_ctx_old->stream->dpms_off) | |
2667 | return true; | |
2668 | ||
4562236b HW |
2669 | return false; |
2670 | } | |
529cad0f | 2671 | |
0971c40e | 2672 | void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream, |
529cad0f DW |
2673 | struct bit_depth_reduction_params *fmt_bit_depth) |
2674 | { | |
4fa086b9 | 2675 | enum dc_dither_option option = stream->dither_option; |
529cad0f | 2676 | enum dc_pixel_encoding pixel_encoding = |
4fa086b9 | 2677 | stream->timing.pixel_encoding; |
529cad0f DW |
2678 | |
2679 | memset(fmt_bit_depth, 0, sizeof(*fmt_bit_depth)); | |
2680 | ||
603767f9 TC |
2681 | if (option == DITHER_OPTION_DEFAULT) { |
2682 | switch (stream->timing.display_color_depth) { | |
2683 | case COLOR_DEPTH_666: | |
2684 | option = DITHER_OPTION_SPATIAL6; | |
2685 | break; | |
2686 | case COLOR_DEPTH_888: | |
2687 | option = DITHER_OPTION_SPATIAL8; | |
2688 | break; | |
2689 | case COLOR_DEPTH_101010: | |
2690 | option = DITHER_OPTION_SPATIAL10; | |
2691 | break; | |
2692 | default: | |
2693 | option = DITHER_OPTION_DISABLE; | |
2694 | } | |
2695 | } | |
2696 | ||
529cad0f DW |
2697 | if (option == DITHER_OPTION_DISABLE) |
2698 | return; | |
2699 | ||
2700 | if (option == DITHER_OPTION_TRUN6) { | |
2701 | fmt_bit_depth->flags.TRUNCATE_ENABLED = 1; | |
2702 | fmt_bit_depth->flags.TRUNCATE_DEPTH = 0; | |
2703 | } else if (option == DITHER_OPTION_TRUN8 || | |
2704 | option == DITHER_OPTION_TRUN8_SPATIAL6 || | |
2705 | option == DITHER_OPTION_TRUN8_FM6) { | |
2706 | fmt_bit_depth->flags.TRUNCATE_ENABLED = 1; | |
2707 | fmt_bit_depth->flags.TRUNCATE_DEPTH = 1; | |
2708 | } else if (option == DITHER_OPTION_TRUN10 || | |
2709 | option == DITHER_OPTION_TRUN10_SPATIAL6 || | |
2710 | option == DITHER_OPTION_TRUN10_SPATIAL8 || | |
2711 | option == DITHER_OPTION_TRUN10_FM8 || | |
2712 | option == DITHER_OPTION_TRUN10_FM6 || | |
2713 | option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) { | |
2714 | fmt_bit_depth->flags.TRUNCATE_ENABLED = 1; | |
2715 | fmt_bit_depth->flags.TRUNCATE_DEPTH = 2; | |
2716 | } | |
2717 | ||
2718 | /* special case - Formatter can only reduce by 4 bits at most. | |
2719 | * When reducing from 12 to 6 bits, | |
2720 | * HW recommends we use trunc with round mode | |
2721 | * (if we did nothing, trunc to 10 bits would be used) | |
2722 | * note that any 12->10 bit reduction is ignored prior to DCE8, | |
2723 | * as the input was 10 bits. | |
2724 | */ | |
2725 | if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM || | |
2726 | option == DITHER_OPTION_SPATIAL6 || | |
2727 | option == DITHER_OPTION_FM6) { | |
2728 | fmt_bit_depth->flags.TRUNCATE_ENABLED = 1; | |
2729 | fmt_bit_depth->flags.TRUNCATE_DEPTH = 2; | |
2730 | fmt_bit_depth->flags.TRUNCATE_MODE = 1; | |
2731 | } | |
2732 | ||
2733 | /* spatial dither | |
2734 | * note that spatial modes 1-3 are never used | |
2735 | */ | |
2736 | if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM || | |
2737 | option == DITHER_OPTION_SPATIAL6 || | |
2738 | option == DITHER_OPTION_TRUN10_SPATIAL6 || | |
2739 | option == DITHER_OPTION_TRUN8_SPATIAL6) { | |
2740 | fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1; | |
2741 | fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 0; | |
2742 | fmt_bit_depth->flags.HIGHPASS_RANDOM = 1; | |
2743 | fmt_bit_depth->flags.RGB_RANDOM = | |
2744 | (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0; | |
2745 | } else if (option == DITHER_OPTION_SPATIAL8_FRAME_RANDOM || | |
2746 | option == DITHER_OPTION_SPATIAL8 || | |
2747 | option == DITHER_OPTION_SPATIAL8_FM6 || | |
2748 | option == DITHER_OPTION_TRUN10_SPATIAL8 || | |
2749 | option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) { | |
2750 | fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1; | |
2751 | fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 1; | |
2752 | fmt_bit_depth->flags.HIGHPASS_RANDOM = 1; | |
2753 | fmt_bit_depth->flags.RGB_RANDOM = | |
2754 | (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0; | |
2755 | } else if (option == DITHER_OPTION_SPATIAL10_FRAME_RANDOM || | |
2756 | option == DITHER_OPTION_SPATIAL10 || | |
2757 | option == DITHER_OPTION_SPATIAL10_FM8 || | |
2758 | option == DITHER_OPTION_SPATIAL10_FM6) { | |
2759 | fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1; | |
2760 | fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 2; | |
2761 | fmt_bit_depth->flags.HIGHPASS_RANDOM = 1; | |
2762 | fmt_bit_depth->flags.RGB_RANDOM = | |
2763 | (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0; | |
2764 | } | |
2765 | ||
2766 | if (option == DITHER_OPTION_SPATIAL6 || | |
2767 | option == DITHER_OPTION_SPATIAL8 || | |
2768 | option == DITHER_OPTION_SPATIAL10) { | |
2769 | fmt_bit_depth->flags.FRAME_RANDOM = 0; | |
2770 | } else { | |
2771 | fmt_bit_depth->flags.FRAME_RANDOM = 1; | |
2772 | } | |
2773 | ||
2774 | ////////////////////// | |
2775 | //// temporal dither | |
2776 | ////////////////////// | |
2777 | if (option == DITHER_OPTION_FM6 || | |
2778 | option == DITHER_OPTION_SPATIAL8_FM6 || | |
2779 | option == DITHER_OPTION_SPATIAL10_FM6 || | |
2780 | option == DITHER_OPTION_TRUN10_FM6 || | |
2781 | option == DITHER_OPTION_TRUN8_FM6 || | |
2782 | option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) { | |
2783 | fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1; | |
2784 | fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 0; | |
2785 | } else if (option == DITHER_OPTION_FM8 || | |
2786 | option == DITHER_OPTION_SPATIAL10_FM8 || | |
2787 | option == DITHER_OPTION_TRUN10_FM8) { | |
2788 | fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1; | |
2789 | fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 1; | |
2790 | } else if (option == DITHER_OPTION_FM10) { | |
2791 | fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1; | |
2792 | fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 2; | |
2793 | } | |
2794 | ||
2795 | fmt_bit_depth->pixel_encoding = pixel_encoding; | |
2796 | } | |
9345d987 | 2797 | |
62c933f9 | 2798 | enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream) |
9345d987 | 2799 | { |
ceb3dbb4 | 2800 | struct dc_link *link = stream->link; |
2b77dcc5 | 2801 | struct timing_generator *tg = dc->res_pool->timing_generators[0]; |
9345d987 AG |
2802 | enum dc_status res = DC_OK; |
2803 | ||
4fa086b9 | 2804 | calculate_phy_pix_clks(stream); |
9345d987 | 2805 | |
4fa086b9 | 2806 | if (!tg->funcs->validate_timing(tg, &stream->timing)) |
9345d987 AG |
2807 | res = DC_FAIL_CONTROLLER_VALIDATE; |
2808 | ||
248cbed6 | 2809 | if (res == DC_OK) { |
9345d987 | 2810 | if (!link->link_enc->funcs->validate_output_with_stream( |
4fa086b9 | 2811 | link->link_enc, stream)) |
9345d987 | 2812 | res = DC_FAIL_ENC_VALIDATE; |
248cbed6 | 2813 | } |
9345d987 AG |
2814 | |
2815 | /* TODO: validate audio ASIC caps, encoder */ | |
2816 | ||
2817 | if (res == DC_OK) | |
4fa086b9 | 2818 | res = dc_link_validate_mode_timing(stream, |
9345d987 | 2819 | link, |
4fa086b9 | 2820 | &stream->timing); |
9345d987 | 2821 | |
62c933f9 | 2822 | return res; |
9345d987 | 2823 | } |
792671d7 | 2824 | |
62c933f9 | 2825 | enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state) |
792671d7 | 2826 | { |
62c933f9 YS |
2827 | enum dc_status res = DC_OK; |
2828 | ||
792671d7 | 2829 | /* TODO For now validates pixel format only */ |
8e7095b9 | 2830 | if (dc->res_pool->funcs->validate_plane) |
62c933f9 | 2831 | return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps); |
792671d7 | 2832 | |
62c933f9 | 2833 | return res; |
792671d7 | 2834 | } |
74eac5f3 SSC |
2835 | |
2836 | unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format) | |
2837 | { | |
2838 | switch (format) { | |
2839 | case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS: | |
2840 | return 8; | |
2841 | case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr: | |
2842 | case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb: | |
2843 | return 12; | |
2844 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555: | |
2845 | case SURFACE_PIXEL_FORMAT_GRPH_RGB565: | |
2846 | case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr: | |
2847 | case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb: | |
2848 | return 16; | |
2849 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888: | |
2850 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888: | |
2851 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010: | |
2852 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010: | |
2853 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS: | |
2854 | return 32; | |
2855 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616: | |
2856 | case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F: | |
2857 | case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F: | |
2858 | return 64; | |
2859 | default: | |
2860 | ASSERT_CRITICAL(false); | |
2861 | return -1; | |
2862 | } | |
2863 | } | |
3ab4cc65 CL |
2864 | static unsigned int get_max_audio_sample_rate(struct audio_mode *modes) |
2865 | { | |
2866 | if (modes) { | |
2867 | if (modes->sample_rates.rate.RATE_192) | |
2868 | return 192000; | |
2869 | if (modes->sample_rates.rate.RATE_176_4) | |
2870 | return 176400; | |
2871 | if (modes->sample_rates.rate.RATE_96) | |
2872 | return 96000; | |
2873 | if (modes->sample_rates.rate.RATE_88_2) | |
2874 | return 88200; | |
2875 | if (modes->sample_rates.rate.RATE_48) | |
2876 | return 48000; | |
2877 | if (modes->sample_rates.rate.RATE_44_1) | |
2878 | return 44100; | |
2879 | if (modes->sample_rates.rate.RATE_32) | |
2880 | return 32000; | |
2881 | } | |
2882 | /*original logic when no audio info*/ | |
2883 | return 441000; | |
2884 | } | |
2885 | ||
2886 | void get_audio_check(struct audio_info *aud_modes, | |
2887 | struct audio_check *audio_chk) | |
2888 | { | |
2889 | unsigned int i; | |
2890 | unsigned int max_sample_rate = 0; | |
2891 | ||
2892 | if (aud_modes) { | |
2893 | audio_chk->audio_packet_type = 0x2;/*audio sample packet AP = .25 for layout0, 1 for layout1*/ | |
2894 | ||
2895 | audio_chk->max_audiosample_rate = 0; | |
2896 | for (i = 0; i < aud_modes->mode_count; i++) { | |
2897 | max_sample_rate = get_max_audio_sample_rate(&aud_modes->modes[i]); | |
2898 | if (audio_chk->max_audiosample_rate < max_sample_rate) | |
2899 | audio_chk->max_audiosample_rate = max_sample_rate; | |
2900 | /*dts takes the same as type 2: AP = 0.25*/ | |
2901 | } | |
2902 | /*check which one take more bandwidth*/ | |
2903 | if (audio_chk->max_audiosample_rate > 192000) | |
2904 | audio_chk->audio_packet_type = 0x9;/*AP =1*/ | |
2905 | audio_chk->acat = 0;/*not support*/ | |
2906 | } | |
2907 | } | |
2908 |