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4562236b HW |
1 | /* |
2 | * Copyright 2012-14 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: AMD | |
23 | * | |
24 | */ | |
25 | ||
26 | #ifndef DC_INTERFACE_H_ | |
27 | #define DC_INTERFACE_H_ | |
28 | ||
29 | #include "dc_types.h" | |
4562236b HW |
30 | #include "grph_object_defs.h" |
31 | #include "logger_types.h" | |
32 | #include "gpio_types.h" | |
33 | #include "link_service_types.h" | |
34 | ||
091a97e5 | 35 | #define MAX_SURFACES 3 |
ab2541b6 | 36 | #define MAX_STREAMS 6 |
4562236b HW |
37 | #define MAX_SINKS_PER_LINK 4 |
38 | ||
39 | /******************************************************************************* | |
40 | * Display Core Interfaces | |
41 | ******************************************************************************/ | |
42 | ||
43 | struct dc_caps { | |
ab2541b6 | 44 | uint32_t max_streams; |
4562236b HW |
45 | uint32_t max_links; |
46 | uint32_t max_audios; | |
47 | uint32_t max_slave_planes; | |
d4e13b0d | 48 | uint32_t max_surfaces; |
4562236b HW |
49 | uint32_t max_downscale_ratio; |
50 | uint32_t i2c_speed_in_khz; | |
a37656b9 TC |
51 | |
52 | unsigned int max_cursor_size; | |
4562236b HW |
53 | }; |
54 | ||
55 | ||
56 | struct dc_dcc_surface_param { | |
57 | enum surface_pixel_format format; | |
58 | struct dc_size surface_size; | |
2c8ad2d5 | 59 | enum swizzle_mode_values swizzle_mode; |
4562236b HW |
60 | enum dc_scan_direction scan; |
61 | }; | |
62 | ||
63 | struct dc_dcc_setting { | |
64 | unsigned int max_compressed_blk_size; | |
65 | unsigned int max_uncompressed_blk_size; | |
66 | bool independent_64b_blks; | |
67 | }; | |
68 | ||
69 | struct dc_surface_dcc_cap { | |
70 | bool capable; | |
71 | bool const_color_support; | |
72 | ||
73 | union { | |
74 | struct { | |
75 | struct dc_dcc_setting rgb; | |
76 | } grph; | |
77 | ||
78 | struct { | |
79 | struct dc_dcc_setting luma; | |
80 | struct dc_dcc_setting chroma; | |
81 | } video; | |
82 | }; | |
83 | }; | |
84 | ||
94267b3d ST |
85 | struct dc_static_screen_events { |
86 | bool cursor_update; | |
87 | bool surface_update; | |
88 | bool overlay_update; | |
89 | }; | |
90 | ||
4562236b HW |
91 | /* Forward declaration*/ |
92 | struct dc; | |
93 | struct dc_surface; | |
94 | struct validate_context; | |
95 | ||
96 | struct dc_cap_funcs { | |
ff5ef992 AD |
97 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) |
98 | bool (*get_dcc_compression_cap)(const struct dc *dc, | |
99 | const struct dc_dcc_surface_param *input, | |
100 | struct dc_surface_dcc_cap *output); | |
101 | #else | |
4562236b | 102 | int i; |
ff5ef992 | 103 | #endif |
4562236b HW |
104 | }; |
105 | ||
106 | struct dc_stream_funcs { | |
107 | bool (*adjust_vmin_vmax)(struct dc *dc, | |
108 | const struct dc_stream **stream, | |
109 | int num_streams, | |
110 | int vmin, | |
111 | int vmax); | |
72ada5f7 EC |
112 | bool (*get_crtc_position)(struct dc *dc, |
113 | const struct dc_stream **stream, | |
114 | int num_streams, | |
115 | unsigned int *v_pos, | |
116 | unsigned int *nom_v_pos); | |
117 | ||
4562236b HW |
118 | |
119 | void (*stream_update_scaling)(const struct dc *dc, | |
120 | const struct dc_stream *dc_stream, | |
121 | const struct rect *src, | |
122 | const struct rect *dst); | |
94267b3d | 123 | |
4562236b HW |
124 | bool (*set_gamut_remap)(struct dc *dc, |
125 | const struct dc_stream **stream, int num_streams); | |
94267b3d ST |
126 | |
127 | void (*set_static_screen_events)(struct dc *dc, | |
128 | const struct dc_stream **stream, | |
129 | int num_streams, | |
130 | const struct dc_static_screen_events *events); | |
529cad0f DW |
131 | |
132 | void (*set_dither_option)(const struct dc_stream *stream, | |
133 | enum dc_dither_option option); | |
4562236b HW |
134 | }; |
135 | ||
136 | struct link_training_settings; | |
137 | ||
138 | struct dc_link_funcs { | |
139 | void (*set_drive_settings)(struct dc *dc, | |
bf5cda33 HW |
140 | struct link_training_settings *lt_settings, |
141 | const struct dc_link *link); | |
4562236b HW |
142 | void (*perform_link_training)(struct dc *dc, |
143 | struct dc_link_settings *link_setting, | |
144 | bool skip_video_pattern); | |
145 | void (*set_preferred_link_settings)(struct dc *dc, | |
88639168 ZF |
146 | struct dc_link_settings *link_setting, |
147 | const struct dc_link *link); | |
4562236b HW |
148 | void (*enable_hpd)(const struct dc_link *link); |
149 | void (*disable_hpd)(const struct dc_link *link); | |
150 | void (*set_test_pattern)( | |
151 | const struct dc_link *link, | |
152 | enum dp_test_pattern test_pattern, | |
153 | const struct link_training_settings *p_link_settings, | |
154 | const unsigned char *p_custom_pattern, | |
155 | unsigned int cust_pattern_size); | |
156 | }; | |
157 | ||
158 | /* Structure to hold configuration flags set by dm at dc creation. */ | |
159 | struct dc_config { | |
160 | bool gpu_vm_support; | |
161 | bool disable_disp_pll_sharing; | |
162 | }; | |
163 | ||
164 | struct dc_debug { | |
165 | bool surface_visual_confirm; | |
166 | bool max_disp_clk; | |
4562236b | 167 | bool surface_trace; |
9474980a | 168 | bool timing_trace; |
4562236b HW |
169 | bool validation_trace; |
170 | bool disable_stutter; | |
171 | bool disable_dcc; | |
172 | bool disable_dfs_bypass; | |
ff5ef992 AD |
173 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) |
174 | bool disable_dpp_power_gate; | |
175 | bool disable_hubp_power_gate; | |
176 | bool disable_pplib_wm_range; | |
177 | bool use_dml_wm; | |
178 | bool use_max_voltage; | |
179 | int sr_exit_time_ns; | |
180 | int sr_enter_plus_exit_time_ns; | |
181 | int urgent_latency_ns; | |
182 | int percent_of_ideal_drambw; | |
183 | int dram_clock_change_latency_ns; | |
184 | #endif | |
2c8ad2d5 | 185 | bool disable_pplib_clock_request; |
4562236b | 186 | bool disable_clock_gate; |
aa66df58 | 187 | bool disable_dmcu; |
70814f6f | 188 | bool force_abm_enable; |
4562236b HW |
189 | }; |
190 | ||
191 | struct dc { | |
192 | struct dc_caps caps; | |
193 | struct dc_cap_funcs cap_funcs; | |
194 | struct dc_stream_funcs stream_funcs; | |
195 | struct dc_link_funcs link_funcs; | |
196 | struct dc_config config; | |
197 | struct dc_debug debug; | |
198 | }; | |
199 | ||
2c8ad2d5 AD |
200 | enum frame_buffer_mode { |
201 | FRAME_BUFFER_MODE_LOCAL_ONLY = 0, | |
202 | FRAME_BUFFER_MODE_ZFB_ONLY, | |
203 | FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL, | |
204 | } ; | |
205 | ||
206 | struct dchub_init_data { | |
207 | bool dchub_initialzied; | |
208 | bool dchub_info_valid; | |
209 | int64_t zfb_phys_addr_base; | |
210 | int64_t zfb_mc_base_addr; | |
211 | uint64_t zfb_size_in_byte; | |
212 | enum frame_buffer_mode fb_mode; | |
213 | }; | |
2c8ad2d5 | 214 | |
4562236b HW |
215 | struct dc_init_data { |
216 | struct hw_asic_id asic_id; | |
217 | void *driver; /* ctx */ | |
218 | struct cgs_device *cgs_device; | |
219 | ||
220 | int num_virtual_links; | |
221 | /* | |
222 | * If 'vbios_override' not NULL, it will be called instead | |
223 | * of the real VBIOS. Intended use is Diagnostics on FPGA. | |
224 | */ | |
225 | struct dc_bios *vbios_override; | |
226 | enum dce_environment dce_environment; | |
227 | ||
228 | struct dc_config flags; | |
229 | }; | |
230 | ||
231 | struct dc *dc_create(const struct dc_init_data *init_params); | |
232 | ||
233 | void dc_destroy(struct dc **dc); | |
234 | ||
2c8ad2d5 | 235 | bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data); |
2c8ad2d5 | 236 | |
4562236b HW |
237 | /******************************************************************************* |
238 | * Surface Interfaces | |
239 | ******************************************************************************/ | |
240 | ||
241 | enum { | |
fb735a9f | 242 | TRANSFER_FUNC_POINTS = 1025 |
4562236b HW |
243 | }; |
244 | ||
1646a6fe | 245 | struct dc_hdr_static_metadata { |
70063a59 | 246 | bool hdr_supported; |
1646a6fe AW |
247 | bool is_hdr; |
248 | ||
249 | /* display chromaticities and white point in units of 0.00001 */ | |
250 | unsigned int chromaticity_green_x; | |
251 | unsigned int chromaticity_green_y; | |
252 | unsigned int chromaticity_blue_x; | |
253 | unsigned int chromaticity_blue_y; | |
254 | unsigned int chromaticity_red_x; | |
255 | unsigned int chromaticity_red_y; | |
256 | unsigned int chromaticity_white_point_x; | |
257 | unsigned int chromaticity_white_point_y; | |
258 | ||
259 | uint32_t min_luminance; | |
260 | uint32_t max_luminance; | |
261 | uint32_t maximum_content_light_level; | |
262 | uint32_t maximum_frame_average_light_level; | |
263 | }; | |
264 | ||
fb735a9f AK |
265 | enum dc_transfer_func_type { |
266 | TF_TYPE_PREDEFINED, | |
267 | TF_TYPE_DISTRIBUTED_POINTS, | |
70063a59 | 268 | TF_TYPE_BYPASS |
fb735a9f AK |
269 | }; |
270 | ||
271 | struct dc_transfer_func_distributed_points { | |
fcd2f4bf AZ |
272 | struct fixed31_32 red[TRANSFER_FUNC_POINTS]; |
273 | struct fixed31_32 green[TRANSFER_FUNC_POINTS]; | |
274 | struct fixed31_32 blue[TRANSFER_FUNC_POINTS]; | |
275 | ||
fb735a9f | 276 | uint16_t end_exponent; |
fcd2f4bf AZ |
277 | uint16_t x_point_at_y1_red; |
278 | uint16_t x_point_at_y1_green; | |
279 | uint16_t x_point_at_y1_blue; | |
fb735a9f AK |
280 | }; |
281 | ||
282 | enum dc_transfer_func_predefined { | |
283 | TRANSFER_FUNCTION_SRGB, | |
284 | TRANSFER_FUNCTION_BT709, | |
90e508ba | 285 | TRANSFER_FUNCTION_PQ, |
fb735a9f AK |
286 | TRANSFER_FUNCTION_LINEAR, |
287 | }; | |
288 | ||
289 | struct dc_transfer_func { | |
290 | enum dc_transfer_func_type type; | |
291 | enum dc_transfer_func_predefined tf; | |
292 | struct dc_transfer_func_distributed_points tf_pts; | |
293 | }; | |
294 | ||
4562236b HW |
295 | struct dc_surface { |
296 | bool visible; | |
297 | bool flip_immediate; | |
298 | struct dc_plane_address address; | |
299 | ||
300 | struct scaling_taps scaling_quality; | |
301 | struct rect src_rect; | |
302 | struct rect dst_rect; | |
303 | struct rect clip_rect; | |
304 | ||
305 | union plane_size plane_size; | |
306 | union dc_tiling_info tiling_info; | |
307 | struct dc_plane_dcc_param dcc; | |
308 | enum dc_color_space color_space; | |
309 | ||
310 | enum surface_pixel_format format; | |
311 | enum dc_rotation_angle rotation; | |
312 | bool horizontal_mirror; | |
313 | enum plane_stereo_format stereo_format; | |
314 | ||
1646a6fe AW |
315 | struct dc_hdr_static_metadata hdr_static_ctx; |
316 | ||
4562236b | 317 | const struct dc_gamma *gamma_correction; |
fb735a9f | 318 | const struct dc_transfer_func *in_transfer_func; |
4562236b HW |
319 | }; |
320 | ||
321 | struct dc_plane_info { | |
322 | union plane_size plane_size; | |
323 | union dc_tiling_info tiling_info; | |
9cd09bfe | 324 | struct dc_plane_dcc_param dcc; |
4562236b HW |
325 | enum surface_pixel_format format; |
326 | enum dc_rotation_angle rotation; | |
327 | bool horizontal_mirror; | |
328 | enum plane_stereo_format stereo_format; | |
329 | enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/ | |
330 | bool visible; | |
331 | }; | |
332 | ||
333 | struct dc_scaling_info { | |
334 | struct rect src_rect; | |
335 | struct rect dst_rect; | |
336 | struct rect clip_rect; | |
337 | struct scaling_taps scaling_quality; | |
338 | }; | |
339 | ||
340 | struct dc_surface_update { | |
341 | const struct dc_surface *surface; | |
342 | ||
343 | /* isr safe update parameters. null means no updates */ | |
344 | struct dc_flip_addrs *flip_addr; | |
345 | struct dc_plane_info *plane_info; | |
346 | struct dc_scaling_info *scaling_info; | |
347 | /* following updates require alloc/sleep/spin that is not isr safe, | |
348 | * null means no updates | |
349 | */ | |
fb735a9f | 350 | /* gamma TO BE REMOVED */ |
4562236b | 351 | struct dc_gamma *gamma; |
1646a6fe | 352 | struct dc_hdr_static_metadata *hdr_static_metadata; |
fb735a9f AK |
353 | struct dc_transfer_func *in_transfer_func; |
354 | struct dc_transfer_func *out_transfer_func; | |
355 | ||
4562236b HW |
356 | |
357 | }; | |
358 | /* | |
359 | * This structure is filled in by dc_surface_get_status and contains | |
360 | * the last requested address and the currently active address so the called | |
361 | * can determine if there are any outstanding flips | |
362 | */ | |
363 | struct dc_surface_status { | |
364 | struct dc_plane_address requested_address; | |
365 | struct dc_plane_address current_address; | |
366 | bool is_flip_pending; | |
367 | }; | |
368 | ||
369 | /* | |
370 | * Create a new surface with default parameters; | |
371 | */ | |
372 | struct dc_surface *dc_create_surface(const struct dc *dc); | |
373 | const struct dc_surface_status *dc_surface_get_status( | |
374 | const struct dc_surface *dc_surface); | |
375 | ||
376 | void dc_surface_retain(const struct dc_surface *dc_surface); | |
377 | void dc_surface_release(const struct dc_surface *dc_surface); | |
378 | ||
89e89630 | 379 | void dc_gamma_retain(const struct dc_gamma *dc_gamma); |
aff20230 | 380 | void dc_gamma_release(const struct dc_gamma **dc_gamma); |
4562236b HW |
381 | struct dc_gamma *dc_create_gamma(void); |
382 | ||
fb735a9f AK |
383 | void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf); |
384 | void dc_transfer_func_release(const struct dc_transfer_func *dc_tf); | |
90e508ba | 385 | struct dc_transfer_func *dc_create_transfer_func(void); |
fb735a9f | 386 | |
4562236b HW |
387 | /* |
388 | * This structure holds a surface address. There could be multiple addresses | |
389 | * in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such | |
390 | * as frame durations and DCC format can also be set. | |
391 | */ | |
392 | struct dc_flip_addrs { | |
393 | struct dc_plane_address address; | |
394 | bool flip_immediate; | |
4562236b HW |
395 | /* TODO: add flip duration for FreeSync */ |
396 | }; | |
397 | ||
398 | /* | |
399 | * Optimized flip address update function. | |
400 | * | |
401 | * After this call: | |
402 | * Surface addresses and flip attributes are programmed. | |
403 | * Surface flip occur at next configured time (h_sync or v_sync flip) | |
404 | */ | |
405 | void dc_flip_surface_addrs(struct dc *dc, | |
406 | const struct dc_surface *const surfaces[], | |
407 | struct dc_flip_addrs flip_addrs[], | |
408 | uint32_t count); | |
409 | ||
410 | /* | |
ab2541b6 AC |
411 | * Set up surface attributes and associate to a stream |
412 | * The surfaces parameter is an absolute set of all surface active for the stream. | |
413 | * If no surfaces are provided, the stream will be blanked; no memory read. | |
4562236b HW |
414 | * Any flip related attribute changes must be done through this interface. |
415 | * | |
416 | * After this call: | |
ab2541b6 | 417 | * Surfaces attributes are programmed and configured to be composed into stream. |
4562236b HW |
418 | * This does not trigger a flip. No surface address is programmed. |
419 | */ | |
420 | ||
ab2541b6 | 421 | bool dc_commit_surfaces_to_stream( |
4562236b HW |
422 | struct dc *dc, |
423 | const struct dc_surface **dc_surfaces, | |
424 | uint8_t surface_count, | |
ab2541b6 | 425 | const struct dc_stream *stream); |
4562236b | 426 | |
ab2541b6 | 427 | bool dc_pre_update_surfaces_to_stream( |
4562236b HW |
428 | struct dc *dc, |
429 | const struct dc_surface *const *new_surfaces, | |
430 | uint8_t new_surface_count, | |
ab2541b6 | 431 | const struct dc_stream *stream); |
4562236b | 432 | |
ab2541b6 | 433 | bool dc_post_update_surfaces_to_stream( |
4562236b HW |
434 | struct dc *dc); |
435 | ||
ab2541b6 AC |
436 | void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates, |
437 | int surface_count, const struct dc_stream *stream); | |
4562236b | 438 | |
5869b0f6 LE |
439 | enum surface_update_type { |
440 | UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */ | |
441 | UPDATE_TYPE_MED, /* a lot of programming needed. may need to alloc */ | |
442 | UPDATE_TYPE_FULL, /* may need to shuffle resources */ | |
443 | }; | |
444 | ||
4562236b | 445 | /******************************************************************************* |
ab2541b6 | 446 | * Stream Interfaces |
4562236b | 447 | ******************************************************************************/ |
ab2541b6 AC |
448 | struct dc_stream { |
449 | const struct dc_sink *sink; | |
450 | struct dc_crtc_timing timing; | |
8b32076c | 451 | enum signal_type output_signal; |
4562236b | 452 | |
ab2541b6 | 453 | enum dc_color_space output_color_space; |
b92033b6 | 454 | enum dc_dither_option dither_option; |
4562236b | 455 | |
ab2541b6 AC |
456 | struct rect src; /* composition area */ |
457 | struct rect dst; /* stream addressable area */ | |
4562236b | 458 | |
ab2541b6 AC |
459 | struct audio_info audio_info; |
460 | ||
461 | bool ignore_msa_timing_param; | |
462 | ||
463 | struct freesync_context freesync_ctx; | |
464 | ||
465 | const struct dc_transfer_func *out_transfer_func; | |
466 | struct colorspace_transform gamut_remap_matrix; | |
467 | struct csc_transform csc_color_matrix; | |
468 | ||
ab2541b6 AC |
469 | /* TODO: custom INFO packets */ |
470 | /* TODO: ABM info (DMCU) */ | |
471 | /* TODO: PSR info */ | |
472 | /* TODO: CEA VIC */ | |
473 | }; | |
4562236b | 474 | |
a783e7b5 LE |
475 | struct dc_stream_update { |
476 | ||
477 | struct rect src; | |
478 | ||
479 | struct rect dst; | |
480 | ||
481 | }; | |
482 | ||
483 | ||
484 | /* | |
485 | * Setup stream attributes if no stream updates are provided | |
486 | * there will be no impact on the stream parameters | |
487 | * | |
488 | * Set up surface attributes and associate to a stream | |
489 | * The surfaces parameter is an absolute set of all surface active for the stream. | |
490 | * If no surfaces are provided, the stream will be blanked; no memory read. | |
491 | * Any flip related attribute changes must be done through this interface. | |
492 | * | |
493 | * After this call: | |
494 | * Surfaces attributes are programmed and configured to be composed into stream. | |
495 | * This does not trigger a flip. No surface address is programmed. | |
496 | * | |
497 | */ | |
498 | ||
499 | void dc_update_surfaces_and_stream(struct dc *dc, | |
500 | struct dc_surface_update *surface_updates, int surface_count, | |
501 | const struct dc_stream *dc_stream, | |
502 | struct dc_stream_update *stream_update); | |
503 | ||
4562236b | 504 | /* |
ab2541b6 | 505 | * Log the current stream state. |
4562236b | 506 | */ |
ab2541b6 AC |
507 | void dc_stream_log( |
508 | const struct dc_stream *stream, | |
4562236b HW |
509 | struct dal_logger *dc_logger, |
510 | enum dc_log_type log_type); | |
511 | ||
ab2541b6 AC |
512 | uint8_t dc_get_current_stream_count(const struct dc *dc); |
513 | struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i); | |
4562236b | 514 | |
ab2541b6 AC |
515 | /* |
516 | * Return the current frame counter. | |
517 | */ | |
518 | uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream); | |
4562236b HW |
519 | |
520 | /* TODO: Return parsed values rather than direct register read | |
521 | * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos) | |
522 | * being refactored properly to be dce-specific | |
523 | */ | |
81c50963 ST |
524 | bool dc_stream_get_scanoutpos(const struct dc_stream *stream, |
525 | uint32_t *v_blank_start, | |
526 | uint32_t *v_blank_end, | |
527 | uint32_t *h_position, | |
528 | uint32_t *v_position); | |
4562236b HW |
529 | |
530 | /* | |
ab2541b6 | 531 | * Structure to store surface/stream associations for validation |
4562236b HW |
532 | */ |
533 | struct dc_validation_set { | |
ab2541b6 | 534 | const struct dc_stream *stream; |
4562236b HW |
535 | const struct dc_surface *surfaces[MAX_SURFACES]; |
536 | uint8_t surface_count; | |
537 | }; | |
538 | ||
539 | /* | |
540 | * This function takes a set of resources and checks that they are cofunctional. | |
541 | * | |
542 | * After this call: | |
543 | * No hardware is programmed for call. Only validation is done. | |
544 | */ | |
07d72b39 HW |
545 | struct validate_context *dc_get_validate_context( |
546 | const struct dc *dc, | |
547 | const struct dc_validation_set set[], | |
548 | uint8_t set_count); | |
549 | ||
4562236b HW |
550 | bool dc_validate_resources( |
551 | const struct dc *dc, | |
552 | const struct dc_validation_set set[], | |
553 | uint8_t set_count); | |
554 | ||
555 | /* | |
ab2541b6 AC |
556 | * This function takes a stream and checks if it is guaranteed to be supported. |
557 | * Guaranteed means that MAX_COFUNC similar streams are supported. | |
4562236b HW |
558 | * |
559 | * After this call: | |
560 | * No hardware is programmed for call. Only validation is done. | |
561 | */ | |
562 | ||
563 | bool dc_validate_guaranteed( | |
564 | const struct dc *dc, | |
ab2541b6 | 565 | const struct dc_stream *stream); |
4562236b | 566 | |
8122a253 HW |
567 | void dc_resource_validate_ctx_copy_construct( |
568 | const struct validate_context *src_ctx, | |
569 | struct validate_context *dst_ctx); | |
570 | ||
571 | void dc_resource_validate_ctx_destruct(struct validate_context *context); | |
572 | ||
4562236b | 573 | /* |
ab2541b6 AC |
574 | * Set up streams and links associated to drive sinks |
575 | * The streams parameter is an absolute set of all active streams. | |
4562236b HW |
576 | * |
577 | * After this call: | |
578 | * Phy, Encoder, Timing Generator are programmed and enabled. | |
ab2541b6 | 579 | * New streams are enabled with blank stream; no memory read. |
4562236b | 580 | */ |
ab2541b6 | 581 | bool dc_commit_streams( |
4562236b | 582 | struct dc *dc, |
ab2541b6 AC |
583 | const struct dc_stream *streams[], |
584 | uint8_t stream_count); | |
4562236b HW |
585 | |
586 | /** | |
587 | * Create a new default stream for the requested sink | |
588 | */ | |
589 | struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink); | |
590 | ||
591 | void dc_stream_retain(const struct dc_stream *dc_stream); | |
592 | void dc_stream_release(const struct dc_stream *dc_stream); | |
593 | ||
594 | struct dc_stream_status { | |
ab2541b6 AC |
595 | int primary_otg_inst; |
596 | int surface_count; | |
597 | const struct dc_surface *surfaces[MAX_SURFACE_NUM]; | |
598 | ||
4562236b HW |
599 | /* |
600 | * link this stream passes through | |
601 | */ | |
602 | const struct dc_link *link; | |
603 | }; | |
604 | ||
605 | const struct dc_stream_status *dc_stream_get_status( | |
606 | const struct dc_stream *dc_stream); | |
607 | ||
5869b0f6 LE |
608 | enum surface_update_type dc_check_update_surfaces_for_stream( |
609 | struct dc *dc, | |
610 | struct dc_surface_update *updates, | |
611 | int surface_count, | |
ee8f63e1 | 612 | struct dc_stream_update *stream_update, |
5869b0f6 LE |
613 | const struct dc_stream_status *stream_status); |
614 | ||
4562236b HW |
615 | /******************************************************************************* |
616 | * Link Interfaces | |
617 | ******************************************************************************/ | |
618 | ||
619 | /* | |
620 | * A link contains one or more sinks and their connected status. | |
621 | * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported. | |
622 | */ | |
623 | struct dc_link { | |
624 | const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK]; | |
625 | unsigned int sink_count; | |
626 | const struct dc_sink *local_sink; | |
627 | unsigned int link_index; | |
628 | enum dc_connection_type type; | |
629 | enum signal_type connector_signal; | |
630 | enum dc_irq_source irq_source_hpd; | |
631 | enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */ | |
632 | /* caps is the same as reported_link_cap. link_traing use | |
633 | * reported_link_cap. Will clean up. TODO | |
634 | */ | |
635 | struct dc_link_settings reported_link_cap; | |
636 | struct dc_link_settings verified_link_cap; | |
637 | struct dc_link_settings max_link_setting; | |
638 | struct dc_link_settings cur_link_settings; | |
639 | struct dc_lane_settings cur_lane_setting; | |
640 | ||
641 | uint8_t ddc_hw_inst; | |
642 | uint8_t link_enc_hw_inst; | |
643 | ||
4562236b HW |
644 | bool test_pattern_enabled; |
645 | union compliance_test_state compliance_test_state; | |
9fb8de78 AG |
646 | |
647 | void *priv; | |
7c7f5b15 | 648 | bool aux_mode; |
46df790c AG |
649 | |
650 | struct ddc_service *ddc; | |
4562236b HW |
651 | }; |
652 | ||
653 | struct dpcd_caps { | |
654 | union dpcd_rev dpcd_rev; | |
655 | union max_lane_count max_ln_count; | |
656 | union max_down_spread max_down_spread; | |
657 | ||
658 | /* dongle type (DP converter, CV smart dongle) */ | |
659 | enum display_dongle_type dongle_type; | |
660 | /* Dongle's downstream count. */ | |
661 | union sink_count sink_count; | |
662 | /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER, | |
663 | indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/ | |
03f5c686 | 664 | struct dc_dongle_caps dongle_caps; |
4562236b HW |
665 | |
666 | bool allow_invalid_MSA_timing_param; | |
667 | bool panel_mode_edp; | |
668 | uint32_t sink_dev_id; | |
669 | uint32_t branch_dev_id; | |
670 | int8_t branch_dev_name[6]; | |
671 | int8_t branch_hw_revision; | |
672 | }; | |
673 | ||
674 | struct dc_link_status { | |
675 | struct dpcd_caps *dpcd_caps; | |
676 | }; | |
677 | ||
678 | const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); | |
679 | ||
680 | /* | |
681 | * Return an enumerated dc_link. dc_link order is constant and determined at | |
682 | * boot time. They cannot be created or destroyed. | |
683 | * Use dc_get_caps() to get number of links. | |
684 | */ | |
685 | const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index); | |
686 | ||
687 | /* Return id of physical connector represented by a dc_link at link_index.*/ | |
688 | const struct graphics_object_id dc_get_link_id_at_index( | |
689 | struct dc *dc, uint32_t link_index); | |
690 | ||
691 | /* Set backlight level of an embedded panel (eDP, LVDS). */ | |
692 | bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level, | |
693 | uint32_t frame_ramp, const struct dc_stream *stream); | |
694 | ||
4562236b HW |
695 | bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable); |
696 | ||
697 | bool dc_link_setup_psr(const struct dc_link *dc_link, | |
94267b3d | 698 | const struct dc_stream *stream, struct psr_config *psr_config); |
4562236b HW |
699 | |
700 | /* Request DC to detect if there is a Panel connected. | |
701 | * boot - If this call is during initial boot. | |
702 | * Return false for any type of detection failure or MST detection | |
703 | * true otherwise. True meaning further action is required (status update | |
704 | * and OS notification). | |
705 | */ | |
706 | bool dc_link_detect(const struct dc_link *dc_link, bool boot); | |
707 | ||
708 | /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt). | |
709 | * Return: | |
710 | * true - Downstream port status changed. DM should call DC to do the | |
711 | * detection. | |
712 | * false - no change in Downstream port status. No further action required | |
713 | * from DM. */ | |
714 | bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link); | |
715 | ||
716 | struct dc_sink_init_data; | |
717 | ||
718 | struct dc_sink *dc_link_add_remote_sink( | |
719 | const struct dc_link *dc_link, | |
720 | const uint8_t *edid, | |
721 | int len, | |
722 | struct dc_sink_init_data *init_data); | |
723 | ||
724 | void dc_link_remove_remote_sink( | |
725 | const struct dc_link *link, | |
726 | const struct dc_sink *sink); | |
727 | ||
728 | /* Used by diagnostics for virtual link at the moment */ | |
729 | void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink); | |
730 | ||
731 | void dc_link_dp_set_drive_settings( | |
d27383a2 | 732 | const struct dc_link *link, |
4562236b HW |
733 | struct link_training_settings *lt_settings); |
734 | ||
735 | bool dc_link_dp_perform_link_training( | |
736 | struct dc_link *link, | |
737 | const struct dc_link_settings *link_setting, | |
738 | bool skip_video_pattern); | |
739 | ||
740 | void dc_link_dp_enable_hpd(const struct dc_link *link); | |
741 | ||
742 | void dc_link_dp_disable_hpd(const struct dc_link *link); | |
743 | ||
744 | bool dc_link_dp_set_test_pattern( | |
745 | const struct dc_link *link, | |
746 | enum dp_test_pattern test_pattern, | |
747 | const struct link_training_settings *p_link_settings, | |
748 | const unsigned char *p_custom_pattern, | |
749 | unsigned int cust_pattern_size); | |
750 | ||
751 | /******************************************************************************* | |
752 | * Sink Interfaces - A sink corresponds to a display output device | |
753 | ******************************************************************************/ | |
754 | ||
8c895313 | 755 | struct dc_container_id { |
756 | // 128bit GUID in binary form | |
757 | unsigned char guid[16]; | |
758 | // 8 byte port ID -> ELD.PortID | |
759 | unsigned int portId[2]; | |
760 | // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName | |
761 | unsigned short manufacturerName; | |
762 | // 2 byte product code -> ELD.ProductCode | |
763 | unsigned short productCode; | |
764 | }; | |
765 | ||
4562236b HW |
766 | /* |
767 | * The sink structure contains EDID and other display device properties | |
768 | */ | |
769 | struct dc_sink { | |
770 | enum signal_type sink_signal; | |
771 | struct dc_edid dc_edid; /* raw edid */ | |
772 | struct dc_edid_caps edid_caps; /* parse display caps */ | |
8c895313 | 773 | struct dc_container_id *dc_container_id; |
4a9a5d62 ZF |
774 | uint32_t dongle_max_pix_clk; |
775 | bool converter_disable_audio; | |
5c4e9806 | 776 | void *priv; |
4562236b HW |
777 | }; |
778 | ||
779 | void dc_sink_retain(const struct dc_sink *sink); | |
780 | void dc_sink_release(const struct dc_sink *sink); | |
781 | ||
782 | const struct audio **dc_get_audios(struct dc *dc); | |
783 | ||
784 | struct dc_sink_init_data { | |
785 | enum signal_type sink_signal; | |
786 | const struct dc_link *link; | |
787 | uint32_t dongle_max_pix_clk; | |
788 | bool converter_disable_audio; | |
789 | }; | |
790 | ||
791 | struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params); | |
8c895313 | 792 | bool dc_sink_get_container_id(struct dc_sink *dc_sink, struct dc_container_id *container_id); |
793 | bool dc_sink_set_container_id(struct dc_sink *dc_sink, const struct dc_container_id *container_id); | |
4562236b HW |
794 | |
795 | /******************************************************************************* | |
ab2541b6 | 796 | * Cursor interfaces - To manages the cursor within a stream |
4562236b HW |
797 | ******************************************************************************/ |
798 | /* TODO: Deprecated once we switch to dc_set_cursor_position */ | |
ab2541b6 AC |
799 | bool dc_stream_set_cursor_attributes( |
800 | const struct dc_stream *stream, | |
4562236b HW |
801 | const struct dc_cursor_attributes *attributes); |
802 | ||
ab2541b6 AC |
803 | bool dc_stream_set_cursor_position( |
804 | const struct dc_stream *stream, | |
beb16b6a | 805 | const struct dc_cursor_position *position); |
4562236b HW |
806 | |
807 | /* Newer interfaces */ | |
808 | struct dc_cursor { | |
809 | struct dc_plane_address address; | |
810 | struct dc_cursor_attributes attributes; | |
811 | }; | |
812 | ||
4562236b HW |
813 | /******************************************************************************* |
814 | * Interrupt interfaces | |
815 | ******************************************************************************/ | |
816 | enum dc_irq_source dc_interrupt_to_irq_source( | |
817 | struct dc *dc, | |
818 | uint32_t src_id, | |
819 | uint32_t ext_id); | |
820 | void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable); | |
821 | void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src); | |
822 | enum dc_irq_source dc_get_hpd_irq_source_at_index( | |
823 | struct dc *dc, uint32_t link_index); | |
824 | ||
825 | /******************************************************************************* | |
826 | * Power Interfaces | |
827 | ******************************************************************************/ | |
828 | ||
829 | void dc_set_power_state( | |
830 | struct dc *dc, | |
a3621485 | 831 | enum dc_acpi_cm_power_state power_state); |
4562236b HW |
832 | void dc_resume(const struct dc *dc); |
833 | ||
4562236b HW |
834 | /* |
835 | * DPCD access interfaces | |
836 | */ | |
837 | ||
7c7f5b15 | 838 | bool dc_read_aux_dpcd( |
4562236b HW |
839 | struct dc *dc, |
840 | uint32_t link_index, | |
841 | uint32_t address, | |
842 | uint8_t *data, | |
843 | uint32_t size); | |
844 | ||
7c7f5b15 | 845 | bool dc_write_aux_dpcd( |
4562236b HW |
846 | struct dc *dc, |
847 | uint32_t link_index, | |
848 | uint32_t address, | |
849 | const uint8_t *data, | |
2b230ea3 ZF |
850 | uint32_t size); |
851 | ||
7c7f5b15 AG |
852 | bool dc_read_aux_i2c( |
853 | struct dc *dc, | |
854 | uint32_t link_index, | |
855 | enum i2c_mot_mode mot, | |
856 | uint32_t address, | |
857 | uint8_t *data, | |
858 | uint32_t size); | |
859 | ||
860 | bool dc_write_aux_i2c( | |
861 | struct dc *dc, | |
862 | uint32_t link_index, | |
863 | enum i2c_mot_mode mot, | |
864 | uint32_t address, | |
865 | const uint8_t *data, | |
866 | uint32_t size); | |
867 | ||
2b230ea3 ZF |
868 | bool dc_query_ddc_data( |
869 | struct dc *dc, | |
870 | uint32_t link_index, | |
871 | uint32_t address, | |
872 | uint8_t *write_buf, | |
873 | uint32_t write_size, | |
874 | uint8_t *read_buf, | |
875 | uint32_t read_size); | |
4562236b HW |
876 | |
877 | bool dc_submit_i2c( | |
878 | struct dc *dc, | |
879 | uint32_t link_index, | |
880 | struct i2c_command *cmd); | |
881 | ||
5e7773a2 | 882 | |
4562236b | 883 | #endif /* DC_INTERFACE_H_ */ |