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4562236b HW |
1 | /* |
2 | * Copyright 2012-14 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: AMD | |
23 | * | |
24 | */ | |
25 | ||
26 | #ifndef DC_INTERFACE_H_ | |
27 | #define DC_INTERFACE_H_ | |
28 | ||
29 | #include "dc_types.h" | |
30 | #include "dpcd_defs.h" | |
31 | #include "grph_object_defs.h" | |
32 | #include "logger_types.h" | |
33 | #include "gpio_types.h" | |
34 | #include "link_service_types.h" | |
35 | ||
36 | #define MAX_TARGETS 6 | |
37 | #define MAX_SURFACES 6 | |
38 | #define MAX_SINKS_PER_LINK 4 | |
39 | ||
40 | /******************************************************************************* | |
41 | * Display Core Interfaces | |
42 | ******************************************************************************/ | |
43 | ||
44 | struct dc_caps { | |
45 | uint32_t max_targets; | |
46 | uint32_t max_links; | |
47 | uint32_t max_audios; | |
48 | uint32_t max_slave_planes; | |
49 | uint32_t max_downscale_ratio; | |
50 | uint32_t i2c_speed_in_khz; | |
51 | }; | |
52 | ||
53 | ||
54 | struct dc_dcc_surface_param { | |
55 | enum surface_pixel_format format; | |
56 | struct dc_size surface_size; | |
57 | enum dc_scan_direction scan; | |
58 | }; | |
59 | ||
60 | struct dc_dcc_setting { | |
61 | unsigned int max_compressed_blk_size; | |
62 | unsigned int max_uncompressed_blk_size; | |
63 | bool independent_64b_blks; | |
64 | }; | |
65 | ||
66 | struct dc_surface_dcc_cap { | |
67 | bool capable; | |
68 | bool const_color_support; | |
69 | ||
70 | union { | |
71 | struct { | |
72 | struct dc_dcc_setting rgb; | |
73 | } grph; | |
74 | ||
75 | struct { | |
76 | struct dc_dcc_setting luma; | |
77 | struct dc_dcc_setting chroma; | |
78 | } video; | |
79 | }; | |
80 | }; | |
81 | ||
82 | /* Forward declaration*/ | |
83 | struct dc; | |
84 | struct dc_surface; | |
85 | struct validate_context; | |
86 | ||
87 | struct dc_cap_funcs { | |
88 | int i; | |
89 | }; | |
90 | ||
91 | struct dc_stream_funcs { | |
92 | bool (*adjust_vmin_vmax)(struct dc *dc, | |
93 | const struct dc_stream **stream, | |
94 | int num_streams, | |
95 | int vmin, | |
96 | int vmax); | |
97 | ||
98 | void (*stream_update_scaling)(const struct dc *dc, | |
99 | const struct dc_stream *dc_stream, | |
100 | const struct rect *src, | |
101 | const struct rect *dst); | |
102 | bool (*set_gamut_remap)(struct dc *dc, | |
103 | const struct dc_stream **stream, int num_streams); | |
104 | bool (*set_backlight)(struct dc *dc, unsigned int backlight_level, | |
105 | unsigned int frame_ramp, const struct dc_stream *stream); | |
106 | bool (*init_dmcu_backlight_settings)(struct dc *dc); | |
107 | bool (*set_abm_level)(struct dc *dc, unsigned int abm_level); | |
108 | bool (*set_psr_enable)(struct dc *dc, bool enable); | |
109 | bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream); | |
110 | }; | |
111 | ||
112 | struct link_training_settings; | |
113 | ||
114 | struct dc_link_funcs { | |
115 | void (*set_drive_settings)(struct dc *dc, | |
116 | struct link_training_settings *lt_settings); | |
117 | void (*perform_link_training)(struct dc *dc, | |
118 | struct dc_link_settings *link_setting, | |
119 | bool skip_video_pattern); | |
120 | void (*set_preferred_link_settings)(struct dc *dc, | |
121 | struct dc_link_settings *link_setting); | |
122 | void (*enable_hpd)(const struct dc_link *link); | |
123 | void (*disable_hpd)(const struct dc_link *link); | |
124 | void (*set_test_pattern)( | |
125 | const struct dc_link *link, | |
126 | enum dp_test_pattern test_pattern, | |
127 | const struct link_training_settings *p_link_settings, | |
128 | const unsigned char *p_custom_pattern, | |
129 | unsigned int cust_pattern_size); | |
130 | }; | |
131 | ||
132 | /* Structure to hold configuration flags set by dm at dc creation. */ | |
133 | struct dc_config { | |
134 | bool gpu_vm_support; | |
135 | bool disable_disp_pll_sharing; | |
136 | }; | |
137 | ||
138 | struct dc_debug { | |
139 | bool surface_visual_confirm; | |
140 | bool max_disp_clk; | |
141 | bool target_trace; | |
142 | bool surface_trace; | |
143 | bool validation_trace; | |
144 | bool disable_stutter; | |
145 | bool disable_dcc; | |
146 | bool disable_dfs_bypass; | |
147 | bool disable_power_gate; | |
148 | bool disable_clock_gate; | |
149 | }; | |
150 | ||
151 | struct dc { | |
152 | struct dc_caps caps; | |
153 | struct dc_cap_funcs cap_funcs; | |
154 | struct dc_stream_funcs stream_funcs; | |
155 | struct dc_link_funcs link_funcs; | |
156 | struct dc_config config; | |
157 | struct dc_debug debug; | |
158 | }; | |
159 | ||
160 | enum frame_buffer_mode { | |
161 | FRAME_BUFFER_MODE_LOCAL_ONLY = 0, | |
162 | FRAME_BUFFER_MODE_ZFB_ONLY, | |
163 | FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL, | |
164 | } ; | |
165 | ||
166 | struct dchub_init_data { | |
167 | bool dchub_initialzied; | |
168 | bool dchub_info_valid; | |
169 | int64_t zfb_phys_addr_base; | |
170 | int64_t zfb_mc_base_addr; | |
171 | uint64_t zfb_size_in_byte; | |
172 | enum frame_buffer_mode fb_mode; | |
173 | }; | |
174 | ||
175 | struct dc_init_data { | |
176 | struct hw_asic_id asic_id; | |
177 | void *driver; /* ctx */ | |
178 | struct cgs_device *cgs_device; | |
179 | ||
180 | int num_virtual_links; | |
181 | /* | |
182 | * If 'vbios_override' not NULL, it will be called instead | |
183 | * of the real VBIOS. Intended use is Diagnostics on FPGA. | |
184 | */ | |
185 | struct dc_bios *vbios_override; | |
186 | enum dce_environment dce_environment; | |
187 | ||
188 | struct dc_config flags; | |
189 | }; | |
190 | ||
191 | struct dc *dc_create(const struct dc_init_data *init_params); | |
192 | ||
193 | void dc_destroy(struct dc **dc); | |
194 | ||
195 | bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data); | |
196 | ||
197 | /******************************************************************************* | |
198 | * Surface Interfaces | |
199 | ******************************************************************************/ | |
200 | ||
201 | enum { | |
202 | RGB_256X3X16 = 256, | |
203 | FLOAT_GAMMA_RAMP_MAX = 1025 | |
204 | }; | |
205 | ||
206 | enum dc_gamma_ramp_type { | |
207 | GAMMA_RAMP_RBG256X3X16, | |
208 | GAMMA_RAMP_FLOAT, | |
209 | }; | |
210 | ||
211 | struct float_rgb { | |
212 | struct fixed32_32 red; | |
213 | struct fixed32_32 green; | |
214 | struct fixed32_32 blue; | |
215 | }; | |
216 | ||
217 | struct dc_gamma_ramp_float { | |
218 | struct float_rgb scale; | |
219 | struct float_rgb offset; | |
220 | struct float_rgb gamma_curve[FLOAT_GAMMA_RAMP_MAX]; | |
221 | }; | |
222 | ||
223 | struct dc_gamma_ramp_rgb256x3x16 { | |
224 | uint16_t red[RGB_256X3X16]; | |
225 | uint16_t green[RGB_256X3X16]; | |
226 | uint16_t blue[RGB_256X3X16]; | |
227 | }; | |
228 | ||
229 | struct dc_gamma { | |
230 | enum dc_gamma_ramp_type type; | |
231 | union { | |
232 | struct dc_gamma_ramp_rgb256x3x16 gamma_ramp_rgb256x3x16; | |
233 | struct dc_gamma_ramp_float gamma_ramp_float; | |
234 | }; | |
235 | uint32_t size; | |
236 | }; | |
237 | ||
238 | struct dc_surface { | |
239 | bool visible; | |
240 | bool flip_immediate; | |
241 | struct dc_plane_address address; | |
242 | ||
243 | struct scaling_taps scaling_quality; | |
244 | struct rect src_rect; | |
245 | struct rect dst_rect; | |
246 | struct rect clip_rect; | |
247 | ||
248 | union plane_size plane_size; | |
249 | union dc_tiling_info tiling_info; | |
250 | struct dc_plane_dcc_param dcc; | |
251 | enum dc_color_space color_space; | |
252 | ||
253 | enum surface_pixel_format format; | |
254 | enum dc_rotation_angle rotation; | |
255 | bool horizontal_mirror; | |
256 | enum plane_stereo_format stereo_format; | |
257 | ||
258 | const struct dc_gamma *gamma_correction; | |
259 | }; | |
260 | ||
261 | struct dc_plane_info { | |
262 | union plane_size plane_size; | |
263 | union dc_tiling_info tiling_info; | |
264 | enum surface_pixel_format format; | |
265 | enum dc_rotation_angle rotation; | |
266 | bool horizontal_mirror; | |
267 | enum plane_stereo_format stereo_format; | |
268 | enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/ | |
269 | bool visible; | |
270 | }; | |
271 | ||
272 | struct dc_scaling_info { | |
273 | struct rect src_rect; | |
274 | struct rect dst_rect; | |
275 | struct rect clip_rect; | |
276 | struct scaling_taps scaling_quality; | |
277 | }; | |
278 | ||
279 | struct dc_surface_update { | |
280 | const struct dc_surface *surface; | |
281 | ||
282 | /* isr safe update parameters. null means no updates */ | |
283 | struct dc_flip_addrs *flip_addr; | |
284 | struct dc_plane_info *plane_info; | |
285 | struct dc_scaling_info *scaling_info; | |
286 | /* following updates require alloc/sleep/spin that is not isr safe, | |
287 | * null means no updates | |
288 | */ | |
289 | struct dc_gamma *gamma; | |
290 | ||
291 | ||
292 | }; | |
293 | /* | |
294 | * This structure is filled in by dc_surface_get_status and contains | |
295 | * the last requested address and the currently active address so the called | |
296 | * can determine if there are any outstanding flips | |
297 | */ | |
298 | struct dc_surface_status { | |
299 | struct dc_plane_address requested_address; | |
300 | struct dc_plane_address current_address; | |
301 | bool is_flip_pending; | |
302 | }; | |
303 | ||
304 | /* | |
305 | * Create a new surface with default parameters; | |
306 | */ | |
307 | struct dc_surface *dc_create_surface(const struct dc *dc); | |
308 | const struct dc_surface_status *dc_surface_get_status( | |
309 | const struct dc_surface *dc_surface); | |
310 | ||
311 | void dc_surface_retain(const struct dc_surface *dc_surface); | |
312 | void dc_surface_release(const struct dc_surface *dc_surface); | |
313 | ||
314 | void dc_gamma_release(const struct dc_gamma *dc_gamma); | |
315 | struct dc_gamma *dc_create_gamma(void); | |
316 | ||
317 | /* | |
318 | * This structure holds a surface address. There could be multiple addresses | |
319 | * in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such | |
320 | * as frame durations and DCC format can also be set. | |
321 | */ | |
322 | struct dc_flip_addrs { | |
323 | struct dc_plane_address address; | |
324 | bool flip_immediate; | |
325 | /* TODO: DCC format info */ | |
326 | /* TODO: add flip duration for FreeSync */ | |
327 | }; | |
328 | ||
329 | /* | |
330 | * Optimized flip address update function. | |
331 | * | |
332 | * After this call: | |
333 | * Surface addresses and flip attributes are programmed. | |
334 | * Surface flip occur at next configured time (h_sync or v_sync flip) | |
335 | */ | |
336 | void dc_flip_surface_addrs(struct dc *dc, | |
337 | const struct dc_surface *const surfaces[], | |
338 | struct dc_flip_addrs flip_addrs[], | |
339 | uint32_t count); | |
340 | ||
341 | /* | |
342 | * Set up surface attributes and associate to a target | |
343 | * The surfaces parameter is an absolute set of all surface active for the target. | |
344 | * If no surfaces are provided, the target will be blanked; no memory read. | |
345 | * Any flip related attribute changes must be done through this interface. | |
346 | * | |
347 | * After this call: | |
348 | * Surfaces attributes are programmed and configured to be composed into target. | |
349 | * This does not trigger a flip. No surface address is programmed. | |
350 | */ | |
351 | ||
352 | bool dc_commit_surfaces_to_target( | |
353 | struct dc *dc, | |
354 | const struct dc_surface **dc_surfaces, | |
355 | uint8_t surface_count, | |
356 | struct dc_target *dc_target); | |
357 | ||
358 | bool dc_pre_update_surfaces_to_target( | |
359 | struct dc *dc, | |
360 | const struct dc_surface *const *new_surfaces, | |
361 | uint8_t new_surface_count, | |
362 | struct dc_target *dc_target); | |
363 | ||
364 | bool dc_post_update_surfaces_to_target( | |
365 | struct dc *dc); | |
366 | ||
367 | void dc_update_surfaces_for_target(struct dc *dc, struct dc_surface_update *updates, | |
368 | int surface_count, struct dc_target *dc_target); | |
369 | ||
370 | /******************************************************************************* | |
371 | * Target Interfaces | |
372 | ******************************************************************************/ | |
373 | #define MAX_STREAM_NUM 1 | |
374 | ||
375 | struct dc_target { | |
376 | uint8_t stream_count; | |
377 | const struct dc_stream *streams[MAX_STREAM_NUM]; | |
378 | }; | |
379 | ||
380 | /* | |
381 | * Target status is returned from dc_target_get_status in order to get the | |
382 | * the IRQ source, current frame counter and currently attached surfaces. | |
383 | */ | |
384 | struct dc_target_status { | |
385 | int primary_otg_inst; | |
386 | int cur_frame_count; | |
387 | int surface_count; | |
388 | const struct dc_surface *surfaces[MAX_SURFACE_NUM]; | |
389 | }; | |
390 | ||
391 | struct dc_target *dc_create_target_for_streams( | |
392 | struct dc_stream *dc_streams[], | |
393 | uint8_t stream_count); | |
394 | ||
395 | /* | |
396 | * Get the current target status. | |
397 | */ | |
398 | const struct dc_target_status *dc_target_get_status( | |
399 | const struct dc_target* dc_target); | |
400 | ||
401 | void dc_target_retain(const struct dc_target *dc_target); | |
402 | void dc_target_release(const struct dc_target *dc_target); | |
403 | void dc_target_log( | |
404 | const struct dc_target *dc_target, | |
405 | struct dal_logger *dc_logger, | |
406 | enum dc_log_type log_type); | |
407 | ||
408 | uint8_t dc_get_current_target_count(const struct dc *dc); | |
409 | struct dc_target *dc_get_target_at_index(const struct dc *dc, uint8_t i); | |
410 | ||
411 | bool dc_target_is_connected_to_sink( | |
412 | const struct dc_target *dc_target, | |
413 | const struct dc_sink *dc_sink); | |
414 | ||
415 | uint32_t dc_target_get_vblank_counter(const struct dc_target *dc_target); | |
416 | ||
417 | /* TODO: Return parsed values rather than direct register read | |
418 | * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos) | |
419 | * being refactored properly to be dce-specific | |
420 | */ | |
421 | uint32_t dc_target_get_scanoutpos( | |
422 | const struct dc_target *dc_target, | |
423 | uint32_t *vbl, | |
424 | uint32_t *position); | |
425 | ||
426 | /* | |
427 | * Structure to store surface/target associations for validation | |
428 | */ | |
429 | struct dc_validation_set { | |
430 | const struct dc_target *target; | |
431 | const struct dc_surface *surfaces[MAX_SURFACES]; | |
432 | uint8_t surface_count; | |
433 | }; | |
434 | ||
435 | /* | |
436 | * This function takes a set of resources and checks that they are cofunctional. | |
437 | * | |
438 | * After this call: | |
439 | * No hardware is programmed for call. Only validation is done. | |
440 | */ | |
441 | bool dc_validate_resources( | |
442 | const struct dc *dc, | |
443 | const struct dc_validation_set set[], | |
444 | uint8_t set_count); | |
445 | ||
446 | /* | |
447 | * This function takes a target and checks if it is guaranteed to be supported. | |
448 | * Guaranteed means that MAX_COFUNC*target is supported. | |
449 | * | |
450 | * After this call: | |
451 | * No hardware is programmed for call. Only validation is done. | |
452 | */ | |
453 | ||
454 | bool dc_validate_guaranteed( | |
455 | const struct dc *dc, | |
456 | const struct dc_target *dc_target); | |
457 | ||
458 | /* | |
459 | * Set up streams and links associated to targets to drive sinks | |
460 | * The targets parameter is an absolute set of all active targets. | |
461 | * | |
462 | * After this call: | |
463 | * Phy, Encoder, Timing Generator are programmed and enabled. | |
464 | * New targets are enabled with blank stream; no memory read. | |
465 | */ | |
466 | bool dc_commit_targets( | |
467 | struct dc *dc, | |
468 | struct dc_target *targets[], | |
469 | uint8_t target_count); | |
470 | ||
471 | /******************************************************************************* | |
472 | * Stream Interfaces | |
473 | ******************************************************************************/ | |
474 | struct dc_stream { | |
475 | const struct dc_sink *sink; | |
476 | struct dc_crtc_timing timing; | |
477 | ||
478 | enum dc_color_space output_color_space; | |
479 | ||
480 | struct rect src; /* viewport in target space*/ | |
481 | struct rect dst; /* stream addressable area */ | |
482 | ||
483 | struct audio_info audio_info; | |
484 | ||
485 | bool ignore_msa_timing_param; | |
486 | ||
487 | struct freesync_context freesync_ctx; | |
488 | ||
489 | /* TODO: dithering */ | |
490 | /* TODO: transfer function (CSC/regamma/gamut remap) */ | |
491 | struct colorspace_transform gamut_remap_matrix; | |
492 | struct csc_transform csc_color_matrix; | |
493 | /* TODO: custom INFO packets */ | |
494 | /* TODO: ABM info (DMCU) */ | |
495 | /* TODO: PSR info */ | |
496 | /* TODO: CEA VIC */ | |
497 | }; | |
498 | ||
499 | /** | |
500 | * Create a new default stream for the requested sink | |
501 | */ | |
502 | struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink); | |
503 | ||
504 | void dc_stream_retain(const struct dc_stream *dc_stream); | |
505 | void dc_stream_release(const struct dc_stream *dc_stream); | |
506 | ||
507 | struct dc_stream_status { | |
508 | /* | |
509 | * link this stream passes through | |
510 | */ | |
511 | const struct dc_link *link; | |
512 | }; | |
513 | ||
514 | const struct dc_stream_status *dc_stream_get_status( | |
515 | const struct dc_stream *dc_stream); | |
516 | ||
517 | /******************************************************************************* | |
518 | * Link Interfaces | |
519 | ******************************************************************************/ | |
520 | ||
521 | /* | |
522 | * A link contains one or more sinks and their connected status. | |
523 | * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported. | |
524 | */ | |
525 | struct dc_link { | |
526 | const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK]; | |
527 | unsigned int sink_count; | |
528 | const struct dc_sink *local_sink; | |
529 | unsigned int link_index; | |
530 | enum dc_connection_type type; | |
531 | enum signal_type connector_signal; | |
532 | enum dc_irq_source irq_source_hpd; | |
533 | enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */ | |
534 | /* caps is the same as reported_link_cap. link_traing use | |
535 | * reported_link_cap. Will clean up. TODO | |
536 | */ | |
537 | struct dc_link_settings reported_link_cap; | |
538 | struct dc_link_settings verified_link_cap; | |
539 | struct dc_link_settings max_link_setting; | |
540 | struct dc_link_settings cur_link_settings; | |
541 | struct dc_lane_settings cur_lane_setting; | |
542 | ||
543 | uint8_t ddc_hw_inst; | |
544 | uint8_t link_enc_hw_inst; | |
545 | ||
546 | struct psr_caps psr_caps; | |
547 | bool test_pattern_enabled; | |
548 | union compliance_test_state compliance_test_state; | |
549 | }; | |
550 | ||
551 | struct dpcd_caps { | |
552 | union dpcd_rev dpcd_rev; | |
553 | union max_lane_count max_ln_count; | |
554 | union max_down_spread max_down_spread; | |
555 | ||
556 | /* dongle type (DP converter, CV smart dongle) */ | |
557 | enum display_dongle_type dongle_type; | |
558 | /* Dongle's downstream count. */ | |
559 | union sink_count sink_count; | |
560 | /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER, | |
561 | indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/ | |
562 | bool is_dp_hdmi_s3d_converter; | |
563 | ||
564 | bool allow_invalid_MSA_timing_param; | |
565 | bool panel_mode_edp; | |
566 | uint32_t sink_dev_id; | |
567 | uint32_t branch_dev_id; | |
568 | int8_t branch_dev_name[6]; | |
569 | int8_t branch_hw_revision; | |
570 | }; | |
571 | ||
572 | struct dc_link_status { | |
573 | struct dpcd_caps *dpcd_caps; | |
574 | }; | |
575 | ||
576 | const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); | |
577 | ||
578 | /* | |
579 | * Return an enumerated dc_link. dc_link order is constant and determined at | |
580 | * boot time. They cannot be created or destroyed. | |
581 | * Use dc_get_caps() to get number of links. | |
582 | */ | |
583 | const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index); | |
584 | ||
585 | /* Return id of physical connector represented by a dc_link at link_index.*/ | |
586 | const struct graphics_object_id dc_get_link_id_at_index( | |
587 | struct dc *dc, uint32_t link_index); | |
588 | ||
589 | /* Set backlight level of an embedded panel (eDP, LVDS). */ | |
590 | bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level, | |
591 | uint32_t frame_ramp, const struct dc_stream *stream); | |
592 | ||
593 | bool dc_link_init_dmcu_backlight_settings(const struct dc_link *dc_link); | |
594 | ||
595 | bool dc_link_set_abm_level(const struct dc_link *dc_link, uint32_t level); | |
596 | ||
597 | bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable); | |
598 | ||
599 | bool dc_link_setup_psr(const struct dc_link *dc_link, | |
600 | const struct dc_stream *stream); | |
601 | ||
602 | /* Request DC to detect if there is a Panel connected. | |
603 | * boot - If this call is during initial boot. | |
604 | * Return false for any type of detection failure or MST detection | |
605 | * true otherwise. True meaning further action is required (status update | |
606 | * and OS notification). | |
607 | */ | |
608 | bool dc_link_detect(const struct dc_link *dc_link, bool boot); | |
609 | ||
610 | /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt). | |
611 | * Return: | |
612 | * true - Downstream port status changed. DM should call DC to do the | |
613 | * detection. | |
614 | * false - no change in Downstream port status. No further action required | |
615 | * from DM. */ | |
616 | bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link); | |
617 | ||
618 | struct dc_sink_init_data; | |
619 | ||
620 | struct dc_sink *dc_link_add_remote_sink( | |
621 | const struct dc_link *dc_link, | |
622 | const uint8_t *edid, | |
623 | int len, | |
624 | struct dc_sink_init_data *init_data); | |
625 | ||
626 | void dc_link_remove_remote_sink( | |
627 | const struct dc_link *link, | |
628 | const struct dc_sink *sink); | |
629 | ||
630 | /* Used by diagnostics for virtual link at the moment */ | |
631 | void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink); | |
632 | ||
633 | void dc_link_dp_set_drive_settings( | |
634 | struct dc_link *link, | |
635 | struct link_training_settings *lt_settings); | |
636 | ||
637 | bool dc_link_dp_perform_link_training( | |
638 | struct dc_link *link, | |
639 | const struct dc_link_settings *link_setting, | |
640 | bool skip_video_pattern); | |
641 | ||
642 | void dc_link_dp_enable_hpd(const struct dc_link *link); | |
643 | ||
644 | void dc_link_dp_disable_hpd(const struct dc_link *link); | |
645 | ||
646 | bool dc_link_dp_set_test_pattern( | |
647 | const struct dc_link *link, | |
648 | enum dp_test_pattern test_pattern, | |
649 | const struct link_training_settings *p_link_settings, | |
650 | const unsigned char *p_custom_pattern, | |
651 | unsigned int cust_pattern_size); | |
652 | ||
653 | /******************************************************************************* | |
654 | * Sink Interfaces - A sink corresponds to a display output device | |
655 | ******************************************************************************/ | |
656 | ||
657 | /* | |
658 | * The sink structure contains EDID and other display device properties | |
659 | */ | |
660 | struct dc_sink { | |
661 | enum signal_type sink_signal; | |
662 | struct dc_edid dc_edid; /* raw edid */ | |
663 | struct dc_edid_caps edid_caps; /* parse display caps */ | |
664 | }; | |
665 | ||
666 | void dc_sink_retain(const struct dc_sink *sink); | |
667 | void dc_sink_release(const struct dc_sink *sink); | |
668 | ||
669 | const struct audio **dc_get_audios(struct dc *dc); | |
670 | ||
671 | struct dc_sink_init_data { | |
672 | enum signal_type sink_signal; | |
673 | const struct dc_link *link; | |
674 | uint32_t dongle_max_pix_clk; | |
675 | bool converter_disable_audio; | |
676 | }; | |
677 | ||
678 | struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params); | |
679 | ||
680 | /******************************************************************************* | |
681 | * Cursor interfaces - To manages the cursor within a target | |
682 | ******************************************************************************/ | |
683 | /* TODO: Deprecated once we switch to dc_set_cursor_position */ | |
684 | bool dc_target_set_cursor_attributes( | |
685 | struct dc_target *dc_target, | |
686 | const struct dc_cursor_attributes *attributes); | |
687 | ||
688 | bool dc_target_set_cursor_position( | |
689 | struct dc_target *dc_target, | |
690 | const struct dc_cursor_position *position); | |
691 | ||
692 | /* Newer interfaces */ | |
693 | struct dc_cursor { | |
694 | struct dc_plane_address address; | |
695 | struct dc_cursor_attributes attributes; | |
696 | }; | |
697 | ||
698 | /* | |
699 | * Create a new cursor with default values for a given target. | |
700 | */ | |
701 | struct dc_cursor *dc_create_cursor_for_target( | |
702 | const struct dc *dc, | |
703 | struct dc_target *dc_target); | |
704 | ||
705 | /** | |
706 | * Commit cursor attribute changes such as pixel format and dimensions and | |
707 | * surface address. | |
708 | * | |
709 | * After this call: | |
710 | * Cursor address and format is programmed to the new values. | |
711 | * Cursor position is unmodified. | |
712 | */ | |
713 | bool dc_commit_cursor( | |
714 | const struct dc *dc, | |
715 | struct dc_cursor *cursor); | |
716 | ||
717 | /* | |
718 | * Optimized cursor position update | |
719 | * | |
720 | * After this call: | |
721 | * Cursor position will be programmed as well as enable/disable bit. | |
722 | */ | |
723 | bool dc_set_cursor_position( | |
724 | const struct dc *dc, | |
725 | struct dc_cursor *cursor, | |
726 | struct dc_cursor_position *pos); | |
727 | ||
728 | /******************************************************************************* | |
729 | * Interrupt interfaces | |
730 | ******************************************************************************/ | |
731 | enum dc_irq_source dc_interrupt_to_irq_source( | |
732 | struct dc *dc, | |
733 | uint32_t src_id, | |
734 | uint32_t ext_id); | |
735 | void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable); | |
736 | void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src); | |
737 | enum dc_irq_source dc_get_hpd_irq_source_at_index( | |
738 | struct dc *dc, uint32_t link_index); | |
739 | ||
740 | /******************************************************************************* | |
741 | * Power Interfaces | |
742 | ******************************************************************************/ | |
743 | ||
744 | void dc_set_power_state( | |
745 | struct dc *dc, | |
746 | enum dc_acpi_cm_power_state power_state, | |
747 | enum dc_video_power_state video_power_state); | |
748 | void dc_resume(const struct dc *dc); | |
749 | ||
750 | /******************************************************************************* | |
751 | * DDC Interfaces | |
752 | ******************************************************************************/ | |
753 | ||
754 | const struct ddc_service *dc_get_ddc_at_index( | |
755 | struct dc *dc, uint32_t link_index); | |
756 | ||
757 | /* | |
758 | * DPCD access interfaces | |
759 | */ | |
760 | ||
761 | bool dc_read_dpcd( | |
762 | struct dc *dc, | |
763 | uint32_t link_index, | |
764 | uint32_t address, | |
765 | uint8_t *data, | |
766 | uint32_t size); | |
767 | ||
768 | bool dc_write_dpcd( | |
769 | struct dc *dc, | |
770 | uint32_t link_index, | |
771 | uint32_t address, | |
772 | const uint8_t *data, | |
773 | uint32_t size); | |
774 | ||
775 | bool dc_submit_i2c( | |
776 | struct dc *dc, | |
777 | uint32_t link_index, | |
778 | struct i2c_command *cmd); | |
779 | ||
780 | #endif /* DC_INTERFACE_H_ */ |