[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / amd / include / kgd_kfd_interface.h

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

/*
 * This file defines the private interface between the
 * AMD kernel graphics drivers and the AMD KFD.
 */

#ifndef KGD_KFD_INTERFACE_H_INCLUDED
#define KGD_KFD_INTERFACE_H_INCLUDED

#include <linux/types.h>
#include <linux/bitmap.h>

struct pci_dev;

#define KFD_INTERFACE_VERSION 2
#define KGD_MAX_QUEUES 128

struct kfd_dev;
struct kgd_dev;

struct kgd_mem;

enum kgd_memory_pool {
	KGD_POOL_SYSTEM_CACHEABLE = 1,
	KGD_POOL_SYSTEM_WRITECOMBINE = 2,
	KGD_POOL_FRAMEBUFFER = 3,
};

enum kgd_engine_type {
	KGD_ENGINE_PFP = 1,
	KGD_ENGINE_ME,
	KGD_ENGINE_CE,
	KGD_ENGINE_MEC1,
	KGD_ENGINE_MEC2,
	KGD_ENGINE_RLC,
	KGD_ENGINE_SDMA1,
	KGD_ENGINE_SDMA2,
	KGD_ENGINE_MAX
};

struct kgd2kfd_shared_resources {
	/* Bit n == 1 means VMID n is available for KFD. */
	unsigned int compute_vmid_bitmap;

	/* number of pipes per mec */
	uint32_t num_pipe_per_mec;

	/* number of queues per pipe */
	uint32_t num_queue_per_pipe;

	/* Bit n == 1 means Queue n is available for KFD */
	DECLARE_BITMAP(queue_bitmap, KGD_MAX_QUEUES);

	/* Base address of doorbell aperture. */
	phys_addr_t doorbell_physical_address;

	/* Size in bytes of doorbell aperture. */
	size_t doorbell_aperture_size;

	/* Number of bytes at start of aperture reserved for KGD. */
	size_t doorbell_start_offset;
};

/**
 * struct kfd2kgd_calls
 *
 * @init_gtt_mem_allocation: Allocate a buffer on the gart aperture.
 * The buffer can be used for mqds, hpds, kernel queue, fence and runlists
 *
 * @free_gtt_mem: Frees a buffer that was allocated on the gart aperture
 *
 * @get_vmem_size: Retrieves (physical) size of VRAM
 *
 * @get_gpu_clock_counter: Retrieves GPU clock counter
 *
 * @get_max_engine_clock_in_mhz: Retrieves maximum GPU clock in MHz
 *
 * @program_sh_mem_settings: A function that should initiate the memory
 * properties such as main aperture memory type (cache / non cached) and
 * secondary aperture base address, size and memory type.
 * This function is used only for no cp scheduling mode.
 *
 * @set_pasid_vmid_mapping: Exposes pasid/vmid pair to the H/W for no cp
 * scheduling mode. Only used for no cp scheduling mode.
 *
 * @init_pipeline: Initialized the compute pipelines.
 *
 * @hqd_load: Loads the mqd structure to a H/W hqd slot. used only for no cp
 * sceduling mode.
 *
 * @hqd_sdma_load: Loads the SDMA mqd structure to a H/W SDMA hqd slot.
 * used only for no HWS mode.
 *
 * @hqd_is_occupies: Checks if a hqd slot is occupied.
 *
 * @hqd_destroy: Destructs and preempts the queue assigned to that hqd slot.
 *
 * @hqd_sdma_is_occupied: Checks if an SDMA hqd slot is occupied.
 *
 * @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that
 * SDMA hqd slot.
 *
 * @get_fw_version: Returns FW versions from the header
 *
 * This structure contains function pointers to services that the kgd driver
 * provides to amdkfd driver.
 *
 */
struct kfd2kgd_calls {
	int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size,
					void **mem_obj, uint64_t *gpu_addr,
					void **cpu_ptr);

	void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj);

	uint64_t (*get_vmem_size)(struct kgd_dev *kgd);
	uint64_t (*get_gpu_clock_counter)(struct kgd_dev *kgd);

	uint32_t (*get_max_engine_clock_in_mhz)(struct kgd_dev *kgd);

	/* Register access functions */
	void (*program_sh_mem_settings)(struct kgd_dev *kgd, uint32_t vmid,
			uint32_t sh_mem_config,	uint32_t sh_mem_ape1_base,
			uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);

	int (*set_pasid_vmid_mapping)(struct kgd_dev *kgd, unsigned int pasid,
					unsigned int vmid);

	int (*init_pipeline)(struct kgd_dev *kgd, uint32_t pipe_id,
				uint32_t hpd_size, uint64_t hpd_gpu_addr);

	int (*init_interrupts)(struct kgd_dev *kgd, uint32_t pipe_id);

	int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
			uint32_t queue_id, uint32_t __user *wptr);

	int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd);

	bool (*hqd_is_occupied)(struct kgd_dev *kgd, uint64_t queue_address,
				uint32_t pipe_id, uint32_t queue_id);

	int (*hqd_destroy)(struct kgd_dev *kgd, uint32_t reset_type,
				unsigned int timeout, uint32_t pipe_id,
				uint32_t queue_id);

	bool (*hqd_sdma_is_occupied)(struct kgd_dev *kgd, void *mqd);

	int (*hqd_sdma_destroy)(struct kgd_dev *kgd, void *mqd,
				unsigned int timeout);

	int (*address_watch_disable)(struct kgd_dev *kgd);
	int (*address_watch_execute)(struct kgd_dev *kgd,
					unsigned int watch_point_id,
					uint32_t cntl_val,
					uint32_t addr_hi,
					uint32_t addr_lo);
	int (*wave_control_execute)(struct kgd_dev *kgd,
					uint32_t gfx_index_val,
					uint32_t sq_cmd);
	uint32_t (*address_watch_get_offset)(struct kgd_dev *kgd,
					unsigned int watch_point_id,
					unsigned int reg_offset);
	bool (*get_atc_vmid_pasid_mapping_valid)(
					struct kgd_dev *kgd,
					uint8_t vmid);
	uint16_t (*get_atc_vmid_pasid_mapping_pasid)(
					struct kgd_dev *kgd,
					uint8_t vmid);
	void (*write_vmid_invalidate_request)(struct kgd_dev *kgd,
					uint8_t vmid);

	uint16_t (*get_fw_version)(struct kgd_dev *kgd,
				enum kgd_engine_type type);
};

/**
 * struct kgd2kfd_calls
 *
 * @exit: Notifies amdkfd that kgd module is unloaded
 *
 * @probe: Notifies amdkfd about a probe done on a device in the kgd driver.
 *
 * @device_init: Initialize the newly probed device (if it is a device that
 * amdkfd supports)
 *
 * @device_exit: Notifies amdkfd about a removal of a kgd device
 *
 * @suspend: Notifies amdkfd about a suspend action done to a kgd device
 *
 * @resume: Notifies amdkfd about a resume action done to a kgd device
 *
 * This structure contains function callback pointers so the kgd driver
 * will notify to the amdkfd about certain status changes.
 *
 */
struct kgd2kfd_calls {
	void (*exit)(void);
	struct kfd_dev* (*probe)(struct kgd_dev *kgd, struct pci_dev *pdev,
		const struct kfd2kgd_calls *f2g);
	bool (*device_init)(struct kfd_dev *kfd,
			const struct kgd2kfd_shared_resources *gpu_resources);
	void (*device_exit)(struct kfd_dev *kfd);
	void (*interrupt)(struct kfd_dev *kfd, const void *ih_ring_entry);
	void (*suspend)(struct kfd_dev *kfd);
	int (*resume)(struct kfd_dev *kfd);
};

int kgd2kfd_init(unsigned interface_version,
		const struct kgd2kfd_calls **g2f);

#endif	/* KGD_KFD_INTERFACE_H_INCLUDED */
Commit	Line	Data
e28740ec OG	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*/
	22
	23	/*
	24	* This file defines the private interface between the
	25	* AMD kernel graphics drivers and the AMD KFD.
	26	*/
	27
	28	#ifndef KGD_KFD_INTERFACE_H_INCLUDED
	29	#define KGD_KFD_INTERFACE_H_INCLUDED
	30
	31	#include <linux/types.h>
d0b63bb3	32	#include <linux/bitmap.h>
e28740ec OG	33
	34	struct pci_dev;
	35
d0b63bb3	36	#define KFD_INTERFACE_VERSION 2
78c16834	37	#define KGD_MAX_QUEUES 128
e28740ec OG	38
	39	struct kfd_dev;
	40	struct kgd_dev;
	41
	42	struct kgd_mem;
	43
	44	enum kgd_memory_pool {
	45	KGD_POOL_SYSTEM_CACHEABLE = 1,
	46	KGD_POOL_SYSTEM_WRITECOMBINE = 2,
	47	KGD_POOL_FRAMEBUFFER = 3,
	48	};
	49
61466c65 OG	50	enum kgd_engine_type {
	51	KGD_ENGINE_PFP = 1,
	52	KGD_ENGINE_ME,
	53	KGD_ENGINE_CE,
	54	KGD_ENGINE_MEC1,
	55	KGD_ENGINE_MEC2,
	56	KGD_ENGINE_RLC,
22801f76 OG	57	KGD_ENGINE_SDMA1,
22801f76 OG	58	KGD_ENGINE_SDMA2,
61466c65 OG	59	KGD_ENGINE_MAX
	60	};
	61
e28740ec OG	62	struct kgd2kfd_shared_resources {
	63	/* Bit n == 1 means VMID n is available for KFD. */
	64	unsigned int compute_vmid_bitmap;
	65
d0b63bb3 AR	66	/* number of pipes per mec */
	67	uint32_t num_pipe_per_mec;
	68
	69	/* number of queues per pipe */
	70	uint32_t num_queue_per_pipe;
	71
	72	/* Bit n == 1 means Queue n is available for KFD */
	73	DECLARE_BITMAP(queue_bitmap, KGD_MAX_QUEUES);
e28740ec OG	74
	75	/* Base address of doorbell aperture. */
	76	phys_addr_t doorbell_physical_address;
	77
	78	/* Size in bytes of doorbell aperture. */
	79	size_t doorbell_aperture_size;
	80
	81	/* Number of bytes at start of aperture reserved for KGD. */
	82	size_t doorbell_start_offset;
	83	};
	84
e28740ec OG	85	/**
	86	* struct kfd2kgd_calls
	87	*
e27ade73 OG	88	* @init_gtt_mem_allocation: Allocate a buffer on the gart aperture.
	89	* The buffer can be used for mqds, hpds, kernel queue, fence and runlists
	90	*
	91	* @free_gtt_mem: Frees a buffer that was allocated on the gart aperture
	92	*
e28740ec OG	93	* @get_vmem_size: Retrieves (physical) size of VRAM
	94	*
	95	* @get_gpu_clock_counter: Retrieves GPU clock counter
	96	*
	97	* @get_max_engine_clock_in_mhz: Retrieves maximum GPU clock in MHz
	98	*
	99	* @program_sh_mem_settings: A function that should initiate the memory
	100	* properties such as main aperture memory type (cache / non cached) and
	101	* secondary aperture base address, size and memory type.
	102	* This function is used only for no cp scheduling mode.
	103	*
	104	* @set_pasid_vmid_mapping: Exposes pasid/vmid pair to the H/W for no cp
	105	* scheduling mode. Only used for no cp scheduling mode.
	106	*
e28740ec OG	107	* @init_pipeline: Initialized the compute pipelines.
	108	*
	109	* @hqd_load: Loads the mqd structure to a H/W hqd slot. used only for no cp
	110	* sceduling mode.
	111	*
85ea7d07 BG	112	* @hqd_sdma_load: Loads the SDMA mqd structure to a H/W SDMA hqd slot.
	113	* used only for no HWS mode.
	114	*
e28740ec OG	115	* @hqd_is_occupies: Checks if a hqd slot is occupied.
	116	*
	117	* @hqd_destroy: Destructs and preempts the queue assigned to that hqd slot.
	118	*
85ea7d07 BG	119	* @hqd_sdma_is_occupied: Checks if an SDMA hqd slot is occupied.
	120	*
	121	* @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that
	122	* SDMA hqd slot.
	123	*
61466c65 OG	124	* @get_fw_version: Returns FW versions from the header
61466c65 OG	125	*
e28740ec OG	126	* This structure contains function pointers to services that the kgd driver
	127	* provides to amdkfd driver.
	128	*
	129	*/
	130	struct kfd2kgd_calls {
e27ade73 OG	131	int (init_gtt_mem_allocation)(struct kgd_dev kgd, size_t size,
	132	void *mem_obj, uint64_t gpu_addr,
	133	void **cpu_ptr);
e28740ec	134
e27ade73	135	void (free_gtt_mem)(struct kgd_dev kgd, void *mem_obj);
e28740ec OG	136
	137	uint64_t (get_vmem_size)(struct kgd_dev kgd);
	138	uint64_t (get_gpu_clock_counter)(struct kgd_dev kgd);
	139
	140	uint32_t (get_max_engine_clock_in_mhz)(struct kgd_dev kgd);
	141
	142	/* Register access functions */
	143	void (program_sh_mem_settings)(struct kgd_dev kgd, uint32_t vmid,
	144	uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
	145	uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
	146
	147	int (set_pasid_vmid_mapping)(struct kgd_dev kgd, unsigned int pasid,
	148	unsigned int vmid);
	149
e28740ec OG	150	int (init_pipeline)(struct kgd_dev kgd, uint32_t pipe_id,
	151	uint32_t hpd_size, uint64_t hpd_gpu_addr);
	152
d36b94fc OG	153	int (init_interrupts)(struct kgd_dev kgd, uint32_t pipe_id);
d36b94fc OG	154
e28740ec OG	155	int (hqd_load)(struct kgd_dev kgd, void *mqd, uint32_t pipe_id,
	156	uint32_t queue_id, uint32_t __user *wptr);
	157
85ea7d07 BG	158	int (hqd_sdma_load)(struct kgd_dev kgd, void *mqd);
85ea7d07 BG	159
b64b8afc	160	bool (hqd_is_occupied)(struct kgd_dev kgd, uint64_t queue_address,
e28740ec OG	161	uint32_t pipe_id, uint32_t queue_id);
	162
	163	int (hqd_destroy)(struct kgd_dev kgd, uint32_t reset_type,
	164	unsigned int timeout, uint32_t pipe_id,
	165	uint32_t queue_id);
85ea7d07 BG	166
	167	bool (hqd_sdma_is_occupied)(struct kgd_dev kgd, void *mqd);
	168
	169	int (hqd_sdma_destroy)(struct kgd_dev kgd, void *mqd,
	170	unsigned int timeout);
	171
a6186f4d YS	172	int (address_watch_disable)(struct kgd_dev kgd);
	173	int (address_watch_execute)(struct kgd_dev kgd,
	174	unsigned int watch_point_id,
	175	uint32_t cntl_val,
	176	uint32_t addr_hi,
	177	uint32_t addr_lo);
	178	int (wave_control_execute)(struct kgd_dev kgd,
	179	uint32_t gfx_index_val,
	180	uint32_t sq_cmd);
	181	uint32_t (address_watch_get_offset)(struct kgd_dev kgd,
	182	unsigned int watch_point_id,
	183	unsigned int reg_offset);
edad4023 AS	184	bool (*get_atc_vmid_pasid_mapping_valid)(
	185	struct kgd_dev *kgd,
	186	uint8_t vmid);
	187	uint16_t (*get_atc_vmid_pasid_mapping_pasid)(
	188	struct kgd_dev *kgd,
	189	uint8_t vmid);
	190	void (write_vmid_invalidate_request)(struct kgd_dev kgd,
	191	uint8_t vmid);
a6186f4d	192
61466c65 OG	193	uint16_t (get_fw_version)(struct kgd_dev kgd,
61466c65 OG	194	enum kgd_engine_type type);
e28740ec OG	195	};
e28740ec OG	196
cea405b1 XZ	197	/**
	198	* struct kgd2kfd_calls
	199	*
	200	* @exit: Notifies amdkfd that kgd module is unloaded
	201	*
	202	* @probe: Notifies amdkfd about a probe done on a device in the kgd driver.
	203	*
	204	* @device_init: Initialize the newly probed device (if it is a device that
	205	* amdkfd supports)
	206	*
	207	* @device_exit: Notifies amdkfd about a removal of a kgd device
	208	*
	209	* @suspend: Notifies amdkfd about a suspend action done to a kgd device
	210	*
	211	* @resume: Notifies amdkfd about a resume action done to a kgd device
	212	*
	213	* This structure contains function callback pointers so the kgd driver
	214	* will notify to the amdkfd about certain status changes.
	215	*
	216	*/
	217	struct kgd2kfd_calls {
	218	void (*exit)(void);
	219	struct kfd_dev* (probe)(struct kgd_dev kgd, struct pci_dev *pdev,
	220	const struct kfd2kgd_calls *f2g);
	221	bool (device_init)(struct kfd_dev kfd,
	222	const struct kgd2kfd_shared_resources *gpu_resources);
	223	void (device_exit)(struct kfd_dev kfd);
	224	void (interrupt)(struct kfd_dev kfd, const void *ih_ring_entry);
	225	void (suspend)(struct kfd_dev kfd);
	226	int (resume)(struct kfd_dev kfd);
	227	};
	228
c68f4528	229	int kgd2kfd_init(unsigned interface_version,
85ea7d07	230	const struct kgd2kfd_calls **g2f);
e28740ec	231
85ea7d07	232	#endif /* KGD_KFD_INTERFACE_H_INCLUDED */