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4b219123 FK |
1 | /* |
2 | * Copyright 2012-2016 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | ||
24 | #ifndef V9_STRUCTS_H_ | |
25 | #define V9_STRUCTS_H_ | |
26 | ||
27 | struct v9_sdma_mqd { | |
28 | uint32_t sdmax_rlcx_rb_cntl; | |
29 | uint32_t sdmax_rlcx_rb_base; | |
30 | uint32_t sdmax_rlcx_rb_base_hi; | |
31 | uint32_t sdmax_rlcx_rb_rptr; | |
32 | uint32_t sdmax_rlcx_rb_wptr; | |
33 | uint32_t sdmax_rlcx_rb_wptr_poll_cntl; | |
34 | uint32_t sdmax_rlcx_rb_wptr_poll_addr_hi; | |
35 | uint32_t sdmax_rlcx_rb_wptr_poll_addr_lo; | |
36 | uint32_t sdmax_rlcx_rb_rptr_addr_hi; | |
37 | uint32_t sdmax_rlcx_rb_rptr_addr_lo; | |
38 | uint32_t sdmax_rlcx_ib_cntl; | |
39 | uint32_t sdmax_rlcx_ib_rptr; | |
40 | uint32_t sdmax_rlcx_ib_offset; | |
41 | uint32_t sdmax_rlcx_ib_base_lo; | |
42 | uint32_t sdmax_rlcx_ib_base_hi; | |
43 | uint32_t sdmax_rlcx_ib_size; | |
44 | uint32_t sdmax_rlcx_skip_cntl; | |
45 | uint32_t sdmax_rlcx_context_status; | |
46 | uint32_t sdmax_rlcx_doorbell; | |
47 | uint32_t sdmax_rlcx_virtual_addr; | |
48 | uint32_t sdmax_rlcx_ape1_cntl; | |
49 | uint32_t sdmax_rlcx_doorbell_log; | |
50 | uint32_t reserved_22; | |
51 | uint32_t reserved_23; | |
52 | uint32_t reserved_24; | |
53 | uint32_t reserved_25; | |
54 | uint32_t reserved_26; | |
55 | uint32_t reserved_27; | |
56 | uint32_t reserved_28; | |
57 | uint32_t reserved_29; | |
58 | uint32_t reserved_30; | |
59 | uint32_t reserved_31; | |
60 | uint32_t reserved_32; | |
61 | uint32_t reserved_33; | |
62 | uint32_t reserved_34; | |
63 | uint32_t reserved_35; | |
64 | uint32_t reserved_36; | |
65 | uint32_t reserved_37; | |
66 | uint32_t reserved_38; | |
67 | uint32_t reserved_39; | |
68 | uint32_t reserved_40; | |
69 | uint32_t reserved_41; | |
70 | uint32_t reserved_42; | |
71 | uint32_t reserved_43; | |
72 | uint32_t reserved_44; | |
73 | uint32_t reserved_45; | |
74 | uint32_t reserved_46; | |
75 | uint32_t reserved_47; | |
76 | uint32_t reserved_48; | |
77 | uint32_t reserved_49; | |
78 | uint32_t reserved_50; | |
79 | uint32_t reserved_51; | |
80 | uint32_t reserved_52; | |
81 | uint32_t reserved_53; | |
82 | uint32_t reserved_54; | |
83 | uint32_t reserved_55; | |
84 | uint32_t reserved_56; | |
85 | uint32_t reserved_57; | |
86 | uint32_t reserved_58; | |
87 | uint32_t reserved_59; | |
88 | uint32_t reserved_60; | |
89 | uint32_t reserved_61; | |
90 | uint32_t reserved_62; | |
91 | uint32_t reserved_63; | |
92 | uint32_t reserved_64; | |
93 | uint32_t reserved_65; | |
94 | uint32_t reserved_66; | |
95 | uint32_t reserved_67; | |
96 | uint32_t reserved_68; | |
97 | uint32_t reserved_69; | |
98 | uint32_t reserved_70; | |
99 | uint32_t reserved_71; | |
100 | uint32_t reserved_72; | |
101 | uint32_t reserved_73; | |
102 | uint32_t reserved_74; | |
103 | uint32_t reserved_75; | |
104 | uint32_t reserved_76; | |
105 | uint32_t reserved_77; | |
106 | uint32_t reserved_78; | |
107 | uint32_t reserved_79; | |
108 | uint32_t reserved_80; | |
109 | uint32_t reserved_81; | |
110 | uint32_t reserved_82; | |
111 | uint32_t reserved_83; | |
112 | uint32_t reserved_84; | |
113 | uint32_t reserved_85; | |
114 | uint32_t reserved_86; | |
115 | uint32_t reserved_87; | |
116 | uint32_t reserved_88; | |
117 | uint32_t reserved_89; | |
118 | uint32_t reserved_90; | |
119 | uint32_t reserved_91; | |
120 | uint32_t reserved_92; | |
121 | uint32_t reserved_93; | |
122 | uint32_t reserved_94; | |
123 | uint32_t reserved_95; | |
124 | uint32_t reserved_96; | |
125 | uint32_t reserved_97; | |
126 | uint32_t reserved_98; | |
127 | uint32_t reserved_99; | |
128 | uint32_t reserved_100; | |
129 | uint32_t reserved_101; | |
130 | uint32_t reserved_102; | |
131 | uint32_t reserved_103; | |
132 | uint32_t reserved_104; | |
133 | uint32_t reserved_105; | |
134 | uint32_t reserved_106; | |
135 | uint32_t reserved_107; | |
136 | uint32_t reserved_108; | |
137 | uint32_t reserved_109; | |
138 | uint32_t reserved_110; | |
139 | uint32_t reserved_111; | |
140 | uint32_t reserved_112; | |
141 | uint32_t reserved_113; | |
142 | uint32_t reserved_114; | |
143 | uint32_t reserved_115; | |
144 | uint32_t reserved_116; | |
145 | uint32_t reserved_117; | |
146 | uint32_t reserved_118; | |
147 | uint32_t reserved_119; | |
148 | uint32_t reserved_120; | |
149 | uint32_t reserved_121; | |
150 | uint32_t reserved_122; | |
151 | uint32_t reserved_123; | |
152 | uint32_t reserved_124; | |
153 | uint32_t reserved_125; | |
154 | uint32_t reserved_126; | |
155 | uint32_t reserved_127; | |
156 | uint32_t sdma_engine_id; | |
157 | uint32_t sdma_queue_id; | |
158 | }; | |
159 | ||
160 | struct v9_mqd { | |
161 | uint32_t header; | |
162 | uint32_t compute_dispatch_initiator; | |
163 | uint32_t compute_dim_x; | |
164 | uint32_t compute_dim_y; | |
165 | uint32_t compute_dim_z; | |
166 | uint32_t compute_start_x; | |
167 | uint32_t compute_start_y; | |
168 | uint32_t compute_start_z; | |
169 | uint32_t compute_num_thread_x; | |
170 | uint32_t compute_num_thread_y; | |
171 | uint32_t compute_num_thread_z; | |
172 | uint32_t compute_pipelinestat_enable; | |
173 | uint32_t compute_perfcount_enable; | |
174 | uint32_t compute_pgm_lo; | |
175 | uint32_t compute_pgm_hi; | |
176 | uint32_t compute_tba_lo; | |
177 | uint32_t compute_tba_hi; | |
178 | uint32_t compute_tma_lo; | |
179 | uint32_t compute_tma_hi; | |
180 | uint32_t compute_pgm_rsrc1; | |
181 | uint32_t compute_pgm_rsrc2; | |
182 | uint32_t compute_vmid; | |
183 | uint32_t compute_resource_limits; | |
184 | uint32_t compute_static_thread_mgmt_se0; | |
185 | uint32_t compute_static_thread_mgmt_se1; | |
186 | uint32_t compute_tmpring_size; | |
187 | uint32_t compute_static_thread_mgmt_se2; | |
188 | uint32_t compute_static_thread_mgmt_se3; | |
189 | uint32_t compute_restart_x; | |
190 | uint32_t compute_restart_y; | |
191 | uint32_t compute_restart_z; | |
192 | uint32_t compute_thread_trace_enable; | |
193 | uint32_t compute_misc_reserved; | |
194 | uint32_t compute_dispatch_id; | |
195 | uint32_t compute_threadgroup_id; | |
196 | uint32_t compute_relaunch; | |
197 | uint32_t compute_wave_restore_addr_lo; | |
198 | uint32_t compute_wave_restore_addr_hi; | |
199 | uint32_t compute_wave_restore_control; | |
200 | uint32_t reserved_39; | |
201 | uint32_t reserved_40; | |
202 | uint32_t reserved_41; | |
203 | uint32_t reserved_42; | |
204 | uint32_t reserved_43; | |
205 | uint32_t reserved_44; | |
206 | uint32_t reserved_45; | |
207 | uint32_t reserved_46; | |
208 | uint32_t reserved_47; | |
209 | uint32_t reserved_48; | |
210 | uint32_t reserved_49; | |
211 | uint32_t reserved_50; | |
212 | uint32_t reserved_51; | |
213 | uint32_t reserved_52; | |
214 | uint32_t reserved_53; | |
215 | uint32_t reserved_54; | |
216 | uint32_t reserved_55; | |
217 | uint32_t reserved_56; | |
218 | uint32_t reserved_57; | |
219 | uint32_t reserved_58; | |
220 | uint32_t reserved_59; | |
221 | uint32_t reserved_60; | |
222 | uint32_t reserved_61; | |
223 | uint32_t reserved_62; | |
224 | uint32_t reserved_63; | |
225 | uint32_t reserved_64; | |
226 | uint32_t compute_user_data_0; | |
227 | uint32_t compute_user_data_1; | |
228 | uint32_t compute_user_data_2; | |
229 | uint32_t compute_user_data_3; | |
230 | uint32_t compute_user_data_4; | |
231 | uint32_t compute_user_data_5; | |
232 | uint32_t compute_user_data_6; | |
233 | uint32_t compute_user_data_7; | |
234 | uint32_t compute_user_data_8; | |
235 | uint32_t compute_user_data_9; | |
236 | uint32_t compute_user_data_10; | |
237 | uint32_t compute_user_data_11; | |
238 | uint32_t compute_user_data_12; | |
239 | uint32_t compute_user_data_13; | |
240 | uint32_t compute_user_data_14; | |
241 | uint32_t compute_user_data_15; | |
242 | uint32_t cp_compute_csinvoc_count_lo; | |
243 | uint32_t cp_compute_csinvoc_count_hi; | |
244 | uint32_t reserved_83; | |
245 | uint32_t reserved_84; | |
246 | uint32_t reserved_85; | |
247 | uint32_t cp_mqd_query_time_lo; | |
248 | uint32_t cp_mqd_query_time_hi; | |
249 | uint32_t cp_mqd_connect_start_time_lo; | |
250 | uint32_t cp_mqd_connect_start_time_hi; | |
251 | uint32_t cp_mqd_connect_end_time_lo; | |
252 | uint32_t cp_mqd_connect_end_time_hi; | |
253 | uint32_t cp_mqd_connect_end_wf_count; | |
254 | uint32_t cp_mqd_connect_end_pq_rptr; | |
255 | uint32_t cp_mqd_connect_end_pq_wptr; | |
256 | uint32_t cp_mqd_connect_end_ib_rptr; | |
257 | uint32_t cp_mqd_readindex_lo; | |
258 | uint32_t cp_mqd_readindex_hi; | |
259 | uint32_t cp_mqd_save_start_time_lo; | |
260 | uint32_t cp_mqd_save_start_time_hi; | |
261 | uint32_t cp_mqd_save_end_time_lo; | |
262 | uint32_t cp_mqd_save_end_time_hi; | |
263 | uint32_t cp_mqd_restore_start_time_lo; | |
264 | uint32_t cp_mqd_restore_start_time_hi; | |
265 | uint32_t cp_mqd_restore_end_time_lo; | |
266 | uint32_t cp_mqd_restore_end_time_hi; | |
267 | uint32_t disable_queue; | |
268 | uint32_t reserved_107; | |
269 | uint32_t gds_cs_ctxsw_cnt0; | |
270 | uint32_t gds_cs_ctxsw_cnt1; | |
271 | uint32_t gds_cs_ctxsw_cnt2; | |
272 | uint32_t gds_cs_ctxsw_cnt3; | |
273 | uint32_t reserved_112; | |
274 | uint32_t reserved_113; | |
275 | uint32_t cp_pq_exe_status_lo; | |
276 | uint32_t cp_pq_exe_status_hi; | |
277 | uint32_t cp_packet_id_lo; | |
278 | uint32_t cp_packet_id_hi; | |
279 | uint32_t cp_packet_exe_status_lo; | |
280 | uint32_t cp_packet_exe_status_hi; | |
281 | uint32_t gds_save_base_addr_lo; | |
282 | uint32_t gds_save_base_addr_hi; | |
283 | uint32_t gds_save_mask_lo; | |
284 | uint32_t gds_save_mask_hi; | |
285 | uint32_t ctx_save_base_addr_lo; | |
286 | uint32_t ctx_save_base_addr_hi; | |
29696bd6 AD |
287 | uint32_t dynamic_cu_mask_addr_lo; |
288 | uint32_t dynamic_cu_mask_addr_hi; | |
4b219123 FK |
289 | uint32_t cp_mqd_base_addr_lo; |
290 | uint32_t cp_mqd_base_addr_hi; | |
291 | uint32_t cp_hqd_active; | |
292 | uint32_t cp_hqd_vmid; | |
293 | uint32_t cp_hqd_persistent_state; | |
294 | uint32_t cp_hqd_pipe_priority; | |
295 | uint32_t cp_hqd_queue_priority; | |
296 | uint32_t cp_hqd_quantum; | |
297 | uint32_t cp_hqd_pq_base_lo; | |
298 | uint32_t cp_hqd_pq_base_hi; | |
299 | uint32_t cp_hqd_pq_rptr; | |
300 | uint32_t cp_hqd_pq_rptr_report_addr_lo; | |
301 | uint32_t cp_hqd_pq_rptr_report_addr_hi; | |
302 | uint32_t cp_hqd_pq_wptr_poll_addr_lo; | |
303 | uint32_t cp_hqd_pq_wptr_poll_addr_hi; | |
304 | uint32_t cp_hqd_pq_doorbell_control; | |
305 | uint32_t reserved_144; | |
306 | uint32_t cp_hqd_pq_control; | |
307 | uint32_t cp_hqd_ib_base_addr_lo; | |
308 | uint32_t cp_hqd_ib_base_addr_hi; | |
309 | uint32_t cp_hqd_ib_rptr; | |
310 | uint32_t cp_hqd_ib_control; | |
311 | uint32_t cp_hqd_iq_timer; | |
312 | uint32_t cp_hqd_iq_rptr; | |
313 | uint32_t cp_hqd_dequeue_request; | |
314 | uint32_t cp_hqd_dma_offload; | |
315 | uint32_t cp_hqd_sema_cmd; | |
316 | uint32_t cp_hqd_msg_type; | |
317 | uint32_t cp_hqd_atomic0_preop_lo; | |
318 | uint32_t cp_hqd_atomic0_preop_hi; | |
319 | uint32_t cp_hqd_atomic1_preop_lo; | |
320 | uint32_t cp_hqd_atomic1_preop_hi; | |
321 | uint32_t cp_hqd_hq_status0; | |
322 | uint32_t cp_hqd_hq_control0; | |
323 | uint32_t cp_mqd_control; | |
324 | uint32_t cp_hqd_hq_status1; | |
325 | uint32_t cp_hqd_hq_control1; | |
326 | uint32_t cp_hqd_eop_base_addr_lo; | |
327 | uint32_t cp_hqd_eop_base_addr_hi; | |
328 | uint32_t cp_hqd_eop_control; | |
329 | uint32_t cp_hqd_eop_rptr; | |
330 | uint32_t cp_hqd_eop_wptr; | |
331 | uint32_t cp_hqd_eop_done_events; | |
332 | uint32_t cp_hqd_ctx_save_base_addr_lo; | |
333 | uint32_t cp_hqd_ctx_save_base_addr_hi; | |
334 | uint32_t cp_hqd_ctx_save_control; | |
335 | uint32_t cp_hqd_cntl_stack_offset; | |
336 | uint32_t cp_hqd_cntl_stack_size; | |
337 | uint32_t cp_hqd_wg_state_offset; | |
338 | uint32_t cp_hqd_ctx_save_size; | |
339 | uint32_t cp_hqd_gds_resource_state; | |
340 | uint32_t cp_hqd_error; | |
341 | uint32_t cp_hqd_eop_wptr_mem; | |
342 | uint32_t cp_hqd_aql_control; | |
343 | uint32_t cp_hqd_pq_wptr_lo; | |
344 | uint32_t cp_hqd_pq_wptr_hi; | |
345 | uint32_t reserved_184; | |
346 | uint32_t reserved_185; | |
347 | uint32_t reserved_186; | |
348 | uint32_t reserved_187; | |
349 | uint32_t reserved_188; | |
350 | uint32_t reserved_189; | |
351 | uint32_t reserved_190; | |
352 | uint32_t reserved_191; | |
353 | uint32_t iqtimer_pkt_header; | |
354 | uint32_t iqtimer_pkt_dw0; | |
355 | uint32_t iqtimer_pkt_dw1; | |
356 | uint32_t iqtimer_pkt_dw2; | |
357 | uint32_t iqtimer_pkt_dw3; | |
358 | uint32_t iqtimer_pkt_dw4; | |
359 | uint32_t iqtimer_pkt_dw5; | |
360 | uint32_t iqtimer_pkt_dw6; | |
361 | uint32_t iqtimer_pkt_dw7; | |
362 | uint32_t iqtimer_pkt_dw8; | |
363 | uint32_t iqtimer_pkt_dw9; | |
364 | uint32_t iqtimer_pkt_dw10; | |
365 | uint32_t iqtimer_pkt_dw11; | |
366 | uint32_t iqtimer_pkt_dw12; | |
367 | uint32_t iqtimer_pkt_dw13; | |
368 | uint32_t iqtimer_pkt_dw14; | |
369 | uint32_t iqtimer_pkt_dw15; | |
370 | uint32_t iqtimer_pkt_dw16; | |
371 | uint32_t iqtimer_pkt_dw17; | |
372 | uint32_t iqtimer_pkt_dw18; | |
373 | uint32_t iqtimer_pkt_dw19; | |
374 | uint32_t iqtimer_pkt_dw20; | |
375 | uint32_t iqtimer_pkt_dw21; | |
376 | uint32_t iqtimer_pkt_dw22; | |
377 | uint32_t iqtimer_pkt_dw23; | |
378 | uint32_t iqtimer_pkt_dw24; | |
379 | uint32_t iqtimer_pkt_dw25; | |
380 | uint32_t iqtimer_pkt_dw26; | |
381 | uint32_t iqtimer_pkt_dw27; | |
382 | uint32_t iqtimer_pkt_dw28; | |
383 | uint32_t iqtimer_pkt_dw29; | |
384 | uint32_t iqtimer_pkt_dw30; | |
385 | uint32_t iqtimer_pkt_dw31; | |
386 | uint32_t reserved_225; | |
387 | uint32_t reserved_226; | |
388 | uint32_t reserved_227; | |
389 | uint32_t set_resources_header; | |
390 | uint32_t set_resources_dw1; | |
391 | uint32_t set_resources_dw2; | |
392 | uint32_t set_resources_dw3; | |
393 | uint32_t set_resources_dw4; | |
394 | uint32_t set_resources_dw5; | |
395 | uint32_t set_resources_dw6; | |
396 | uint32_t set_resources_dw7; | |
397 | uint32_t reserved_236; | |
398 | uint32_t reserved_237; | |
399 | uint32_t reserved_238; | |
400 | uint32_t reserved_239; | |
401 | uint32_t queue_doorbell_id0; | |
402 | uint32_t queue_doorbell_id1; | |
403 | uint32_t queue_doorbell_id2; | |
404 | uint32_t queue_doorbell_id3; | |
405 | uint32_t queue_doorbell_id4; | |
406 | uint32_t queue_doorbell_id5; | |
407 | uint32_t queue_doorbell_id6; | |
408 | uint32_t queue_doorbell_id7; | |
409 | uint32_t queue_doorbell_id8; | |
410 | uint32_t queue_doorbell_id9; | |
411 | uint32_t queue_doorbell_id10; | |
412 | uint32_t queue_doorbell_id11; | |
413 | uint32_t queue_doorbell_id12; | |
414 | uint32_t queue_doorbell_id13; | |
415 | uint32_t queue_doorbell_id14; | |
416 | uint32_t queue_doorbell_id15; | |
417 | uint32_t reserved_256; | |
418 | uint32_t reserved_257; | |
419 | uint32_t reserved_258; | |
420 | uint32_t reserved_259; | |
421 | uint32_t reserved_260; | |
422 | uint32_t reserved_261; | |
423 | uint32_t reserved_262; | |
424 | uint32_t reserved_263; | |
425 | uint32_t reserved_264; | |
426 | uint32_t reserved_265; | |
427 | uint32_t reserved_266; | |
428 | uint32_t reserved_267; | |
429 | uint32_t reserved_268; | |
430 | uint32_t reserved_269; | |
431 | uint32_t reserved_270; | |
432 | uint32_t reserved_271; | |
433 | uint32_t reserved_272; | |
434 | uint32_t reserved_273; | |
435 | uint32_t reserved_274; | |
436 | uint32_t reserved_275; | |
437 | uint32_t reserved_276; | |
438 | uint32_t reserved_277; | |
439 | uint32_t reserved_278; | |
440 | uint32_t reserved_279; | |
441 | uint32_t reserved_280; | |
442 | uint32_t reserved_281; | |
443 | uint32_t reserved_282; | |
444 | uint32_t reserved_283; | |
445 | uint32_t reserved_284; | |
446 | uint32_t reserved_285; | |
447 | uint32_t reserved_286; | |
448 | uint32_t reserved_287; | |
449 | uint32_t reserved_288; | |
450 | uint32_t reserved_289; | |
451 | uint32_t reserved_290; | |
452 | uint32_t reserved_291; | |
453 | uint32_t reserved_292; | |
454 | uint32_t reserved_293; | |
455 | uint32_t reserved_294; | |
456 | uint32_t reserved_295; | |
457 | uint32_t reserved_296; | |
458 | uint32_t reserved_297; | |
459 | uint32_t reserved_298; | |
460 | uint32_t reserved_299; | |
461 | uint32_t reserved_300; | |
462 | uint32_t reserved_301; | |
463 | uint32_t reserved_302; | |
464 | uint32_t reserved_303; | |
465 | uint32_t reserved_304; | |
466 | uint32_t reserved_305; | |
467 | uint32_t reserved_306; | |
468 | uint32_t reserved_307; | |
469 | uint32_t reserved_308; | |
470 | uint32_t reserved_309; | |
471 | uint32_t reserved_310; | |
472 | uint32_t reserved_311; | |
473 | uint32_t reserved_312; | |
474 | uint32_t reserved_313; | |
475 | uint32_t reserved_314; | |
476 | uint32_t reserved_315; | |
477 | uint32_t reserved_316; | |
478 | uint32_t reserved_317; | |
479 | uint32_t reserved_318; | |
480 | uint32_t reserved_319; | |
481 | uint32_t reserved_320; | |
482 | uint32_t reserved_321; | |
483 | uint32_t reserved_322; | |
484 | uint32_t reserved_323; | |
485 | uint32_t reserved_324; | |
486 | uint32_t reserved_325; | |
487 | uint32_t reserved_326; | |
488 | uint32_t reserved_327; | |
489 | uint32_t reserved_328; | |
490 | uint32_t reserved_329; | |
491 | uint32_t reserved_330; | |
492 | uint32_t reserved_331; | |
493 | uint32_t reserved_332; | |
494 | uint32_t reserved_333; | |
495 | uint32_t reserved_334; | |
496 | uint32_t reserved_335; | |
497 | uint32_t reserved_336; | |
498 | uint32_t reserved_337; | |
499 | uint32_t reserved_338; | |
500 | uint32_t reserved_339; | |
501 | uint32_t reserved_340; | |
502 | uint32_t reserved_341; | |
503 | uint32_t reserved_342; | |
504 | uint32_t reserved_343; | |
505 | uint32_t reserved_344; | |
506 | uint32_t reserved_345; | |
507 | uint32_t reserved_346; | |
508 | uint32_t reserved_347; | |
509 | uint32_t reserved_348; | |
510 | uint32_t reserved_349; | |
511 | uint32_t reserved_350; | |
512 | uint32_t reserved_351; | |
513 | uint32_t reserved_352; | |
514 | uint32_t reserved_353; | |
515 | uint32_t reserved_354; | |
516 | uint32_t reserved_355; | |
517 | uint32_t reserved_356; | |
518 | uint32_t reserved_357; | |
519 | uint32_t reserved_358; | |
520 | uint32_t reserved_359; | |
521 | uint32_t reserved_360; | |
522 | uint32_t reserved_361; | |
523 | uint32_t reserved_362; | |
524 | uint32_t reserved_363; | |
525 | uint32_t reserved_364; | |
526 | uint32_t reserved_365; | |
527 | uint32_t reserved_366; | |
528 | uint32_t reserved_367; | |
529 | uint32_t reserved_368; | |
530 | uint32_t reserved_369; | |
531 | uint32_t reserved_370; | |
532 | uint32_t reserved_371; | |
533 | uint32_t reserved_372; | |
534 | uint32_t reserved_373; | |
535 | uint32_t reserved_374; | |
536 | uint32_t reserved_375; | |
537 | uint32_t reserved_376; | |
538 | uint32_t reserved_377; | |
539 | uint32_t reserved_378; | |
540 | uint32_t reserved_379; | |
541 | uint32_t reserved_380; | |
542 | uint32_t reserved_381; | |
543 | uint32_t reserved_382; | |
544 | uint32_t reserved_383; | |
545 | uint32_t reserved_384; | |
546 | uint32_t reserved_385; | |
547 | uint32_t reserved_386; | |
548 | uint32_t reserved_387; | |
549 | uint32_t reserved_388; | |
550 | uint32_t reserved_389; | |
551 | uint32_t reserved_390; | |
552 | uint32_t reserved_391; | |
553 | uint32_t reserved_392; | |
554 | uint32_t reserved_393; | |
555 | uint32_t reserved_394; | |
556 | uint32_t reserved_395; | |
557 | uint32_t reserved_396; | |
558 | uint32_t reserved_397; | |
559 | uint32_t reserved_398; | |
560 | uint32_t reserved_399; | |
561 | uint32_t reserved_400; | |
562 | uint32_t reserved_401; | |
563 | uint32_t reserved_402; | |
564 | uint32_t reserved_403; | |
565 | uint32_t reserved_404; | |
566 | uint32_t reserved_405; | |
567 | uint32_t reserved_406; | |
568 | uint32_t reserved_407; | |
569 | uint32_t reserved_408; | |
570 | uint32_t reserved_409; | |
571 | uint32_t reserved_410; | |
572 | uint32_t reserved_411; | |
573 | uint32_t reserved_412; | |
574 | uint32_t reserved_413; | |
575 | uint32_t reserved_414; | |
576 | uint32_t reserved_415; | |
577 | uint32_t reserved_416; | |
578 | uint32_t reserved_417; | |
579 | uint32_t reserved_418; | |
580 | uint32_t reserved_419; | |
581 | uint32_t reserved_420; | |
582 | uint32_t reserved_421; | |
583 | uint32_t reserved_422; | |
584 | uint32_t reserved_423; | |
585 | uint32_t reserved_424; | |
586 | uint32_t reserved_425; | |
587 | uint32_t reserved_426; | |
588 | uint32_t reserved_427; | |
589 | uint32_t reserved_428; | |
590 | uint32_t reserved_429; | |
591 | uint32_t reserved_430; | |
592 | uint32_t reserved_431; | |
593 | uint32_t reserved_432; | |
594 | uint32_t reserved_433; | |
595 | uint32_t reserved_434; | |
596 | uint32_t reserved_435; | |
597 | uint32_t reserved_436; | |
598 | uint32_t reserved_437; | |
599 | uint32_t reserved_438; | |
600 | uint32_t reserved_439; | |
601 | uint32_t reserved_440; | |
602 | uint32_t reserved_441; | |
603 | uint32_t reserved_442; | |
604 | uint32_t reserved_443; | |
605 | uint32_t reserved_444; | |
606 | uint32_t reserved_445; | |
607 | uint32_t reserved_446; | |
608 | uint32_t reserved_447; | |
609 | uint32_t reserved_448; | |
610 | uint32_t reserved_449; | |
611 | uint32_t reserved_450; | |
612 | uint32_t reserved_451; | |
613 | uint32_t reserved_452; | |
614 | uint32_t reserved_453; | |
615 | uint32_t reserved_454; | |
616 | uint32_t reserved_455; | |
617 | uint32_t reserved_456; | |
618 | uint32_t reserved_457; | |
619 | uint32_t reserved_458; | |
620 | uint32_t reserved_459; | |
621 | uint32_t reserved_460; | |
622 | uint32_t reserved_461; | |
623 | uint32_t reserved_462; | |
624 | uint32_t reserved_463; | |
625 | uint32_t reserved_464; | |
626 | uint32_t reserved_465; | |
627 | uint32_t reserved_466; | |
628 | uint32_t reserved_467; | |
629 | uint32_t reserved_468; | |
630 | uint32_t reserved_469; | |
631 | uint32_t reserved_470; | |
632 | uint32_t reserved_471; | |
633 | uint32_t reserved_472; | |
634 | uint32_t reserved_473; | |
635 | uint32_t reserved_474; | |
636 | uint32_t reserved_475; | |
637 | uint32_t reserved_476; | |
638 | uint32_t reserved_477; | |
639 | uint32_t reserved_478; | |
640 | uint32_t reserved_479; | |
641 | uint32_t reserved_480; | |
642 | uint32_t reserved_481; | |
643 | uint32_t reserved_482; | |
644 | uint32_t reserved_483; | |
645 | uint32_t reserved_484; | |
646 | uint32_t reserved_485; | |
647 | uint32_t reserved_486; | |
648 | uint32_t reserved_487; | |
649 | uint32_t reserved_488; | |
650 | uint32_t reserved_489; | |
651 | uint32_t reserved_490; | |
652 | uint32_t reserved_491; | |
653 | uint32_t reserved_492; | |
654 | uint32_t reserved_493; | |
655 | uint32_t reserved_494; | |
656 | uint32_t reserved_495; | |
657 | uint32_t reserved_496; | |
658 | uint32_t reserved_497; | |
659 | uint32_t reserved_498; | |
660 | uint32_t reserved_499; | |
661 | uint32_t reserved_500; | |
662 | uint32_t reserved_501; | |
663 | uint32_t reserved_502; | |
664 | uint32_t reserved_503; | |
665 | uint32_t reserved_504; | |
666 | uint32_t reserved_505; | |
667 | uint32_t reserved_506; | |
668 | uint32_t reserved_507; | |
669 | uint32_t reserved_508; | |
670 | uint32_t reserved_509; | |
671 | uint32_t reserved_510; | |
672 | uint32_t reserved_511; | |
673 | }; | |
674 | ||
ffe6d881 AD |
675 | struct v9_mqd_allocation { |
676 | struct v9_mqd mqd; | |
677 | uint32_t wptr_poll_mem; | |
678 | uint32_t rptr_report_mem; | |
679 | uint32_t dynamic_cu_mask; | |
680 | uint32_t dynamic_rb_mask; | |
681 | }; | |
682 | ||
cca02cd3 XY |
683 | /* from vega10 all CSA format is shifted to chain ib compatible mode */ |
684 | struct v9_ce_ib_state { | |
685 | /* section of non chained ib part */ | |
686 | uint32_t ce_ib_completion_status; | |
687 | uint32_t ce_constegnine_count; | |
688 | uint32_t ce_ibOffset_ib1; | |
689 | uint32_t ce_ibOffset_ib2; | |
690 | ||
691 | /* section of chained ib */ | |
692 | uint32_t ce_chainib_addrlo_ib1; | |
693 | uint32_t ce_chainib_addrlo_ib2; | |
694 | uint32_t ce_chainib_addrhi_ib1; | |
695 | uint32_t ce_chainib_addrhi_ib2; | |
696 | uint32_t ce_chainib_size_ib1; | |
697 | uint32_t ce_chainib_size_ib2; | |
698 | }; /* total 10 DWORD */ | |
699 | ||
700 | struct v9_de_ib_state { | |
701 | /* section of non chained ib part */ | |
702 | uint32_t ib_completion_status; | |
703 | uint32_t de_constEngine_count; | |
704 | uint32_t ib_offset_ib1; | |
705 | uint32_t ib_offset_ib2; | |
706 | ||
707 | /* section of chained ib */ | |
708 | uint32_t chain_ib_addrlo_ib1; | |
709 | uint32_t chain_ib_addrlo_ib2; | |
710 | uint32_t chain_ib_addrhi_ib1; | |
711 | uint32_t chain_ib_addrhi_ib2; | |
712 | uint32_t chain_ib_size_ib1; | |
713 | uint32_t chain_ib_size_ib2; | |
714 | ||
715 | /* section of non chained ib part */ | |
716 | uint32_t preamble_begin_ib1; | |
717 | uint32_t preamble_begin_ib2; | |
718 | uint32_t preamble_end_ib1; | |
719 | uint32_t preamble_end_ib2; | |
720 | ||
721 | /* section of chained ib */ | |
722 | uint32_t chain_ib_pream_addrlo_ib1; | |
723 | uint32_t chain_ib_pream_addrlo_ib2; | |
724 | uint32_t chain_ib_pream_addrhi_ib1; | |
725 | uint32_t chain_ib_pream_addrhi_ib2; | |
726 | ||
727 | /* section of non chained ib part */ | |
728 | uint32_t draw_indirect_baseLo; | |
729 | uint32_t draw_indirect_baseHi; | |
730 | uint32_t disp_indirect_baseLo; | |
731 | uint32_t disp_indirect_baseHi; | |
732 | uint32_t gds_backup_addrlo; | |
733 | uint32_t gds_backup_addrhi; | |
734 | uint32_t index_base_addrlo; | |
735 | uint32_t index_base_addrhi; | |
736 | uint32_t sample_cntl; | |
737 | }; /* Total of 27 DWORD */ | |
738 | ||
739 | struct v9_gfx_meta_data { | |
740 | /* 10 DWORD, address must be 4KB aligned */ | |
741 | struct v9_ce_ib_state ce_payload; | |
742 | uint32_t reserved1[54]; | |
743 | /* 27 DWORD, address must be 64B aligned */ | |
744 | struct v9_de_ib_state de_payload; | |
745 | /* PFP IB base address which get pre-empted */ | |
746 | uint32_t DeIbBaseAddrLo; | |
747 | uint32_t DeIbBaseAddrHi; | |
748 | uint32_t reserved2[931]; | |
749 | }; /* Total of 4K Bytes */ | |
750 | ||
4b219123 | 751 | #endif /* V9_STRUCTS_H_ */ |