[mirror_ubuntu-jammy-kernel.git] / drivers / gpu / drm / bridge / adv7511 / adv7533.c

/*
 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/of_graph.h>

#include "adv7511.h"

static const struct reg_sequence adv7533_fixed_registers[] = {
	{ 0x16, 0x20 },
	{ 0x9a, 0xe0 },
	{ 0xba, 0x70 },
	{ 0xde, 0x82 },
	{ 0xe4, 0x40 },
	{ 0xe5, 0x80 },
};

static const struct reg_sequence adv7533_cec_fixed_registers[] = {
	{ 0x15, 0xd0 },
	{ 0x17, 0xd0 },
	{ 0x24, 0x20 },
	{ 0x57, 0x11 },
	{ 0x05, 0xc8 },
};

static const struct regmap_config adv7533_cec_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,

	.max_register = 0xff,
	.cache_type = REGCACHE_RBTREE,
};

static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
{
	struct mipi_dsi_device *dsi = adv->dsi;
	struct drm_display_mode *mode = &adv->curr_mode;
	unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
	u8 clock_div_by_lanes[] = { 6, 4, 3 };	/* 2, 3, 4 lanes */

	hsw = mode->hsync_end - mode->hsync_start;
	hfp = mode->hsync_start - mode->hdisplay;
	hbp = mode->htotal - mode->hsync_end;
	vsw = mode->vsync_end - mode->vsync_start;
	vfp = mode->vsync_start - mode->vdisplay;
	vbp = mode->vtotal - mode->vsync_end;

	/* set pixel clock divider mode */
	regmap_write(adv->regmap_cec, 0x16,
		     clock_div_by_lanes[dsi->lanes - 2] << 3);

	/* horizontal porch params */
	regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4);
	regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff);
	regmap_write(adv->regmap_cec, 0x2a, hsw >> 4);
	regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff);
	regmap_write(adv->regmap_cec, 0x2c, hfp >> 4);
	regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff);
	regmap_write(adv->regmap_cec, 0x2e, hbp >> 4);
	regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff);

	/* vertical porch params */
	regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4);
	regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff);
	regmap_write(adv->regmap_cec, 0x32, vsw >> 4);
	regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff);
	regmap_write(adv->regmap_cec, 0x34, vfp >> 4);
	regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff);
	regmap_write(adv->regmap_cec, 0x36, vbp >> 4);
	regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff);
}

void adv7533_dsi_power_on(struct adv7511 *adv)
{
	struct mipi_dsi_device *dsi = adv->dsi;

	if (adv->use_timing_gen)
		adv7511_dsi_config_timing_gen(adv);

	/* set number of dsi lanes */
	regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4);

	if (adv->use_timing_gen) {
		/* reset internal timing generator */
		regmap_write(adv->regmap_cec, 0x27, 0xcb);
		regmap_write(adv->regmap_cec, 0x27, 0x8b);
		regmap_write(adv->regmap_cec, 0x27, 0xcb);
	} else {
		/* disable internal timing generator */
		regmap_write(adv->regmap_cec, 0x27, 0x0b);
	}

	/* enable hdmi */
	regmap_write(adv->regmap_cec, 0x03, 0x89);
	/* disable test mode */
	regmap_write(adv->regmap_cec, 0x55, 0x00);

	regmap_register_patch(adv->regmap_cec, adv7533_cec_fixed_registers,
			      ARRAY_SIZE(adv7533_cec_fixed_registers));
}

void adv7533_dsi_power_off(struct adv7511 *adv)
{
	/* disable hdmi */
	regmap_write(adv->regmap_cec, 0x03, 0x0b);
	/* disable internal timing generator */
	regmap_write(adv->regmap_cec, 0x27, 0x0b);
}

void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode)
{
	struct mipi_dsi_device *dsi = adv->dsi;
	int lanes, ret;

	if (adv->num_dsi_lanes != 4)
		return;

	if (mode->clock > 80000)
		lanes = 4;
	else
		lanes = 3;

	if (lanes != dsi->lanes) {
		mipi_dsi_detach(dsi);
		dsi->lanes = lanes;
		ret = mipi_dsi_attach(dsi);
		if (ret)
			dev_err(&dsi->dev, "failed to change host lanes\n");
	}
}

int adv7533_patch_registers(struct adv7511 *adv)
{
	return regmap_register_patch(adv->regmap,
				     adv7533_fixed_registers,
				     ARRAY_SIZE(adv7533_fixed_registers));
}

void adv7533_uninit_cec(struct adv7511 *adv)
{
	i2c_unregister_device(adv->i2c_cec);
}

int adv7533_init_cec(struct adv7511 *adv)
{
	int ret;

	adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
				     adv->i2c_main->addr - 1);
	if (!adv->i2c_cec)
		return -ENOMEM;

	adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
					&adv7533_cec_regmap_config);
	if (IS_ERR(adv->regmap_cec)) {
		ret = PTR_ERR(adv->regmap_cec);
		goto err;
	}

	ret = regmap_register_patch(adv->regmap_cec,
				    adv7533_cec_fixed_registers,
				    ARRAY_SIZE(adv7533_cec_fixed_registers));
	if (ret)
		goto err;

	return 0;
err:
	adv7533_uninit_cec(adv);
	return ret;
}

int adv7533_attach_dsi(struct adv7511 *adv)
{
	struct device *dev = &adv->i2c_main->dev;
	struct mipi_dsi_host *host;
	struct mipi_dsi_device *dsi;
	int ret = 0;
	const struct mipi_dsi_device_info info = { .type = "adv7533",
						   .channel = 0,
						   .node = NULL,
						 };

	host = of_find_mipi_dsi_host_by_node(adv->host_node);
	if (!host) {
		dev_err(dev, "failed to find dsi host\n");
		return -EPROBE_DEFER;
	}

	dsi = mipi_dsi_device_register_full(host, &info);
	if (IS_ERR(dsi)) {
		dev_err(dev, "failed to create dsi device\n");
		ret = PTR_ERR(dsi);
		goto err_dsi_device;
	}

	adv->dsi = dsi;

	dsi->lanes = adv->num_dsi_lanes;
	dsi->format = MIPI_DSI_FMT_RGB888;
	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
			  MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;

	ret = mipi_dsi_attach(dsi);
	if (ret < 0) {
		dev_err(dev, "failed to attach dsi to host\n");
		goto err_dsi_attach;
	}

	return 0;

err_dsi_attach:
	mipi_dsi_device_unregister(dsi);
err_dsi_device:
	return ret;
}

void adv7533_detach_dsi(struct adv7511 *adv)
{
	mipi_dsi_detach(adv->dsi);
	mipi_dsi_device_unregister(adv->dsi);
}

int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv)
{
	u32 num_lanes;
	struct device_node *endpoint;

	of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);

	if (num_lanes < 1 || num_lanes > 4)
		return -EINVAL;

	adv->num_dsi_lanes = num_lanes;

	endpoint = of_graph_get_next_endpoint(np, NULL);
	if (!endpoint)
		return -ENODEV;

	adv->host_node = of_graph_get_remote_port_parent(endpoint);
	if (!adv->host_node) {
		of_node_put(endpoint);
		return -ENODEV;
	}

	of_node_put(endpoint);
	of_node_put(adv->host_node);

	adv->use_timing_gen = !of_property_read_bool(np,
						"adi,disable-timing-generator");

	/* TODO: Check if these need to be parsed by DT or not */
	adv->rgb = true;
	adv->embedded_sync = false;

	return 0;
}
Commit	Line	Data
2437e7cd AT	1	/*
	2	* Copyright (c) 2016, The Linux Foundation. All rights reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 and
	6	* only version 2 as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
1e4d58cd AT	14	#include <linux/of_graph.h>
1e4d58cd AT	15
2437e7cd AT	16	#include "adv7511.h"
	17
	18	static const struct reg_sequence adv7533_fixed_registers[] = {
	19	{ 0x16, 0x20 },
	20	{ 0x9a, 0xe0 },
	21	{ 0xba, 0x70 },
	22	{ 0xde, 0x82 },
	23	{ 0xe4, 0x40 },
	24	{ 0xe5, 0x80 },
	25	};
	26
	27	static const struct reg_sequence adv7533_cec_fixed_registers[] = {
	28	{ 0x15, 0xd0 },
	29	{ 0x17, 0xd0 },
	30	{ 0x24, 0x20 },
	31	{ 0x57, 0x11 },
b2383fa3	32	{ 0x05, 0xc8 },
2437e7cd AT	33	};
	34
	35	static const struct regmap_config adv7533_cec_regmap_config = {
	36	.reg_bits = 8,
	37	.val_bits = 8,
	38
	39	.max_register = 0xff,
	40	.cache_type = REGCACHE_RBTREE,
	41	};
	42
78fa479d AT	43	static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
	44	{
	45	struct mipi_dsi_device *dsi = adv->dsi;
	46	struct drm_display_mode *mode = &adv->curr_mode;
	47	unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
	48	u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */
	49
	50	hsw = mode->hsync_end - mode->hsync_start;
	51	hfp = mode->hsync_start - mode->hdisplay;
	52	hbp = mode->htotal - mode->hsync_end;
	53	vsw = mode->vsync_end - mode->vsync_start;
	54	vfp = mode->vsync_start - mode->vdisplay;
	55	vbp = mode->vtotal - mode->vsync_end;
	56
	57	/* set pixel clock divider mode */
	58	regmap_write(adv->regmap_cec, 0x16,
	59	clock_div_by_lanes[dsi->lanes - 2] << 3);
	60
	61	/* horizontal porch params */
	62	regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4);
	63	regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff);
	64	regmap_write(adv->regmap_cec, 0x2a, hsw >> 4);
	65	regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff);
	66	regmap_write(adv->regmap_cec, 0x2c, hfp >> 4);
	67	regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff);
	68	regmap_write(adv->regmap_cec, 0x2e, hbp >> 4);
	69	regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff);
	70
	71	/* vertical porch params */
	72	regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4);
	73	regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff);
	74	regmap_write(adv->regmap_cec, 0x32, vsw >> 4);
	75	regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff);
	76	regmap_write(adv->regmap_cec, 0x34, vfp >> 4);
	77	regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff);
	78	regmap_write(adv->regmap_cec, 0x36, vbp >> 4);
	79	regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff);
	80	}
	81
2437e7cd AT	82	void adv7533_dsi_power_on(struct adv7511 *adv)
2437e7cd AT	83	{
1e4d58cd AT	84	struct mipi_dsi_device *dsi = adv->dsi;
1e4d58cd AT	85
78fa479d AT	86	if (adv->use_timing_gen)
	87	adv7511_dsi_config_timing_gen(adv);
	88
1e4d58cd AT	89	/* set number of dsi lanes */
1e4d58cd AT	90	regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4);
78fa479d AT	91
	92	if (adv->use_timing_gen) {
	93	/* reset internal timing generator */
	94	regmap_write(adv->regmap_cec, 0x27, 0xcb);
	95	regmap_write(adv->regmap_cec, 0x27, 0x8b);
	96	regmap_write(adv->regmap_cec, 0x27, 0xcb);
	97	} else {
	98	/* disable internal timing generator */
	99	regmap_write(adv->regmap_cec, 0x27, 0x0b);
	100	}
	101
2437e7cd AT	102	/* enable hdmi */
	103	regmap_write(adv->regmap_cec, 0x03, 0x89);
	104	/* disable test mode */
	105	regmap_write(adv->regmap_cec, 0x55, 0x00);
	106
	107	regmap_register_patch(adv->regmap_cec, adv7533_cec_fixed_registers,
	108	ARRAY_SIZE(adv7533_cec_fixed_registers));
	109	}
	110
	111	void adv7533_dsi_power_off(struct adv7511 *adv)
	112	{
	113	/* disable hdmi */
	114	regmap_write(adv->regmap_cec, 0x03, 0x0b);
78fa479d AT	115	/* disable internal timing generator */
78fa479d AT	116	regmap_write(adv->regmap_cec, 0x27, 0x0b);
2437e7cd AT	117	}
2437e7cd AT	118
62b2f026 AT	119	void adv7533_mode_set(struct adv7511 adv, struct drm_display_mode mode)
	120	{
	121	struct mipi_dsi_device *dsi = adv->dsi;
	122	int lanes, ret;
	123
	124	if (adv->num_dsi_lanes != 4)
	125	return;
	126
	127	if (mode->clock > 80000)
	128	lanes = 4;
	129	else
	130	lanes = 3;
	131
	132	if (lanes != dsi->lanes) {
	133	mipi_dsi_detach(dsi);
	134	dsi->lanes = lanes;
	135	ret = mipi_dsi_attach(dsi);
	136	if (ret)
	137	dev_err(&dsi->dev, "failed to change host lanes\n");
	138	}
	139	}
	140
2437e7cd AT	141	int adv7533_patch_registers(struct adv7511 *adv)
	142	{
	143	return regmap_register_patch(adv->regmap,
	144	adv7533_fixed_registers,
	145	ARRAY_SIZE(adv7533_fixed_registers));
	146	}
	147
	148	void adv7533_uninit_cec(struct adv7511 *adv)
	149	{
	150	i2c_unregister_device(adv->i2c_cec);
	151	}
	152
2437e7cd AT	153	int adv7533_init_cec(struct adv7511 *adv)
	154	{
	155	int ret;
	156
d25a4cbb SS	157	adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
d25a4cbb SS	158	adv->i2c_main->addr - 1);
2437e7cd AT	159	if (!adv->i2c_cec)
	160	return -ENOMEM;
	161
	162	adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
	163	&adv7533_cec_regmap_config);
	164	if (IS_ERR(adv->regmap_cec)) {
	165	ret = PTR_ERR(adv->regmap_cec);
	166	goto err;
	167	}
	168
	169	ret = regmap_register_patch(adv->regmap_cec,
	170	adv7533_cec_fixed_registers,
	171	ARRAY_SIZE(adv7533_cec_fixed_registers));
	172	if (ret)
	173	goto err;
	174
	175	return 0;
	176	err:
	177	adv7533_uninit_cec(adv);
	178	return ret;
	179	}
1e4d58cd AT	180
	181	int adv7533_attach_dsi(struct adv7511 *adv)
	182	{
	183	struct device *dev = &adv->i2c_main->dev;
	184	struct mipi_dsi_host *host;
	185	struct mipi_dsi_device *dsi;
	186	int ret = 0;
	187	const struct mipi_dsi_device_info info = { .type = "adv7533",
	188	.channel = 0,
	189	.node = NULL,
	190	};
	191
	192	host = of_find_mipi_dsi_host_by_node(adv->host_node);
	193	if (!host) {
	194	dev_err(dev, "failed to find dsi host\n");
	195	return -EPROBE_DEFER;
	196	}
	197
	198	dsi = mipi_dsi_device_register_full(host, &info);
	199	if (IS_ERR(dsi)) {
	200	dev_err(dev, "failed to create dsi device\n");
	201	ret = PTR_ERR(dsi);
	202	goto err_dsi_device;
	203	}
	204
	205	adv->dsi = dsi;
	206
	207	dsi->lanes = adv->num_dsi_lanes;
	208	dsi->format = MIPI_DSI_FMT_RGB888;
	209	dsi->mode_flags = MIPI_DSI_MODE_VIDEO \| MIPI_DSI_MODE_VIDEO_SYNC_PULSE \|
	210	MIPI_DSI_MODE_EOT_PACKET \| MIPI_DSI_MODE_VIDEO_HSE;
	211
	212	ret = mipi_dsi_attach(dsi);
	213	if (ret < 0) {
	214	dev_err(dev, "failed to attach dsi to host\n");
	215	goto err_dsi_attach;
	216	}
	217
	218	return 0;
	219
	220	err_dsi_attach:
	221	mipi_dsi_device_unregister(dsi);
	222	err_dsi_device:
	223	return ret;
	224	}
	225
	226	void adv7533_detach_dsi(struct adv7511 *adv)
	227	{
	228	mipi_dsi_detach(adv->dsi);
	229	mipi_dsi_device_unregister(adv->dsi);
	230	}
	231
	232	int adv7533_parse_dt(struct device_node np, struct adv7511 adv)
	233	{
	234	u32 num_lanes;
	235	struct device_node *endpoint;
	236
	237	of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);
	238
	239	if (num_lanes < 1 \|\| num_lanes > 4)
	240	return -EINVAL;
	241
	242	adv->num_dsi_lanes = num_lanes;
	243
244	endpoint = of_graph_get_next_endpoint(np, NULL);
245	if (!endpoint)
246	return -ENODEV;
247
248	adv->host_node = of_graph_get_remote_port_parent(endpoint);
249	if (!adv->host_node) {
250	of_node_put(endpoint);
251	return -ENODEV;
252	}
253
254	of_node_put(endpoint);
255	of_node_put(adv->host_node);
256
78fa479d AT	257	adv->use_timing_gen = !of_property_read_bool(np,
	258	"adi,disable-timing-generator");
	259
1e4d58cd AT	260	/* TODO: Check if these need to be parsed by DT or not */
	261	adv->rgb = true;
	262	adv->embedded_sync = false;
	263
	264	return 0;
	265	}