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f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
47819ba2 33#include <linux/module.h>
f453ba04
DA
34#include "drmP.h"
35#include "drm_edid.h"
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
d1ff6409
AJ
42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
DA
45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
bc42aabc
AJ
69/* Force reduced-blanking timings for detailed modes */
70#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
3c537889 71
13931579
AJ
72struct detailed_mode_closure {
73 struct drm_connector *connector;
74 struct edid *edid;
75 bool preferred;
76 u32 quirks;
77 int modes;
78};
f453ba04 79
5c61259e
ZY
80#define LEVEL_DMT 0
81#define LEVEL_GTF 1
7a374350
AJ
82#define LEVEL_GTF2 2
83#define LEVEL_CVT 3
5c61259e 84
f453ba04 85static struct edid_quirk {
c51a3fd6 86 char vendor[4];
f453ba04
DA
87 int product_id;
88 u32 quirks;
89} edid_quirk_list[] = {
90 /* Acer AL1706 */
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Acer F51 */
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
94 /* Unknown Acer */
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
96
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
100
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
ba1163de
AJ
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
105
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
109
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
113
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
116
117 /* Proview AY765C */
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
119
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
bc42aabc
AJ
125
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
f453ba04
DA
128};
129
61e57a8d 130/*** DDC fetch and block validation ***/
f453ba04 131
083ae056
AJ
132static const u8 edid_header[] = {
133 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
134};
f453ba04 135
051963d4
TR
136 /*
137 * Sanity check the header of the base EDID block. Return 8 if the header
138 * is perfect, down to 0 if it's totally wrong.
139 */
140int drm_edid_header_is_valid(const u8 *raw_edid)
141{
142 int i, score = 0;
143
144 for (i = 0; i < sizeof(edid_header); i++)
145 if (raw_edid[i] == edid_header[i])
146 score++;
147
148 return score;
149}
150EXPORT_SYMBOL(drm_edid_header_is_valid);
151
47819ba2
AJ
152static int edid_fixup __read_mostly = 6;
153module_param_named(edid_fixup, edid_fixup, int, 0400);
154MODULE_PARM_DESC(edid_fixup,
155 "Minimum number of valid EDID header bytes (0-8, default 6)");
051963d4 156
61e57a8d
AJ
157/*
158 * Sanity check the EDID block (base or extension). Return 0 if the block
159 * doesn't check out, or 1 if it's valid.
f453ba04 160 */
f89ec8a4 161bool drm_edid_block_valid(u8 *raw_edid, int block)
f453ba04 162{
61e57a8d 163 int i;
f453ba04 164 u8 csum = 0;
61e57a8d 165 struct edid *edid = (struct edid *)raw_edid;
f453ba04 166
47819ba2
AJ
167 if (edid_fixup > 8 || edid_fixup < 0)
168 edid_fixup = 6;
169
f89ec8a4 170 if (block == 0) {
051963d4 171 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d 172 if (score == 8) ;
47819ba2 173 else if (score >= edid_fixup) {
61e57a8d
AJ
174 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
175 memcpy(raw_edid, edid_header, sizeof(edid_header));
176 } else {
177 goto bad;
178 }
179 }
f453ba04
DA
180
181 for (i = 0; i < EDID_LENGTH; i++)
182 csum += raw_edid[i];
183 if (csum) {
184 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
4a638b4e
AJ
185
186 /* allow CEA to slide through, switches mangle this */
187 if (raw_edid[0] != 0x02)
188 goto bad;
f453ba04
DA
189 }
190
61e57a8d
AJ
191 /* per-block-type checks */
192 switch (raw_edid[0]) {
193 case 0: /* base */
194 if (edid->version != 1) {
195 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
196 goto bad;
197 }
862b89c0 198
61e57a8d
AJ
199 if (edid->revision > 4)
200 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
201 break;
862b89c0 202
61e57a8d
AJ
203 default:
204 break;
205 }
47ee4ccf 206
f453ba04
DA
207 return 1;
208
209bad:
210 if (raw_edid) {
f49dadb8 211 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
212 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
213 raw_edid, EDID_LENGTH, false);
f453ba04
DA
214 }
215 return 0;
216}
da0df92b 217EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
AJ
218
219/**
220 * drm_edid_is_valid - sanity check EDID data
221 * @edid: EDID data
222 *
223 * Sanity-check an entire EDID record (including extensions)
224 */
225bool drm_edid_is_valid(struct edid *edid)
226{
227 int i;
228 u8 *raw = (u8 *)edid;
229
230 if (!edid)
231 return false;
232
233 for (i = 0; i <= edid->extensions; i++)
f89ec8a4 234 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))
61e57a8d
AJ
235 return false;
236
237 return true;
238}
3c537889 239EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 240
61e57a8d
AJ
241#define DDC_SEGMENT_ADDR 0x30
242/**
243 * Get EDID information via I2C.
244 *
245 * \param adapter : i2c device adaptor
246 * \param buf : EDID data buffer to be filled
247 * \param len : EDID data buffer length
248 * \return 0 on success or -1 on failure.
249 *
250 * Try to fetch EDID information by calling i2c driver function.
251 */
252static int
253drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
254 int block, int len)
255{
256 unsigned char start = block * EDID_LENGTH;
cd004b3f
S
257 unsigned char segment = block >> 1;
258 unsigned char xfers = segment ? 3 : 2;
4819d2e4
CW
259 int ret, retries = 5;
260
261 /* The core i2c driver will automatically retry the transfer if the
262 * adapter reports EAGAIN. However, we find that bit-banging transfers
263 * are susceptible to errors under a heavily loaded machine and
264 * generate spurious NAKs and timeouts. Retrying the transfer
265 * of the individual block a few times seems to overcome this.
266 */
267 do {
268 struct i2c_msg msgs[] = {
269 {
cd004b3f
S
270 .addr = DDC_SEGMENT_ADDR,
271 .flags = 0,
272 .len = 1,
273 .buf = &segment,
274 }, {
4819d2e4
CW
275 .addr = DDC_ADDR,
276 .flags = 0,
277 .len = 1,
278 .buf = &start,
279 }, {
280 .addr = DDC_ADDR,
281 .flags = I2C_M_RD,
282 .len = len,
283 .buf = buf,
284 }
285 };
cd004b3f
S
286
287 /*
288 * Avoid sending the segment addr to not upset non-compliant ddc
289 * monitors.
290 */
291 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
292
9292f37e
ED
293 if (ret == -ENXIO) {
294 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
295 adapter->name);
296 break;
297 }
cd004b3f 298 } while (ret != xfers && --retries);
4819d2e4 299
cd004b3f 300 return ret == xfers ? 0 : -1;
61e57a8d
AJ
301}
302
4a9a8b71
DA
303static bool drm_edid_is_zero(u8 *in_edid, int length)
304{
305 int i;
306 u32 *raw_edid = (u32 *)in_edid;
307
308 for (i = 0; i < length / 4; i++)
309 if (*(raw_edid + i) != 0)
310 return false;
311 return true;
312}
313
61e57a8d
AJ
314static u8 *
315drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
316{
0ea75e23 317 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
318 u8 *block, *new;
319
320 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
321 return NULL;
322
323 /* base block fetch */
324 for (i = 0; i < 4; i++) {
325 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
326 goto out;
f89ec8a4 327 if (drm_edid_block_valid(block, 0))
61e57a8d 328 break;
4a9a8b71
DA
329 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
330 connector->null_edid_counter++;
331 goto carp;
332 }
61e57a8d
AJ
333 }
334 if (i == 4)
335 goto carp;
336
337 /* if there's no extensions, we're done */
338 if (block[0x7e] == 0)
339 return block;
340
341 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
342 if (!new)
343 goto out;
344 block = new;
345
346 for (j = 1; j <= block[0x7e]; j++) {
347 for (i = 0; i < 4; i++) {
0ea75e23
ST
348 if (drm_do_probe_ddc_edid(adapter,
349 block + (valid_extensions + 1) * EDID_LENGTH,
350 j, EDID_LENGTH))
61e57a8d 351 goto out;
f89ec8a4 352 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) {
0ea75e23 353 valid_extensions++;
61e57a8d 354 break;
0ea75e23 355 }
61e57a8d
AJ
356 }
357 if (i == 4)
0ea75e23
ST
358 dev_warn(connector->dev->dev,
359 "%s: Ignoring invalid EDID block %d.\n",
360 drm_get_connector_name(connector), j);
361 }
362
363 if (valid_extensions != block[0x7e]) {
364 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
365 block[0x7e] = valid_extensions;
366 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
367 if (!new)
368 goto out;
369 block = new;
61e57a8d
AJ
370 }
371
372 return block;
373
374carp:
dcdb1674 375 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
376 drm_get_connector_name(connector), j);
377
378out:
379 kfree(block);
380 return NULL;
381}
382
383/**
384 * Probe DDC presence.
385 *
386 * \param adapter : i2c device adaptor
387 * \return 1 on success
388 */
389static bool
390drm_probe_ddc(struct i2c_adapter *adapter)
391{
392 unsigned char out;
393
394 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
395}
396
397/**
398 * drm_get_edid - get EDID data, if available
399 * @connector: connector we're probing
400 * @adapter: i2c adapter to use for DDC
401 *
402 * Poke the given i2c channel to grab EDID data if possible. If found,
403 * attach it to the connector.
404 *
405 * Return edid data or NULL if we couldn't find any.
406 */
407struct edid *drm_get_edid(struct drm_connector *connector,
408 struct i2c_adapter *adapter)
409{
410 struct edid *edid = NULL;
411
412 if (drm_probe_ddc(adapter))
413 edid = (struct edid *)drm_do_get_edid(connector, adapter);
414
61e57a8d 415 return edid;
61e57a8d
AJ
416}
417EXPORT_SYMBOL(drm_get_edid);
418
419/*** EDID parsing ***/
420
f453ba04
DA
421/**
422 * edid_vendor - match a string against EDID's obfuscated vendor field
423 * @edid: EDID to match
424 * @vendor: vendor string
425 *
426 * Returns true if @vendor is in @edid, false otherwise
427 */
428static bool edid_vendor(struct edid *edid, char *vendor)
429{
430 char edid_vendor[3];
431
432 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
433 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
434 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 435 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
436
437 return !strncmp(edid_vendor, vendor, 3);
438}
439
440/**
441 * edid_get_quirks - return quirk flags for a given EDID
442 * @edid: EDID to process
443 *
444 * This tells subsequent routines what fixes they need to apply.
445 */
446static u32 edid_get_quirks(struct edid *edid)
447{
448 struct edid_quirk *quirk;
449 int i;
450
451 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
452 quirk = &edid_quirk_list[i];
453
454 if (edid_vendor(edid, quirk->vendor) &&
455 (EDID_PRODUCT_ID(edid) == quirk->product_id))
456 return quirk->quirks;
457 }
458
459 return 0;
460}
461
462#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
463#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
464
f453ba04
DA
465/**
466 * edid_fixup_preferred - set preferred modes based on quirk list
467 * @connector: has mode list to fix up
468 * @quirks: quirks list
469 *
470 * Walk the mode list for @connector, clearing the preferred status
471 * on existing modes and setting it anew for the right mode ala @quirks.
472 */
473static void edid_fixup_preferred(struct drm_connector *connector,
474 u32 quirks)
475{
476 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 477 int target_refresh = 0;
f453ba04
DA
478
479 if (list_empty(&connector->probed_modes))
480 return;
481
482 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
483 target_refresh = 60;
484 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
485 target_refresh = 75;
486
487 preferred_mode = list_first_entry(&connector->probed_modes,
488 struct drm_display_mode, head);
489
490 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
491 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
492
493 if (cur_mode == preferred_mode)
494 continue;
495
496 /* Largest mode is preferred */
497 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
498 preferred_mode = cur_mode;
499
500 /* At a given size, try to get closest to target refresh */
501 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
502 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
503 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
504 preferred_mode = cur_mode;
505 }
506 }
507
508 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
509}
510
f6e252ba
AJ
511static bool
512mode_is_rb(const struct drm_display_mode *mode)
513{
514 return (mode->htotal - mode->hdisplay == 160) &&
515 (mode->hsync_end - mode->hdisplay == 80) &&
516 (mode->hsync_end - mode->hsync_start == 32) &&
517 (mode->vsync_start - mode->vdisplay == 3);
518}
519
33c7531d
AJ
520/*
521 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
522 * @dev: Device to duplicate against
523 * @hsize: Mode width
524 * @vsize: Mode height
525 * @fresh: Mode refresh rate
f6e252ba 526 * @rb: Mode reduced-blanking-ness
33c7531d
AJ
527 *
528 * Walk the DMT mode list looking for a match for the given parameters.
529 * Return a newly allocated copy of the mode, or NULL if not found.
530 */
1d42bbc8 531struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
f6e252ba
AJ
532 int hsize, int vsize, int fresh,
533 bool rb)
559ee21d 534{
07a5e632 535 int i;
559ee21d 536
07a5e632 537 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 538 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f8b46a05
AJ
539 if (hsize != ptr->hdisplay)
540 continue;
541 if (vsize != ptr->vdisplay)
542 continue;
543 if (fresh != drm_mode_vrefresh(ptr))
544 continue;
f6e252ba
AJ
545 if (rb != mode_is_rb(ptr))
546 continue;
f8b46a05
AJ
547
548 return drm_mode_duplicate(dev, ptr);
559ee21d 549 }
f8b46a05
AJ
550
551 return NULL;
559ee21d 552}
1d42bbc8 553EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 554
d1ff6409
AJ
555typedef void detailed_cb(struct detailed_timing *timing, void *closure);
556
4d76a221
AJ
557static void
558cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
559{
560 int i, n = 0;
4966b2a9 561 u8 d = ext[0x02];
4d76a221
AJ
562 u8 *det_base = ext + d;
563
4966b2a9 564 n = (127 - d) / 18;
4d76a221
AJ
565 for (i = 0; i < n; i++)
566 cb((struct detailed_timing *)(det_base + 18 * i), closure);
567}
568
cbba98f8
AJ
569static void
570vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
571{
572 unsigned int i, n = min((int)ext[0x02], 6);
573 u8 *det_base = ext + 5;
574
575 if (ext[0x01] != 1)
576 return; /* unknown version */
577
578 for (i = 0; i < n; i++)
579 cb((struct detailed_timing *)(det_base + 18 * i), closure);
580}
581
d1ff6409
AJ
582static void
583drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
584{
585 int i;
586 struct edid *edid = (struct edid *)raw_edid;
587
588 if (edid == NULL)
589 return;
590
591 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
592 cb(&(edid->detailed_timings[i]), closure);
593
4d76a221
AJ
594 for (i = 1; i <= raw_edid[0x7e]; i++) {
595 u8 *ext = raw_edid + (i * EDID_LENGTH);
596 switch (*ext) {
597 case CEA_EXT:
598 cea_for_each_detailed_block(ext, cb, closure);
599 break;
cbba98f8
AJ
600 case VTB_EXT:
601 vtb_for_each_detailed_block(ext, cb, closure);
602 break;
4d76a221
AJ
603 default:
604 break;
605 }
606 }
d1ff6409
AJ
607}
608
609static void
610is_rb(struct detailed_timing *t, void *data)
611{
612 u8 *r = (u8 *)t;
613 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
614 if (r[15] & 0x10)
615 *(bool *)data = true;
616}
617
618/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
619static bool
620drm_monitor_supports_rb(struct edid *edid)
621{
622 if (edid->revision >= 4) {
b196a498 623 bool ret = false;
d1ff6409
AJ
624 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
625 return ret;
626 }
627
628 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
629}
630
7a374350
AJ
631static void
632find_gtf2(struct detailed_timing *t, void *data)
633{
634 u8 *r = (u8 *)t;
635 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
636 *(u8 **)data = r;
637}
638
639/* Secondary GTF curve kicks in above some break frequency */
640static int
641drm_gtf2_hbreak(struct edid *edid)
642{
643 u8 *r = NULL;
644 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
645 return r ? (r[12] * 2) : 0;
646}
647
648static int
649drm_gtf2_2c(struct edid *edid)
650{
651 u8 *r = NULL;
652 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
653 return r ? r[13] : 0;
654}
655
656static int
657drm_gtf2_m(struct edid *edid)
658{
659 u8 *r = NULL;
660 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
661 return r ? (r[15] << 8) + r[14] : 0;
662}
663
664static int
665drm_gtf2_k(struct edid *edid)
666{
667 u8 *r = NULL;
668 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
669 return r ? r[16] : 0;
670}
671
672static int
673drm_gtf2_2j(struct edid *edid)
674{
675 u8 *r = NULL;
676 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
677 return r ? r[17] : 0;
678}
679
680/**
681 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
682 * @edid: EDID block to scan
683 */
684static int standard_timing_level(struct edid *edid)
685{
686 if (edid->revision >= 2) {
687 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
688 return LEVEL_CVT;
689 if (drm_gtf2_hbreak(edid))
690 return LEVEL_GTF2;
691 return LEVEL_GTF;
692 }
693 return LEVEL_DMT;
694}
695
23425cae
AJ
696/*
697 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
698 * monitors fill with ascii space (0x20) instead.
699 */
700static int
701bad_std_timing(u8 a, u8 b)
702{
703 return (a == 0x00 && b == 0x00) ||
704 (a == 0x01 && b == 0x01) ||
705 (a == 0x20 && b == 0x20);
706}
707
f453ba04
DA
708/**
709 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
710 * @t: standard timing params
5c61259e 711 * @timing_level: standard timing level
f453ba04
DA
712 *
713 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 714 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 715 */
7ca6adb3 716static struct drm_display_mode *
7a374350
AJ
717drm_mode_std(struct drm_connector *connector, struct edid *edid,
718 struct std_timing *t, int revision)
f453ba04 719{
7ca6adb3
AJ
720 struct drm_device *dev = connector->dev;
721 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
722 int hsize, vsize;
723 int vrefresh_rate;
0454beab
MD
724 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
725 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
726 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
727 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 728 int timing_level = standard_timing_level(edid);
5c61259e 729
23425cae
AJ
730 if (bad_std_timing(t->hsize, t->vfreq_aspect))
731 return NULL;
732
5c61259e
ZY
733 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
734 hsize = t->hsize * 8 + 248;
735 /* vrefresh_rate = vfreq + 60 */
736 vrefresh_rate = vfreq + 60;
737 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
738 if (aspect_ratio == 0) {
739 if (revision < 3)
740 vsize = hsize;
741 else
742 vsize = (hsize * 10) / 16;
743 } else if (aspect_ratio == 1)
f453ba04 744 vsize = (hsize * 3) / 4;
0454beab 745 else if (aspect_ratio == 2)
f453ba04
DA
746 vsize = (hsize * 4) / 5;
747 else
748 vsize = (hsize * 9) / 16;
a0910c8e
AJ
749
750 /* HDTV hack, part 1 */
751 if (vrefresh_rate == 60 &&
752 ((hsize == 1360 && vsize == 765) ||
753 (hsize == 1368 && vsize == 769))) {
754 hsize = 1366;
755 vsize = 768;
756 }
757
7ca6adb3
AJ
758 /*
759 * If this connector already has a mode for this size and refresh
760 * rate (because it came from detailed or CVT info), use that
761 * instead. This way we don't have to guess at interlace or
762 * reduced blanking.
763 */
522032da 764 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
765 if (m->hdisplay == hsize && m->vdisplay == vsize &&
766 drm_mode_vrefresh(m) == vrefresh_rate)
767 return NULL;
768
a0910c8e
AJ
769 /* HDTV hack, part 2 */
770 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
771 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 772 false);
559ee21d 773 mode->hdisplay = 1366;
a4967de6
AJ
774 mode->hsync_start = mode->hsync_start - 1;
775 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
776 return mode;
777 }
a0910c8e 778
559ee21d 779 /* check whether it can be found in default mode table */
f6e252ba
AJ
780 if (drm_monitor_supports_rb(edid)) {
781 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
782 true);
783 if (mode)
784 return mode;
785 }
786 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
559ee21d
ZY
787 if (mode)
788 return mode;
789
f6e252ba 790 /* okay, generate it */
5c61259e
ZY
791 switch (timing_level) {
792 case LEVEL_DMT:
5c61259e
ZY
793 break;
794 case LEVEL_GTF:
795 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
796 break;
7a374350
AJ
797 case LEVEL_GTF2:
798 /*
799 * This is potentially wrong if there's ever a monitor with
800 * more than one ranges section, each claiming a different
801 * secondary GTF curve. Please don't do that.
802 */
803 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
fc48f169
TI
804 if (!mode)
805 return NULL;
7a374350 806 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 807 drm_mode_destroy(dev, mode);
7a374350
AJ
808 mode = drm_gtf_mode_complex(dev, hsize, vsize,
809 vrefresh_rate, 0, 0,
810 drm_gtf2_m(edid),
811 drm_gtf2_2c(edid),
812 drm_gtf2_k(edid),
813 drm_gtf2_2j(edid));
814 }
815 break;
5c61259e 816 case LEVEL_CVT:
d50ba256
DA
817 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
818 false);
5c61259e
ZY
819 break;
820 }
f453ba04
DA
821 return mode;
822}
823
b58db2c6
AJ
824/*
825 * EDID is delightfully ambiguous about how interlaced modes are to be
826 * encoded. Our internal representation is of frame height, but some
827 * HDTV detailed timings are encoded as field height.
828 *
829 * The format list here is from CEA, in frame size. Technically we
830 * should be checking refresh rate too. Whatever.
831 */
832static void
833drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
834 struct detailed_pixel_timing *pt)
835{
836 int i;
837 static const struct {
838 int w, h;
839 } cea_interlaced[] = {
840 { 1920, 1080 },
841 { 720, 480 },
842 { 1440, 480 },
843 { 2880, 480 },
844 { 720, 576 },
845 { 1440, 576 },
846 { 2880, 576 },
847 };
b58db2c6
AJ
848
849 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
850 return;
851
3c581411 852 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
853 if ((mode->hdisplay == cea_interlaced[i].w) &&
854 (mode->vdisplay == cea_interlaced[i].h / 2)) {
855 mode->vdisplay *= 2;
856 mode->vsync_start *= 2;
857 mode->vsync_end *= 2;
858 mode->vtotal *= 2;
859 mode->vtotal |= 1;
860 }
861 }
862
863 mode->flags |= DRM_MODE_FLAG_INTERLACE;
864}
865
f453ba04
DA
866/**
867 * drm_mode_detailed - create a new mode from an EDID detailed timing section
868 * @dev: DRM device (needed to create new mode)
869 * @edid: EDID block
870 * @timing: EDID detailed timing info
871 * @quirks: quirks to apply
872 *
873 * An EDID detailed timing block contains enough info for us to create and
874 * return a new struct drm_display_mode.
875 */
876static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
877 struct edid *edid,
878 struct detailed_timing *timing,
879 u32 quirks)
880{
881 struct drm_display_mode *mode;
882 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
883 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
884 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
885 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
886 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
887 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
888 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
889 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
890 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 891
fc438966 892 /* ignore tiny modes */
0454beab 893 if (hactive < 64 || vactive < 64)
fc438966
AJ
894 return NULL;
895
0454beab 896 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
897 printk(KERN_WARNING "stereo mode not supported\n");
898 return NULL;
899 }
0454beab 900 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 901 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
902 }
903
fcb45611
ZY
904 /* it is incorrect if hsync/vsync width is zero */
905 if (!hsync_pulse_width || !vsync_pulse_width) {
906 DRM_DEBUG_KMS("Incorrect Detailed timing. "
907 "Wrong Hsync/Vsync pulse width\n");
908 return NULL;
909 }
bc42aabc
AJ
910
911 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
912 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
913 if (!mode)
914 return NULL;
915
916 goto set_size;
917 }
918
f453ba04
DA
919 mode = drm_mode_create(dev);
920 if (!mode)
921 return NULL;
922
f453ba04 923 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
924 timing->pixel_clock = cpu_to_le16(1088);
925
926 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
927
928 mode->hdisplay = hactive;
929 mode->hsync_start = mode->hdisplay + hsync_offset;
930 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
931 mode->htotal = mode->hdisplay + hblank;
932
933 mode->vdisplay = vactive;
934 mode->vsync_start = mode->vdisplay + vsync_offset;
935 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
936 mode->vtotal = mode->vdisplay + vblank;
f453ba04 937
7064fef5
JB
938 /* Some EDIDs have bogus h/vtotal values */
939 if (mode->hsync_end > mode->htotal)
940 mode->htotal = mode->hsync_end + 1;
941 if (mode->vsync_end > mode->vtotal)
942 mode->vtotal = mode->vsync_end + 1;
943
b58db2c6 944 drm_mode_do_interlace_quirk(mode, pt);
f453ba04
DA
945
946 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 947 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
948 }
949
0454beab
MD
950 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
951 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
952 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
953 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 954
bc42aabc 955set_size:
e14cbee4
MD
956 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
957 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
958
959 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
960 mode->width_mm *= 10;
961 mode->height_mm *= 10;
962 }
963
964 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
965 mode->width_mm = edid->width_cm * 10;
966 mode->height_mm = edid->height_cm * 10;
967 }
968
bc42aabc
AJ
969 mode->type = DRM_MODE_TYPE_DRIVER;
970 drm_mode_set_name(mode);
971
f453ba04
DA
972 return mode;
973}
974
b17e52ef 975static bool
b1f559ec
CW
976mode_in_hsync_range(const struct drm_display_mode *mode,
977 struct edid *edid, u8 *t)
b17e52ef
AJ
978{
979 int hsync, hmin, hmax;
980
981 hmin = t[7];
982 if (edid->revision >= 4)
983 hmin += ((t[4] & 0x04) ? 255 : 0);
984 hmax = t[8];
985 if (edid->revision >= 4)
986 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 987 hsync = drm_mode_hsync(mode);
07a5e632 988
b17e52ef
AJ
989 return (hsync <= hmax && hsync >= hmin);
990}
991
992static bool
b1f559ec
CW
993mode_in_vsync_range(const struct drm_display_mode *mode,
994 struct edid *edid, u8 *t)
b17e52ef
AJ
995{
996 int vsync, vmin, vmax;
997
998 vmin = t[5];
999 if (edid->revision >= 4)
1000 vmin += ((t[4] & 0x01) ? 255 : 0);
1001 vmax = t[6];
1002 if (edid->revision >= 4)
1003 vmax += ((t[4] & 0x02) ? 255 : 0);
1004 vsync = drm_mode_vrefresh(mode);
1005
1006 return (vsync <= vmax && vsync >= vmin);
1007}
1008
1009static u32
1010range_pixel_clock(struct edid *edid, u8 *t)
1011{
1012 /* unspecified */
1013 if (t[9] == 0 || t[9] == 255)
1014 return 0;
1015
1016 /* 1.4 with CVT support gives us real precision, yay */
1017 if (edid->revision >= 4 && t[10] == 0x04)
1018 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1019
1020 /* 1.3 is pathetic, so fuzz up a bit */
1021 return t[9] * 10000 + 5001;
1022}
1023
b17e52ef 1024static bool
b1f559ec 1025mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
1026 struct detailed_timing *timing)
1027{
1028 u32 max_clock;
1029 u8 *t = (u8 *)timing;
1030
1031 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
1032 return false;
1033
b17e52ef 1034 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
1035 return false;
1036
b17e52ef 1037 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
1038 if (mode->clock > max_clock)
1039 return false;
b17e52ef
AJ
1040
1041 /* 1.4 max horizontal check */
1042 if (edid->revision >= 4 && t[10] == 0x04)
1043 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1044 return false;
1045
1046 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1047 return false;
07a5e632
AJ
1048
1049 return true;
1050}
1051
7b668ebe
TI
1052static bool valid_inferred_mode(const struct drm_connector *connector,
1053 const struct drm_display_mode *mode)
1054{
1055 struct drm_display_mode *m;
1056 bool ok = false;
1057
1058 list_for_each_entry(m, &connector->probed_modes, head) {
1059 if (mode->hdisplay == m->hdisplay &&
1060 mode->vdisplay == m->vdisplay &&
1061 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1062 return false; /* duplicated */
1063 if (mode->hdisplay <= m->hdisplay &&
1064 mode->vdisplay <= m->vdisplay)
1065 ok = true;
1066 }
1067 return ok;
1068}
1069
b17e52ef 1070static int
cd4cd3de 1071drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
b17e52ef 1072 struct detailed_timing *timing)
07a5e632
AJ
1073{
1074 int i, modes = 0;
1075 struct drm_display_mode *newmode;
1076 struct drm_device *dev = connector->dev;
1077
1078 for (i = 0; i < drm_num_dmt_modes; i++) {
7b668ebe
TI
1079 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1080 valid_inferred_mode(connector, drm_dmt_modes + i)) {
07a5e632
AJ
1081 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1082 if (newmode) {
1083 drm_mode_probed_add(connector, newmode);
1084 modes++;
1085 }
1086 }
1087 }
1088
1089 return modes;
1090}
1091
c09dedb7
TI
1092/* fix up 1366x768 mode from 1368x768;
1093 * GFT/CVT can't express 1366 width which isn't dividable by 8
1094 */
1095static void fixup_mode_1366x768(struct drm_display_mode *mode)
1096{
1097 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1098 mode->hdisplay = 1366;
1099 mode->hsync_start--;
1100 mode->hsync_end--;
1101 drm_mode_set_name(mode);
1102 }
1103}
1104
b309bd37
AJ
1105static int
1106drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1107 struct detailed_timing *timing)
1108{
1109 int i, modes = 0;
1110 struct drm_display_mode *newmode;
1111 struct drm_device *dev = connector->dev;
1112
1113 for (i = 0; i < num_extra_modes; i++) {
1114 const struct minimode *m = &extra_modes[i];
1115 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
fc48f169
TI
1116 if (!newmode)
1117 return modes;
b309bd37 1118
c09dedb7 1119 fixup_mode_1366x768(newmode);
7b668ebe
TI
1120 if (!mode_in_range(newmode, edid, timing) ||
1121 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1122 drm_mode_destroy(dev, newmode);
1123 continue;
1124 }
1125
1126 drm_mode_probed_add(connector, newmode);
1127 modes++;
1128 }
1129
1130 return modes;
1131}
1132
1133static int
1134drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1135 struct detailed_timing *timing)
1136{
1137 int i, modes = 0;
1138 struct drm_display_mode *newmode;
1139 struct drm_device *dev = connector->dev;
1140 bool rb = drm_monitor_supports_rb(edid);
1141
1142 for (i = 0; i < num_extra_modes; i++) {
1143 const struct minimode *m = &extra_modes[i];
1144 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
fc48f169
TI
1145 if (!newmode)
1146 return modes;
b309bd37 1147
c09dedb7 1148 fixup_mode_1366x768(newmode);
7b668ebe
TI
1149 if (!mode_in_range(newmode, edid, timing) ||
1150 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1151 drm_mode_destroy(dev, newmode);
1152 continue;
1153 }
1154
1155 drm_mode_probed_add(connector, newmode);
1156 modes++;
1157 }
1158
1159 return modes;
1160}
1161
13931579
AJ
1162static void
1163do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1164{
13931579
AJ
1165 struct detailed_mode_closure *closure = c;
1166 struct detailed_non_pixel *data = &timing->data.other_data;
b309bd37 1167 struct detailed_data_monitor_range *range = &data->data.range;
9340d8cf 1168
cb21aafe
AJ
1169 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1170 return;
1171
1172 closure->modes += drm_dmt_modes_for_range(closure->connector,
1173 closure->edid,
1174 timing);
b309bd37
AJ
1175
1176 if (!version_greater(closure->edid, 1, 1))
1177 return; /* GTF not defined yet */
1178
1179 switch (range->flags) {
1180 case 0x02: /* secondary gtf, XXX could do more */
1181 case 0x00: /* default gtf */
1182 closure->modes += drm_gtf_modes_for_range(closure->connector,
1183 closure->edid,
1184 timing);
1185 break;
1186 case 0x04: /* cvt, only in 1.4+ */
1187 if (!version_greater(closure->edid, 1, 3))
1188 break;
1189
1190 closure->modes += drm_cvt_modes_for_range(closure->connector,
1191 closure->edid,
1192 timing);
1193 break;
1194 case 0x01: /* just the ranges, no formula */
1195 default:
1196 break;
1197 }
13931579 1198}
69da3015 1199
13931579
AJ
1200static int
1201add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1202{
1203 struct detailed_mode_closure closure = {
1204 connector, edid, 0, 0, 0
1205 };
9340d8cf 1206
13931579
AJ
1207 if (version_greater(edid, 1, 0))
1208 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1209 &closure);
9340d8cf 1210
13931579 1211 return closure.modes;
9340d8cf
AJ
1212}
1213
2255be14
AJ
1214static int
1215drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1216{
1217 int i, j, m, modes = 0;
1218 struct drm_display_mode *mode;
1219 u8 *est = ((u8 *)timing) + 5;
1220
1221 for (i = 0; i < 6; i++) {
1222 for (j = 7; j > 0; j--) {
1223 m = (i * 8) + (7 - j);
3c581411 1224 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1225 break;
1226 if (est[i] & (1 << j)) {
1d42bbc8
DA
1227 mode = drm_mode_find_dmt(connector->dev,
1228 est3_modes[m].w,
1229 est3_modes[m].h,
f6e252ba
AJ
1230 est3_modes[m].r,
1231 est3_modes[m].rb);
2255be14
AJ
1232 if (mode) {
1233 drm_mode_probed_add(connector, mode);
1234 modes++;
1235 }
1236 }
1237 }
1238 }
1239
1240 return modes;
1241}
1242
13931579
AJ
1243static void
1244do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1245{
13931579 1246 struct detailed_mode_closure *closure = c;
9cf00977 1247 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1248
13931579
AJ
1249 if (data->type == EDID_DETAIL_EST_TIMINGS)
1250 closure->modes += drm_est3_modes(closure->connector, timing);
1251}
9cf00977 1252
13931579
AJ
1253/**
1254 * add_established_modes - get est. modes from EDID and add them
1255 * @edid: EDID block to scan
1256 *
1257 * Each EDID block contains a bitmap of the supported "established modes" list
1258 * (defined above). Tease them out and add them to the global modes list.
1259 */
1260static int
1261add_established_modes(struct drm_connector *connector, struct edid *edid)
1262{
1263 struct drm_device *dev = connector->dev;
1264 unsigned long est_bits = edid->established_timings.t1 |
1265 (edid->established_timings.t2 << 8) |
1266 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1267 int i, modes = 0;
1268 struct detailed_mode_closure closure = {
1269 connector, edid, 0, 0, 0
1270 };
9cf00977 1271
13931579
AJ
1272 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1273 if (est_bits & (1<<i)) {
1274 struct drm_display_mode *newmode;
1275 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1276 if (newmode) {
1277 drm_mode_probed_add(connector, newmode);
1278 modes++;
1279 }
1280 }
9cf00977
AJ
1281 }
1282
13931579
AJ
1283 if (version_greater(edid, 1, 0))
1284 drm_for_each_detailed_block((u8 *)edid,
1285 do_established_modes, &closure);
1286
1287 return modes + closure.modes;
1288}
1289
1290static void
1291do_standard_modes(struct detailed_timing *timing, void *c)
1292{
1293 struct detailed_mode_closure *closure = c;
1294 struct detailed_non_pixel *data = &timing->data.other_data;
1295 struct drm_connector *connector = closure->connector;
1296 struct edid *edid = closure->edid;
1297
1298 if (data->type == EDID_DETAIL_STD_MODES) {
1299 int i;
9cf00977
AJ
1300 for (i = 0; i < 6; i++) {
1301 struct std_timing *std;
1302 struct drm_display_mode *newmode;
1303
1304 std = &data->data.timings[i];
7a374350
AJ
1305 newmode = drm_mode_std(connector, edid, std,
1306 edid->revision);
9cf00977
AJ
1307 if (newmode) {
1308 drm_mode_probed_add(connector, newmode);
13931579 1309 closure->modes++;
9cf00977
AJ
1310 }
1311 }
9cf00977 1312 }
9cf00977
AJ
1313}
1314
f453ba04 1315/**
13931579 1316 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1317 * @edid: EDID block to scan
f453ba04 1318 *
13931579
AJ
1319 * Standard modes can be calculated using the appropriate standard (DMT,
1320 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1321 */
13931579
AJ
1322static int
1323add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1324{
9cf00977 1325 int i, modes = 0;
13931579
AJ
1326 struct detailed_mode_closure closure = {
1327 connector, edid, 0, 0, 0
1328 };
1329
1330 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1331 struct drm_display_mode *newmode;
1332
1333 newmode = drm_mode_std(connector, edid,
1334 &edid->standard_timings[i],
1335 edid->revision);
1336 if (newmode) {
1337 drm_mode_probed_add(connector, newmode);
1338 modes++;
1339 }
1340 }
1341
1342 if (version_greater(edid, 1, 0))
1343 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1344 &closure);
1345
1346 /* XXX should also look for standard codes in VTB blocks */
1347
1348 return modes + closure.modes;
1349}
f453ba04 1350
13931579
AJ
1351static int drm_cvt_modes(struct drm_connector *connector,
1352 struct detailed_timing *timing)
1353{
1354 int i, j, modes = 0;
1355 struct drm_display_mode *newmode;
1356 struct drm_device *dev = connector->dev;
1357 struct cvt_timing *cvt;
1358 const int rates[] = { 60, 85, 75, 60, 50 };
1359 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1360
13931579
AJ
1361 for (i = 0; i < 4; i++) {
1362 int uninitialized_var(width), height;
1363 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1364
13931579 1365 if (!memcmp(cvt->code, empty, 3))
9cf00977 1366 continue;
f453ba04 1367
13931579
AJ
1368 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1369 switch (cvt->code[1] & 0x0c) {
1370 case 0x00:
1371 width = height * 4 / 3;
1372 break;
1373 case 0x04:
1374 width = height * 16 / 9;
1375 break;
1376 case 0x08:
1377 width = height * 16 / 10;
1378 break;
1379 case 0x0c:
1380 width = height * 15 / 9;
1381 break;
1382 }
1383
1384 for (j = 1; j < 5; j++) {
1385 if (cvt->code[2] & (1 << j)) {
1386 newmode = drm_cvt_mode(dev, width, height,
1387 rates[j], j == 0,
1388 false, false);
1389 if (newmode) {
1390 drm_mode_probed_add(connector, newmode);
1391 modes++;
1392 }
1393 }
1394 }
f453ba04
DA
1395 }
1396
1397 return modes;
1398}
9cf00977 1399
13931579
AJ
1400static void
1401do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1402{
13931579
AJ
1403 struct detailed_mode_closure *closure = c;
1404 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1405
13931579
AJ
1406 if (data->type == EDID_DETAIL_CVT_3BYTE)
1407 closure->modes += drm_cvt_modes(closure->connector, timing);
1408}
882f0219 1409
13931579
AJ
1410static int
1411add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1412{
1413 struct detailed_mode_closure closure = {
1414 connector, edid, 0, 0, 0
1415 };
882f0219 1416
13931579
AJ
1417 if (version_greater(edid, 1, 2))
1418 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1419
13931579 1420 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1421
13931579
AJ
1422 return closure.modes;
1423}
1424
1425static void
1426do_detailed_mode(struct detailed_timing *timing, void *c)
1427{
1428 struct detailed_mode_closure *closure = c;
1429 struct drm_display_mode *newmode;
1430
1431 if (timing->pixel_clock) {
1432 newmode = drm_mode_detailed(closure->connector->dev,
1433 closure->edid, timing,
1434 closure->quirks);
1435 if (!newmode)
1436 return;
1437
1438 if (closure->preferred)
1439 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1440
1441 drm_mode_probed_add(closure->connector, newmode);
1442 closure->modes++;
1443 closure->preferred = 0;
882f0219 1444 }
13931579 1445}
882f0219 1446
13931579
AJ
1447/*
1448 * add_detailed_modes - Add modes from detailed timings
1449 * @connector: attached connector
1450 * @edid: EDID block to scan
1451 * @quirks: quirks to apply
1452 */
1453static int
1454add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1455 u32 quirks)
1456{
1457 struct detailed_mode_closure closure = {
1458 connector,
1459 edid,
1460 1,
1461 quirks,
1462 0
1463 };
1464
1465 if (closure.preferred && !version_greater(edid, 1, 3))
1466 closure.preferred =
1467 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1468
1469 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1470
1471 return closure.modes;
882f0219 1472}
f453ba04 1473
f23c20c8 1474#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1475#define AUDIO_BLOCK 0x01
54ac76f8 1476#define VIDEO_BLOCK 0x02
f23c20c8 1477#define VENDOR_BLOCK 0x03
76adaa34 1478#define SPEAKER_BLOCK 0x04
8fe9790d 1479#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1480#define EDID_CEA_YCRCB444 (1 << 5)
1481#define EDID_CEA_YCRCB422 (1 << 4)
8fe9790d 1482
f23c20c8 1483/**
8fe9790d 1484 * Search EDID for CEA extension block.
f23c20c8 1485 */
eccaca28 1486u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1487{
8fe9790d
ZW
1488 u8 *edid_ext = NULL;
1489 int i;
f23c20c8
ML
1490
1491 /* No EDID or EDID extensions */
1492 if (edid == NULL || edid->extensions == 0)
8fe9790d 1493 return NULL;
f23c20c8 1494
f23c20c8 1495 /* Find CEA extension */
7466f4cc 1496 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1497 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1498 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1499 break;
1500 }
1501
7466f4cc 1502 if (i == edid->extensions)
8fe9790d
ZW
1503 return NULL;
1504
1505 return edid_ext;
1506}
eccaca28 1507EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1508
54ac76f8
CS
1509static int
1510do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1511{
1512 struct drm_device *dev = connector->dev;
1513 u8 * mode, cea_mode;
1514 int modes = 0;
1515
1516 for (mode = db; mode < db + len; mode++) {
1517 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1518 if (cea_mode < drm_num_cea_modes) {
1519 struct drm_display_mode *newmode;
1520 newmode = drm_mode_duplicate(dev,
1521 &edid_cea_modes[cea_mode]);
1522 if (newmode) {
1523 drm_mode_probed_add(connector, newmode);
1524 modes++;
1525 }
1526 }
1527 }
1528
1529 return modes;
1530}
1531
9e50b9d5
VS
1532static int
1533cea_db_payload_len(const u8 *db)
1534{
1535 return db[0] & 0x1f;
1536}
1537
1538static int
1539cea_db_tag(const u8 *db)
1540{
1541 return db[0] >> 5;
1542}
1543
1544static int
1545cea_revision(const u8 *cea)
1546{
1547 return cea[1];
1548}
1549
1550static int
1551cea_db_offsets(const u8 *cea, int *start, int *end)
1552{
1553 /* Data block offset in CEA extension block */
1554 *start = 4;
1555 *end = cea[2];
1556 if (*end == 0)
1557 *end = 127;
1558 if (*end < 4 || *end > 127)
1559 return -ERANGE;
1560 return 0;
1561}
1562
1563#define for_each_cea_db(cea, i, start, end) \
1564 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
1565
54ac76f8
CS
1566static int
1567add_cea_modes(struct drm_connector *connector, struct edid *edid)
1568{
1569 u8 * cea = drm_find_cea_extension(edid);
1570 u8 * db, dbl;
1571 int modes = 0;
1572
9e50b9d5
VS
1573 if (cea && cea_revision(cea) >= 3) {
1574 int i, start, end;
1575
1576 if (cea_db_offsets(cea, &start, &end))
1577 return 0;
1578
1579 for_each_cea_db(cea, i, start, end) {
1580 db = &cea[i];
1581 dbl = cea_db_payload_len(db);
1582
1583 if (cea_db_tag(db) == VIDEO_BLOCK)
54ac76f8
CS
1584 modes += do_cea_modes (connector, db+1, dbl);
1585 }
1586 }
1587
1588 return modes;
1589}
1590
76adaa34 1591static void
8504072a 1592parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
76adaa34 1593{
8504072a 1594 u8 len = cea_db_payload_len(db);
76adaa34 1595
8504072a
VS
1596 if (len >= 6) {
1597 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1598 connector->dvi_dual = db[6] & 1;
1599 }
1600 if (len >= 7)
1601 connector->max_tmds_clock = db[7] * 5;
1602 if (len >= 8) {
1603 connector->latency_present[0] = db[8] >> 7;
1604 connector->latency_present[1] = (db[8] >> 6) & 1;
1605 }
1606 if (len >= 9)
1607 connector->video_latency[0] = db[9];
1608 if (len >= 10)
1609 connector->audio_latency[0] = db[10];
1610 if (len >= 11)
1611 connector->video_latency[1] = db[11];
1612 if (len >= 12)
1613 connector->audio_latency[1] = db[12];
76adaa34
WF
1614
1615 DRM_LOG_KMS("HDMI: DVI dual %d, "
1616 "max TMDS clock %d, "
1617 "latency present %d %d, "
1618 "video latency %d %d, "
1619 "audio latency %d %d\n",
1620 connector->dvi_dual,
1621 connector->max_tmds_clock,
1622 (int) connector->latency_present[0],
1623 (int) connector->latency_present[1],
1624 connector->video_latency[0],
1625 connector->video_latency[1],
1626 connector->audio_latency[0],
1627 connector->audio_latency[1]);
1628}
1629
1630static void
1631monitor_name(struct detailed_timing *t, void *data)
1632{
1633 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1634 *(u8 **)data = t->data.other_data.data.str.str;
1635}
1636
14f77fdd
VS
1637static bool cea_db_is_hdmi_vsdb(const u8 *db)
1638{
1639 int hdmi_id;
1640
1641 if (cea_db_tag(db) != VENDOR_BLOCK)
1642 return false;
1643
1644 if (cea_db_payload_len(db) < 5)
1645 return false;
1646
1647 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
1648
1649 return hdmi_id == HDMI_IDENTIFIER;
1650}
1651
76adaa34
WF
1652/**
1653 * drm_edid_to_eld - build ELD from EDID
1654 * @connector: connector corresponding to the HDMI/DP sink
1655 * @edid: EDID to parse
1656 *
1657 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1658 * Some ELD fields are left to the graphics driver caller:
1659 * - Conn_Type
1660 * - HDCP
1661 * - Port_ID
1662 */
1663void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1664{
1665 uint8_t *eld = connector->eld;
1666 u8 *cea;
1667 u8 *name;
1668 u8 *db;
1669 int sad_count = 0;
1670 int mnl;
1671 int dbl;
1672
1673 memset(eld, 0, sizeof(connector->eld));
1674
1675 cea = drm_find_cea_extension(edid);
1676 if (!cea) {
1677 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1678 return;
1679 }
1680
1681 name = NULL;
1682 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1683 for (mnl = 0; name && mnl < 13; mnl++) {
1684 if (name[mnl] == 0x0a)
1685 break;
1686 eld[20 + mnl] = name[mnl];
1687 }
1688 eld[4] = (cea[1] << 5) | mnl;
1689 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1690
1691 eld[0] = 2 << 3; /* ELD version: 2 */
1692
1693 eld[16] = edid->mfg_id[0];
1694 eld[17] = edid->mfg_id[1];
1695 eld[18] = edid->prod_code[0];
1696 eld[19] = edid->prod_code[1];
1697
9e50b9d5
VS
1698 if (cea_revision(cea) >= 3) {
1699 int i, start, end;
1700
1701 if (cea_db_offsets(cea, &start, &end)) {
1702 start = 0;
1703 end = 0;
1704 }
1705
1706 for_each_cea_db(cea, i, start, end) {
1707 db = &cea[i];
1708 dbl = cea_db_payload_len(db);
1709
1710 switch (cea_db_tag(db)) {
a0ab734d
CS
1711 case AUDIO_BLOCK:
1712 /* Audio Data Block, contains SADs */
1713 sad_count = dbl / 3;
9e50b9d5
VS
1714 if (dbl >= 1)
1715 memcpy(eld + 20 + mnl, &db[1], dbl);
a0ab734d
CS
1716 break;
1717 case SPEAKER_BLOCK:
9e50b9d5
VS
1718 /* Speaker Allocation Data Block */
1719 if (dbl >= 1)
1720 eld[7] = db[1];
a0ab734d
CS
1721 break;
1722 case VENDOR_BLOCK:
1723 /* HDMI Vendor-Specific Data Block */
14f77fdd 1724 if (cea_db_is_hdmi_vsdb(db))
a0ab734d
CS
1725 parse_hdmi_vsdb(connector, db);
1726 break;
1727 default:
1728 break;
1729 }
76adaa34 1730 }
9e50b9d5 1731 }
76adaa34
WF
1732 eld[5] |= sad_count << 4;
1733 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1734
1735 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1736}
1737EXPORT_SYMBOL(drm_edid_to_eld);
1738
1739/**
1740 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1741 * @connector: connector associated with the HDMI/DP sink
1742 * @mode: the display mode
1743 */
1744int drm_av_sync_delay(struct drm_connector *connector,
1745 struct drm_display_mode *mode)
1746{
1747 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1748 int a, v;
1749
1750 if (!connector->latency_present[0])
1751 return 0;
1752 if (!connector->latency_present[1])
1753 i = 0;
1754
1755 a = connector->audio_latency[i];
1756 v = connector->video_latency[i];
1757
1758 /*
1759 * HDMI/DP sink doesn't support audio or video?
1760 */
1761 if (a == 255 || v == 255)
1762 return 0;
1763
1764 /*
1765 * Convert raw EDID values to millisecond.
1766 * Treat unknown latency as 0ms.
1767 */
1768 if (a)
1769 a = min(2 * (a - 1), 500);
1770 if (v)
1771 v = min(2 * (v - 1), 500);
1772
1773 return max(v - a, 0);
1774}
1775EXPORT_SYMBOL(drm_av_sync_delay);
1776
1777/**
1778 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1779 * @encoder: the encoder just changed display mode
1780 * @mode: the adjusted display mode
1781 *
1782 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1783 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1784 */
1785struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1786 struct drm_display_mode *mode)
1787{
1788 struct drm_connector *connector;
1789 struct drm_device *dev = encoder->dev;
1790
1791 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1792 if (connector->encoder == encoder && connector->eld[0])
1793 return connector;
1794
1795 return NULL;
1796}
1797EXPORT_SYMBOL(drm_select_eld);
1798
8fe9790d
ZW
1799/**
1800 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1801 * @edid: monitor EDID information
1802 *
1803 * Parse the CEA extension according to CEA-861-B.
1804 * Return true if HDMI, false if not or unknown.
1805 */
1806bool drm_detect_hdmi_monitor(struct edid *edid)
1807{
1808 u8 *edid_ext;
14f77fdd 1809 int i;
8fe9790d 1810 int start_offset, end_offset;
8fe9790d
ZW
1811
1812 edid_ext = drm_find_cea_extension(edid);
1813 if (!edid_ext)
14f77fdd 1814 return false;
f23c20c8 1815
9e50b9d5 1816 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
14f77fdd 1817 return false;
f23c20c8
ML
1818
1819 /*
1820 * Because HDMI identifier is in Vendor Specific Block,
1821 * search it from all data blocks of CEA extension.
1822 */
9e50b9d5 1823 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
14f77fdd
VS
1824 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
1825 return true;
f23c20c8
ML
1826 }
1827
14f77fdd 1828 return false;
f23c20c8
ML
1829}
1830EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1831
8fe9790d
ZW
1832/**
1833 * drm_detect_monitor_audio - check monitor audio capability
1834 *
1835 * Monitor should have CEA extension block.
1836 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1837 * audio' only. If there is any audio extension block and supported
1838 * audio format, assume at least 'basic audio' support, even if 'basic
1839 * audio' is not defined in EDID.
1840 *
1841 */
1842bool drm_detect_monitor_audio(struct edid *edid)
1843{
1844 u8 *edid_ext;
1845 int i, j;
1846 bool has_audio = false;
1847 int start_offset, end_offset;
1848
1849 edid_ext = drm_find_cea_extension(edid);
1850 if (!edid_ext)
1851 goto end;
1852
1853 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1854
1855 if (has_audio) {
1856 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1857 goto end;
1858 }
1859
9e50b9d5
VS
1860 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1861 goto end;
8fe9790d 1862
9e50b9d5
VS
1863 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1864 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
8fe9790d 1865 has_audio = true;
9e50b9d5 1866 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
8fe9790d
ZW
1867 DRM_DEBUG_KMS("CEA audio format %d\n",
1868 (edid_ext[i + j] >> 3) & 0xf);
1869 goto end;
1870 }
1871 }
1872end:
1873 return has_audio;
1874}
1875EXPORT_SYMBOL(drm_detect_monitor_audio);
1876
3b11228b
JB
1877/**
1878 * drm_add_display_info - pull display info out if present
1879 * @edid: EDID data
1880 * @info: display info (attached to connector)
1881 *
1882 * Grab any available display info and stuff it into the drm_display_info
1883 * structure that's part of the connector. Useful for tracking bpp and
1884 * color spaces.
1885 */
1886static void drm_add_display_info(struct edid *edid,
1887 struct drm_display_info *info)
1888{
ebec9a7b
JB
1889 u8 *edid_ext;
1890
3b11228b
JB
1891 info->width_mm = edid->width_cm * 10;
1892 info->height_mm = edid->height_cm * 10;
1893
1894 /* driver figures it out in this case */
1895 info->bpc = 0;
da05a5a7 1896 info->color_formats = 0;
3b11228b 1897
a988bc72 1898 if (edid->revision < 3)
3b11228b
JB
1899 return;
1900
1901 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1902 return;
1903
a988bc72
LPC
1904 /* Get data from CEA blocks if present */
1905 edid_ext = drm_find_cea_extension(edid);
1906 if (edid_ext) {
1907 info->cea_rev = edid_ext[1];
1908
1909 /* The existence of a CEA block should imply RGB support */
1910 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1911 if (edid_ext[3] & EDID_CEA_YCRCB444)
1912 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1913 if (edid_ext[3] & EDID_CEA_YCRCB422)
1914 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1915 }
1916
1917 /* Only defined for 1.4 with digital displays */
1918 if (edid->revision < 4)
1919 return;
1920
3b11228b
JB
1921 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1922 case DRM_EDID_DIGITAL_DEPTH_6:
1923 info->bpc = 6;
1924 break;
1925 case DRM_EDID_DIGITAL_DEPTH_8:
1926 info->bpc = 8;
1927 break;
1928 case DRM_EDID_DIGITAL_DEPTH_10:
1929 info->bpc = 10;
1930 break;
1931 case DRM_EDID_DIGITAL_DEPTH_12:
1932 info->bpc = 12;
1933 break;
1934 case DRM_EDID_DIGITAL_DEPTH_14:
1935 info->bpc = 14;
1936 break;
1937 case DRM_EDID_DIGITAL_DEPTH_16:
1938 info->bpc = 16;
1939 break;
1940 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1941 default:
1942 info->bpc = 0;
1943 break;
1944 }
da05a5a7 1945
a988bc72 1946 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
1947 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1948 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1949 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1950 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
1951}
1952
f453ba04
DA
1953/**
1954 * drm_add_edid_modes - add modes from EDID data, if available
1955 * @connector: connector we're probing
1956 * @edid: edid data
1957 *
1958 * Add the specified modes to the connector's mode list.
1959 *
1960 * Return number of modes added or 0 if we couldn't find any.
1961 */
1962int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1963{
1964 int num_modes = 0;
1965 u32 quirks;
1966
1967 if (edid == NULL) {
1968 return 0;
1969 }
3c537889 1970 if (!drm_edid_is_valid(edid)) {
dcdb1674 1971 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1972 drm_get_connector_name(connector));
1973 return 0;
1974 }
1975
1976 quirks = edid_get_quirks(edid);
1977
c867df70
AJ
1978 /*
1979 * EDID spec says modes should be preferred in this order:
1980 * - preferred detailed mode
1981 * - other detailed modes from base block
1982 * - detailed modes from extension blocks
1983 * - CVT 3-byte code modes
1984 * - standard timing codes
1985 * - established timing codes
1986 * - modes inferred from GTF or CVT range information
1987 *
13931579 1988 * We get this pretty much right.
c867df70
AJ
1989 *
1990 * XXX order for additional mode types in extension blocks?
1991 */
13931579
AJ
1992 num_modes += add_detailed_modes(connector, edid, quirks);
1993 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1994 num_modes += add_standard_modes(connector, edid);
1995 num_modes += add_established_modes(connector, edid);
13931579 1996 num_modes += add_inferred_modes(connector, edid);
54ac76f8 1997 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
1998
1999 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2000 edid_fixup_preferred(connector, quirks);
2001
3b11228b 2002 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
2003
2004 return num_modes;
2005}
2006EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
2007
2008/**
2009 * drm_add_modes_noedid - add modes for the connectors without EDID
2010 * @connector: connector we're probing
2011 * @hdisplay: the horizontal display limit
2012 * @vdisplay: the vertical display limit
2013 *
2014 * Add the specified modes to the connector's mode list. Only when the
2015 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2016 *
2017 * Return number of modes added or 0 if we couldn't find any.
2018 */
2019int drm_add_modes_noedid(struct drm_connector *connector,
2020 int hdisplay, int vdisplay)
2021{
2022 int i, count, num_modes = 0;
b1f559ec 2023 struct drm_display_mode *mode;
f0fda0a4
ZY
2024 struct drm_device *dev = connector->dev;
2025
2026 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2027 if (hdisplay < 0)
2028 hdisplay = 0;
2029 if (vdisplay < 0)
2030 vdisplay = 0;
2031
2032 for (i = 0; i < count; i++) {
b1f559ec 2033 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
2034 if (hdisplay && vdisplay) {
2035 /*
2036 * Only when two are valid, they will be used to check
2037 * whether the mode should be added to the mode list of
2038 * the connector.
2039 */
2040 if (ptr->hdisplay > hdisplay ||
2041 ptr->vdisplay > vdisplay)
2042 continue;
2043 }
f985dedb
AJ
2044 if (drm_mode_vrefresh(ptr) > 61)
2045 continue;
f0fda0a4
ZY
2046 mode = drm_mode_duplicate(dev, ptr);
2047 if (mode) {
2048 drm_mode_probed_add(connector, mode);
2049 num_modes++;
2050 }
2051 }
2052 return num_modes;
2053}
2054EXPORT_SYMBOL(drm_add_modes_noedid);