]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/gpu/drm/drm_edid.c
drm/radeon: fix rare segfault
[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
47819ba2 33#include <linux/module.h>
f453ba04
DA
34#include "drmP.h"
35#include "drm_edid.h"
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
d1ff6409
AJ
42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
DA
45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
bc42aabc
AJ
69/* Force reduced-blanking timings for detailed modes */
70#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
3c537889 71
13931579
AJ
72struct detailed_mode_closure {
73 struct drm_connector *connector;
74 struct edid *edid;
75 bool preferred;
76 u32 quirks;
77 int modes;
78};
f453ba04 79
5c61259e
ZY
80#define LEVEL_DMT 0
81#define LEVEL_GTF 1
7a374350
AJ
82#define LEVEL_GTF2 2
83#define LEVEL_CVT 3
5c61259e 84
f453ba04 85static struct edid_quirk {
c51a3fd6 86 char vendor[4];
f453ba04
DA
87 int product_id;
88 u32 quirks;
89} edid_quirk_list[] = {
90 /* Acer AL1706 */
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Acer F51 */
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
94 /* Unknown Acer */
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
96
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
100
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
ba1163de
AJ
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
105
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
109
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
113
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
116
117 /* Proview AY765C */
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
119
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
bc42aabc
AJ
125
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
f453ba04
DA
128};
129
61e57a8d 130/*** DDC fetch and block validation ***/
f453ba04 131
083ae056
AJ
132static const u8 edid_header[] = {
133 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
134};
f453ba04 135
051963d4
TR
136 /*
137 * Sanity check the header of the base EDID block. Return 8 if the header
138 * is perfect, down to 0 if it's totally wrong.
139 */
140int drm_edid_header_is_valid(const u8 *raw_edid)
141{
142 int i, score = 0;
143
144 for (i = 0; i < sizeof(edid_header); i++)
145 if (raw_edid[i] == edid_header[i])
146 score++;
147
148 return score;
149}
150EXPORT_SYMBOL(drm_edid_header_is_valid);
151
47819ba2
AJ
152static int edid_fixup __read_mostly = 6;
153module_param_named(edid_fixup, edid_fixup, int, 0400);
154MODULE_PARM_DESC(edid_fixup,
155 "Minimum number of valid EDID header bytes (0-8, default 6)");
051963d4 156
61e57a8d
AJ
157/*
158 * Sanity check the EDID block (base or extension). Return 0 if the block
159 * doesn't check out, or 1 if it's valid.
f453ba04 160 */
f89ec8a4 161bool drm_edid_block_valid(u8 *raw_edid, int block)
f453ba04 162{
61e57a8d 163 int i;
f453ba04 164 u8 csum = 0;
61e57a8d 165 struct edid *edid = (struct edid *)raw_edid;
f453ba04 166
47819ba2
AJ
167 if (edid_fixup > 8 || edid_fixup < 0)
168 edid_fixup = 6;
169
f89ec8a4 170 if (block == 0) {
051963d4 171 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d 172 if (score == 8) ;
47819ba2 173 else if (score >= edid_fixup) {
61e57a8d
AJ
174 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
175 memcpy(raw_edid, edid_header, sizeof(edid_header));
176 } else {
177 goto bad;
178 }
179 }
f453ba04
DA
180
181 for (i = 0; i < EDID_LENGTH; i++)
182 csum += raw_edid[i];
183 if (csum) {
184 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
4a638b4e
AJ
185
186 /* allow CEA to slide through, switches mangle this */
187 if (raw_edid[0] != 0x02)
188 goto bad;
f453ba04
DA
189 }
190
61e57a8d
AJ
191 /* per-block-type checks */
192 switch (raw_edid[0]) {
193 case 0: /* base */
194 if (edid->version != 1) {
195 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
196 goto bad;
197 }
862b89c0 198
61e57a8d
AJ
199 if (edid->revision > 4)
200 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
201 break;
862b89c0 202
61e57a8d
AJ
203 default:
204 break;
205 }
47ee4ccf 206
f453ba04
DA
207 return 1;
208
209bad:
210 if (raw_edid) {
f49dadb8 211 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
212 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
213 raw_edid, EDID_LENGTH, false);
f453ba04
DA
214 }
215 return 0;
216}
da0df92b 217EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
AJ
218
219/**
220 * drm_edid_is_valid - sanity check EDID data
221 * @edid: EDID data
222 *
223 * Sanity-check an entire EDID record (including extensions)
224 */
225bool drm_edid_is_valid(struct edid *edid)
226{
227 int i;
228 u8 *raw = (u8 *)edid;
229
230 if (!edid)
231 return false;
232
233 for (i = 0; i <= edid->extensions; i++)
f89ec8a4 234 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))
61e57a8d
AJ
235 return false;
236
237 return true;
238}
3c537889 239EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 240
61e57a8d
AJ
241#define DDC_SEGMENT_ADDR 0x30
242/**
243 * Get EDID information via I2C.
244 *
245 * \param adapter : i2c device adaptor
246 * \param buf : EDID data buffer to be filled
247 * \param len : EDID data buffer length
248 * \return 0 on success or -1 on failure.
249 *
250 * Try to fetch EDID information by calling i2c driver function.
251 */
252static int
253drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
254 int block, int len)
255{
256 unsigned char start = block * EDID_LENGTH;
4819d2e4
CW
257 int ret, retries = 5;
258
259 /* The core i2c driver will automatically retry the transfer if the
260 * adapter reports EAGAIN. However, we find that bit-banging transfers
261 * are susceptible to errors under a heavily loaded machine and
262 * generate spurious NAKs and timeouts. Retrying the transfer
263 * of the individual block a few times seems to overcome this.
264 */
265 do {
266 struct i2c_msg msgs[] = {
267 {
268 .addr = DDC_ADDR,
269 .flags = 0,
270 .len = 1,
271 .buf = &start,
272 }, {
273 .addr = DDC_ADDR,
274 .flags = I2C_M_RD,
275 .len = len,
276 .buf = buf,
277 }
278 };
279 ret = i2c_transfer(adapter, msgs, 2);
9292f37e
ED
280 if (ret == -ENXIO) {
281 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
282 adapter->name);
283 break;
284 }
4819d2e4
CW
285 } while (ret != 2 && --retries);
286
287 return ret == 2 ? 0 : -1;
61e57a8d
AJ
288}
289
4a9a8b71
DA
290static bool drm_edid_is_zero(u8 *in_edid, int length)
291{
292 int i;
293 u32 *raw_edid = (u32 *)in_edid;
294
295 for (i = 0; i < length / 4; i++)
296 if (*(raw_edid + i) != 0)
297 return false;
298 return true;
299}
300
61e57a8d
AJ
301static u8 *
302drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
303{
0ea75e23 304 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
305 u8 *block, *new;
306
307 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
308 return NULL;
309
310 /* base block fetch */
311 for (i = 0; i < 4; i++) {
312 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
313 goto out;
f89ec8a4 314 if (drm_edid_block_valid(block, 0))
61e57a8d 315 break;
4a9a8b71
DA
316 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
317 connector->null_edid_counter++;
318 goto carp;
319 }
61e57a8d
AJ
320 }
321 if (i == 4)
322 goto carp;
323
324 /* if there's no extensions, we're done */
325 if (block[0x7e] == 0)
326 return block;
327
328 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
329 if (!new)
330 goto out;
331 block = new;
332
333 for (j = 1; j <= block[0x7e]; j++) {
334 for (i = 0; i < 4; i++) {
0ea75e23
ST
335 if (drm_do_probe_ddc_edid(adapter,
336 block + (valid_extensions + 1) * EDID_LENGTH,
337 j, EDID_LENGTH))
61e57a8d 338 goto out;
f89ec8a4 339 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) {
0ea75e23 340 valid_extensions++;
61e57a8d 341 break;
0ea75e23 342 }
61e57a8d
AJ
343 }
344 if (i == 4)
0ea75e23
ST
345 dev_warn(connector->dev->dev,
346 "%s: Ignoring invalid EDID block %d.\n",
347 drm_get_connector_name(connector), j);
348 }
349
350 if (valid_extensions != block[0x7e]) {
351 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
352 block[0x7e] = valid_extensions;
353 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
354 if (!new)
355 goto out;
356 block = new;
61e57a8d
AJ
357 }
358
359 return block;
360
361carp:
dcdb1674 362 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
363 drm_get_connector_name(connector), j);
364
365out:
366 kfree(block);
367 return NULL;
368}
369
370/**
371 * Probe DDC presence.
372 *
373 * \param adapter : i2c device adaptor
374 * \return 1 on success
375 */
376static bool
377drm_probe_ddc(struct i2c_adapter *adapter)
378{
379 unsigned char out;
380
381 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
382}
383
384/**
385 * drm_get_edid - get EDID data, if available
386 * @connector: connector we're probing
387 * @adapter: i2c adapter to use for DDC
388 *
389 * Poke the given i2c channel to grab EDID data if possible. If found,
390 * attach it to the connector.
391 *
392 * Return edid data or NULL if we couldn't find any.
393 */
394struct edid *drm_get_edid(struct drm_connector *connector,
395 struct i2c_adapter *adapter)
396{
397 struct edid *edid = NULL;
398
399 if (drm_probe_ddc(adapter))
400 edid = (struct edid *)drm_do_get_edid(connector, adapter);
401
402 connector->display_info.raw_edid = (char *)edid;
403
404 return edid;
405
406}
407EXPORT_SYMBOL(drm_get_edid);
408
409/*** EDID parsing ***/
410
f453ba04
DA
411/**
412 * edid_vendor - match a string against EDID's obfuscated vendor field
413 * @edid: EDID to match
414 * @vendor: vendor string
415 *
416 * Returns true if @vendor is in @edid, false otherwise
417 */
418static bool edid_vendor(struct edid *edid, char *vendor)
419{
420 char edid_vendor[3];
421
422 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
423 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
424 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 425 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
426
427 return !strncmp(edid_vendor, vendor, 3);
428}
429
430/**
431 * edid_get_quirks - return quirk flags for a given EDID
432 * @edid: EDID to process
433 *
434 * This tells subsequent routines what fixes they need to apply.
435 */
436static u32 edid_get_quirks(struct edid *edid)
437{
438 struct edid_quirk *quirk;
439 int i;
440
441 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
442 quirk = &edid_quirk_list[i];
443
444 if (edid_vendor(edid, quirk->vendor) &&
445 (EDID_PRODUCT_ID(edid) == quirk->product_id))
446 return quirk->quirks;
447 }
448
449 return 0;
450}
451
452#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
453#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
454
f453ba04
DA
455/**
456 * edid_fixup_preferred - set preferred modes based on quirk list
457 * @connector: has mode list to fix up
458 * @quirks: quirks list
459 *
460 * Walk the mode list for @connector, clearing the preferred status
461 * on existing modes and setting it anew for the right mode ala @quirks.
462 */
463static void edid_fixup_preferred(struct drm_connector *connector,
464 u32 quirks)
465{
466 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 467 int target_refresh = 0;
f453ba04
DA
468
469 if (list_empty(&connector->probed_modes))
470 return;
471
472 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
473 target_refresh = 60;
474 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
475 target_refresh = 75;
476
477 preferred_mode = list_first_entry(&connector->probed_modes,
478 struct drm_display_mode, head);
479
480 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
481 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
482
483 if (cur_mode == preferred_mode)
484 continue;
485
486 /* Largest mode is preferred */
487 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
488 preferred_mode = cur_mode;
489
490 /* At a given size, try to get closest to target refresh */
491 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
492 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
493 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
494 preferred_mode = cur_mode;
495 }
496 }
497
498 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
499}
500
f6e252ba
AJ
501static bool
502mode_is_rb(const struct drm_display_mode *mode)
503{
504 return (mode->htotal - mode->hdisplay == 160) &&
505 (mode->hsync_end - mode->hdisplay == 80) &&
506 (mode->hsync_end - mode->hsync_start == 32) &&
507 (mode->vsync_start - mode->vdisplay == 3);
508}
509
33c7531d
AJ
510/*
511 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
512 * @dev: Device to duplicate against
513 * @hsize: Mode width
514 * @vsize: Mode height
515 * @fresh: Mode refresh rate
f6e252ba 516 * @rb: Mode reduced-blanking-ness
33c7531d
AJ
517 *
518 * Walk the DMT mode list looking for a match for the given parameters.
519 * Return a newly allocated copy of the mode, or NULL if not found.
520 */
1d42bbc8 521struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
f6e252ba
AJ
522 int hsize, int vsize, int fresh,
523 bool rb)
559ee21d 524{
07a5e632 525 int i;
559ee21d 526
07a5e632 527 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 528 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f8b46a05
AJ
529 if (hsize != ptr->hdisplay)
530 continue;
531 if (vsize != ptr->vdisplay)
532 continue;
533 if (fresh != drm_mode_vrefresh(ptr))
534 continue;
f6e252ba
AJ
535 if (rb != mode_is_rb(ptr))
536 continue;
f8b46a05
AJ
537
538 return drm_mode_duplicate(dev, ptr);
559ee21d 539 }
f8b46a05
AJ
540
541 return NULL;
559ee21d 542}
1d42bbc8 543EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 544
d1ff6409
AJ
545typedef void detailed_cb(struct detailed_timing *timing, void *closure);
546
4d76a221
AJ
547static void
548cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
549{
550 int i, n = 0;
4966b2a9 551 u8 d = ext[0x02];
4d76a221
AJ
552 u8 *det_base = ext + d;
553
4966b2a9 554 n = (127 - d) / 18;
4d76a221
AJ
555 for (i = 0; i < n; i++)
556 cb((struct detailed_timing *)(det_base + 18 * i), closure);
557}
558
cbba98f8
AJ
559static void
560vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
561{
562 unsigned int i, n = min((int)ext[0x02], 6);
563 u8 *det_base = ext + 5;
564
565 if (ext[0x01] != 1)
566 return; /* unknown version */
567
568 for (i = 0; i < n; i++)
569 cb((struct detailed_timing *)(det_base + 18 * i), closure);
570}
571
d1ff6409
AJ
572static void
573drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
574{
575 int i;
576 struct edid *edid = (struct edid *)raw_edid;
577
578 if (edid == NULL)
579 return;
580
581 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
582 cb(&(edid->detailed_timings[i]), closure);
583
4d76a221
AJ
584 for (i = 1; i <= raw_edid[0x7e]; i++) {
585 u8 *ext = raw_edid + (i * EDID_LENGTH);
586 switch (*ext) {
587 case CEA_EXT:
588 cea_for_each_detailed_block(ext, cb, closure);
589 break;
cbba98f8
AJ
590 case VTB_EXT:
591 vtb_for_each_detailed_block(ext, cb, closure);
592 break;
4d76a221
AJ
593 default:
594 break;
595 }
596 }
d1ff6409
AJ
597}
598
599static void
600is_rb(struct detailed_timing *t, void *data)
601{
602 u8 *r = (u8 *)t;
603 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
604 if (r[15] & 0x10)
605 *(bool *)data = true;
606}
607
608/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
609static bool
610drm_monitor_supports_rb(struct edid *edid)
611{
612 if (edid->revision >= 4) {
b196a498 613 bool ret = false;
d1ff6409
AJ
614 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
615 return ret;
616 }
617
618 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
619}
620
7a374350
AJ
621static void
622find_gtf2(struct detailed_timing *t, void *data)
623{
624 u8 *r = (u8 *)t;
625 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
626 *(u8 **)data = r;
627}
628
629/* Secondary GTF curve kicks in above some break frequency */
630static int
631drm_gtf2_hbreak(struct edid *edid)
632{
633 u8 *r = NULL;
634 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
635 return r ? (r[12] * 2) : 0;
636}
637
638static int
639drm_gtf2_2c(struct edid *edid)
640{
641 u8 *r = NULL;
642 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
643 return r ? r[13] : 0;
644}
645
646static int
647drm_gtf2_m(struct edid *edid)
648{
649 u8 *r = NULL;
650 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
651 return r ? (r[15] << 8) + r[14] : 0;
652}
653
654static int
655drm_gtf2_k(struct edid *edid)
656{
657 u8 *r = NULL;
658 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
659 return r ? r[16] : 0;
660}
661
662static int
663drm_gtf2_2j(struct edid *edid)
664{
665 u8 *r = NULL;
666 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
667 return r ? r[17] : 0;
668}
669
670/**
671 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
672 * @edid: EDID block to scan
673 */
674static int standard_timing_level(struct edid *edid)
675{
676 if (edid->revision >= 2) {
677 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
678 return LEVEL_CVT;
679 if (drm_gtf2_hbreak(edid))
680 return LEVEL_GTF2;
681 return LEVEL_GTF;
682 }
683 return LEVEL_DMT;
684}
685
23425cae
AJ
686/*
687 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
688 * monitors fill with ascii space (0x20) instead.
689 */
690static int
691bad_std_timing(u8 a, u8 b)
692{
693 return (a == 0x00 && b == 0x00) ||
694 (a == 0x01 && b == 0x01) ||
695 (a == 0x20 && b == 0x20);
696}
697
f453ba04
DA
698/**
699 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
700 * @t: standard timing params
5c61259e 701 * @timing_level: standard timing level
f453ba04
DA
702 *
703 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 704 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 705 */
7ca6adb3 706static struct drm_display_mode *
7a374350
AJ
707drm_mode_std(struct drm_connector *connector, struct edid *edid,
708 struct std_timing *t, int revision)
f453ba04 709{
7ca6adb3
AJ
710 struct drm_device *dev = connector->dev;
711 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
712 int hsize, vsize;
713 int vrefresh_rate;
0454beab
MD
714 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
715 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
716 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
717 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 718 int timing_level = standard_timing_level(edid);
5c61259e 719
23425cae
AJ
720 if (bad_std_timing(t->hsize, t->vfreq_aspect))
721 return NULL;
722
5c61259e
ZY
723 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
724 hsize = t->hsize * 8 + 248;
725 /* vrefresh_rate = vfreq + 60 */
726 vrefresh_rate = vfreq + 60;
727 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
728 if (aspect_ratio == 0) {
729 if (revision < 3)
730 vsize = hsize;
731 else
732 vsize = (hsize * 10) / 16;
733 } else if (aspect_ratio == 1)
f453ba04 734 vsize = (hsize * 3) / 4;
0454beab 735 else if (aspect_ratio == 2)
f453ba04
DA
736 vsize = (hsize * 4) / 5;
737 else
738 vsize = (hsize * 9) / 16;
a0910c8e
AJ
739
740 /* HDTV hack, part 1 */
741 if (vrefresh_rate == 60 &&
742 ((hsize == 1360 && vsize == 765) ||
743 (hsize == 1368 && vsize == 769))) {
744 hsize = 1366;
745 vsize = 768;
746 }
747
7ca6adb3
AJ
748 /*
749 * If this connector already has a mode for this size and refresh
750 * rate (because it came from detailed or CVT info), use that
751 * instead. This way we don't have to guess at interlace or
752 * reduced blanking.
753 */
522032da 754 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
755 if (m->hdisplay == hsize && m->vdisplay == vsize &&
756 drm_mode_vrefresh(m) == vrefresh_rate)
757 return NULL;
758
a0910c8e
AJ
759 /* HDTV hack, part 2 */
760 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
761 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 762 false);
559ee21d 763 mode->hdisplay = 1366;
a4967de6
AJ
764 mode->hsync_start = mode->hsync_start - 1;
765 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
766 return mode;
767 }
a0910c8e 768
559ee21d 769 /* check whether it can be found in default mode table */
f6e252ba
AJ
770 if (drm_monitor_supports_rb(edid)) {
771 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
772 true);
773 if (mode)
774 return mode;
775 }
776 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
559ee21d
ZY
777 if (mode)
778 return mode;
779
f6e252ba 780 /* okay, generate it */
5c61259e
ZY
781 switch (timing_level) {
782 case LEVEL_DMT:
5c61259e
ZY
783 break;
784 case LEVEL_GTF:
785 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
786 break;
7a374350
AJ
787 case LEVEL_GTF2:
788 /*
789 * This is potentially wrong if there's ever a monitor with
790 * more than one ranges section, each claiming a different
791 * secondary GTF curve. Please don't do that.
792 */
793 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
fc48f169
TI
794 if (!mode)
795 return NULL;
7a374350 796 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 797 drm_mode_destroy(dev, mode);
7a374350
AJ
798 mode = drm_gtf_mode_complex(dev, hsize, vsize,
799 vrefresh_rate, 0, 0,
800 drm_gtf2_m(edid),
801 drm_gtf2_2c(edid),
802 drm_gtf2_k(edid),
803 drm_gtf2_2j(edid));
804 }
805 break;
5c61259e 806 case LEVEL_CVT:
d50ba256
DA
807 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
808 false);
5c61259e
ZY
809 break;
810 }
f453ba04
DA
811 return mode;
812}
813
b58db2c6
AJ
814/*
815 * EDID is delightfully ambiguous about how interlaced modes are to be
816 * encoded. Our internal representation is of frame height, but some
817 * HDTV detailed timings are encoded as field height.
818 *
819 * The format list here is from CEA, in frame size. Technically we
820 * should be checking refresh rate too. Whatever.
821 */
822static void
823drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
824 struct detailed_pixel_timing *pt)
825{
826 int i;
827 static const struct {
828 int w, h;
829 } cea_interlaced[] = {
830 { 1920, 1080 },
831 { 720, 480 },
832 { 1440, 480 },
833 { 2880, 480 },
834 { 720, 576 },
835 { 1440, 576 },
836 { 2880, 576 },
837 };
b58db2c6
AJ
838
839 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
840 return;
841
3c581411 842 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
843 if ((mode->hdisplay == cea_interlaced[i].w) &&
844 (mode->vdisplay == cea_interlaced[i].h / 2)) {
845 mode->vdisplay *= 2;
846 mode->vsync_start *= 2;
847 mode->vsync_end *= 2;
848 mode->vtotal *= 2;
849 mode->vtotal |= 1;
850 }
851 }
852
853 mode->flags |= DRM_MODE_FLAG_INTERLACE;
854}
855
f453ba04
DA
856/**
857 * drm_mode_detailed - create a new mode from an EDID detailed timing section
858 * @dev: DRM device (needed to create new mode)
859 * @edid: EDID block
860 * @timing: EDID detailed timing info
861 * @quirks: quirks to apply
862 *
863 * An EDID detailed timing block contains enough info for us to create and
864 * return a new struct drm_display_mode.
865 */
866static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
867 struct edid *edid,
868 struct detailed_timing *timing,
869 u32 quirks)
870{
871 struct drm_display_mode *mode;
872 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
873 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
874 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
875 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
876 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
877 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
878 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
879 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
880 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 881
fc438966 882 /* ignore tiny modes */
0454beab 883 if (hactive < 64 || vactive < 64)
fc438966
AJ
884 return NULL;
885
0454beab 886 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
887 printk(KERN_WARNING "stereo mode not supported\n");
888 return NULL;
889 }
0454beab 890 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 891 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
892 }
893
fcb45611
ZY
894 /* it is incorrect if hsync/vsync width is zero */
895 if (!hsync_pulse_width || !vsync_pulse_width) {
896 DRM_DEBUG_KMS("Incorrect Detailed timing. "
897 "Wrong Hsync/Vsync pulse width\n");
898 return NULL;
899 }
bc42aabc
AJ
900
901 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
902 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
903 if (!mode)
904 return NULL;
905
906 goto set_size;
907 }
908
f453ba04
DA
909 mode = drm_mode_create(dev);
910 if (!mode)
911 return NULL;
912
f453ba04 913 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
914 timing->pixel_clock = cpu_to_le16(1088);
915
916 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
917
918 mode->hdisplay = hactive;
919 mode->hsync_start = mode->hdisplay + hsync_offset;
920 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
921 mode->htotal = mode->hdisplay + hblank;
922
923 mode->vdisplay = vactive;
924 mode->vsync_start = mode->vdisplay + vsync_offset;
925 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
926 mode->vtotal = mode->vdisplay + vblank;
f453ba04 927
7064fef5
JB
928 /* Some EDIDs have bogus h/vtotal values */
929 if (mode->hsync_end > mode->htotal)
930 mode->htotal = mode->hsync_end + 1;
931 if (mode->vsync_end > mode->vtotal)
932 mode->vtotal = mode->vsync_end + 1;
933
b58db2c6 934 drm_mode_do_interlace_quirk(mode, pt);
f453ba04
DA
935
936 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 937 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
938 }
939
0454beab
MD
940 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
941 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
942 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
943 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 944
bc42aabc 945set_size:
e14cbee4
MD
946 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
947 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
948
949 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
950 mode->width_mm *= 10;
951 mode->height_mm *= 10;
952 }
953
954 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
955 mode->width_mm = edid->width_cm * 10;
956 mode->height_mm = edid->height_cm * 10;
957 }
958
bc42aabc
AJ
959 mode->type = DRM_MODE_TYPE_DRIVER;
960 drm_mode_set_name(mode);
961
f453ba04
DA
962 return mode;
963}
964
b17e52ef 965static bool
b1f559ec
CW
966mode_in_hsync_range(const struct drm_display_mode *mode,
967 struct edid *edid, u8 *t)
b17e52ef
AJ
968{
969 int hsync, hmin, hmax;
970
971 hmin = t[7];
972 if (edid->revision >= 4)
973 hmin += ((t[4] & 0x04) ? 255 : 0);
974 hmax = t[8];
975 if (edid->revision >= 4)
976 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 977 hsync = drm_mode_hsync(mode);
07a5e632 978
b17e52ef
AJ
979 return (hsync <= hmax && hsync >= hmin);
980}
981
982static bool
b1f559ec
CW
983mode_in_vsync_range(const struct drm_display_mode *mode,
984 struct edid *edid, u8 *t)
b17e52ef
AJ
985{
986 int vsync, vmin, vmax;
987
988 vmin = t[5];
989 if (edid->revision >= 4)
990 vmin += ((t[4] & 0x01) ? 255 : 0);
991 vmax = t[6];
992 if (edid->revision >= 4)
993 vmax += ((t[4] & 0x02) ? 255 : 0);
994 vsync = drm_mode_vrefresh(mode);
995
996 return (vsync <= vmax && vsync >= vmin);
997}
998
999static u32
1000range_pixel_clock(struct edid *edid, u8 *t)
1001{
1002 /* unspecified */
1003 if (t[9] == 0 || t[9] == 255)
1004 return 0;
1005
1006 /* 1.4 with CVT support gives us real precision, yay */
1007 if (edid->revision >= 4 && t[10] == 0x04)
1008 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1009
1010 /* 1.3 is pathetic, so fuzz up a bit */
1011 return t[9] * 10000 + 5001;
1012}
1013
b17e52ef 1014static bool
b1f559ec 1015mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
1016 struct detailed_timing *timing)
1017{
1018 u32 max_clock;
1019 u8 *t = (u8 *)timing;
1020
1021 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
1022 return false;
1023
b17e52ef 1024 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
1025 return false;
1026
b17e52ef 1027 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
1028 if (mode->clock > max_clock)
1029 return false;
b17e52ef
AJ
1030
1031 /* 1.4 max horizontal check */
1032 if (edid->revision >= 4 && t[10] == 0x04)
1033 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1034 return false;
1035
1036 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1037 return false;
07a5e632
AJ
1038
1039 return true;
1040}
1041
b17e52ef 1042static int
cd4cd3de 1043drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
b17e52ef 1044 struct detailed_timing *timing)
07a5e632
AJ
1045{
1046 int i, modes = 0;
1047 struct drm_display_mode *newmode;
1048 struct drm_device *dev = connector->dev;
1049
1050 for (i = 0; i < drm_num_dmt_modes; i++) {
b17e52ef 1051 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
07a5e632
AJ
1052 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1053 if (newmode) {
1054 drm_mode_probed_add(connector, newmode);
1055 modes++;
1056 }
1057 }
1058 }
1059
1060 return modes;
1061}
1062
c09dedb7
TI
1063/* fix up 1366x768 mode from 1368x768;
1064 * GFT/CVT can't express 1366 width which isn't dividable by 8
1065 */
1066static void fixup_mode_1366x768(struct drm_display_mode *mode)
1067{
1068 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1069 mode->hdisplay = 1366;
1070 mode->hsync_start--;
1071 mode->hsync_end--;
1072 drm_mode_set_name(mode);
1073 }
1074}
1075
b309bd37
AJ
1076static int
1077drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1078 struct detailed_timing *timing)
1079{
1080 int i, modes = 0;
1081 struct drm_display_mode *newmode;
1082 struct drm_device *dev = connector->dev;
1083
1084 for (i = 0; i < num_extra_modes; i++) {
1085 const struct minimode *m = &extra_modes[i];
1086 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
fc48f169
TI
1087 if (!newmode)
1088 return modes;
b309bd37 1089
c09dedb7 1090 fixup_mode_1366x768(newmode);
b309bd37
AJ
1091 if (!mode_in_range(newmode, edid, timing)) {
1092 drm_mode_destroy(dev, newmode);
1093 continue;
1094 }
1095
1096 drm_mode_probed_add(connector, newmode);
1097 modes++;
1098 }
1099
1100 return modes;
1101}
1102
1103static int
1104drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1105 struct detailed_timing *timing)
1106{
1107 int i, modes = 0;
1108 struct drm_display_mode *newmode;
1109 struct drm_device *dev = connector->dev;
1110 bool rb = drm_monitor_supports_rb(edid);
1111
1112 for (i = 0; i < num_extra_modes; i++) {
1113 const struct minimode *m = &extra_modes[i];
1114 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
fc48f169
TI
1115 if (!newmode)
1116 return modes;
b309bd37 1117
c09dedb7 1118 fixup_mode_1366x768(newmode);
b309bd37
AJ
1119 if (!mode_in_range(newmode, edid, timing)) {
1120 drm_mode_destroy(dev, newmode);
1121 continue;
1122 }
1123
1124 drm_mode_probed_add(connector, newmode);
1125 modes++;
1126 }
1127
1128 return modes;
1129}
1130
13931579
AJ
1131static void
1132do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1133{
13931579
AJ
1134 struct detailed_mode_closure *closure = c;
1135 struct detailed_non_pixel *data = &timing->data.other_data;
b309bd37 1136 struct detailed_data_monitor_range *range = &data->data.range;
9340d8cf 1137
cb21aafe
AJ
1138 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1139 return;
1140
1141 closure->modes += drm_dmt_modes_for_range(closure->connector,
1142 closure->edid,
1143 timing);
b309bd37
AJ
1144
1145 if (!version_greater(closure->edid, 1, 1))
1146 return; /* GTF not defined yet */
1147
1148 switch (range->flags) {
1149 case 0x02: /* secondary gtf, XXX could do more */
1150 case 0x00: /* default gtf */
1151 closure->modes += drm_gtf_modes_for_range(closure->connector,
1152 closure->edid,
1153 timing);
1154 break;
1155 case 0x04: /* cvt, only in 1.4+ */
1156 if (!version_greater(closure->edid, 1, 3))
1157 break;
1158
1159 closure->modes += drm_cvt_modes_for_range(closure->connector,
1160 closure->edid,
1161 timing);
1162 break;
1163 case 0x01: /* just the ranges, no formula */
1164 default:
1165 break;
1166 }
13931579 1167}
69da3015 1168
13931579
AJ
1169static int
1170add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1171{
1172 struct detailed_mode_closure closure = {
1173 connector, edid, 0, 0, 0
1174 };
9340d8cf 1175
13931579
AJ
1176 if (version_greater(edid, 1, 0))
1177 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1178 &closure);
9340d8cf 1179
13931579 1180 return closure.modes;
9340d8cf
AJ
1181}
1182
2255be14
AJ
1183static int
1184drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1185{
1186 int i, j, m, modes = 0;
1187 struct drm_display_mode *mode;
1188 u8 *est = ((u8 *)timing) + 5;
1189
1190 for (i = 0; i < 6; i++) {
1191 for (j = 7; j > 0; j--) {
1192 m = (i * 8) + (7 - j);
3c581411 1193 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1194 break;
1195 if (est[i] & (1 << j)) {
1d42bbc8
DA
1196 mode = drm_mode_find_dmt(connector->dev,
1197 est3_modes[m].w,
1198 est3_modes[m].h,
f6e252ba
AJ
1199 est3_modes[m].r,
1200 est3_modes[m].rb);
2255be14
AJ
1201 if (mode) {
1202 drm_mode_probed_add(connector, mode);
1203 modes++;
1204 }
1205 }
1206 }
1207 }
1208
1209 return modes;
1210}
1211
13931579
AJ
1212static void
1213do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1214{
13931579 1215 struct detailed_mode_closure *closure = c;
9cf00977 1216 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1217
13931579
AJ
1218 if (data->type == EDID_DETAIL_EST_TIMINGS)
1219 closure->modes += drm_est3_modes(closure->connector, timing);
1220}
9cf00977 1221
13931579
AJ
1222/**
1223 * add_established_modes - get est. modes from EDID and add them
1224 * @edid: EDID block to scan
1225 *
1226 * Each EDID block contains a bitmap of the supported "established modes" list
1227 * (defined above). Tease them out and add them to the global modes list.
1228 */
1229static int
1230add_established_modes(struct drm_connector *connector, struct edid *edid)
1231{
1232 struct drm_device *dev = connector->dev;
1233 unsigned long est_bits = edid->established_timings.t1 |
1234 (edid->established_timings.t2 << 8) |
1235 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1236 int i, modes = 0;
1237 struct detailed_mode_closure closure = {
1238 connector, edid, 0, 0, 0
1239 };
9cf00977 1240
13931579
AJ
1241 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1242 if (est_bits & (1<<i)) {
1243 struct drm_display_mode *newmode;
1244 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1245 if (newmode) {
1246 drm_mode_probed_add(connector, newmode);
1247 modes++;
1248 }
1249 }
9cf00977
AJ
1250 }
1251
13931579
AJ
1252 if (version_greater(edid, 1, 0))
1253 drm_for_each_detailed_block((u8 *)edid,
1254 do_established_modes, &closure);
1255
1256 return modes + closure.modes;
1257}
1258
1259static void
1260do_standard_modes(struct detailed_timing *timing, void *c)
1261{
1262 struct detailed_mode_closure *closure = c;
1263 struct detailed_non_pixel *data = &timing->data.other_data;
1264 struct drm_connector *connector = closure->connector;
1265 struct edid *edid = closure->edid;
1266
1267 if (data->type == EDID_DETAIL_STD_MODES) {
1268 int i;
9cf00977
AJ
1269 for (i = 0; i < 6; i++) {
1270 struct std_timing *std;
1271 struct drm_display_mode *newmode;
1272
1273 std = &data->data.timings[i];
7a374350
AJ
1274 newmode = drm_mode_std(connector, edid, std,
1275 edid->revision);
9cf00977
AJ
1276 if (newmode) {
1277 drm_mode_probed_add(connector, newmode);
13931579 1278 closure->modes++;
9cf00977
AJ
1279 }
1280 }
9cf00977 1281 }
9cf00977
AJ
1282}
1283
f453ba04 1284/**
13931579 1285 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1286 * @edid: EDID block to scan
f453ba04 1287 *
13931579
AJ
1288 * Standard modes can be calculated using the appropriate standard (DMT,
1289 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1290 */
13931579
AJ
1291static int
1292add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1293{
9cf00977 1294 int i, modes = 0;
13931579
AJ
1295 struct detailed_mode_closure closure = {
1296 connector, edid, 0, 0, 0
1297 };
1298
1299 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1300 struct drm_display_mode *newmode;
1301
1302 newmode = drm_mode_std(connector, edid,
1303 &edid->standard_timings[i],
1304 edid->revision);
1305 if (newmode) {
1306 drm_mode_probed_add(connector, newmode);
1307 modes++;
1308 }
1309 }
1310
1311 if (version_greater(edid, 1, 0))
1312 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1313 &closure);
1314
1315 /* XXX should also look for standard codes in VTB blocks */
1316
1317 return modes + closure.modes;
1318}
f453ba04 1319
13931579
AJ
1320static int drm_cvt_modes(struct drm_connector *connector,
1321 struct detailed_timing *timing)
1322{
1323 int i, j, modes = 0;
1324 struct drm_display_mode *newmode;
1325 struct drm_device *dev = connector->dev;
1326 struct cvt_timing *cvt;
1327 const int rates[] = { 60, 85, 75, 60, 50 };
1328 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1329
13931579
AJ
1330 for (i = 0; i < 4; i++) {
1331 int uninitialized_var(width), height;
1332 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1333
13931579 1334 if (!memcmp(cvt->code, empty, 3))
9cf00977 1335 continue;
f453ba04 1336
13931579
AJ
1337 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1338 switch (cvt->code[1] & 0x0c) {
1339 case 0x00:
1340 width = height * 4 / 3;
1341 break;
1342 case 0x04:
1343 width = height * 16 / 9;
1344 break;
1345 case 0x08:
1346 width = height * 16 / 10;
1347 break;
1348 case 0x0c:
1349 width = height * 15 / 9;
1350 break;
1351 }
1352
1353 for (j = 1; j < 5; j++) {
1354 if (cvt->code[2] & (1 << j)) {
1355 newmode = drm_cvt_mode(dev, width, height,
1356 rates[j], j == 0,
1357 false, false);
1358 if (newmode) {
1359 drm_mode_probed_add(connector, newmode);
1360 modes++;
1361 }
1362 }
1363 }
f453ba04
DA
1364 }
1365
1366 return modes;
1367}
9cf00977 1368
13931579
AJ
1369static void
1370do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1371{
13931579
AJ
1372 struct detailed_mode_closure *closure = c;
1373 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1374
13931579
AJ
1375 if (data->type == EDID_DETAIL_CVT_3BYTE)
1376 closure->modes += drm_cvt_modes(closure->connector, timing);
1377}
882f0219 1378
13931579
AJ
1379static int
1380add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1381{
1382 struct detailed_mode_closure closure = {
1383 connector, edid, 0, 0, 0
1384 };
882f0219 1385
13931579
AJ
1386 if (version_greater(edid, 1, 2))
1387 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1388
13931579 1389 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1390
13931579
AJ
1391 return closure.modes;
1392}
1393
1394static void
1395do_detailed_mode(struct detailed_timing *timing, void *c)
1396{
1397 struct detailed_mode_closure *closure = c;
1398 struct drm_display_mode *newmode;
1399
1400 if (timing->pixel_clock) {
1401 newmode = drm_mode_detailed(closure->connector->dev,
1402 closure->edid, timing,
1403 closure->quirks);
1404 if (!newmode)
1405 return;
1406
1407 if (closure->preferred)
1408 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1409
1410 drm_mode_probed_add(closure->connector, newmode);
1411 closure->modes++;
1412 closure->preferred = 0;
882f0219 1413 }
13931579 1414}
882f0219 1415
13931579
AJ
1416/*
1417 * add_detailed_modes - Add modes from detailed timings
1418 * @connector: attached connector
1419 * @edid: EDID block to scan
1420 * @quirks: quirks to apply
1421 */
1422static int
1423add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1424 u32 quirks)
1425{
1426 struct detailed_mode_closure closure = {
1427 connector,
1428 edid,
1429 1,
1430 quirks,
1431 0
1432 };
1433
1434 if (closure.preferred && !version_greater(edid, 1, 3))
1435 closure.preferred =
1436 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1437
1438 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1439
1440 return closure.modes;
882f0219 1441}
f453ba04 1442
f23c20c8 1443#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1444#define AUDIO_BLOCK 0x01
54ac76f8 1445#define VIDEO_BLOCK 0x02
f23c20c8 1446#define VENDOR_BLOCK 0x03
76adaa34 1447#define SPEAKER_BLOCK 0x04
8fe9790d 1448#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1449#define EDID_CEA_YCRCB444 (1 << 5)
1450#define EDID_CEA_YCRCB422 (1 << 4)
8fe9790d 1451
f23c20c8 1452/**
8fe9790d 1453 * Search EDID for CEA extension block.
f23c20c8 1454 */
eccaca28 1455u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1456{
8fe9790d
ZW
1457 u8 *edid_ext = NULL;
1458 int i;
f23c20c8
ML
1459
1460 /* No EDID or EDID extensions */
1461 if (edid == NULL || edid->extensions == 0)
8fe9790d 1462 return NULL;
f23c20c8 1463
f23c20c8 1464 /* Find CEA extension */
7466f4cc 1465 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1466 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1467 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1468 break;
1469 }
1470
7466f4cc 1471 if (i == edid->extensions)
8fe9790d
ZW
1472 return NULL;
1473
1474 return edid_ext;
1475}
eccaca28 1476EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1477
54ac76f8
CS
1478static int
1479do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1480{
1481 struct drm_device *dev = connector->dev;
1482 u8 * mode, cea_mode;
1483 int modes = 0;
1484
1485 for (mode = db; mode < db + len; mode++) {
1486 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1487 if (cea_mode < drm_num_cea_modes) {
1488 struct drm_display_mode *newmode;
1489 newmode = drm_mode_duplicate(dev,
1490 &edid_cea_modes[cea_mode]);
1491 if (newmode) {
1492 drm_mode_probed_add(connector, newmode);
1493 modes++;
1494 }
1495 }
1496 }
1497
1498 return modes;
1499}
1500
1501static int
1502add_cea_modes(struct drm_connector *connector, struct edid *edid)
1503{
1504 u8 * cea = drm_find_cea_extension(edid);
1505 u8 * db, dbl;
1506 int modes = 0;
1507
1508 if (cea && cea[1] >= 3) {
1509 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1510 dbl = db[0] & 0x1f;
1511 if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK)
1512 modes += do_cea_modes (connector, db+1, dbl);
1513 }
1514 }
1515
1516 return modes;
1517}
1518
76adaa34
WF
1519static void
1520parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
1521{
1522 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1523
1524 connector->dvi_dual = db[6] & 1;
1525 connector->max_tmds_clock = db[7] * 5;
1526
1527 connector->latency_present[0] = db[8] >> 7;
1528 connector->latency_present[1] = (db[8] >> 6) & 1;
1529 connector->video_latency[0] = db[9];
1530 connector->audio_latency[0] = db[10];
1531 connector->video_latency[1] = db[11];
1532 connector->audio_latency[1] = db[12];
1533
1534 DRM_LOG_KMS("HDMI: DVI dual %d, "
1535 "max TMDS clock %d, "
1536 "latency present %d %d, "
1537 "video latency %d %d, "
1538 "audio latency %d %d\n",
1539 connector->dvi_dual,
1540 connector->max_tmds_clock,
1541 (int) connector->latency_present[0],
1542 (int) connector->latency_present[1],
1543 connector->video_latency[0],
1544 connector->video_latency[1],
1545 connector->audio_latency[0],
1546 connector->audio_latency[1]);
1547}
1548
1549static void
1550monitor_name(struct detailed_timing *t, void *data)
1551{
1552 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1553 *(u8 **)data = t->data.other_data.data.str.str;
1554}
1555
1556/**
1557 * drm_edid_to_eld - build ELD from EDID
1558 * @connector: connector corresponding to the HDMI/DP sink
1559 * @edid: EDID to parse
1560 *
1561 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1562 * Some ELD fields are left to the graphics driver caller:
1563 * - Conn_Type
1564 * - HDCP
1565 * - Port_ID
1566 */
1567void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1568{
1569 uint8_t *eld = connector->eld;
1570 u8 *cea;
1571 u8 *name;
1572 u8 *db;
1573 int sad_count = 0;
1574 int mnl;
1575 int dbl;
1576
1577 memset(eld, 0, sizeof(connector->eld));
1578
1579 cea = drm_find_cea_extension(edid);
1580 if (!cea) {
1581 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1582 return;
1583 }
1584
1585 name = NULL;
1586 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1587 for (mnl = 0; name && mnl < 13; mnl++) {
1588 if (name[mnl] == 0x0a)
1589 break;
1590 eld[20 + mnl] = name[mnl];
1591 }
1592 eld[4] = (cea[1] << 5) | mnl;
1593 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1594
1595 eld[0] = 2 << 3; /* ELD version: 2 */
1596
1597 eld[16] = edid->mfg_id[0];
1598 eld[17] = edid->mfg_id[1];
1599 eld[18] = edid->prod_code[0];
1600 eld[19] = edid->prod_code[1];
1601
a0ab734d
CS
1602 if (cea[1] >= 3)
1603 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1604 dbl = db[0] & 0x1f;
1605
1606 switch ((db[0] & 0xe0) >> 5) {
1607 case AUDIO_BLOCK:
1608 /* Audio Data Block, contains SADs */
1609 sad_count = dbl / 3;
1610 memcpy(eld + 20 + mnl, &db[1], dbl);
1611 break;
1612 case SPEAKER_BLOCK:
1613 /* Speaker Allocation Data Block */
1614 eld[7] = db[1];
1615 break;
1616 case VENDOR_BLOCK:
1617 /* HDMI Vendor-Specific Data Block */
1618 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0)
1619 parse_hdmi_vsdb(connector, db);
1620 break;
1621 default:
1622 break;
1623 }
76adaa34 1624 }
76adaa34
WF
1625 eld[5] |= sad_count << 4;
1626 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1627
1628 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1629}
1630EXPORT_SYMBOL(drm_edid_to_eld);
1631
1632/**
1633 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1634 * @connector: connector associated with the HDMI/DP sink
1635 * @mode: the display mode
1636 */
1637int drm_av_sync_delay(struct drm_connector *connector,
1638 struct drm_display_mode *mode)
1639{
1640 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1641 int a, v;
1642
1643 if (!connector->latency_present[0])
1644 return 0;
1645 if (!connector->latency_present[1])
1646 i = 0;
1647
1648 a = connector->audio_latency[i];
1649 v = connector->video_latency[i];
1650
1651 /*
1652 * HDMI/DP sink doesn't support audio or video?
1653 */
1654 if (a == 255 || v == 255)
1655 return 0;
1656
1657 /*
1658 * Convert raw EDID values to millisecond.
1659 * Treat unknown latency as 0ms.
1660 */
1661 if (a)
1662 a = min(2 * (a - 1), 500);
1663 if (v)
1664 v = min(2 * (v - 1), 500);
1665
1666 return max(v - a, 0);
1667}
1668EXPORT_SYMBOL(drm_av_sync_delay);
1669
1670/**
1671 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1672 * @encoder: the encoder just changed display mode
1673 * @mode: the adjusted display mode
1674 *
1675 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1676 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1677 */
1678struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1679 struct drm_display_mode *mode)
1680{
1681 struct drm_connector *connector;
1682 struct drm_device *dev = encoder->dev;
1683
1684 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1685 if (connector->encoder == encoder && connector->eld[0])
1686 return connector;
1687
1688 return NULL;
1689}
1690EXPORT_SYMBOL(drm_select_eld);
1691
8fe9790d
ZW
1692/**
1693 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1694 * @edid: monitor EDID information
1695 *
1696 * Parse the CEA extension according to CEA-861-B.
1697 * Return true if HDMI, false if not or unknown.
1698 */
1699bool drm_detect_hdmi_monitor(struct edid *edid)
1700{
1701 u8 *edid_ext;
1702 int i, hdmi_id;
1703 int start_offset, end_offset;
1704 bool is_hdmi = false;
1705
1706 edid_ext = drm_find_cea_extension(edid);
1707 if (!edid_ext)
f23c20c8
ML
1708 goto end;
1709
1710 /* Data block offset in CEA extension block */
1711 start_offset = 4;
1712 end_offset = edid_ext[2];
1713
1714 /*
1715 * Because HDMI identifier is in Vendor Specific Block,
1716 * search it from all data blocks of CEA extension.
1717 */
1718 for (i = start_offset; i < end_offset;
1719 /* Increased by data block len */
1720 i += ((edid_ext[i] & 0x1f) + 1)) {
1721 /* Find vendor specific block */
1722 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1723 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1724 edid_ext[i + 3] << 16;
1725 /* Find HDMI identifier */
1726 if (hdmi_id == HDMI_IDENTIFIER)
1727 is_hdmi = true;
1728 break;
1729 }
1730 }
1731
1732end:
1733 return is_hdmi;
1734}
1735EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1736
8fe9790d
ZW
1737/**
1738 * drm_detect_monitor_audio - check monitor audio capability
1739 *
1740 * Monitor should have CEA extension block.
1741 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1742 * audio' only. If there is any audio extension block and supported
1743 * audio format, assume at least 'basic audio' support, even if 'basic
1744 * audio' is not defined in EDID.
1745 *
1746 */
1747bool drm_detect_monitor_audio(struct edid *edid)
1748{
1749 u8 *edid_ext;
1750 int i, j;
1751 bool has_audio = false;
1752 int start_offset, end_offset;
1753
1754 edid_ext = drm_find_cea_extension(edid);
1755 if (!edid_ext)
1756 goto end;
1757
1758 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1759
1760 if (has_audio) {
1761 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1762 goto end;
1763 }
1764
1765 /* Data block offset in CEA extension block */
1766 start_offset = 4;
1767 end_offset = edid_ext[2];
1768
1769 for (i = start_offset; i < end_offset;
1770 i += ((edid_ext[i] & 0x1f) + 1)) {
1771 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1772 has_audio = true;
1773 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1774 DRM_DEBUG_KMS("CEA audio format %d\n",
1775 (edid_ext[i + j] >> 3) & 0xf);
1776 goto end;
1777 }
1778 }
1779end:
1780 return has_audio;
1781}
1782EXPORT_SYMBOL(drm_detect_monitor_audio);
1783
3b11228b
JB
1784/**
1785 * drm_add_display_info - pull display info out if present
1786 * @edid: EDID data
1787 * @info: display info (attached to connector)
1788 *
1789 * Grab any available display info and stuff it into the drm_display_info
1790 * structure that's part of the connector. Useful for tracking bpp and
1791 * color spaces.
1792 */
1793static void drm_add_display_info(struct edid *edid,
1794 struct drm_display_info *info)
1795{
ebec9a7b
JB
1796 u8 *edid_ext;
1797
3b11228b
JB
1798 info->width_mm = edid->width_cm * 10;
1799 info->height_mm = edid->height_cm * 10;
1800
1801 /* driver figures it out in this case */
1802 info->bpc = 0;
da05a5a7 1803 info->color_formats = 0;
3b11228b 1804
a988bc72 1805 if (edid->revision < 3)
3b11228b
JB
1806 return;
1807
1808 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1809 return;
1810
a988bc72
LPC
1811 /* Get data from CEA blocks if present */
1812 edid_ext = drm_find_cea_extension(edid);
1813 if (edid_ext) {
1814 info->cea_rev = edid_ext[1];
1815
1816 /* The existence of a CEA block should imply RGB support */
1817 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1818 if (edid_ext[3] & EDID_CEA_YCRCB444)
1819 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1820 if (edid_ext[3] & EDID_CEA_YCRCB422)
1821 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1822 }
1823
1824 /* Only defined for 1.4 with digital displays */
1825 if (edid->revision < 4)
1826 return;
1827
3b11228b
JB
1828 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1829 case DRM_EDID_DIGITAL_DEPTH_6:
1830 info->bpc = 6;
1831 break;
1832 case DRM_EDID_DIGITAL_DEPTH_8:
1833 info->bpc = 8;
1834 break;
1835 case DRM_EDID_DIGITAL_DEPTH_10:
1836 info->bpc = 10;
1837 break;
1838 case DRM_EDID_DIGITAL_DEPTH_12:
1839 info->bpc = 12;
1840 break;
1841 case DRM_EDID_DIGITAL_DEPTH_14:
1842 info->bpc = 14;
1843 break;
1844 case DRM_EDID_DIGITAL_DEPTH_16:
1845 info->bpc = 16;
1846 break;
1847 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1848 default:
1849 info->bpc = 0;
1850 break;
1851 }
da05a5a7 1852
a988bc72 1853 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
1854 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1855 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1856 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1857 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
1858}
1859
f453ba04
DA
1860/**
1861 * drm_add_edid_modes - add modes from EDID data, if available
1862 * @connector: connector we're probing
1863 * @edid: edid data
1864 *
1865 * Add the specified modes to the connector's mode list.
1866 *
1867 * Return number of modes added or 0 if we couldn't find any.
1868 */
1869int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1870{
1871 int num_modes = 0;
1872 u32 quirks;
1873
1874 if (edid == NULL) {
1875 return 0;
1876 }
3c537889 1877 if (!drm_edid_is_valid(edid)) {
dcdb1674 1878 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1879 drm_get_connector_name(connector));
1880 return 0;
1881 }
1882
1883 quirks = edid_get_quirks(edid);
1884
c867df70
AJ
1885 /*
1886 * EDID spec says modes should be preferred in this order:
1887 * - preferred detailed mode
1888 * - other detailed modes from base block
1889 * - detailed modes from extension blocks
1890 * - CVT 3-byte code modes
1891 * - standard timing codes
1892 * - established timing codes
1893 * - modes inferred from GTF or CVT range information
1894 *
13931579 1895 * We get this pretty much right.
c867df70
AJ
1896 *
1897 * XXX order for additional mode types in extension blocks?
1898 */
13931579
AJ
1899 num_modes += add_detailed_modes(connector, edid, quirks);
1900 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1901 num_modes += add_standard_modes(connector, edid);
1902 num_modes += add_established_modes(connector, edid);
13931579 1903 num_modes += add_inferred_modes(connector, edid);
54ac76f8 1904 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
1905
1906 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1907 edid_fixup_preferred(connector, quirks);
1908
3b11228b 1909 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
1910
1911 return num_modes;
1912}
1913EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1914
1915/**
1916 * drm_add_modes_noedid - add modes for the connectors without EDID
1917 * @connector: connector we're probing
1918 * @hdisplay: the horizontal display limit
1919 * @vdisplay: the vertical display limit
1920 *
1921 * Add the specified modes to the connector's mode list. Only when the
1922 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1923 *
1924 * Return number of modes added or 0 if we couldn't find any.
1925 */
1926int drm_add_modes_noedid(struct drm_connector *connector,
1927 int hdisplay, int vdisplay)
1928{
1929 int i, count, num_modes = 0;
b1f559ec 1930 struct drm_display_mode *mode;
f0fda0a4
ZY
1931 struct drm_device *dev = connector->dev;
1932
1933 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1934 if (hdisplay < 0)
1935 hdisplay = 0;
1936 if (vdisplay < 0)
1937 vdisplay = 0;
1938
1939 for (i = 0; i < count; i++) {
b1f559ec 1940 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
1941 if (hdisplay && vdisplay) {
1942 /*
1943 * Only when two are valid, they will be used to check
1944 * whether the mode should be added to the mode list of
1945 * the connector.
1946 */
1947 if (ptr->hdisplay > hdisplay ||
1948 ptr->vdisplay > vdisplay)
1949 continue;
1950 }
f985dedb
AJ
1951 if (drm_mode_vrefresh(ptr) > 61)
1952 continue;
f0fda0a4
ZY
1953 mode = drm_mode_duplicate(dev, ptr);
1954 if (mode) {
1955 drm_mode_probed_add(connector, mode);
1956 num_modes++;
1957 }
1958 }
1959 return num_modes;
1960}
1961EXPORT_SYMBOL(drm_add_modes_noedid);