]>
Commit | Line | Data |
---|---|---|
f453ba04 DA |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) | |
3 | * Copyright (c) 2007-2008 Intel Corporation | |
4 | * Jesse Barnes <jesse.barnes@intel.com> | |
61e57a8d | 5 | * Copyright 2010 Red Hat, Inc. |
f453ba04 DA |
6 | * |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from | |
8 | * FB layer. | |
9 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> | |
10 | * | |
11 | * Permission is hereby granted, free of charge, to any person obtaining a | |
12 | * copy of this software and associated documentation files (the "Software"), | |
13 | * to deal in the Software without restriction, including without limitation | |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | |
15 | * and/or sell copies of the Software, and to permit persons to whom the | |
16 | * Software is furnished to do so, subject to the following conditions: | |
17 | * | |
18 | * The above copyright notice and this permission notice (including the | |
19 | * next paragraph) shall be included in all copies or substantial portions | |
20 | * of the Software. | |
21 | * | |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
28 | * DEALINGS IN THE SOFTWARE. | |
29 | */ | |
30 | #include <linux/kernel.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
f453ba04 | 32 | #include <linux/i2c.h> |
47819ba2 | 33 | #include <linux/module.h> |
f453ba04 DA |
34 | #include "drmP.h" |
35 | #include "drm_edid.h" | |
38fcbb67 | 36 | #include "drm_edid_modes.h" |
f453ba04 | 37 | |
13931579 AJ |
38 | #define version_greater(edid, maj, min) \ |
39 | (((edid)->version > (maj)) || \ | |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) | |
f453ba04 | 41 | |
d1ff6409 AJ |
42 | #define EDID_EST_TIMINGS 16 |
43 | #define EDID_STD_TIMINGS 8 | |
44 | #define EDID_DETAILED_TIMINGS 4 | |
f453ba04 DA |
45 | |
46 | /* | |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect | |
48 | * them here (note that userspace may work around broken monitors first, | |
49 | * but fixes should make their way here so that the kernel "just works" | |
50 | * on as many displays as possible). | |
51 | */ | |
52 | ||
53 | /* First detailed mode wrong, use largest 60Hz mode */ | |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) | |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ | |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) | |
57 | /* Prefer the largest mode at 75 Hz */ | |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) | |
59 | /* Detail timing is in cm not mm */ | |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) | |
61 | /* Detailed timing descriptors have bogus size values, so just take the | |
62 | * maximum size and use that. | |
63 | */ | |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) | |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ | |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) | |
67 | /* use +hsync +vsync for detailed mode */ | |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) | |
bc42aabc AJ |
69 | /* Force reduced-blanking timings for detailed modes */ |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) | |
3c537889 | 71 | |
13931579 AJ |
72 | struct detailed_mode_closure { |
73 | struct drm_connector *connector; | |
74 | struct edid *edid; | |
75 | bool preferred; | |
76 | u32 quirks; | |
77 | int modes; | |
78 | }; | |
f453ba04 | 79 | |
5c61259e ZY |
80 | #define LEVEL_DMT 0 |
81 | #define LEVEL_GTF 1 | |
7a374350 AJ |
82 | #define LEVEL_GTF2 2 |
83 | #define LEVEL_CVT 3 | |
5c61259e | 84 | |
f453ba04 | 85 | static struct edid_quirk { |
c51a3fd6 | 86 | char vendor[4]; |
f453ba04 DA |
87 | int product_id; |
88 | u32 quirks; | |
89 | } edid_quirk_list[] = { | |
90 | /* Acer AL1706 */ | |
91 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, | |
92 | /* Acer F51 */ | |
93 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, | |
94 | /* Unknown Acer */ | |
95 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
96 | ||
97 | /* Belinea 10 15 55 */ | |
98 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, | |
99 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, | |
100 | ||
101 | /* Envision Peripherals, Inc. EN-7100e */ | |
102 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, | |
ba1163de AJ |
103 | /* Envision EN2028 */ |
104 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, | |
f453ba04 DA |
105 | |
106 | /* Funai Electronics PM36B */ | |
107 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | | |
108 | EDID_QUIRK_DETAILED_IN_CM }, | |
109 | ||
110 | /* LG Philips LCD LP154W01-A5 */ | |
111 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
112 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
113 | ||
114 | /* Philips 107p5 CRT */ | |
115 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
116 | ||
117 | /* Proview AY765C */ | |
118 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
119 | ||
120 | /* Samsung SyncMaster 205BW. Note: irony */ | |
121 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, | |
122 | /* Samsung SyncMaster 22[5-6]BW */ | |
123 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, | |
124 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, | |
bc42aabc AJ |
125 | |
126 | /* ViewSonic VA2026w */ | |
127 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, | |
f453ba04 DA |
128 | }; |
129 | ||
61e57a8d | 130 | /*** DDC fetch and block validation ***/ |
f453ba04 | 131 | |
083ae056 AJ |
132 | static const u8 edid_header[] = { |
133 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 | |
134 | }; | |
f453ba04 | 135 | |
051963d4 TR |
136 | /* |
137 | * Sanity check the header of the base EDID block. Return 8 if the header | |
138 | * is perfect, down to 0 if it's totally wrong. | |
139 | */ | |
140 | int drm_edid_header_is_valid(const u8 *raw_edid) | |
141 | { | |
142 | int i, score = 0; | |
143 | ||
144 | for (i = 0; i < sizeof(edid_header); i++) | |
145 | if (raw_edid[i] == edid_header[i]) | |
146 | score++; | |
147 | ||
148 | return score; | |
149 | } | |
150 | EXPORT_SYMBOL(drm_edid_header_is_valid); | |
151 | ||
47819ba2 AJ |
152 | static int edid_fixup __read_mostly = 6; |
153 | module_param_named(edid_fixup, edid_fixup, int, 0400); | |
154 | MODULE_PARM_DESC(edid_fixup, | |
155 | "Minimum number of valid EDID header bytes (0-8, default 6)"); | |
051963d4 | 156 | |
61e57a8d AJ |
157 | /* |
158 | * Sanity check the EDID block (base or extension). Return 0 if the block | |
159 | * doesn't check out, or 1 if it's valid. | |
f453ba04 | 160 | */ |
f89ec8a4 | 161 | bool drm_edid_block_valid(u8 *raw_edid, int block) |
f453ba04 | 162 | { |
61e57a8d | 163 | int i; |
f453ba04 | 164 | u8 csum = 0; |
61e57a8d | 165 | struct edid *edid = (struct edid *)raw_edid; |
f453ba04 | 166 | |
47819ba2 AJ |
167 | if (edid_fixup > 8 || edid_fixup < 0) |
168 | edid_fixup = 6; | |
169 | ||
f89ec8a4 | 170 | if (block == 0) { |
051963d4 | 171 | int score = drm_edid_header_is_valid(raw_edid); |
61e57a8d | 172 | if (score == 8) ; |
47819ba2 | 173 | else if (score >= edid_fixup) { |
61e57a8d AJ |
174 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
175 | memcpy(raw_edid, edid_header, sizeof(edid_header)); | |
176 | } else { | |
177 | goto bad; | |
178 | } | |
179 | } | |
f453ba04 DA |
180 | |
181 | for (i = 0; i < EDID_LENGTH; i++) | |
182 | csum += raw_edid[i]; | |
183 | if (csum) { | |
184 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); | |
4a638b4e AJ |
185 | |
186 | /* allow CEA to slide through, switches mangle this */ | |
187 | if (raw_edid[0] != 0x02) | |
188 | goto bad; | |
f453ba04 DA |
189 | } |
190 | ||
61e57a8d AJ |
191 | /* per-block-type checks */ |
192 | switch (raw_edid[0]) { | |
193 | case 0: /* base */ | |
194 | if (edid->version != 1) { | |
195 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); | |
196 | goto bad; | |
197 | } | |
862b89c0 | 198 | |
61e57a8d AJ |
199 | if (edid->revision > 4) |
200 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); | |
201 | break; | |
862b89c0 | 202 | |
61e57a8d AJ |
203 | default: |
204 | break; | |
205 | } | |
47ee4ccf | 206 | |
f453ba04 DA |
207 | return 1; |
208 | ||
209 | bad: | |
210 | if (raw_edid) { | |
f49dadb8 | 211 | printk(KERN_ERR "Raw EDID:\n"); |
0aff47f2 TV |
212 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
213 | raw_edid, EDID_LENGTH, false); | |
f453ba04 DA |
214 | } |
215 | return 0; | |
216 | } | |
da0df92b | 217 | EXPORT_SYMBOL(drm_edid_block_valid); |
61e57a8d AJ |
218 | |
219 | /** | |
220 | * drm_edid_is_valid - sanity check EDID data | |
221 | * @edid: EDID data | |
222 | * | |
223 | * Sanity-check an entire EDID record (including extensions) | |
224 | */ | |
225 | bool drm_edid_is_valid(struct edid *edid) | |
226 | { | |
227 | int i; | |
228 | u8 *raw = (u8 *)edid; | |
229 | ||
230 | if (!edid) | |
231 | return false; | |
232 | ||
233 | for (i = 0; i <= edid->extensions; i++) | |
f89ec8a4 | 234 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i)) |
61e57a8d AJ |
235 | return false; |
236 | ||
237 | return true; | |
238 | } | |
3c537889 | 239 | EXPORT_SYMBOL(drm_edid_is_valid); |
f453ba04 | 240 | |
61e57a8d AJ |
241 | #define DDC_SEGMENT_ADDR 0x30 |
242 | /** | |
243 | * Get EDID information via I2C. | |
244 | * | |
245 | * \param adapter : i2c device adaptor | |
246 | * \param buf : EDID data buffer to be filled | |
247 | * \param len : EDID data buffer length | |
248 | * \return 0 on success or -1 on failure. | |
249 | * | |
250 | * Try to fetch EDID information by calling i2c driver function. | |
251 | */ | |
252 | static int | |
253 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, | |
254 | int block, int len) | |
255 | { | |
256 | unsigned char start = block * EDID_LENGTH; | |
4819d2e4 CW |
257 | int ret, retries = 5; |
258 | ||
259 | /* The core i2c driver will automatically retry the transfer if the | |
260 | * adapter reports EAGAIN. However, we find that bit-banging transfers | |
261 | * are susceptible to errors under a heavily loaded machine and | |
262 | * generate spurious NAKs and timeouts. Retrying the transfer | |
263 | * of the individual block a few times seems to overcome this. | |
264 | */ | |
265 | do { | |
266 | struct i2c_msg msgs[] = { | |
267 | { | |
268 | .addr = DDC_ADDR, | |
269 | .flags = 0, | |
270 | .len = 1, | |
271 | .buf = &start, | |
272 | }, { | |
273 | .addr = DDC_ADDR, | |
274 | .flags = I2C_M_RD, | |
275 | .len = len, | |
276 | .buf = buf, | |
277 | } | |
278 | }; | |
279 | ret = i2c_transfer(adapter, msgs, 2); | |
9292f37e ED |
280 | if (ret == -ENXIO) { |
281 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", | |
282 | adapter->name); | |
283 | break; | |
284 | } | |
4819d2e4 CW |
285 | } while (ret != 2 && --retries); |
286 | ||
287 | return ret == 2 ? 0 : -1; | |
61e57a8d AJ |
288 | } |
289 | ||
4a9a8b71 DA |
290 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
291 | { | |
292 | int i; | |
293 | u32 *raw_edid = (u32 *)in_edid; | |
294 | ||
295 | for (i = 0; i < length / 4; i++) | |
296 | if (*(raw_edid + i) != 0) | |
297 | return false; | |
298 | return true; | |
299 | } | |
300 | ||
61e57a8d AJ |
301 | static u8 * |
302 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) | |
303 | { | |
0ea75e23 | 304 | int i, j = 0, valid_extensions = 0; |
61e57a8d AJ |
305 | u8 *block, *new; |
306 | ||
307 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) | |
308 | return NULL; | |
309 | ||
310 | /* base block fetch */ | |
311 | for (i = 0; i < 4; i++) { | |
312 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) | |
313 | goto out; | |
f89ec8a4 | 314 | if (drm_edid_block_valid(block, 0)) |
61e57a8d | 315 | break; |
4a9a8b71 DA |
316 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
317 | connector->null_edid_counter++; | |
318 | goto carp; | |
319 | } | |
61e57a8d AJ |
320 | } |
321 | if (i == 4) | |
322 | goto carp; | |
323 | ||
324 | /* if there's no extensions, we're done */ | |
325 | if (block[0x7e] == 0) | |
326 | return block; | |
327 | ||
328 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); | |
329 | if (!new) | |
330 | goto out; | |
331 | block = new; | |
332 | ||
333 | for (j = 1; j <= block[0x7e]; j++) { | |
334 | for (i = 0; i < 4; i++) { | |
0ea75e23 ST |
335 | if (drm_do_probe_ddc_edid(adapter, |
336 | block + (valid_extensions + 1) * EDID_LENGTH, | |
337 | j, EDID_LENGTH)) | |
61e57a8d | 338 | goto out; |
f89ec8a4 | 339 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) { |
0ea75e23 | 340 | valid_extensions++; |
61e57a8d | 341 | break; |
0ea75e23 | 342 | } |
61e57a8d AJ |
343 | } |
344 | if (i == 4) | |
0ea75e23 ST |
345 | dev_warn(connector->dev->dev, |
346 | "%s: Ignoring invalid EDID block %d.\n", | |
347 | drm_get_connector_name(connector), j); | |
348 | } | |
349 | ||
350 | if (valid_extensions != block[0x7e]) { | |
351 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; | |
352 | block[0x7e] = valid_extensions; | |
353 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); | |
354 | if (!new) | |
355 | goto out; | |
356 | block = new; | |
61e57a8d AJ |
357 | } |
358 | ||
359 | return block; | |
360 | ||
361 | carp: | |
dcdb1674 | 362 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
61e57a8d AJ |
363 | drm_get_connector_name(connector), j); |
364 | ||
365 | out: | |
366 | kfree(block); | |
367 | return NULL; | |
368 | } | |
369 | ||
370 | /** | |
371 | * Probe DDC presence. | |
372 | * | |
373 | * \param adapter : i2c device adaptor | |
374 | * \return 1 on success | |
375 | */ | |
376 | static bool | |
377 | drm_probe_ddc(struct i2c_adapter *adapter) | |
378 | { | |
379 | unsigned char out; | |
380 | ||
381 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); | |
382 | } | |
383 | ||
384 | /** | |
385 | * drm_get_edid - get EDID data, if available | |
386 | * @connector: connector we're probing | |
387 | * @adapter: i2c adapter to use for DDC | |
388 | * | |
389 | * Poke the given i2c channel to grab EDID data if possible. If found, | |
390 | * attach it to the connector. | |
391 | * | |
392 | * Return edid data or NULL if we couldn't find any. | |
393 | */ | |
394 | struct edid *drm_get_edid(struct drm_connector *connector, | |
395 | struct i2c_adapter *adapter) | |
396 | { | |
397 | struct edid *edid = NULL; | |
398 | ||
399 | if (drm_probe_ddc(adapter)) | |
400 | edid = (struct edid *)drm_do_get_edid(connector, adapter); | |
401 | ||
61e57a8d | 402 | return edid; |
61e57a8d AJ |
403 | } |
404 | EXPORT_SYMBOL(drm_get_edid); | |
405 | ||
406 | /*** EDID parsing ***/ | |
407 | ||
f453ba04 DA |
408 | /** |
409 | * edid_vendor - match a string against EDID's obfuscated vendor field | |
410 | * @edid: EDID to match | |
411 | * @vendor: vendor string | |
412 | * | |
413 | * Returns true if @vendor is in @edid, false otherwise | |
414 | */ | |
415 | static bool edid_vendor(struct edid *edid, char *vendor) | |
416 | { | |
417 | char edid_vendor[3]; | |
418 | ||
419 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; | |
420 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | | |
421 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; | |
16456c87 | 422 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
f453ba04 DA |
423 | |
424 | return !strncmp(edid_vendor, vendor, 3); | |
425 | } | |
426 | ||
427 | /** | |
428 | * edid_get_quirks - return quirk flags for a given EDID | |
429 | * @edid: EDID to process | |
430 | * | |
431 | * This tells subsequent routines what fixes they need to apply. | |
432 | */ | |
433 | static u32 edid_get_quirks(struct edid *edid) | |
434 | { | |
435 | struct edid_quirk *quirk; | |
436 | int i; | |
437 | ||
438 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { | |
439 | quirk = &edid_quirk_list[i]; | |
440 | ||
441 | if (edid_vendor(edid, quirk->vendor) && | |
442 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) | |
443 | return quirk->quirks; | |
444 | } | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
449 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) | |
450 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) | |
451 | ||
f453ba04 DA |
452 | /** |
453 | * edid_fixup_preferred - set preferred modes based on quirk list | |
454 | * @connector: has mode list to fix up | |
455 | * @quirks: quirks list | |
456 | * | |
457 | * Walk the mode list for @connector, clearing the preferred status | |
458 | * on existing modes and setting it anew for the right mode ala @quirks. | |
459 | */ | |
460 | static void edid_fixup_preferred(struct drm_connector *connector, | |
461 | u32 quirks) | |
462 | { | |
463 | struct drm_display_mode *t, *cur_mode, *preferred_mode; | |
f890607b | 464 | int target_refresh = 0; |
f453ba04 DA |
465 | |
466 | if (list_empty(&connector->probed_modes)) | |
467 | return; | |
468 | ||
469 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) | |
470 | target_refresh = 60; | |
471 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) | |
472 | target_refresh = 75; | |
473 | ||
474 | preferred_mode = list_first_entry(&connector->probed_modes, | |
475 | struct drm_display_mode, head); | |
476 | ||
477 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { | |
478 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; | |
479 | ||
480 | if (cur_mode == preferred_mode) | |
481 | continue; | |
482 | ||
483 | /* Largest mode is preferred */ | |
484 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) | |
485 | preferred_mode = cur_mode; | |
486 | ||
487 | /* At a given size, try to get closest to target refresh */ | |
488 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && | |
489 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < | |
490 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { | |
491 | preferred_mode = cur_mode; | |
492 | } | |
493 | } | |
494 | ||
495 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; | |
496 | } | |
497 | ||
f6e252ba AJ |
498 | static bool |
499 | mode_is_rb(const struct drm_display_mode *mode) | |
500 | { | |
501 | return (mode->htotal - mode->hdisplay == 160) && | |
502 | (mode->hsync_end - mode->hdisplay == 80) && | |
503 | (mode->hsync_end - mode->hsync_start == 32) && | |
504 | (mode->vsync_start - mode->vdisplay == 3); | |
505 | } | |
506 | ||
33c7531d AJ |
507 | /* |
508 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT | |
509 | * @dev: Device to duplicate against | |
510 | * @hsize: Mode width | |
511 | * @vsize: Mode height | |
512 | * @fresh: Mode refresh rate | |
f6e252ba | 513 | * @rb: Mode reduced-blanking-ness |
33c7531d AJ |
514 | * |
515 | * Walk the DMT mode list looking for a match for the given parameters. | |
516 | * Return a newly allocated copy of the mode, or NULL if not found. | |
517 | */ | |
1d42bbc8 | 518 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
f6e252ba AJ |
519 | int hsize, int vsize, int fresh, |
520 | bool rb) | |
559ee21d | 521 | { |
07a5e632 | 522 | int i; |
559ee21d | 523 | |
07a5e632 | 524 | for (i = 0; i < drm_num_dmt_modes; i++) { |
b1f559ec | 525 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f8b46a05 AJ |
526 | if (hsize != ptr->hdisplay) |
527 | continue; | |
528 | if (vsize != ptr->vdisplay) | |
529 | continue; | |
530 | if (fresh != drm_mode_vrefresh(ptr)) | |
531 | continue; | |
f6e252ba AJ |
532 | if (rb != mode_is_rb(ptr)) |
533 | continue; | |
f8b46a05 AJ |
534 | |
535 | return drm_mode_duplicate(dev, ptr); | |
559ee21d | 536 | } |
f8b46a05 AJ |
537 | |
538 | return NULL; | |
559ee21d | 539 | } |
1d42bbc8 | 540 | EXPORT_SYMBOL(drm_mode_find_dmt); |
23425cae | 541 | |
d1ff6409 AJ |
542 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
543 | ||
4d76a221 AJ |
544 | static void |
545 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
546 | { | |
547 | int i, n = 0; | |
4966b2a9 | 548 | u8 d = ext[0x02]; |
4d76a221 AJ |
549 | u8 *det_base = ext + d; |
550 | ||
4966b2a9 | 551 | n = (127 - d) / 18; |
4d76a221 AJ |
552 | for (i = 0; i < n; i++) |
553 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
554 | } | |
555 | ||
cbba98f8 AJ |
556 | static void |
557 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
558 | { | |
559 | unsigned int i, n = min((int)ext[0x02], 6); | |
560 | u8 *det_base = ext + 5; | |
561 | ||
562 | if (ext[0x01] != 1) | |
563 | return; /* unknown version */ | |
564 | ||
565 | for (i = 0; i < n; i++) | |
566 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
567 | } | |
568 | ||
d1ff6409 AJ |
569 | static void |
570 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) | |
571 | { | |
572 | int i; | |
573 | struct edid *edid = (struct edid *)raw_edid; | |
574 | ||
575 | if (edid == NULL) | |
576 | return; | |
577 | ||
578 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) | |
579 | cb(&(edid->detailed_timings[i]), closure); | |
580 | ||
4d76a221 AJ |
581 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
582 | u8 *ext = raw_edid + (i * EDID_LENGTH); | |
583 | switch (*ext) { | |
584 | case CEA_EXT: | |
585 | cea_for_each_detailed_block(ext, cb, closure); | |
586 | break; | |
cbba98f8 AJ |
587 | case VTB_EXT: |
588 | vtb_for_each_detailed_block(ext, cb, closure); | |
589 | break; | |
4d76a221 AJ |
590 | default: |
591 | break; | |
592 | } | |
593 | } | |
d1ff6409 AJ |
594 | } |
595 | ||
596 | static void | |
597 | is_rb(struct detailed_timing *t, void *data) | |
598 | { | |
599 | u8 *r = (u8 *)t; | |
600 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) | |
601 | if (r[15] & 0x10) | |
602 | *(bool *)data = true; | |
603 | } | |
604 | ||
605 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ | |
606 | static bool | |
607 | drm_monitor_supports_rb(struct edid *edid) | |
608 | { | |
609 | if (edid->revision >= 4) { | |
b196a498 | 610 | bool ret = false; |
d1ff6409 AJ |
611 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
612 | return ret; | |
613 | } | |
614 | ||
615 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); | |
616 | } | |
617 | ||
7a374350 AJ |
618 | static void |
619 | find_gtf2(struct detailed_timing *t, void *data) | |
620 | { | |
621 | u8 *r = (u8 *)t; | |
622 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) | |
623 | *(u8 **)data = r; | |
624 | } | |
625 | ||
626 | /* Secondary GTF curve kicks in above some break frequency */ | |
627 | static int | |
628 | drm_gtf2_hbreak(struct edid *edid) | |
629 | { | |
630 | u8 *r = NULL; | |
631 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
632 | return r ? (r[12] * 2) : 0; | |
633 | } | |
634 | ||
635 | static int | |
636 | drm_gtf2_2c(struct edid *edid) | |
637 | { | |
638 | u8 *r = NULL; | |
639 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
640 | return r ? r[13] : 0; | |
641 | } | |
642 | ||
643 | static int | |
644 | drm_gtf2_m(struct edid *edid) | |
645 | { | |
646 | u8 *r = NULL; | |
647 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
648 | return r ? (r[15] << 8) + r[14] : 0; | |
649 | } | |
650 | ||
651 | static int | |
652 | drm_gtf2_k(struct edid *edid) | |
653 | { | |
654 | u8 *r = NULL; | |
655 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
656 | return r ? r[16] : 0; | |
657 | } | |
658 | ||
659 | static int | |
660 | drm_gtf2_2j(struct edid *edid) | |
661 | { | |
662 | u8 *r = NULL; | |
663 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
664 | return r ? r[17] : 0; | |
665 | } | |
666 | ||
667 | /** | |
668 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) | |
669 | * @edid: EDID block to scan | |
670 | */ | |
671 | static int standard_timing_level(struct edid *edid) | |
672 | { | |
673 | if (edid->revision >= 2) { | |
674 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) | |
675 | return LEVEL_CVT; | |
676 | if (drm_gtf2_hbreak(edid)) | |
677 | return LEVEL_GTF2; | |
678 | return LEVEL_GTF; | |
679 | } | |
680 | return LEVEL_DMT; | |
681 | } | |
682 | ||
23425cae AJ |
683 | /* |
684 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old | |
685 | * monitors fill with ascii space (0x20) instead. | |
686 | */ | |
687 | static int | |
688 | bad_std_timing(u8 a, u8 b) | |
689 | { | |
690 | return (a == 0x00 && b == 0x00) || | |
691 | (a == 0x01 && b == 0x01) || | |
692 | (a == 0x20 && b == 0x20); | |
693 | } | |
694 | ||
f453ba04 DA |
695 | /** |
696 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode | |
697 | * @t: standard timing params | |
5c61259e | 698 | * @timing_level: standard timing level |
f453ba04 DA |
699 | * |
700 | * Take the standard timing params (in this case width, aspect, and refresh) | |
5c61259e | 701 | * and convert them into a real mode using CVT/GTF/DMT. |
f453ba04 | 702 | */ |
7ca6adb3 | 703 | static struct drm_display_mode * |
7a374350 AJ |
704 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
705 | struct std_timing *t, int revision) | |
f453ba04 | 706 | { |
7ca6adb3 AJ |
707 | struct drm_device *dev = connector->dev; |
708 | struct drm_display_mode *m, *mode = NULL; | |
5c61259e ZY |
709 | int hsize, vsize; |
710 | int vrefresh_rate; | |
0454beab MD |
711 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
712 | >> EDID_TIMING_ASPECT_SHIFT; | |
5c61259e ZY |
713 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
714 | >> EDID_TIMING_VFREQ_SHIFT; | |
7a374350 | 715 | int timing_level = standard_timing_level(edid); |
5c61259e | 716 | |
23425cae AJ |
717 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
718 | return NULL; | |
719 | ||
5c61259e ZY |
720 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
721 | hsize = t->hsize * 8 + 248; | |
722 | /* vrefresh_rate = vfreq + 60 */ | |
723 | vrefresh_rate = vfreq + 60; | |
724 | /* the vdisplay is calculated based on the aspect ratio */ | |
f066a17d AJ |
725 | if (aspect_ratio == 0) { |
726 | if (revision < 3) | |
727 | vsize = hsize; | |
728 | else | |
729 | vsize = (hsize * 10) / 16; | |
730 | } else if (aspect_ratio == 1) | |
f453ba04 | 731 | vsize = (hsize * 3) / 4; |
0454beab | 732 | else if (aspect_ratio == 2) |
f453ba04 DA |
733 | vsize = (hsize * 4) / 5; |
734 | else | |
735 | vsize = (hsize * 9) / 16; | |
a0910c8e AJ |
736 | |
737 | /* HDTV hack, part 1 */ | |
738 | if (vrefresh_rate == 60 && | |
739 | ((hsize == 1360 && vsize == 765) || | |
740 | (hsize == 1368 && vsize == 769))) { | |
741 | hsize = 1366; | |
742 | vsize = 768; | |
743 | } | |
744 | ||
7ca6adb3 AJ |
745 | /* |
746 | * If this connector already has a mode for this size and refresh | |
747 | * rate (because it came from detailed or CVT info), use that | |
748 | * instead. This way we don't have to guess at interlace or | |
749 | * reduced blanking. | |
750 | */ | |
522032da | 751 | list_for_each_entry(m, &connector->probed_modes, head) |
7ca6adb3 AJ |
752 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
753 | drm_mode_vrefresh(m) == vrefresh_rate) | |
754 | return NULL; | |
755 | ||
a0910c8e AJ |
756 | /* HDTV hack, part 2 */ |
757 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { | |
758 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, | |
d50ba256 | 759 | false); |
559ee21d | 760 | mode->hdisplay = 1366; |
a4967de6 AJ |
761 | mode->hsync_start = mode->hsync_start - 1; |
762 | mode->hsync_end = mode->hsync_end - 1; | |
559ee21d ZY |
763 | return mode; |
764 | } | |
a0910c8e | 765 | |
559ee21d | 766 | /* check whether it can be found in default mode table */ |
f6e252ba AJ |
767 | if (drm_monitor_supports_rb(edid)) { |
768 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, | |
769 | true); | |
770 | if (mode) | |
771 | return mode; | |
772 | } | |
773 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); | |
559ee21d ZY |
774 | if (mode) |
775 | return mode; | |
776 | ||
f6e252ba | 777 | /* okay, generate it */ |
5c61259e ZY |
778 | switch (timing_level) { |
779 | case LEVEL_DMT: | |
5c61259e ZY |
780 | break; |
781 | case LEVEL_GTF: | |
782 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
783 | break; | |
7a374350 AJ |
784 | case LEVEL_GTF2: |
785 | /* | |
786 | * This is potentially wrong if there's ever a monitor with | |
787 | * more than one ranges section, each claiming a different | |
788 | * secondary GTF curve. Please don't do that. | |
789 | */ | |
790 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
fc48f169 TI |
791 | if (!mode) |
792 | return NULL; | |
7a374350 | 793 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
aefd330e | 794 | drm_mode_destroy(dev, mode); |
7a374350 AJ |
795 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
796 | vrefresh_rate, 0, 0, | |
797 | drm_gtf2_m(edid), | |
798 | drm_gtf2_2c(edid), | |
799 | drm_gtf2_k(edid), | |
800 | drm_gtf2_2j(edid)); | |
801 | } | |
802 | break; | |
5c61259e | 803 | case LEVEL_CVT: |
d50ba256 DA |
804 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
805 | false); | |
5c61259e ZY |
806 | break; |
807 | } | |
f453ba04 DA |
808 | return mode; |
809 | } | |
810 | ||
b58db2c6 AJ |
811 | /* |
812 | * EDID is delightfully ambiguous about how interlaced modes are to be | |
813 | * encoded. Our internal representation is of frame height, but some | |
814 | * HDTV detailed timings are encoded as field height. | |
815 | * | |
816 | * The format list here is from CEA, in frame size. Technically we | |
817 | * should be checking refresh rate too. Whatever. | |
818 | */ | |
819 | static void | |
820 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, | |
821 | struct detailed_pixel_timing *pt) | |
822 | { | |
823 | int i; | |
824 | static const struct { | |
825 | int w, h; | |
826 | } cea_interlaced[] = { | |
827 | { 1920, 1080 }, | |
828 | { 720, 480 }, | |
829 | { 1440, 480 }, | |
830 | { 2880, 480 }, | |
831 | { 720, 576 }, | |
832 | { 1440, 576 }, | |
833 | { 2880, 576 }, | |
834 | }; | |
b58db2c6 AJ |
835 | |
836 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) | |
837 | return; | |
838 | ||
3c581411 | 839 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
b58db2c6 AJ |
840 | if ((mode->hdisplay == cea_interlaced[i].w) && |
841 | (mode->vdisplay == cea_interlaced[i].h / 2)) { | |
842 | mode->vdisplay *= 2; | |
843 | mode->vsync_start *= 2; | |
844 | mode->vsync_end *= 2; | |
845 | mode->vtotal *= 2; | |
846 | mode->vtotal |= 1; | |
847 | } | |
848 | } | |
849 | ||
850 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
851 | } | |
852 | ||
f453ba04 DA |
853 | /** |
854 | * drm_mode_detailed - create a new mode from an EDID detailed timing section | |
855 | * @dev: DRM device (needed to create new mode) | |
856 | * @edid: EDID block | |
857 | * @timing: EDID detailed timing info | |
858 | * @quirks: quirks to apply | |
859 | * | |
860 | * An EDID detailed timing block contains enough info for us to create and | |
861 | * return a new struct drm_display_mode. | |
862 | */ | |
863 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |
864 | struct edid *edid, | |
865 | struct detailed_timing *timing, | |
866 | u32 quirks) | |
867 | { | |
868 | struct drm_display_mode *mode; | |
869 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; | |
0454beab MD |
870 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
871 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; | |
872 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; | |
873 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; | |
e14cbee4 MD |
874 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
875 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; | |
876 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; | |
877 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); | |
f453ba04 | 878 | |
fc438966 | 879 | /* ignore tiny modes */ |
0454beab | 880 | if (hactive < 64 || vactive < 64) |
fc438966 AJ |
881 | return NULL; |
882 | ||
0454beab | 883 | if (pt->misc & DRM_EDID_PT_STEREO) { |
f453ba04 DA |
884 | printk(KERN_WARNING "stereo mode not supported\n"); |
885 | return NULL; | |
886 | } | |
0454beab | 887 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
79b7dcb2 | 888 | printk(KERN_WARNING "composite sync not supported\n"); |
f453ba04 DA |
889 | } |
890 | ||
fcb45611 ZY |
891 | /* it is incorrect if hsync/vsync width is zero */ |
892 | if (!hsync_pulse_width || !vsync_pulse_width) { | |
893 | DRM_DEBUG_KMS("Incorrect Detailed timing. " | |
894 | "Wrong Hsync/Vsync pulse width\n"); | |
895 | return NULL; | |
896 | } | |
bc42aabc AJ |
897 | |
898 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { | |
899 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); | |
900 | if (!mode) | |
901 | return NULL; | |
902 | ||
903 | goto set_size; | |
904 | } | |
905 | ||
f453ba04 DA |
906 | mode = drm_mode_create(dev); |
907 | if (!mode) | |
908 | return NULL; | |
909 | ||
f453ba04 | 910 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
0454beab MD |
911 | timing->pixel_clock = cpu_to_le16(1088); |
912 | ||
913 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; | |
914 | ||
915 | mode->hdisplay = hactive; | |
916 | mode->hsync_start = mode->hdisplay + hsync_offset; | |
917 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; | |
918 | mode->htotal = mode->hdisplay + hblank; | |
919 | ||
920 | mode->vdisplay = vactive; | |
921 | mode->vsync_start = mode->vdisplay + vsync_offset; | |
922 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; | |
923 | mode->vtotal = mode->vdisplay + vblank; | |
f453ba04 | 924 | |
7064fef5 JB |
925 | /* Some EDIDs have bogus h/vtotal values */ |
926 | if (mode->hsync_end > mode->htotal) | |
927 | mode->htotal = mode->hsync_end + 1; | |
928 | if (mode->vsync_end > mode->vtotal) | |
929 | mode->vtotal = mode->vsync_end + 1; | |
930 | ||
b58db2c6 | 931 | drm_mode_do_interlace_quirk(mode, pt); |
f453ba04 DA |
932 | |
933 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { | |
0454beab | 934 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
f453ba04 DA |
935 | } |
936 | ||
0454beab MD |
937 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
938 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; | |
939 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? | |
940 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; | |
f453ba04 | 941 | |
bc42aabc | 942 | set_size: |
e14cbee4 MD |
943 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
944 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; | |
f453ba04 DA |
945 | |
946 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { | |
947 | mode->width_mm *= 10; | |
948 | mode->height_mm *= 10; | |
949 | } | |
950 | ||
951 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { | |
952 | mode->width_mm = edid->width_cm * 10; | |
953 | mode->height_mm = edid->height_cm * 10; | |
954 | } | |
955 | ||
bc42aabc AJ |
956 | mode->type = DRM_MODE_TYPE_DRIVER; |
957 | drm_mode_set_name(mode); | |
958 | ||
f453ba04 DA |
959 | return mode; |
960 | } | |
961 | ||
b17e52ef | 962 | static bool |
b1f559ec CW |
963 | mode_in_hsync_range(const struct drm_display_mode *mode, |
964 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
965 | { |
966 | int hsync, hmin, hmax; | |
967 | ||
968 | hmin = t[7]; | |
969 | if (edid->revision >= 4) | |
970 | hmin += ((t[4] & 0x04) ? 255 : 0); | |
971 | hmax = t[8]; | |
972 | if (edid->revision >= 4) | |
973 | hmax += ((t[4] & 0x08) ? 255 : 0); | |
07a5e632 | 974 | hsync = drm_mode_hsync(mode); |
07a5e632 | 975 | |
b17e52ef AJ |
976 | return (hsync <= hmax && hsync >= hmin); |
977 | } | |
978 | ||
979 | static bool | |
b1f559ec CW |
980 | mode_in_vsync_range(const struct drm_display_mode *mode, |
981 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
982 | { |
983 | int vsync, vmin, vmax; | |
984 | ||
985 | vmin = t[5]; | |
986 | if (edid->revision >= 4) | |
987 | vmin += ((t[4] & 0x01) ? 255 : 0); | |
988 | vmax = t[6]; | |
989 | if (edid->revision >= 4) | |
990 | vmax += ((t[4] & 0x02) ? 255 : 0); | |
991 | vsync = drm_mode_vrefresh(mode); | |
992 | ||
993 | return (vsync <= vmax && vsync >= vmin); | |
994 | } | |
995 | ||
996 | static u32 | |
997 | range_pixel_clock(struct edid *edid, u8 *t) | |
998 | { | |
999 | /* unspecified */ | |
1000 | if (t[9] == 0 || t[9] == 255) | |
1001 | return 0; | |
1002 | ||
1003 | /* 1.4 with CVT support gives us real precision, yay */ | |
1004 | if (edid->revision >= 4 && t[10] == 0x04) | |
1005 | return (t[9] * 10000) - ((t[12] >> 2) * 250); | |
1006 | ||
1007 | /* 1.3 is pathetic, so fuzz up a bit */ | |
1008 | return t[9] * 10000 + 5001; | |
1009 | } | |
1010 | ||
b17e52ef | 1011 | static bool |
b1f559ec | 1012 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
b17e52ef AJ |
1013 | struct detailed_timing *timing) |
1014 | { | |
1015 | u32 max_clock; | |
1016 | u8 *t = (u8 *)timing; | |
1017 | ||
1018 | if (!mode_in_hsync_range(mode, edid, t)) | |
07a5e632 AJ |
1019 | return false; |
1020 | ||
b17e52ef | 1021 | if (!mode_in_vsync_range(mode, edid, t)) |
07a5e632 AJ |
1022 | return false; |
1023 | ||
b17e52ef | 1024 | if ((max_clock = range_pixel_clock(edid, t))) |
07a5e632 AJ |
1025 | if (mode->clock > max_clock) |
1026 | return false; | |
b17e52ef AJ |
1027 | |
1028 | /* 1.4 max horizontal check */ | |
1029 | if (edid->revision >= 4 && t[10] == 0x04) | |
1030 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) | |
1031 | return false; | |
1032 | ||
1033 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) | |
1034 | return false; | |
07a5e632 AJ |
1035 | |
1036 | return true; | |
1037 | } | |
1038 | ||
7b668ebe TI |
1039 | static bool valid_inferred_mode(const struct drm_connector *connector, |
1040 | const struct drm_display_mode *mode) | |
1041 | { | |
1042 | struct drm_display_mode *m; | |
1043 | bool ok = false; | |
1044 | ||
1045 | list_for_each_entry(m, &connector->probed_modes, head) { | |
1046 | if (mode->hdisplay == m->hdisplay && | |
1047 | mode->vdisplay == m->vdisplay && | |
1048 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) | |
1049 | return false; /* duplicated */ | |
1050 | if (mode->hdisplay <= m->hdisplay && | |
1051 | mode->vdisplay <= m->vdisplay) | |
1052 | ok = true; | |
1053 | } | |
1054 | return ok; | |
1055 | } | |
1056 | ||
b17e52ef | 1057 | static int |
cd4cd3de | 1058 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
b17e52ef | 1059 | struct detailed_timing *timing) |
07a5e632 AJ |
1060 | { |
1061 | int i, modes = 0; | |
1062 | struct drm_display_mode *newmode; | |
1063 | struct drm_device *dev = connector->dev; | |
1064 | ||
1065 | for (i = 0; i < drm_num_dmt_modes; i++) { | |
7b668ebe TI |
1066 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
1067 | valid_inferred_mode(connector, drm_dmt_modes + i)) { | |
07a5e632 AJ |
1068 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1069 | if (newmode) { | |
1070 | drm_mode_probed_add(connector, newmode); | |
1071 | modes++; | |
1072 | } | |
1073 | } | |
1074 | } | |
1075 | ||
1076 | return modes; | |
1077 | } | |
1078 | ||
c09dedb7 TI |
1079 | /* fix up 1366x768 mode from 1368x768; |
1080 | * GFT/CVT can't express 1366 width which isn't dividable by 8 | |
1081 | */ | |
1082 | static void fixup_mode_1366x768(struct drm_display_mode *mode) | |
1083 | { | |
1084 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { | |
1085 | mode->hdisplay = 1366; | |
1086 | mode->hsync_start--; | |
1087 | mode->hsync_end--; | |
1088 | drm_mode_set_name(mode); | |
1089 | } | |
1090 | } | |
1091 | ||
b309bd37 AJ |
1092 | static int |
1093 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1094 | struct detailed_timing *timing) | |
1095 | { | |
1096 | int i, modes = 0; | |
1097 | struct drm_display_mode *newmode; | |
1098 | struct drm_device *dev = connector->dev; | |
1099 | ||
1100 | for (i = 0; i < num_extra_modes; i++) { | |
1101 | const struct minimode *m = &extra_modes[i]; | |
1102 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); | |
fc48f169 TI |
1103 | if (!newmode) |
1104 | return modes; | |
b309bd37 | 1105 | |
c09dedb7 | 1106 | fixup_mode_1366x768(newmode); |
7b668ebe TI |
1107 | if (!mode_in_range(newmode, edid, timing) || |
1108 | !valid_inferred_mode(connector, newmode)) { | |
b309bd37 AJ |
1109 | drm_mode_destroy(dev, newmode); |
1110 | continue; | |
1111 | } | |
1112 | ||
1113 | drm_mode_probed_add(connector, newmode); | |
1114 | modes++; | |
1115 | } | |
1116 | ||
1117 | return modes; | |
1118 | } | |
1119 | ||
1120 | static int | |
1121 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1122 | struct detailed_timing *timing) | |
1123 | { | |
1124 | int i, modes = 0; | |
1125 | struct drm_display_mode *newmode; | |
1126 | struct drm_device *dev = connector->dev; | |
1127 | bool rb = drm_monitor_supports_rb(edid); | |
1128 | ||
1129 | for (i = 0; i < num_extra_modes; i++) { | |
1130 | const struct minimode *m = &extra_modes[i]; | |
1131 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); | |
fc48f169 TI |
1132 | if (!newmode) |
1133 | return modes; | |
b309bd37 | 1134 | |
c09dedb7 | 1135 | fixup_mode_1366x768(newmode); |
7b668ebe TI |
1136 | if (!mode_in_range(newmode, edid, timing) || |
1137 | !valid_inferred_mode(connector, newmode)) { | |
b309bd37 AJ |
1138 | drm_mode_destroy(dev, newmode); |
1139 | continue; | |
1140 | } | |
1141 | ||
1142 | drm_mode_probed_add(connector, newmode); | |
1143 | modes++; | |
1144 | } | |
1145 | ||
1146 | return modes; | |
1147 | } | |
1148 | ||
13931579 AJ |
1149 | static void |
1150 | do_inferred_modes(struct detailed_timing *timing, void *c) | |
9340d8cf | 1151 | { |
13931579 AJ |
1152 | struct detailed_mode_closure *closure = c; |
1153 | struct detailed_non_pixel *data = &timing->data.other_data; | |
b309bd37 | 1154 | struct detailed_data_monitor_range *range = &data->data.range; |
9340d8cf | 1155 | |
cb21aafe AJ |
1156 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
1157 | return; | |
1158 | ||
1159 | closure->modes += drm_dmt_modes_for_range(closure->connector, | |
1160 | closure->edid, | |
1161 | timing); | |
b309bd37 AJ |
1162 | |
1163 | if (!version_greater(closure->edid, 1, 1)) | |
1164 | return; /* GTF not defined yet */ | |
1165 | ||
1166 | switch (range->flags) { | |
1167 | case 0x02: /* secondary gtf, XXX could do more */ | |
1168 | case 0x00: /* default gtf */ | |
1169 | closure->modes += drm_gtf_modes_for_range(closure->connector, | |
1170 | closure->edid, | |
1171 | timing); | |
1172 | break; | |
1173 | case 0x04: /* cvt, only in 1.4+ */ | |
1174 | if (!version_greater(closure->edid, 1, 3)) | |
1175 | break; | |
1176 | ||
1177 | closure->modes += drm_cvt_modes_for_range(closure->connector, | |
1178 | closure->edid, | |
1179 | timing); | |
1180 | break; | |
1181 | case 0x01: /* just the ranges, no formula */ | |
1182 | default: | |
1183 | break; | |
1184 | } | |
13931579 | 1185 | } |
69da3015 | 1186 | |
13931579 AJ |
1187 | static int |
1188 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) | |
1189 | { | |
1190 | struct detailed_mode_closure closure = { | |
1191 | connector, edid, 0, 0, 0 | |
1192 | }; | |
9340d8cf | 1193 | |
13931579 AJ |
1194 | if (version_greater(edid, 1, 0)) |
1195 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, | |
1196 | &closure); | |
9340d8cf | 1197 | |
13931579 | 1198 | return closure.modes; |
9340d8cf AJ |
1199 | } |
1200 | ||
2255be14 AJ |
1201 | static int |
1202 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) | |
1203 | { | |
1204 | int i, j, m, modes = 0; | |
1205 | struct drm_display_mode *mode; | |
1206 | u8 *est = ((u8 *)timing) + 5; | |
1207 | ||
1208 | for (i = 0; i < 6; i++) { | |
1209 | for (j = 7; j > 0; j--) { | |
1210 | m = (i * 8) + (7 - j); | |
3c581411 | 1211 | if (m >= ARRAY_SIZE(est3_modes)) |
2255be14 AJ |
1212 | break; |
1213 | if (est[i] & (1 << j)) { | |
1d42bbc8 DA |
1214 | mode = drm_mode_find_dmt(connector->dev, |
1215 | est3_modes[m].w, | |
1216 | est3_modes[m].h, | |
f6e252ba AJ |
1217 | est3_modes[m].r, |
1218 | est3_modes[m].rb); | |
2255be14 AJ |
1219 | if (mode) { |
1220 | drm_mode_probed_add(connector, mode); | |
1221 | modes++; | |
1222 | } | |
1223 | } | |
1224 | } | |
1225 | } | |
1226 | ||
1227 | return modes; | |
1228 | } | |
1229 | ||
13931579 AJ |
1230 | static void |
1231 | do_established_modes(struct detailed_timing *timing, void *c) | |
9cf00977 | 1232 | { |
13931579 | 1233 | struct detailed_mode_closure *closure = c; |
9cf00977 | 1234 | struct detailed_non_pixel *data = &timing->data.other_data; |
9cf00977 | 1235 | |
13931579 AJ |
1236 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
1237 | closure->modes += drm_est3_modes(closure->connector, timing); | |
1238 | } | |
9cf00977 | 1239 | |
13931579 AJ |
1240 | /** |
1241 | * add_established_modes - get est. modes from EDID and add them | |
1242 | * @edid: EDID block to scan | |
1243 | * | |
1244 | * Each EDID block contains a bitmap of the supported "established modes" list | |
1245 | * (defined above). Tease them out and add them to the global modes list. | |
1246 | */ | |
1247 | static int | |
1248 | add_established_modes(struct drm_connector *connector, struct edid *edid) | |
1249 | { | |
1250 | struct drm_device *dev = connector->dev; | |
1251 | unsigned long est_bits = edid->established_timings.t1 | | |
1252 | (edid->established_timings.t2 << 8) | | |
1253 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); | |
1254 | int i, modes = 0; | |
1255 | struct detailed_mode_closure closure = { | |
1256 | connector, edid, 0, 0, 0 | |
1257 | }; | |
9cf00977 | 1258 | |
13931579 AJ |
1259 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
1260 | if (est_bits & (1<<i)) { | |
1261 | struct drm_display_mode *newmode; | |
1262 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); | |
1263 | if (newmode) { | |
1264 | drm_mode_probed_add(connector, newmode); | |
1265 | modes++; | |
1266 | } | |
1267 | } | |
9cf00977 AJ |
1268 | } |
1269 | ||
13931579 AJ |
1270 | if (version_greater(edid, 1, 0)) |
1271 | drm_for_each_detailed_block((u8 *)edid, | |
1272 | do_established_modes, &closure); | |
1273 | ||
1274 | return modes + closure.modes; | |
1275 | } | |
1276 | ||
1277 | static void | |
1278 | do_standard_modes(struct detailed_timing *timing, void *c) | |
1279 | { | |
1280 | struct detailed_mode_closure *closure = c; | |
1281 | struct detailed_non_pixel *data = &timing->data.other_data; | |
1282 | struct drm_connector *connector = closure->connector; | |
1283 | struct edid *edid = closure->edid; | |
1284 | ||
1285 | if (data->type == EDID_DETAIL_STD_MODES) { | |
1286 | int i; | |
9cf00977 AJ |
1287 | for (i = 0; i < 6; i++) { |
1288 | struct std_timing *std; | |
1289 | struct drm_display_mode *newmode; | |
1290 | ||
1291 | std = &data->data.timings[i]; | |
7a374350 AJ |
1292 | newmode = drm_mode_std(connector, edid, std, |
1293 | edid->revision); | |
9cf00977 AJ |
1294 | if (newmode) { |
1295 | drm_mode_probed_add(connector, newmode); | |
13931579 | 1296 | closure->modes++; |
9cf00977 AJ |
1297 | } |
1298 | } | |
9cf00977 | 1299 | } |
9cf00977 AJ |
1300 | } |
1301 | ||
f453ba04 | 1302 | /** |
13931579 | 1303 | * add_standard_modes - get std. modes from EDID and add them |
f453ba04 | 1304 | * @edid: EDID block to scan |
f453ba04 | 1305 | * |
13931579 AJ |
1306 | * Standard modes can be calculated using the appropriate standard (DMT, |
1307 | * GTF or CVT. Grab them from @edid and add them to the list. | |
f453ba04 | 1308 | */ |
13931579 AJ |
1309 | static int |
1310 | add_standard_modes(struct drm_connector *connector, struct edid *edid) | |
f453ba04 | 1311 | { |
9cf00977 | 1312 | int i, modes = 0; |
13931579 AJ |
1313 | struct detailed_mode_closure closure = { |
1314 | connector, edid, 0, 0, 0 | |
1315 | }; | |
1316 | ||
1317 | for (i = 0; i < EDID_STD_TIMINGS; i++) { | |
1318 | struct drm_display_mode *newmode; | |
1319 | ||
1320 | newmode = drm_mode_std(connector, edid, | |
1321 | &edid->standard_timings[i], | |
1322 | edid->revision); | |
1323 | if (newmode) { | |
1324 | drm_mode_probed_add(connector, newmode); | |
1325 | modes++; | |
1326 | } | |
1327 | } | |
1328 | ||
1329 | if (version_greater(edid, 1, 0)) | |
1330 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, | |
1331 | &closure); | |
1332 | ||
1333 | /* XXX should also look for standard codes in VTB blocks */ | |
1334 | ||
1335 | return modes + closure.modes; | |
1336 | } | |
f453ba04 | 1337 | |
13931579 AJ |
1338 | static int drm_cvt_modes(struct drm_connector *connector, |
1339 | struct detailed_timing *timing) | |
1340 | { | |
1341 | int i, j, modes = 0; | |
1342 | struct drm_display_mode *newmode; | |
1343 | struct drm_device *dev = connector->dev; | |
1344 | struct cvt_timing *cvt; | |
1345 | const int rates[] = { 60, 85, 75, 60, 50 }; | |
1346 | const u8 empty[3] = { 0, 0, 0 }; | |
a327f6b8 | 1347 | |
13931579 AJ |
1348 | for (i = 0; i < 4; i++) { |
1349 | int uninitialized_var(width), height; | |
1350 | cvt = &(timing->data.other_data.data.cvt[i]); | |
f453ba04 | 1351 | |
13931579 | 1352 | if (!memcmp(cvt->code, empty, 3)) |
9cf00977 | 1353 | continue; |
f453ba04 | 1354 | |
13931579 AJ |
1355 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
1356 | switch (cvt->code[1] & 0x0c) { | |
1357 | case 0x00: | |
1358 | width = height * 4 / 3; | |
1359 | break; | |
1360 | case 0x04: | |
1361 | width = height * 16 / 9; | |
1362 | break; | |
1363 | case 0x08: | |
1364 | width = height * 16 / 10; | |
1365 | break; | |
1366 | case 0x0c: | |
1367 | width = height * 15 / 9; | |
1368 | break; | |
1369 | } | |
1370 | ||
1371 | for (j = 1; j < 5; j++) { | |
1372 | if (cvt->code[2] & (1 << j)) { | |
1373 | newmode = drm_cvt_mode(dev, width, height, | |
1374 | rates[j], j == 0, | |
1375 | false, false); | |
1376 | if (newmode) { | |
1377 | drm_mode_probed_add(connector, newmode); | |
1378 | modes++; | |
1379 | } | |
1380 | } | |
1381 | } | |
f453ba04 DA |
1382 | } |
1383 | ||
1384 | return modes; | |
1385 | } | |
9cf00977 | 1386 | |
13931579 AJ |
1387 | static void |
1388 | do_cvt_mode(struct detailed_timing *timing, void *c) | |
882f0219 | 1389 | { |
13931579 AJ |
1390 | struct detailed_mode_closure *closure = c; |
1391 | struct detailed_non_pixel *data = &timing->data.other_data; | |
882f0219 | 1392 | |
13931579 AJ |
1393 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
1394 | closure->modes += drm_cvt_modes(closure->connector, timing); | |
1395 | } | |
882f0219 | 1396 | |
13931579 AJ |
1397 | static int |
1398 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) | |
1399 | { | |
1400 | struct detailed_mode_closure closure = { | |
1401 | connector, edid, 0, 0, 0 | |
1402 | }; | |
882f0219 | 1403 | |
13931579 AJ |
1404 | if (version_greater(edid, 1, 2)) |
1405 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); | |
882f0219 | 1406 | |
13931579 | 1407 | /* XXX should also look for CVT codes in VTB blocks */ |
882f0219 | 1408 | |
13931579 AJ |
1409 | return closure.modes; |
1410 | } | |
1411 | ||
1412 | static void | |
1413 | do_detailed_mode(struct detailed_timing *timing, void *c) | |
1414 | { | |
1415 | struct detailed_mode_closure *closure = c; | |
1416 | struct drm_display_mode *newmode; | |
1417 | ||
1418 | if (timing->pixel_clock) { | |
1419 | newmode = drm_mode_detailed(closure->connector->dev, | |
1420 | closure->edid, timing, | |
1421 | closure->quirks); | |
1422 | if (!newmode) | |
1423 | return; | |
1424 | ||
1425 | if (closure->preferred) | |
1426 | newmode->type |= DRM_MODE_TYPE_PREFERRED; | |
1427 | ||
1428 | drm_mode_probed_add(closure->connector, newmode); | |
1429 | closure->modes++; | |
1430 | closure->preferred = 0; | |
882f0219 | 1431 | } |
13931579 | 1432 | } |
882f0219 | 1433 | |
13931579 AJ |
1434 | /* |
1435 | * add_detailed_modes - Add modes from detailed timings | |
1436 | * @connector: attached connector | |
1437 | * @edid: EDID block to scan | |
1438 | * @quirks: quirks to apply | |
1439 | */ | |
1440 | static int | |
1441 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, | |
1442 | u32 quirks) | |
1443 | { | |
1444 | struct detailed_mode_closure closure = { | |
1445 | connector, | |
1446 | edid, | |
1447 | 1, | |
1448 | quirks, | |
1449 | 0 | |
1450 | }; | |
1451 | ||
1452 | if (closure.preferred && !version_greater(edid, 1, 3)) | |
1453 | closure.preferred = | |
1454 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); | |
1455 | ||
1456 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); | |
1457 | ||
1458 | return closure.modes; | |
882f0219 | 1459 | } |
f453ba04 | 1460 | |
f23c20c8 | 1461 | #define HDMI_IDENTIFIER 0x000C03 |
8fe9790d | 1462 | #define AUDIO_BLOCK 0x01 |
54ac76f8 | 1463 | #define VIDEO_BLOCK 0x02 |
f23c20c8 | 1464 | #define VENDOR_BLOCK 0x03 |
76adaa34 | 1465 | #define SPEAKER_BLOCK 0x04 |
8fe9790d | 1466 | #define EDID_BASIC_AUDIO (1 << 6) |
a988bc72 LPC |
1467 | #define EDID_CEA_YCRCB444 (1 << 5) |
1468 | #define EDID_CEA_YCRCB422 (1 << 4) | |
8fe9790d | 1469 | |
f23c20c8 | 1470 | /** |
8fe9790d | 1471 | * Search EDID for CEA extension block. |
f23c20c8 | 1472 | */ |
eccaca28 | 1473 | u8 *drm_find_cea_extension(struct edid *edid) |
f23c20c8 | 1474 | { |
8fe9790d ZW |
1475 | u8 *edid_ext = NULL; |
1476 | int i; | |
f23c20c8 ML |
1477 | |
1478 | /* No EDID or EDID extensions */ | |
1479 | if (edid == NULL || edid->extensions == 0) | |
8fe9790d | 1480 | return NULL; |
f23c20c8 | 1481 | |
f23c20c8 | 1482 | /* Find CEA extension */ |
7466f4cc | 1483 | for (i = 0; i < edid->extensions; i++) { |
8fe9790d ZW |
1484 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
1485 | if (edid_ext[0] == CEA_EXT) | |
f23c20c8 ML |
1486 | break; |
1487 | } | |
1488 | ||
7466f4cc | 1489 | if (i == edid->extensions) |
8fe9790d ZW |
1490 | return NULL; |
1491 | ||
1492 | return edid_ext; | |
1493 | } | |
eccaca28 | 1494 | EXPORT_SYMBOL(drm_find_cea_extension); |
8fe9790d | 1495 | |
54ac76f8 CS |
1496 | static int |
1497 | do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) | |
1498 | { | |
1499 | struct drm_device *dev = connector->dev; | |
1500 | u8 * mode, cea_mode; | |
1501 | int modes = 0; | |
1502 | ||
1503 | for (mode = db; mode < db + len; mode++) { | |
1504 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ | |
1505 | if (cea_mode < drm_num_cea_modes) { | |
1506 | struct drm_display_mode *newmode; | |
1507 | newmode = drm_mode_duplicate(dev, | |
1508 | &edid_cea_modes[cea_mode]); | |
1509 | if (newmode) { | |
1510 | drm_mode_probed_add(connector, newmode); | |
1511 | modes++; | |
1512 | } | |
1513 | } | |
1514 | } | |
1515 | ||
1516 | return modes; | |
1517 | } | |
1518 | ||
9e50b9d5 VS |
1519 | static int |
1520 | cea_db_payload_len(const u8 *db) | |
1521 | { | |
1522 | return db[0] & 0x1f; | |
1523 | } | |
1524 | ||
1525 | static int | |
1526 | cea_db_tag(const u8 *db) | |
1527 | { | |
1528 | return db[0] >> 5; | |
1529 | } | |
1530 | ||
1531 | static int | |
1532 | cea_revision(const u8 *cea) | |
1533 | { | |
1534 | return cea[1]; | |
1535 | } | |
1536 | ||
1537 | static int | |
1538 | cea_db_offsets(const u8 *cea, int *start, int *end) | |
1539 | { | |
1540 | /* Data block offset in CEA extension block */ | |
1541 | *start = 4; | |
1542 | *end = cea[2]; | |
1543 | if (*end == 0) | |
1544 | *end = 127; | |
1545 | if (*end < 4 || *end > 127) | |
1546 | return -ERANGE; | |
1547 | return 0; | |
1548 | } | |
1549 | ||
1550 | #define for_each_cea_db(cea, i, start, end) \ | |
1551 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) | |
1552 | ||
54ac76f8 CS |
1553 | static int |
1554 | add_cea_modes(struct drm_connector *connector, struct edid *edid) | |
1555 | { | |
1556 | u8 * cea = drm_find_cea_extension(edid); | |
1557 | u8 * db, dbl; | |
1558 | int modes = 0; | |
1559 | ||
9e50b9d5 VS |
1560 | if (cea && cea_revision(cea) >= 3) { |
1561 | int i, start, end; | |
1562 | ||
1563 | if (cea_db_offsets(cea, &start, &end)) | |
1564 | return 0; | |
1565 | ||
1566 | for_each_cea_db(cea, i, start, end) { | |
1567 | db = &cea[i]; | |
1568 | dbl = cea_db_payload_len(db); | |
1569 | ||
1570 | if (cea_db_tag(db) == VIDEO_BLOCK) | |
54ac76f8 CS |
1571 | modes += do_cea_modes (connector, db+1, dbl); |
1572 | } | |
1573 | } | |
1574 | ||
1575 | return modes; | |
1576 | } | |
1577 | ||
76adaa34 WF |
1578 | static void |
1579 | parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db) | |
1580 | { | |
1581 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ | |
1582 | ||
1583 | connector->dvi_dual = db[6] & 1; | |
1584 | connector->max_tmds_clock = db[7] * 5; | |
1585 | ||
1586 | connector->latency_present[0] = db[8] >> 7; | |
1587 | connector->latency_present[1] = (db[8] >> 6) & 1; | |
1588 | connector->video_latency[0] = db[9]; | |
1589 | connector->audio_latency[0] = db[10]; | |
1590 | connector->video_latency[1] = db[11]; | |
1591 | connector->audio_latency[1] = db[12]; | |
1592 | ||
1593 | DRM_LOG_KMS("HDMI: DVI dual %d, " | |
1594 | "max TMDS clock %d, " | |
1595 | "latency present %d %d, " | |
1596 | "video latency %d %d, " | |
1597 | "audio latency %d %d\n", | |
1598 | connector->dvi_dual, | |
1599 | connector->max_tmds_clock, | |
1600 | (int) connector->latency_present[0], | |
1601 | (int) connector->latency_present[1], | |
1602 | connector->video_latency[0], | |
1603 | connector->video_latency[1], | |
1604 | connector->audio_latency[0], | |
1605 | connector->audio_latency[1]); | |
1606 | } | |
1607 | ||
1608 | static void | |
1609 | monitor_name(struct detailed_timing *t, void *data) | |
1610 | { | |
1611 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) | |
1612 | *(u8 **)data = t->data.other_data.data.str.str; | |
1613 | } | |
1614 | ||
1615 | /** | |
1616 | * drm_edid_to_eld - build ELD from EDID | |
1617 | * @connector: connector corresponding to the HDMI/DP sink | |
1618 | * @edid: EDID to parse | |
1619 | * | |
1620 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. | |
1621 | * Some ELD fields are left to the graphics driver caller: | |
1622 | * - Conn_Type | |
1623 | * - HDCP | |
1624 | * - Port_ID | |
1625 | */ | |
1626 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) | |
1627 | { | |
1628 | uint8_t *eld = connector->eld; | |
1629 | u8 *cea; | |
1630 | u8 *name; | |
1631 | u8 *db; | |
1632 | int sad_count = 0; | |
1633 | int mnl; | |
1634 | int dbl; | |
1635 | ||
1636 | memset(eld, 0, sizeof(connector->eld)); | |
1637 | ||
1638 | cea = drm_find_cea_extension(edid); | |
1639 | if (!cea) { | |
1640 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); | |
1641 | return; | |
1642 | } | |
1643 | ||
1644 | name = NULL; | |
1645 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); | |
1646 | for (mnl = 0; name && mnl < 13; mnl++) { | |
1647 | if (name[mnl] == 0x0a) | |
1648 | break; | |
1649 | eld[20 + mnl] = name[mnl]; | |
1650 | } | |
1651 | eld[4] = (cea[1] << 5) | mnl; | |
1652 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); | |
1653 | ||
1654 | eld[0] = 2 << 3; /* ELD version: 2 */ | |
1655 | ||
1656 | eld[16] = edid->mfg_id[0]; | |
1657 | eld[17] = edid->mfg_id[1]; | |
1658 | eld[18] = edid->prod_code[0]; | |
1659 | eld[19] = edid->prod_code[1]; | |
1660 | ||
9e50b9d5 VS |
1661 | if (cea_revision(cea) >= 3) { |
1662 | int i, start, end; | |
1663 | ||
1664 | if (cea_db_offsets(cea, &start, &end)) { | |
1665 | start = 0; | |
1666 | end = 0; | |
1667 | } | |
1668 | ||
1669 | for_each_cea_db(cea, i, start, end) { | |
1670 | db = &cea[i]; | |
1671 | dbl = cea_db_payload_len(db); | |
1672 | ||
1673 | switch (cea_db_tag(db)) { | |
a0ab734d CS |
1674 | case AUDIO_BLOCK: |
1675 | /* Audio Data Block, contains SADs */ | |
1676 | sad_count = dbl / 3; | |
9e50b9d5 VS |
1677 | if (dbl >= 1) |
1678 | memcpy(eld + 20 + mnl, &db[1], dbl); | |
a0ab734d CS |
1679 | break; |
1680 | case SPEAKER_BLOCK: | |
9e50b9d5 VS |
1681 | /* Speaker Allocation Data Block */ |
1682 | if (dbl >= 1) | |
1683 | eld[7] = db[1]; | |
a0ab734d CS |
1684 | break; |
1685 | case VENDOR_BLOCK: | |
1686 | /* HDMI Vendor-Specific Data Block */ | |
1687 | if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0) | |
1688 | parse_hdmi_vsdb(connector, db); | |
1689 | break; | |
1690 | default: | |
1691 | break; | |
1692 | } | |
76adaa34 | 1693 | } |
9e50b9d5 | 1694 | } |
76adaa34 WF |
1695 | eld[5] |= sad_count << 4; |
1696 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; | |
1697 | ||
1698 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); | |
1699 | } | |
1700 | EXPORT_SYMBOL(drm_edid_to_eld); | |
1701 | ||
1702 | /** | |
1703 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond | |
1704 | * @connector: connector associated with the HDMI/DP sink | |
1705 | * @mode: the display mode | |
1706 | */ | |
1707 | int drm_av_sync_delay(struct drm_connector *connector, | |
1708 | struct drm_display_mode *mode) | |
1709 | { | |
1710 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); | |
1711 | int a, v; | |
1712 | ||
1713 | if (!connector->latency_present[0]) | |
1714 | return 0; | |
1715 | if (!connector->latency_present[1]) | |
1716 | i = 0; | |
1717 | ||
1718 | a = connector->audio_latency[i]; | |
1719 | v = connector->video_latency[i]; | |
1720 | ||
1721 | /* | |
1722 | * HDMI/DP sink doesn't support audio or video? | |
1723 | */ | |
1724 | if (a == 255 || v == 255) | |
1725 | return 0; | |
1726 | ||
1727 | /* | |
1728 | * Convert raw EDID values to millisecond. | |
1729 | * Treat unknown latency as 0ms. | |
1730 | */ | |
1731 | if (a) | |
1732 | a = min(2 * (a - 1), 500); | |
1733 | if (v) | |
1734 | v = min(2 * (v - 1), 500); | |
1735 | ||
1736 | return max(v - a, 0); | |
1737 | } | |
1738 | EXPORT_SYMBOL(drm_av_sync_delay); | |
1739 | ||
1740 | /** | |
1741 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks | |
1742 | * @encoder: the encoder just changed display mode | |
1743 | * @mode: the adjusted display mode | |
1744 | * | |
1745 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. | |
1746 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. | |
1747 | */ | |
1748 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, | |
1749 | struct drm_display_mode *mode) | |
1750 | { | |
1751 | struct drm_connector *connector; | |
1752 | struct drm_device *dev = encoder->dev; | |
1753 | ||
1754 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) | |
1755 | if (connector->encoder == encoder && connector->eld[0]) | |
1756 | return connector; | |
1757 | ||
1758 | return NULL; | |
1759 | } | |
1760 | EXPORT_SYMBOL(drm_select_eld); | |
1761 | ||
8fe9790d ZW |
1762 | /** |
1763 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. | |
1764 | * @edid: monitor EDID information | |
1765 | * | |
1766 | * Parse the CEA extension according to CEA-861-B. | |
1767 | * Return true if HDMI, false if not or unknown. | |
1768 | */ | |
1769 | bool drm_detect_hdmi_monitor(struct edid *edid) | |
1770 | { | |
1771 | u8 *edid_ext; | |
1772 | int i, hdmi_id; | |
1773 | int start_offset, end_offset; | |
1774 | bool is_hdmi = false; | |
1775 | ||
1776 | edid_ext = drm_find_cea_extension(edid); | |
1777 | if (!edid_ext) | |
f23c20c8 ML |
1778 | goto end; |
1779 | ||
9e50b9d5 VS |
1780 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
1781 | goto end; | |
f23c20c8 ML |
1782 | |
1783 | /* | |
1784 | * Because HDMI identifier is in Vendor Specific Block, | |
1785 | * search it from all data blocks of CEA extension. | |
1786 | */ | |
9e50b9d5 | 1787 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
f23c20c8 | 1788 | /* Find vendor specific block */ |
9e50b9d5 | 1789 | if (cea_db_tag(&edid_ext[i]) == VENDOR_BLOCK) { |
f23c20c8 ML |
1790 | hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | |
1791 | edid_ext[i + 3] << 16; | |
1792 | /* Find HDMI identifier */ | |
1793 | if (hdmi_id == HDMI_IDENTIFIER) | |
1794 | is_hdmi = true; | |
1795 | break; | |
1796 | } | |
1797 | } | |
1798 | ||
1799 | end: | |
1800 | return is_hdmi; | |
1801 | } | |
1802 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); | |
1803 | ||
8fe9790d ZW |
1804 | /** |
1805 | * drm_detect_monitor_audio - check monitor audio capability | |
1806 | * | |
1807 | * Monitor should have CEA extension block. | |
1808 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic | |
1809 | * audio' only. If there is any audio extension block and supported | |
1810 | * audio format, assume at least 'basic audio' support, even if 'basic | |
1811 | * audio' is not defined in EDID. | |
1812 | * | |
1813 | */ | |
1814 | bool drm_detect_monitor_audio(struct edid *edid) | |
1815 | { | |
1816 | u8 *edid_ext; | |
1817 | int i, j; | |
1818 | bool has_audio = false; | |
1819 | int start_offset, end_offset; | |
1820 | ||
1821 | edid_ext = drm_find_cea_extension(edid); | |
1822 | if (!edid_ext) | |
1823 | goto end; | |
1824 | ||
1825 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); | |
1826 | ||
1827 | if (has_audio) { | |
1828 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); | |
1829 | goto end; | |
1830 | } | |
1831 | ||
9e50b9d5 VS |
1832 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
1833 | goto end; | |
8fe9790d | 1834 | |
9e50b9d5 VS |
1835 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
1836 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { | |
8fe9790d | 1837 | has_audio = true; |
9e50b9d5 | 1838 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
8fe9790d ZW |
1839 | DRM_DEBUG_KMS("CEA audio format %d\n", |
1840 | (edid_ext[i + j] >> 3) & 0xf); | |
1841 | goto end; | |
1842 | } | |
1843 | } | |
1844 | end: | |
1845 | return has_audio; | |
1846 | } | |
1847 | EXPORT_SYMBOL(drm_detect_monitor_audio); | |
1848 | ||
3b11228b JB |
1849 | /** |
1850 | * drm_add_display_info - pull display info out if present | |
1851 | * @edid: EDID data | |
1852 | * @info: display info (attached to connector) | |
1853 | * | |
1854 | * Grab any available display info and stuff it into the drm_display_info | |
1855 | * structure that's part of the connector. Useful for tracking bpp and | |
1856 | * color spaces. | |
1857 | */ | |
1858 | static void drm_add_display_info(struct edid *edid, | |
1859 | struct drm_display_info *info) | |
1860 | { | |
ebec9a7b JB |
1861 | u8 *edid_ext; |
1862 | ||
3b11228b JB |
1863 | info->width_mm = edid->width_cm * 10; |
1864 | info->height_mm = edid->height_cm * 10; | |
1865 | ||
1866 | /* driver figures it out in this case */ | |
1867 | info->bpc = 0; | |
da05a5a7 | 1868 | info->color_formats = 0; |
3b11228b | 1869 | |
a988bc72 | 1870 | if (edid->revision < 3) |
3b11228b JB |
1871 | return; |
1872 | ||
1873 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) | |
1874 | return; | |
1875 | ||
a988bc72 LPC |
1876 | /* Get data from CEA blocks if present */ |
1877 | edid_ext = drm_find_cea_extension(edid); | |
1878 | if (edid_ext) { | |
1879 | info->cea_rev = edid_ext[1]; | |
1880 | ||
1881 | /* The existence of a CEA block should imply RGB support */ | |
1882 | info->color_formats = DRM_COLOR_FORMAT_RGB444; | |
1883 | if (edid_ext[3] & EDID_CEA_YCRCB444) | |
1884 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; | |
1885 | if (edid_ext[3] & EDID_CEA_YCRCB422) | |
1886 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; | |
1887 | } | |
1888 | ||
1889 | /* Only defined for 1.4 with digital displays */ | |
1890 | if (edid->revision < 4) | |
1891 | return; | |
1892 | ||
3b11228b JB |
1893 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
1894 | case DRM_EDID_DIGITAL_DEPTH_6: | |
1895 | info->bpc = 6; | |
1896 | break; | |
1897 | case DRM_EDID_DIGITAL_DEPTH_8: | |
1898 | info->bpc = 8; | |
1899 | break; | |
1900 | case DRM_EDID_DIGITAL_DEPTH_10: | |
1901 | info->bpc = 10; | |
1902 | break; | |
1903 | case DRM_EDID_DIGITAL_DEPTH_12: | |
1904 | info->bpc = 12; | |
1905 | break; | |
1906 | case DRM_EDID_DIGITAL_DEPTH_14: | |
1907 | info->bpc = 14; | |
1908 | break; | |
1909 | case DRM_EDID_DIGITAL_DEPTH_16: | |
1910 | info->bpc = 16; | |
1911 | break; | |
1912 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: | |
1913 | default: | |
1914 | info->bpc = 0; | |
1915 | break; | |
1916 | } | |
da05a5a7 | 1917 | |
a988bc72 | 1918 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
ee58808d LPC |
1919 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
1920 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; | |
1921 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) | |
1922 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; | |
3b11228b JB |
1923 | } |
1924 | ||
f453ba04 DA |
1925 | /** |
1926 | * drm_add_edid_modes - add modes from EDID data, if available | |
1927 | * @connector: connector we're probing | |
1928 | * @edid: edid data | |
1929 | * | |
1930 | * Add the specified modes to the connector's mode list. | |
1931 | * | |
1932 | * Return number of modes added or 0 if we couldn't find any. | |
1933 | */ | |
1934 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) | |
1935 | { | |
1936 | int num_modes = 0; | |
1937 | u32 quirks; | |
1938 | ||
1939 | if (edid == NULL) { | |
1940 | return 0; | |
1941 | } | |
3c537889 | 1942 | if (!drm_edid_is_valid(edid)) { |
dcdb1674 | 1943 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
f453ba04 DA |
1944 | drm_get_connector_name(connector)); |
1945 | return 0; | |
1946 | } | |
1947 | ||
1948 | quirks = edid_get_quirks(edid); | |
1949 | ||
c867df70 AJ |
1950 | /* |
1951 | * EDID spec says modes should be preferred in this order: | |
1952 | * - preferred detailed mode | |
1953 | * - other detailed modes from base block | |
1954 | * - detailed modes from extension blocks | |
1955 | * - CVT 3-byte code modes | |
1956 | * - standard timing codes | |
1957 | * - established timing codes | |
1958 | * - modes inferred from GTF or CVT range information | |
1959 | * | |
13931579 | 1960 | * We get this pretty much right. |
c867df70 AJ |
1961 | * |
1962 | * XXX order for additional mode types in extension blocks? | |
1963 | */ | |
13931579 AJ |
1964 | num_modes += add_detailed_modes(connector, edid, quirks); |
1965 | num_modes += add_cvt_modes(connector, edid); | |
c867df70 AJ |
1966 | num_modes += add_standard_modes(connector, edid); |
1967 | num_modes += add_established_modes(connector, edid); | |
13931579 | 1968 | num_modes += add_inferred_modes(connector, edid); |
54ac76f8 | 1969 | num_modes += add_cea_modes(connector, edid); |
f453ba04 DA |
1970 | |
1971 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) | |
1972 | edid_fixup_preferred(connector, quirks); | |
1973 | ||
3b11228b | 1974 | drm_add_display_info(edid, &connector->display_info); |
f453ba04 DA |
1975 | |
1976 | return num_modes; | |
1977 | } | |
1978 | EXPORT_SYMBOL(drm_add_edid_modes); | |
f0fda0a4 ZY |
1979 | |
1980 | /** | |
1981 | * drm_add_modes_noedid - add modes for the connectors without EDID | |
1982 | * @connector: connector we're probing | |
1983 | * @hdisplay: the horizontal display limit | |
1984 | * @vdisplay: the vertical display limit | |
1985 | * | |
1986 | * Add the specified modes to the connector's mode list. Only when the | |
1987 | * hdisplay/vdisplay is not beyond the given limit, it will be added. | |
1988 | * | |
1989 | * Return number of modes added or 0 if we couldn't find any. | |
1990 | */ | |
1991 | int drm_add_modes_noedid(struct drm_connector *connector, | |
1992 | int hdisplay, int vdisplay) | |
1993 | { | |
1994 | int i, count, num_modes = 0; | |
b1f559ec | 1995 | struct drm_display_mode *mode; |
f0fda0a4 ZY |
1996 | struct drm_device *dev = connector->dev; |
1997 | ||
1998 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); | |
1999 | if (hdisplay < 0) | |
2000 | hdisplay = 0; | |
2001 | if (vdisplay < 0) | |
2002 | vdisplay = 0; | |
2003 | ||
2004 | for (i = 0; i < count; i++) { | |
b1f559ec | 2005 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f0fda0a4 ZY |
2006 | if (hdisplay && vdisplay) { |
2007 | /* | |
2008 | * Only when two are valid, they will be used to check | |
2009 | * whether the mode should be added to the mode list of | |
2010 | * the connector. | |
2011 | */ | |
2012 | if (ptr->hdisplay > hdisplay || | |
2013 | ptr->vdisplay > vdisplay) | |
2014 | continue; | |
2015 | } | |
f985dedb AJ |
2016 | if (drm_mode_vrefresh(ptr) > 61) |
2017 | continue; | |
f0fda0a4 ZY |
2018 | mode = drm_mode_duplicate(dev, ptr); |
2019 | if (mode) { | |
2020 | drm_mode_probed_add(connector, mode); | |
2021 | num_modes++; | |
2022 | } | |
2023 | } | |
2024 | return num_modes; | |
2025 | } | |
2026 | EXPORT_SYMBOL(drm_add_modes_noedid); |