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f453ba04 | 1 | /* |
f453ba04 DA |
2 | * Copyright © 1997-2003 by The XFree86 Project, Inc. |
3 | * Copyright © 2007 Dave Airlie | |
4 | * Copyright © 2007-2008 Intel Corporation | |
5 | * Jesse Barnes <jesse.barnes@intel.com> | |
d782c3f9 | 6 | * Copyright 2005-2006 Luc Verhaegen |
26bbdada | 7 | * Copyright (c) 2001, Andy Ritger aritger@nvidia.com |
f453ba04 DA |
8 | * |
9 | * Permission is hereby granted, free of charge, to any person obtaining a | |
10 | * copy of this software and associated documentation files (the "Software"), | |
11 | * to deal in the Software without restriction, including without limitation | |
12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
13 | * and/or sell copies of the Software, and to permit persons to whom the | |
14 | * Software is furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice shall be included in | |
17 | * all copies or substantial portions of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
23 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
25 | * OTHER DEALINGS IN THE SOFTWARE. | |
26 | * | |
27 | * Except as contained in this notice, the name of the copyright holder(s) | |
28 | * and author(s) shall not be used in advertising or otherwise to promote | |
29 | * the sale, use or other dealings in this Software without prior written | |
30 | * authorization from the copyright holder(s) and author(s). | |
31 | */ | |
32 | ||
33 | #include <linux/list.h> | |
2c761270 | 34 | #include <linux/list_sort.h> |
2d1a8a48 | 35 | #include <linux/export.h> |
760285e7 DH |
36 | #include <drm/drmP.h> |
37 | #include <drm/drm_crtc.h> | |
edb37a95 | 38 | #include <video/of_videomode.h> |
ebc64e45 | 39 | #include <video/videomode.h> |
f453ba04 | 40 | |
8bd441b2 DV |
41 | #include "drm_crtc_internal.h" |
42 | ||
f453ba04 | 43 | /** |
3ec0db81 | 44 | * drm_mode_debug_printmodeline - print a mode to dmesg |
f453ba04 DA |
45 | * @mode: mode to print |
46 | * | |
f453ba04 DA |
47 | * Describe @mode using DRM_DEBUG. |
48 | */ | |
0b3904ab | 49 | void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) |
f453ba04 | 50 | { |
f940f37f | 51 | DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " |
8a4c47f3 | 52 | "0x%x 0x%x\n", |
f0531859 | 53 | mode->base.id, mode->name, mode->vrefresh, mode->clock, |
54 | mode->hdisplay, mode->hsync_start, | |
55 | mode->hsync_end, mode->htotal, | |
56 | mode->vdisplay, mode->vsync_start, | |
57 | mode->vsync_end, mode->vtotal, mode->type, mode->flags); | |
f453ba04 DA |
58 | } |
59 | EXPORT_SYMBOL(drm_mode_debug_printmodeline); | |
60 | ||
8bd441b2 DV |
61 | /** |
62 | * drm_mode_create - create a new display mode | |
63 | * @dev: DRM device | |
64 | * | |
65 | * Create a new drm_display_mode, give it an ID, and return it. | |
66 | * | |
67 | * RETURNS: | |
68 | * Pointer to new mode on success, NULL on error. | |
69 | */ | |
70 | struct drm_display_mode *drm_mode_create(struct drm_device *dev) | |
71 | { | |
72 | struct drm_display_mode *nmode; | |
73 | ||
74 | nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL); | |
75 | if (!nmode) | |
76 | return NULL; | |
77 | ||
78 | if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) { | |
79 | kfree(nmode); | |
80 | return NULL; | |
81 | } | |
82 | ||
83 | return nmode; | |
84 | } | |
85 | EXPORT_SYMBOL(drm_mode_create); | |
86 | ||
87 | /** | |
88 | * drm_mode_destroy - remove a mode | |
89 | * @dev: DRM device | |
90 | * @mode: mode to remove | |
91 | * | |
92 | * Free @mode's unique identifier, then free it. | |
93 | */ | |
94 | void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode) | |
95 | { | |
96 | if (!mode) | |
97 | return; | |
98 | ||
99 | drm_mode_object_put(dev, &mode->base); | |
100 | ||
101 | kfree(mode); | |
102 | } | |
103 | EXPORT_SYMBOL(drm_mode_destroy); | |
104 | ||
105 | /** | |
106 | * drm_mode_probed_add - add a mode to a connector's probed mode list | |
107 | * @connector: connector the new mode | |
108 | * @mode: mode data | |
109 | * | |
110 | * Add @mode to @connector's mode list for later use. | |
111 | */ | |
112 | void drm_mode_probed_add(struct drm_connector *connector, | |
113 | struct drm_display_mode *mode) | |
114 | { | |
115 | WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); | |
116 | ||
117 | list_add_tail(&mode->head, &connector->probed_modes); | |
118 | } | |
119 | EXPORT_SYMBOL(drm_mode_probed_add); | |
120 | ||
d782c3f9 ZY |
121 | /** |
122 | * drm_cvt_mode -create a modeline based on CVT algorithm | |
123 | * @dev: DRM device | |
124 | * @hdisplay: hdisplay size | |
125 | * @vdisplay: vdisplay size | |
126 | * @vrefresh : vrefresh rate | |
127 | * @reduced : Whether the GTF calculation is simplified | |
128 | * @interlaced:Whether the interlace is supported | |
3ec0db81 | 129 | * @margins: whether to add margins or not |
d782c3f9 | 130 | * |
d782c3f9 ZY |
131 | * return the modeline based on CVT algorithm |
132 | * | |
133 | * This function is called to generate the modeline based on CVT algorithm | |
134 | * according to the hdisplay, vdisplay, vrefresh. | |
135 | * It is based from the VESA(TM) Coordinated Video Timing Generator by | |
136 | * Graham Loveridge April 9, 2003 available at | |
631dd1a8 | 137 | * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls |
d782c3f9 ZY |
138 | * |
139 | * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. | |
140 | * What I have done is to translate it by using integer calculation. | |
141 | */ | |
d782c3f9 ZY |
142 | struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, |
143 | int vdisplay, int vrefresh, | |
d50ba256 | 144 | bool reduced, bool interlaced, bool margins) |
d782c3f9 | 145 | { |
3ec0db81 | 146 | #define HV_FACTOR 1000 |
d782c3f9 ZY |
147 | /* 1) top/bottom margin size (% of height) - default: 1.8, */ |
148 | #define CVT_MARGIN_PERCENTAGE 18 | |
149 | /* 2) character cell horizontal granularity (pixels) - default 8 */ | |
150 | #define CVT_H_GRANULARITY 8 | |
151 | /* 3) Minimum vertical porch (lines) - default 3 */ | |
152 | #define CVT_MIN_V_PORCH 3 | |
153 | /* 4) Minimum number of vertical back porch lines - default 6 */ | |
154 | #define CVT_MIN_V_BPORCH 6 | |
155 | /* Pixel Clock step (kHz) */ | |
156 | #define CVT_CLOCK_STEP 250 | |
157 | struct drm_display_mode *drm_mode; | |
d782c3f9 ZY |
158 | unsigned int vfieldrate, hperiod; |
159 | int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; | |
160 | int interlace; | |
161 | ||
162 | /* allocate the drm_display_mode structure. If failure, we will | |
163 | * return directly | |
164 | */ | |
165 | drm_mode = drm_mode_create(dev); | |
166 | if (!drm_mode) | |
167 | return NULL; | |
168 | ||
169 | /* the CVT default refresh rate is 60Hz */ | |
170 | if (!vrefresh) | |
171 | vrefresh = 60; | |
172 | ||
173 | /* the required field fresh rate */ | |
174 | if (interlaced) | |
175 | vfieldrate = vrefresh * 2; | |
176 | else | |
177 | vfieldrate = vrefresh; | |
178 | ||
179 | /* horizontal pixels */ | |
180 | hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); | |
181 | ||
182 | /* determine the left&right borders */ | |
183 | hmargin = 0; | |
184 | if (margins) { | |
185 | hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; | |
186 | hmargin -= hmargin % CVT_H_GRANULARITY; | |
187 | } | |
188 | /* find the total active pixels */ | |
189 | drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; | |
190 | ||
191 | /* find the number of lines per field */ | |
192 | if (interlaced) | |
193 | vdisplay_rnd = vdisplay / 2; | |
194 | else | |
195 | vdisplay_rnd = vdisplay; | |
196 | ||
197 | /* find the top & bottom borders */ | |
198 | vmargin = 0; | |
199 | if (margins) | |
200 | vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; | |
201 | ||
841b4117 | 202 | drm_mode->vdisplay = vdisplay + 2 * vmargin; |
d782c3f9 ZY |
203 | |
204 | /* Interlaced */ | |
205 | if (interlaced) | |
206 | interlace = 1; | |
207 | else | |
208 | interlace = 0; | |
209 | ||
210 | /* Determine VSync Width from aspect ratio */ | |
211 | if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) | |
212 | vsync = 4; | |
213 | else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) | |
214 | vsync = 5; | |
215 | else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) | |
216 | vsync = 6; | |
217 | else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) | |
218 | vsync = 7; | |
219 | else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) | |
220 | vsync = 7; | |
221 | else /* custom */ | |
222 | vsync = 10; | |
223 | ||
224 | if (!reduced) { | |
225 | /* simplify the GTF calculation */ | |
226 | /* 4) Minimum time of vertical sync + back porch interval (µs) | |
227 | * default 550.0 | |
228 | */ | |
229 | int tmp1, tmp2; | |
230 | #define CVT_MIN_VSYNC_BP 550 | |
231 | /* 3) Nominal HSync width (% of line period) - default 8 */ | |
232 | #define CVT_HSYNC_PERCENTAGE 8 | |
233 | unsigned int hblank_percentage; | |
234 | int vsyncandback_porch, vback_porch, hblank; | |
235 | ||
236 | /* estimated the horizontal period */ | |
237 | tmp1 = HV_FACTOR * 1000000 - | |
238 | CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; | |
239 | tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + | |
240 | interlace; | |
241 | hperiod = tmp1 * 2 / (tmp2 * vfieldrate); | |
242 | ||
243 | tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; | |
244 | /* 9. Find number of lines in sync + backporch */ | |
245 | if (tmp1 < (vsync + CVT_MIN_V_PORCH)) | |
246 | vsyncandback_porch = vsync + CVT_MIN_V_PORCH; | |
247 | else | |
248 | vsyncandback_porch = tmp1; | |
249 | /* 10. Find number of lines in back porch */ | |
250 | vback_porch = vsyncandback_porch - vsync; | |
251 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + | |
252 | vsyncandback_porch + CVT_MIN_V_PORCH; | |
253 | /* 5) Definition of Horizontal blanking time limitation */ | |
254 | /* Gradient (%/kHz) - default 600 */ | |
255 | #define CVT_M_FACTOR 600 | |
256 | /* Offset (%) - default 40 */ | |
257 | #define CVT_C_FACTOR 40 | |
258 | /* Blanking time scaling factor - default 128 */ | |
259 | #define CVT_K_FACTOR 128 | |
260 | /* Scaling factor weighting - default 20 */ | |
261 | #define CVT_J_FACTOR 20 | |
262 | #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) | |
263 | #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ | |
264 | CVT_J_FACTOR) | |
265 | /* 12. Find ideal blanking duty cycle from formula */ | |
266 | hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * | |
267 | hperiod / 1000; | |
268 | /* 13. Blanking time */ | |
269 | if (hblank_percentage < 20 * HV_FACTOR) | |
270 | hblank_percentage = 20 * HV_FACTOR; | |
271 | hblank = drm_mode->hdisplay * hblank_percentage / | |
272 | (100 * HV_FACTOR - hblank_percentage); | |
273 | hblank -= hblank % (2 * CVT_H_GRANULARITY); | |
274 | /* 14. find the total pixes per line */ | |
275 | drm_mode->htotal = drm_mode->hdisplay + hblank; | |
276 | drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; | |
277 | drm_mode->hsync_start = drm_mode->hsync_end - | |
278 | (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; | |
279 | drm_mode->hsync_start += CVT_H_GRANULARITY - | |
280 | drm_mode->hsync_start % CVT_H_GRANULARITY; | |
281 | /* fill the Vsync values */ | |
282 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; | |
283 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; | |
284 | } else { | |
285 | /* Reduced blanking */ | |
286 | /* Minimum vertical blanking interval time (µs)- default 460 */ | |
287 | #define CVT_RB_MIN_VBLANK 460 | |
288 | /* Fixed number of clocks for horizontal sync */ | |
289 | #define CVT_RB_H_SYNC 32 | |
290 | /* Fixed number of clocks for horizontal blanking */ | |
291 | #define CVT_RB_H_BLANK 160 | |
292 | /* Fixed number of lines for vertical front porch - default 3*/ | |
293 | #define CVT_RB_VFPORCH 3 | |
294 | int vbilines; | |
295 | int tmp1, tmp2; | |
296 | /* 8. Estimate Horizontal period. */ | |
297 | tmp1 = HV_FACTOR * 1000000 - | |
298 | CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; | |
299 | tmp2 = vdisplay_rnd + 2 * vmargin; | |
300 | hperiod = tmp1 / (tmp2 * vfieldrate); | |
301 | /* 9. Find number of lines in vertical blanking */ | |
302 | vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; | |
303 | /* 10. Check if vertical blanking is sufficient */ | |
304 | if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) | |
305 | vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; | |
306 | /* 11. Find total number of lines in vertical field */ | |
307 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; | |
308 | /* 12. Find total number of pixels in a line */ | |
309 | drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; | |
310 | /* Fill in HSync values */ | |
311 | drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; | |
adde0f23 AJ |
312 | drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; |
313 | /* Fill in VSync values */ | |
314 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; | |
315 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; | |
d782c3f9 ZY |
316 | } |
317 | /* 15/13. Find pixel clock frequency (kHz for xf86) */ | |
318 | drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; | |
319 | drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; | |
320 | /* 18/16. Find actual vertical frame frequency */ | |
321 | /* ignore - just set the mode flag for interlaced */ | |
171fdd89 | 322 | if (interlaced) { |
d782c3f9 | 323 | drm_mode->vtotal *= 2; |
171fdd89 AJ |
324 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; |
325 | } | |
d782c3f9 ZY |
326 | /* Fill the mode line name */ |
327 | drm_mode_set_name(drm_mode); | |
328 | if (reduced) | |
329 | drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | | |
330 | DRM_MODE_FLAG_NVSYNC); | |
331 | else | |
332 | drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | | |
333 | DRM_MODE_FLAG_NHSYNC); | |
d782c3f9 | 334 | |
171fdd89 | 335 | return drm_mode; |
d782c3f9 ZY |
336 | } |
337 | EXPORT_SYMBOL(drm_cvt_mode); | |
338 | ||
26bbdada | 339 | /** |
7a374350 | 340 | * drm_gtf_mode_complex - create the modeline based on full GTF algorithm |
26bbdada ZY |
341 | * |
342 | * @dev :drm device | |
343 | * @hdisplay :hdisplay size | |
344 | * @vdisplay :vdisplay size | |
345 | * @vrefresh :vrefresh rate. | |
346 | * @interlaced :whether the interlace is supported | |
7a374350 | 347 | * @margins :desired margin size |
3ec0db81 DV |
348 | * @GTF_M: extended GTF formula parameters |
349 | * @GTF_2C: extended GTF formula parameters | |
350 | * @GTF_K: extended GTF formula parameters | |
351 | * @GTF_2J: extended GTF formula parameters | |
26bbdada | 352 | * |
7a374350 | 353 | * return the modeline based on full GTF algorithm. |
26bbdada | 354 | * |
7a374350 AJ |
355 | * GTF feature blocks specify C and J in multiples of 0.5, so we pass them |
356 | * in here multiplied by two. For a C of 40, pass in 80. | |
26bbdada | 357 | */ |
7a374350 AJ |
358 | struct drm_display_mode * |
359 | drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, | |
360 | int vrefresh, bool interlaced, int margins, | |
361 | int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) | |
362 | { /* 1) top/bottom margin size (% of height) - default: 1.8, */ | |
26bbdada ZY |
363 | #define GTF_MARGIN_PERCENTAGE 18 |
364 | /* 2) character cell horizontal granularity (pixels) - default 8 */ | |
365 | #define GTF_CELL_GRAN 8 | |
366 | /* 3) Minimum vertical porch (lines) - default 3 */ | |
367 | #define GTF_MIN_V_PORCH 1 | |
368 | /* width of vsync in lines */ | |
369 | #define V_SYNC_RQD 3 | |
370 | /* width of hsync as % of total line */ | |
371 | #define H_SYNC_PERCENT 8 | |
372 | /* min time of vsync + back porch (microsec) */ | |
373 | #define MIN_VSYNC_PLUS_BP 550 | |
26bbdada | 374 | /* C' and M' are part of the Blanking Duty Cycle computation */ |
7a374350 AJ |
375 | #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) |
376 | #define GTF_M_PRIME (GTF_K * GTF_M / 256) | |
26bbdada ZY |
377 | struct drm_display_mode *drm_mode; |
378 | unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; | |
379 | int top_margin, bottom_margin; | |
380 | int interlace; | |
381 | unsigned int hfreq_est; | |
382 | int vsync_plus_bp, vback_porch; | |
383 | unsigned int vtotal_lines, vfieldrate_est, hperiod; | |
384 | unsigned int vfield_rate, vframe_rate; | |
385 | int left_margin, right_margin; | |
386 | unsigned int total_active_pixels, ideal_duty_cycle; | |
387 | unsigned int hblank, total_pixels, pixel_freq; | |
388 | int hsync, hfront_porch, vodd_front_porch_lines; | |
389 | unsigned int tmp1, tmp2; | |
390 | ||
391 | drm_mode = drm_mode_create(dev); | |
392 | if (!drm_mode) | |
393 | return NULL; | |
394 | ||
395 | /* 1. In order to give correct results, the number of horizontal | |
396 | * pixels requested is first processed to ensure that it is divisible | |
397 | * by the character size, by rounding it to the nearest character | |
398 | * cell boundary: | |
399 | */ | |
400 | hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; | |
401 | hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; | |
402 | ||
403 | /* 2. If interlace is requested, the number of vertical lines assumed | |
404 | * by the calculation must be halved, as the computation calculates | |
405 | * the number of vertical lines per field. | |
406 | */ | |
407 | if (interlaced) | |
408 | vdisplay_rnd = vdisplay / 2; | |
409 | else | |
410 | vdisplay_rnd = vdisplay; | |
411 | ||
412 | /* 3. Find the frame rate required: */ | |
413 | if (interlaced) | |
414 | vfieldrate_rqd = vrefresh * 2; | |
415 | else | |
416 | vfieldrate_rqd = vrefresh; | |
417 | ||
418 | /* 4. Find number of lines in Top margin: */ | |
419 | top_margin = 0; | |
420 | if (margins) | |
421 | top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / | |
422 | 1000; | |
423 | /* 5. Find number of lines in bottom margin: */ | |
424 | bottom_margin = top_margin; | |
425 | ||
426 | /* 6. If interlace is required, then set variable interlace: */ | |
427 | if (interlaced) | |
428 | interlace = 1; | |
429 | else | |
430 | interlace = 0; | |
431 | ||
432 | /* 7. Estimate the Horizontal frequency */ | |
433 | { | |
434 | tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; | |
435 | tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * | |
436 | 2 + interlace; | |
437 | hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; | |
438 | } | |
439 | ||
440 | /* 8. Find the number of lines in V sync + back porch */ | |
441 | /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ | |
442 | vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; | |
443 | vsync_plus_bp = (vsync_plus_bp + 500) / 1000; | |
444 | /* 9. Find the number of lines in V back porch alone: */ | |
445 | vback_porch = vsync_plus_bp - V_SYNC_RQD; | |
446 | /* 10. Find the total number of lines in Vertical field period: */ | |
447 | vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + | |
448 | vsync_plus_bp + GTF_MIN_V_PORCH; | |
449 | /* 11. Estimate the Vertical field frequency: */ | |
450 | vfieldrate_est = hfreq_est / vtotal_lines; | |
451 | /* 12. Find the actual horizontal period: */ | |
452 | hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); | |
453 | ||
454 | /* 13. Find the actual Vertical field frequency: */ | |
455 | vfield_rate = hfreq_est / vtotal_lines; | |
456 | /* 14. Find the Vertical frame frequency: */ | |
457 | if (interlaced) | |
458 | vframe_rate = vfield_rate / 2; | |
459 | else | |
460 | vframe_rate = vfield_rate; | |
461 | /* 15. Find number of pixels in left margin: */ | |
462 | if (margins) | |
463 | left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / | |
464 | 1000; | |
465 | else | |
466 | left_margin = 0; | |
467 | ||
468 | /* 16.Find number of pixels in right margin: */ | |
469 | right_margin = left_margin; | |
470 | /* 17.Find total number of active pixels in image and left and right */ | |
471 | total_active_pixels = hdisplay_rnd + left_margin + right_margin; | |
472 | /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ | |
473 | ideal_duty_cycle = GTF_C_PRIME * 1000 - | |
474 | (GTF_M_PRIME * 1000000 / hfreq_est); | |
475 | /* 19.Find the number of pixels in the blanking time to the nearest | |
476 | * double character cell: */ | |
477 | hblank = total_active_pixels * ideal_duty_cycle / | |
478 | (100000 - ideal_duty_cycle); | |
479 | hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); | |
480 | hblank = hblank * 2 * GTF_CELL_GRAN; | |
481 | /* 20.Find total number of pixels: */ | |
482 | total_pixels = total_active_pixels + hblank; | |
483 | /* 21.Find pixel clock frequency: */ | |
484 | pixel_freq = total_pixels * hfreq_est / 1000; | |
485 | /* Stage 1 computations are now complete; I should really pass | |
486 | * the results to another function and do the Stage 2 computations, | |
487 | * but I only need a few more values so I'll just append the | |
488 | * computations here for now */ | |
489 | /* 17. Find the number of pixels in the horizontal sync period: */ | |
490 | hsync = H_SYNC_PERCENT * total_pixels / 100; | |
491 | hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; | |
492 | hsync = hsync * GTF_CELL_GRAN; | |
493 | /* 18. Find the number of pixels in horizontal front porch period */ | |
494 | hfront_porch = hblank / 2 - hsync; | |
495 | /* 36. Find the number of lines in the odd front porch period: */ | |
496 | vodd_front_porch_lines = GTF_MIN_V_PORCH ; | |
497 | ||
498 | /* finally, pack the results in the mode struct */ | |
499 | drm_mode->hdisplay = hdisplay_rnd; | |
500 | drm_mode->hsync_start = hdisplay_rnd + hfront_porch; | |
501 | drm_mode->hsync_end = drm_mode->hsync_start + hsync; | |
502 | drm_mode->htotal = total_pixels; | |
503 | drm_mode->vdisplay = vdisplay_rnd; | |
504 | drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; | |
505 | drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; | |
506 | drm_mode->vtotal = vtotal_lines; | |
507 | ||
508 | drm_mode->clock = pixel_freq; | |
509 | ||
26bbdada ZY |
510 | if (interlaced) { |
511 | drm_mode->vtotal *= 2; | |
512 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
513 | } | |
514 | ||
171fdd89 | 515 | drm_mode_set_name(drm_mode); |
c385e50c AJ |
516 | if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) |
517 | drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; | |
518 | else | |
519 | drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; | |
171fdd89 | 520 | |
26bbdada ZY |
521 | return drm_mode; |
522 | } | |
7a374350 AJ |
523 | EXPORT_SYMBOL(drm_gtf_mode_complex); |
524 | ||
525 | /** | |
526 | * drm_gtf_mode - create the modeline based on GTF algorithm | |
527 | * | |
528 | * @dev :drm device | |
529 | * @hdisplay :hdisplay size | |
530 | * @vdisplay :vdisplay size | |
531 | * @vrefresh :vrefresh rate. | |
532 | * @interlaced :whether the interlace is supported | |
533 | * @margins :whether the margin is supported | |
534 | * | |
7a374350 AJ |
535 | * return the modeline based on GTF algorithm |
536 | * | |
537 | * This function is to create the modeline based on the GTF algorithm. | |
538 | * Generalized Timing Formula is derived from: | |
539 | * GTF Spreadsheet by Andy Morrish (1/5/97) | |
540 | * available at http://www.vesa.org | |
541 | * | |
542 | * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. | |
543 | * What I have done is to translate it by using integer calculation. | |
544 | * I also refer to the function of fb_get_mode in the file of | |
545 | * drivers/video/fbmon.c | |
546 | * | |
547 | * Standard GTF parameters: | |
548 | * M = 600 | |
549 | * C = 40 | |
550 | * K = 128 | |
551 | * J = 20 | |
552 | */ | |
553 | struct drm_display_mode * | |
554 | drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, | |
3ec0db81 | 555 | bool interlaced, int margins) |
7a374350 | 556 | { |
3ec0db81 DV |
557 | return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, |
558 | interlaced, margins, | |
559 | 600, 40 * 2, 128, 20 * 2); | |
7a374350 | 560 | } |
26bbdada | 561 | EXPORT_SYMBOL(drm_gtf_mode); |
7a374350 | 562 | |
a38884f6 | 563 | #ifdef CONFIG_VIDEOMODE_HELPERS |
ebc64e45 ST |
564 | int drm_display_mode_from_videomode(const struct videomode *vm, |
565 | struct drm_display_mode *dmode) | |
566 | { | |
567 | dmode->hdisplay = vm->hactive; | |
568 | dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; | |
569 | dmode->hsync_end = dmode->hsync_start + vm->hsync_len; | |
570 | dmode->htotal = dmode->hsync_end + vm->hback_porch; | |
571 | ||
572 | dmode->vdisplay = vm->vactive; | |
573 | dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; | |
574 | dmode->vsync_end = dmode->vsync_start + vm->vsync_len; | |
575 | dmode->vtotal = dmode->vsync_end + vm->vback_porch; | |
576 | ||
577 | dmode->clock = vm->pixelclock / 1000; | |
578 | ||
579 | dmode->flags = 0; | |
06a33079 | 580 | if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) |
ebc64e45 | 581 | dmode->flags |= DRM_MODE_FLAG_PHSYNC; |
06a33079 | 582 | else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) |
ebc64e45 | 583 | dmode->flags |= DRM_MODE_FLAG_NHSYNC; |
06a33079 | 584 | if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) |
ebc64e45 | 585 | dmode->flags |= DRM_MODE_FLAG_PVSYNC; |
06a33079 | 586 | else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) |
ebc64e45 | 587 | dmode->flags |= DRM_MODE_FLAG_NVSYNC; |
06a33079 | 588 | if (vm->flags & DISPLAY_FLAGS_INTERLACED) |
ebc64e45 | 589 | dmode->flags |= DRM_MODE_FLAG_INTERLACE; |
06a33079 | 590 | if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) |
ebc64e45 | 591 | dmode->flags |= DRM_MODE_FLAG_DBLSCAN; |
328a4719 ST |
592 | if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) |
593 | dmode->flags |= DRM_MODE_FLAG_DBLCLK; | |
ebc64e45 ST |
594 | drm_mode_set_name(dmode); |
595 | ||
596 | return 0; | |
597 | } | |
598 | EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); | |
ebc64e45 | 599 | |
a38884f6 | 600 | #ifdef CONFIG_OF |
edb37a95 ST |
601 | /** |
602 | * of_get_drm_display_mode - get a drm_display_mode from devicetree | |
603 | * @np: device_node with the timing specification | |
604 | * @dmode: will be set to the return value | |
605 | * @index: index into the list of display timings in devicetree | |
606 | * | |
607 | * This function is expensive and should only be used, if only one mode is to be | |
608 | * read from DT. To get multiple modes start with of_get_display_timings and | |
609 | * work with that instead. | |
610 | */ | |
611 | int of_get_drm_display_mode(struct device_node *np, | |
612 | struct drm_display_mode *dmode, int index) | |
613 | { | |
614 | struct videomode vm; | |
615 | int ret; | |
616 | ||
617 | ret = of_get_videomode(np, &vm, index); | |
618 | if (ret) | |
619 | return ret; | |
620 | ||
621 | drm_display_mode_from_videomode(&vm, dmode); | |
622 | ||
623 | pr_debug("%s: got %dx%d display mode from %s\n", | |
624 | of_node_full_name(np), vm.hactive, vm.vactive, np->name); | |
625 | drm_mode_debug_printmodeline(dmode); | |
626 | ||
627 | return 0; | |
628 | } | |
629 | EXPORT_SYMBOL_GPL(of_get_drm_display_mode); | |
a38884f6 TV |
630 | #endif /* CONFIG_OF */ |
631 | #endif /* CONFIG_VIDEOMODE_HELPERS */ | |
edb37a95 | 632 | |
f453ba04 DA |
633 | /** |
634 | * drm_mode_set_name - set the name on a mode | |
635 | * @mode: name will be set in this mode | |
636 | * | |
f453ba04 DA |
637 | * Set the name of @mode to a standard format. |
638 | */ | |
639 | void drm_mode_set_name(struct drm_display_mode *mode) | |
640 | { | |
171fdd89 AJ |
641 | bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
642 | ||
643 | snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", | |
644 | mode->hdisplay, mode->vdisplay, | |
645 | interlaced ? "i" : ""); | |
f453ba04 DA |
646 | } |
647 | EXPORT_SYMBOL(drm_mode_set_name); | |
648 | ||
f453ba04 DA |
649 | /** |
650 | * drm_mode_width - get the width of a mode | |
651 | * @mode: mode | |
652 | * | |
f453ba04 DA |
653 | * Return @mode's width (hdisplay) value. |
654 | * | |
655 | * FIXME: is this needed? | |
656 | * | |
657 | * RETURNS: | |
658 | * @mode->hdisplay | |
659 | */ | |
0b3904ab | 660 | int drm_mode_width(const struct drm_display_mode *mode) |
f453ba04 DA |
661 | { |
662 | return mode->hdisplay; | |
663 | ||
664 | } | |
665 | EXPORT_SYMBOL(drm_mode_width); | |
666 | ||
667 | /** | |
668 | * drm_mode_height - get the height of a mode | |
669 | * @mode: mode | |
670 | * | |
f453ba04 DA |
671 | * Return @mode's height (vdisplay) value. |
672 | * | |
673 | * FIXME: is this needed? | |
674 | * | |
675 | * RETURNS: | |
676 | * @mode->vdisplay | |
677 | */ | |
0b3904ab | 678 | int drm_mode_height(const struct drm_display_mode *mode) |
f453ba04 DA |
679 | { |
680 | return mode->vdisplay; | |
681 | } | |
682 | EXPORT_SYMBOL(drm_mode_height); | |
683 | ||
7ac96a9c AJ |
684 | /** drm_mode_hsync - get the hsync of a mode |
685 | * @mode: mode | |
686 | * | |
7ac96a9c AJ |
687 | * Return @modes's hsync rate in kHz, rounded to the nearest int. |
688 | */ | |
b1f559ec | 689 | int drm_mode_hsync(const struct drm_display_mode *mode) |
7ac96a9c AJ |
690 | { |
691 | unsigned int calc_val; | |
692 | ||
693 | if (mode->hsync) | |
694 | return mode->hsync; | |
695 | ||
696 | if (mode->htotal < 0) | |
697 | return 0; | |
698 | ||
699 | calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ | |
700 | calc_val += 500; /* round to 1000Hz */ | |
701 | calc_val /= 1000; /* truncate to kHz */ | |
702 | ||
703 | return calc_val; | |
704 | } | |
705 | EXPORT_SYMBOL(drm_mode_hsync); | |
706 | ||
f453ba04 DA |
707 | /** |
708 | * drm_mode_vrefresh - get the vrefresh of a mode | |
709 | * @mode: mode | |
710 | * | |
7ac96a9c | 711 | * Return @mode's vrefresh rate in Hz or calculate it if necessary. |
f453ba04 DA |
712 | * |
713 | * FIXME: why is this needed? shouldn't vrefresh be set already? | |
714 | * | |
715 | * RETURNS: | |
559ee21d ZY |
716 | * Vertical refresh rate. It will be the result of actual value plus 0.5. |
717 | * If it is 70.288, it will return 70Hz. | |
718 | * If it is 59.6, it will return 60Hz. | |
f453ba04 | 719 | */ |
b1f559ec | 720 | int drm_mode_vrefresh(const struct drm_display_mode *mode) |
f453ba04 DA |
721 | { |
722 | int refresh = 0; | |
723 | unsigned int calc_val; | |
724 | ||
725 | if (mode->vrefresh > 0) | |
726 | refresh = mode->vrefresh; | |
727 | else if (mode->htotal > 0 && mode->vtotal > 0) { | |
559ee21d ZY |
728 | int vtotal; |
729 | vtotal = mode->vtotal; | |
f453ba04 DA |
730 | /* work out vrefresh the value will be x1000 */ |
731 | calc_val = (mode->clock * 1000); | |
f453ba04 | 732 | calc_val /= mode->htotal; |
559ee21d | 733 | refresh = (calc_val + vtotal / 2) / vtotal; |
f453ba04 | 734 | |
f453ba04 DA |
735 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
736 | refresh *= 2; | |
737 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
738 | refresh /= 2; | |
739 | if (mode->vscan > 1) | |
740 | refresh /= mode->vscan; | |
741 | } | |
742 | return refresh; | |
743 | } | |
744 | EXPORT_SYMBOL(drm_mode_vrefresh); | |
745 | ||
746 | /** | |
747 | * drm_mode_set_crtcinfo - set CRTC modesetting parameters | |
748 | * @p: mode | |
448cce25 | 749 | * @adjust_flags: a combination of adjustment flags |
f453ba04 | 750 | * |
f453ba04 | 751 | * Setup the CRTC modesetting parameters for @p, adjusting if necessary. |
448cce25 DL |
752 | * |
753 | * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of | |
754 | * interlaced modes. | |
755 | * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for | |
756 | * buffers containing two eyes (only adjust the timings when needed, eg. for | |
757 | * "frame packing" or "side by side full"). | |
f453ba04 DA |
758 | */ |
759 | void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) | |
760 | { | |
761 | if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) | |
762 | return; | |
763 | ||
bde2dcf7 | 764 | p->crtc_clock = p->clock; |
f453ba04 DA |
765 | p->crtc_hdisplay = p->hdisplay; |
766 | p->crtc_hsync_start = p->hsync_start; | |
767 | p->crtc_hsync_end = p->hsync_end; | |
768 | p->crtc_htotal = p->htotal; | |
769 | p->crtc_hskew = p->hskew; | |
770 | p->crtc_vdisplay = p->vdisplay; | |
771 | p->crtc_vsync_start = p->vsync_start; | |
772 | p->crtc_vsync_end = p->vsync_end; | |
773 | p->crtc_vtotal = p->vtotal; | |
774 | ||
775 | if (p->flags & DRM_MODE_FLAG_INTERLACE) { | |
776 | if (adjust_flags & CRTC_INTERLACE_HALVE_V) { | |
777 | p->crtc_vdisplay /= 2; | |
778 | p->crtc_vsync_start /= 2; | |
779 | p->crtc_vsync_end /= 2; | |
780 | p->crtc_vtotal /= 2; | |
781 | } | |
f453ba04 DA |
782 | } |
783 | ||
784 | if (p->flags & DRM_MODE_FLAG_DBLSCAN) { | |
785 | p->crtc_vdisplay *= 2; | |
786 | p->crtc_vsync_start *= 2; | |
787 | p->crtc_vsync_end *= 2; | |
788 | p->crtc_vtotal *= 2; | |
789 | } | |
790 | ||
791 | if (p->vscan > 1) { | |
792 | p->crtc_vdisplay *= p->vscan; | |
793 | p->crtc_vsync_start *= p->vscan; | |
794 | p->crtc_vsync_end *= p->vscan; | |
795 | p->crtc_vtotal *= p->vscan; | |
796 | } | |
797 | ||
448cce25 DL |
798 | if (adjust_flags & CRTC_STEREO_DOUBLE) { |
799 | unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; | |
800 | ||
801 | switch (layout) { | |
802 | case DRM_MODE_FLAG_3D_FRAME_PACKING: | |
803 | p->crtc_clock *= 2; | |
804 | p->crtc_vdisplay += p->crtc_vtotal; | |
805 | p->crtc_vsync_start += p->crtc_vtotal; | |
806 | p->crtc_vsync_end += p->crtc_vtotal; | |
807 | p->crtc_vtotal += p->crtc_vtotal; | |
808 | break; | |
809 | } | |
810 | } | |
811 | ||
f453ba04 DA |
812 | p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); |
813 | p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); | |
814 | p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); | |
815 | p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); | |
f453ba04 DA |
816 | } |
817 | EXPORT_SYMBOL(drm_mode_set_crtcinfo); | |
818 | ||
819 | ||
c3c50e8b VS |
820 | /** |
821 | * drm_mode_copy - copy the mode | |
822 | * @dst: mode to overwrite | |
823 | * @src: mode to copy | |
824 | * | |
72e45e92 VS |
825 | * Copy an existing mode into another mode, preserving the object id and |
826 | * list head of the destination mode. | |
c3c50e8b VS |
827 | */ |
828 | void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) | |
829 | { | |
830 | int id = dst->base.id; | |
72e45e92 | 831 | struct list_head head = dst->head; |
c3c50e8b VS |
832 | |
833 | *dst = *src; | |
834 | dst->base.id = id; | |
72e45e92 | 835 | dst->head = head; |
c3c50e8b VS |
836 | } |
837 | EXPORT_SYMBOL(drm_mode_copy); | |
838 | ||
f453ba04 DA |
839 | /** |
840 | * drm_mode_duplicate - allocate and duplicate an existing mode | |
3ec0db81 DV |
841 | * @dev: drm_device to allocate the duplicated mode for |
842 | * @mode: mode to duplicate | |
f453ba04 | 843 | * |
f453ba04 DA |
844 | * Just allocate a new mode, copy the existing mode into it, and return |
845 | * a pointer to it. Used to create new instances of established modes. | |
846 | */ | |
847 | struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, | |
b1f559ec | 848 | const struct drm_display_mode *mode) |
f453ba04 DA |
849 | { |
850 | struct drm_display_mode *nmode; | |
f453ba04 DA |
851 | |
852 | nmode = drm_mode_create(dev); | |
853 | if (!nmode) | |
854 | return NULL; | |
855 | ||
c3c50e8b VS |
856 | drm_mode_copy(nmode, mode); |
857 | ||
f453ba04 DA |
858 | return nmode; |
859 | } | |
860 | EXPORT_SYMBOL(drm_mode_duplicate); | |
861 | ||
862 | /** | |
863 | * drm_mode_equal - test modes for equality | |
864 | * @mode1: first mode | |
865 | * @mode2: second mode | |
866 | * | |
f453ba04 DA |
867 | * Check to see if @mode1 and @mode2 are equivalent. |
868 | * | |
869 | * RETURNS: | |
870 | * True if the modes are equal, false otherwise. | |
871 | */ | |
0b3904ab | 872 | bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) |
f453ba04 DA |
873 | { |
874 | /* do clock check convert to PICOS so fb modes get matched | |
875 | * the same */ | |
876 | if (mode1->clock && mode2->clock) { | |
877 | if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) | |
878 | return false; | |
879 | } else if (mode1->clock != mode2->clock) | |
880 | return false; | |
881 | ||
f2ecf2e3 DL |
882 | if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) != |
883 | (mode2->flags & DRM_MODE_FLAG_3D_MASK)) | |
884 | return false; | |
885 | ||
886 | return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); | |
8cc3f23c VS |
887 | } |
888 | EXPORT_SYMBOL(drm_mode_equal); | |
889 | ||
890 | /** | |
f2ecf2e3 | 891 | * drm_mode_equal_no_clocks_no_stereo - test modes for equality |
8cc3f23c VS |
892 | * @mode1: first mode |
893 | * @mode2: second mode | |
894 | * | |
8cc3f23c | 895 | * Check to see if @mode1 and @mode2 are equivalent, but |
f2ecf2e3 | 896 | * don't check the pixel clocks nor the stereo layout. |
8cc3f23c VS |
897 | * |
898 | * RETURNS: | |
899 | * True if the modes are equal, false otherwise. | |
900 | */ | |
f2ecf2e3 DL |
901 | bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, |
902 | const struct drm_display_mode *mode2) | |
8cc3f23c | 903 | { |
f453ba04 DA |
904 | if (mode1->hdisplay == mode2->hdisplay && |
905 | mode1->hsync_start == mode2->hsync_start && | |
906 | mode1->hsync_end == mode2->hsync_end && | |
907 | mode1->htotal == mode2->htotal && | |
908 | mode1->hskew == mode2->hskew && | |
909 | mode1->vdisplay == mode2->vdisplay && | |
910 | mode1->vsync_start == mode2->vsync_start && | |
911 | mode1->vsync_end == mode2->vsync_end && | |
912 | mode1->vtotal == mode2->vtotal && | |
913 | mode1->vscan == mode2->vscan && | |
f2ecf2e3 DL |
914 | (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == |
915 | (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) | |
f453ba04 DA |
916 | return true; |
917 | ||
918 | return false; | |
919 | } | |
f2ecf2e3 | 920 | EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); |
f453ba04 DA |
921 | |
922 | /** | |
923 | * drm_mode_validate_size - make sure modes adhere to size constraints | |
924 | * @dev: DRM device | |
925 | * @mode_list: list of modes to check | |
926 | * @maxX: maximum width | |
927 | * @maxY: maximum height | |
928 | * @maxPitch: max pitch | |
929 | * | |
f453ba04 DA |
930 | * The DRM device (@dev) has size and pitch limits. Here we validate the |
931 | * modes we probed for @dev against those limits and set their status as | |
932 | * necessary. | |
933 | */ | |
934 | void drm_mode_validate_size(struct drm_device *dev, | |
935 | struct list_head *mode_list, | |
936 | int maxX, int maxY, int maxPitch) | |
937 | { | |
938 | struct drm_display_mode *mode; | |
939 | ||
940 | list_for_each_entry(mode, mode_list, head) { | |
941 | if (maxPitch > 0 && mode->hdisplay > maxPitch) | |
942 | mode->status = MODE_BAD_WIDTH; | |
943 | ||
944 | if (maxX > 0 && mode->hdisplay > maxX) | |
945 | mode->status = MODE_VIRTUAL_X; | |
946 | ||
947 | if (maxY > 0 && mode->vdisplay > maxY) | |
948 | mode->status = MODE_VIRTUAL_Y; | |
949 | } | |
950 | } | |
951 | EXPORT_SYMBOL(drm_mode_validate_size); | |
952 | ||
f453ba04 DA |
953 | /** |
954 | * drm_mode_prune_invalid - remove invalid modes from mode list | |
955 | * @dev: DRM device | |
956 | * @mode_list: list of modes to check | |
957 | * @verbose: be verbose about it | |
958 | * | |
f453ba04 DA |
959 | * Once mode list generation is complete, a caller can use this routine to |
960 | * remove invalid modes from a mode list. If any of the modes have a | |
961 | * status other than %MODE_OK, they are removed from @mode_list and freed. | |
962 | */ | |
963 | void drm_mode_prune_invalid(struct drm_device *dev, | |
964 | struct list_head *mode_list, bool verbose) | |
965 | { | |
966 | struct drm_display_mode *mode, *t; | |
967 | ||
968 | list_for_each_entry_safe(mode, t, mode_list, head) { | |
969 | if (mode->status != MODE_OK) { | |
970 | list_del(&mode->head); | |
971 | if (verbose) { | |
972 | drm_mode_debug_printmodeline(mode); | |
f940f37f | 973 | DRM_DEBUG_KMS("Not using %s mode %d\n", |
f0531859 | 974 | mode->name, mode->status); |
f453ba04 DA |
975 | } |
976 | drm_mode_destroy(dev, mode); | |
977 | } | |
978 | } | |
979 | } | |
980 | EXPORT_SYMBOL(drm_mode_prune_invalid); | |
981 | ||
982 | /** | |
983 | * drm_mode_compare - compare modes for favorability | |
2c761270 | 984 | * @priv: unused |
f453ba04 DA |
985 | * @lh_a: list_head for first mode |
986 | * @lh_b: list_head for second mode | |
987 | * | |
f453ba04 DA |
988 | * Compare two modes, given by @lh_a and @lh_b, returning a value indicating |
989 | * which is better. | |
990 | * | |
991 | * RETURNS: | |
992 | * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or | |
993 | * positive if @lh_b is better than @lh_a. | |
994 | */ | |
2c761270 | 995 | static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) |
f453ba04 DA |
996 | { |
997 | struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); | |
998 | struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); | |
999 | int diff; | |
1000 | ||
1001 | diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - | |
1002 | ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); | |
1003 | if (diff) | |
1004 | return diff; | |
1005 | diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; | |
1006 | if (diff) | |
1007 | return diff; | |
9bc3cd56 VS |
1008 | |
1009 | diff = b->vrefresh - a->vrefresh; | |
1010 | if (diff) | |
1011 | return diff; | |
1012 | ||
f453ba04 DA |
1013 | diff = b->clock - a->clock; |
1014 | return diff; | |
1015 | } | |
1016 | ||
f453ba04 DA |
1017 | /** |
1018 | * drm_mode_sort - sort mode list | |
1019 | * @mode_list: list to sort | |
1020 | * | |
f453ba04 DA |
1021 | * Sort @mode_list by favorability, putting good modes first. |
1022 | */ | |
1023 | void drm_mode_sort(struct list_head *mode_list) | |
1024 | { | |
2c761270 | 1025 | list_sort(NULL, mode_list, drm_mode_compare); |
f453ba04 DA |
1026 | } |
1027 | EXPORT_SYMBOL(drm_mode_sort); | |
1028 | ||
1029 | /** | |
1030 | * drm_mode_connector_list_update - update the mode list for the connector | |
1031 | * @connector: the connector to update | |
1032 | * | |
f453ba04 DA |
1033 | * This moves the modes from the @connector probed_modes list |
1034 | * to the actual mode list. It compares the probed mode against the current | |
1035 | * list and only adds different modes. All modes unverified after this point | |
1036 | * will be removed by the prune invalid modes. | |
1037 | */ | |
1038 | void drm_mode_connector_list_update(struct drm_connector *connector) | |
1039 | { | |
1040 | struct drm_display_mode *mode; | |
1041 | struct drm_display_mode *pmode, *pt; | |
1042 | int found_it; | |
1043 | ||
63951385 DV |
1044 | WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); |
1045 | ||
f453ba04 DA |
1046 | list_for_each_entry_safe(pmode, pt, &connector->probed_modes, |
1047 | head) { | |
1048 | found_it = 0; | |
1049 | /* go through current modes checking for the new probed mode */ | |
1050 | list_for_each_entry(mode, &connector->modes, head) { | |
1051 | if (drm_mode_equal(pmode, mode)) { | |
1052 | found_it = 1; | |
1053 | /* if equal delete the probed mode */ | |
1054 | mode->status = pmode->status; | |
38d5487d | 1055 | /* Merge type bits together */ |
abce1ec9 | 1056 | mode->type |= pmode->type; |
f453ba04 DA |
1057 | list_del(&pmode->head); |
1058 | drm_mode_destroy(connector->dev, pmode); | |
1059 | break; | |
1060 | } | |
1061 | } | |
1062 | ||
1063 | if (!found_it) { | |
1064 | list_move_tail(&pmode->head, &connector->modes); | |
1065 | } | |
1066 | } | |
1067 | } | |
1068 | EXPORT_SYMBOL(drm_mode_connector_list_update); | |
1794d257 CW |
1069 | |
1070 | /** | |
1071 | * drm_mode_parse_command_line_for_connector - parse command line for connector | |
3ec0db81 DV |
1072 | * @mode_option: per connector mode option |
1073 | * @connector: connector to parse line for | |
1074 | * @mode: preallocated mode structure to fill out | |
1794d257 CW |
1075 | * |
1076 | * This parses the connector specific then generic command lines for | |
1077 | * modes and options to configure the connector. | |
1078 | * | |
1079 | * This uses the same parameters as the fb modedb.c, except for extra | |
1080 | * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] | |
1081 | * | |
1082 | * enable/enable Digital/disable bit at the end | |
1083 | */ | |
1084 | bool drm_mode_parse_command_line_for_connector(const char *mode_option, | |
1085 | struct drm_connector *connector, | |
1086 | struct drm_cmdline_mode *mode) | |
1087 | { | |
1088 | const char *name; | |
1089 | unsigned int namelen; | |
04fee895 | 1090 | bool res_specified = false, bpp_specified = false, refresh_specified = false; |
1794d257 | 1091 | unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; |
04fee895 REB |
1092 | bool yres_specified = false, cvt = false, rb = false; |
1093 | bool interlace = false, margins = false, was_digit = false; | |
1794d257 CW |
1094 | int i; |
1095 | enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; | |
1096 | ||
cb3c438e | 1097 | #ifdef CONFIG_FB |
1794d257 CW |
1098 | if (!mode_option) |
1099 | mode_option = fb_mode_option; | |
cb3c438e | 1100 | #endif |
1794d257 CW |
1101 | |
1102 | if (!mode_option) { | |
1103 | mode->specified = false; | |
1104 | return false; | |
1105 | } | |
1106 | ||
1107 | name = mode_option; | |
1108 | namelen = strlen(name); | |
1109 | for (i = namelen-1; i >= 0; i--) { | |
1110 | switch (name[i]) { | |
1111 | case '@': | |
1794d257 | 1112 | if (!refresh_specified && !bpp_specified && |
04fee895 | 1113 | !yres_specified && !cvt && !rb && was_digit) { |
1794d257 | 1114 | refresh = simple_strtol(&name[i+1], NULL, 10); |
04fee895 REB |
1115 | refresh_specified = true; |
1116 | was_digit = false; | |
1794d257 CW |
1117 | } else |
1118 | goto done; | |
1119 | break; | |
1120 | case '-': | |
04fee895 REB |
1121 | if (!bpp_specified && !yres_specified && !cvt && |
1122 | !rb && was_digit) { | |
1794d257 | 1123 | bpp = simple_strtol(&name[i+1], NULL, 10); |
04fee895 REB |
1124 | bpp_specified = true; |
1125 | was_digit = false; | |
1794d257 CW |
1126 | } else |
1127 | goto done; | |
1128 | break; | |
1129 | case 'x': | |
04fee895 | 1130 | if (!yres_specified && was_digit) { |
1794d257 | 1131 | yres = simple_strtol(&name[i+1], NULL, 10); |
04fee895 REB |
1132 | yres_specified = true; |
1133 | was_digit = false; | |
1794d257 CW |
1134 | } else |
1135 | goto done; | |
97fbfbf4 | 1136 | break; |
1794d257 | 1137 | case '0' ... '9': |
04fee895 | 1138 | was_digit = true; |
1794d257 CW |
1139 | break; |
1140 | case 'M': | |
04fee895 REB |
1141 | if (yres_specified || cvt || was_digit) |
1142 | goto done; | |
1143 | cvt = true; | |
1794d257 CW |
1144 | break; |
1145 | case 'R': | |
04fee895 REB |
1146 | if (yres_specified || cvt || rb || was_digit) |
1147 | goto done; | |
1148 | rb = true; | |
1794d257 CW |
1149 | break; |
1150 | case 'm': | |
04fee895 REB |
1151 | if (cvt || yres_specified || was_digit) |
1152 | goto done; | |
1153 | margins = true; | |
1794d257 CW |
1154 | break; |
1155 | case 'i': | |
04fee895 REB |
1156 | if (cvt || yres_specified || was_digit) |
1157 | goto done; | |
1158 | interlace = true; | |
1794d257 CW |
1159 | break; |
1160 | case 'e': | |
04fee895 REB |
1161 | if (yres_specified || bpp_specified || refresh_specified || |
1162 | was_digit || (force != DRM_FORCE_UNSPECIFIED)) | |
1163 | goto done; | |
1164 | ||
1794d257 CW |
1165 | force = DRM_FORCE_ON; |
1166 | break; | |
1167 | case 'D': | |
04fee895 REB |
1168 | if (yres_specified || bpp_specified || refresh_specified || |
1169 | was_digit || (force != DRM_FORCE_UNSPECIFIED)) | |
1170 | goto done; | |
1171 | ||
1794d257 CW |
1172 | if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && |
1173 | (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) | |
1174 | force = DRM_FORCE_ON; | |
1175 | else | |
1176 | force = DRM_FORCE_ON_DIGITAL; | |
1177 | break; | |
1178 | case 'd': | |
04fee895 REB |
1179 | if (yres_specified || bpp_specified || refresh_specified || |
1180 | was_digit || (force != DRM_FORCE_UNSPECIFIED)) | |
1181 | goto done; | |
1182 | ||
1794d257 CW |
1183 | force = DRM_FORCE_OFF; |
1184 | break; | |
1185 | default: | |
1186 | goto done; | |
1187 | } | |
1188 | } | |
04fee895 | 1189 | |
1794d257 | 1190 | if (i < 0 && yres_specified) { |
04fee895 REB |
1191 | char *ch; |
1192 | xres = simple_strtol(name, &ch, 10); | |
1193 | if ((ch != NULL) && (*ch == 'x')) | |
1194 | res_specified = true; | |
1195 | else | |
1196 | i = ch - name; | |
1197 | } else if (!yres_specified && was_digit) { | |
1198 | /* catch mode that begins with digits but has no 'x' */ | |
1199 | i = 0; | |
1794d257 CW |
1200 | } |
1201 | done: | |
04fee895 REB |
1202 | if (i >= 0) { |
1203 | printk(KERN_WARNING | |
1204 | "parse error at position %i in video mode '%s'\n", | |
1205 | i, name); | |
1206 | mode->specified = false; | |
1207 | return false; | |
1208 | } | |
1209 | ||
1794d257 CW |
1210 | if (res_specified) { |
1211 | mode->specified = true; | |
1212 | mode->xres = xres; | |
1213 | mode->yres = yres; | |
1214 | } | |
1215 | ||
1216 | if (refresh_specified) { | |
1217 | mode->refresh_specified = true; | |
1218 | mode->refresh = refresh; | |
1219 | } | |
1220 | ||
1221 | if (bpp_specified) { | |
1222 | mode->bpp_specified = true; | |
1223 | mode->bpp = bpp; | |
1224 | } | |
04fee895 REB |
1225 | mode->rb = rb; |
1226 | mode->cvt = cvt; | |
1227 | mode->interlace = interlace; | |
1228 | mode->margins = margins; | |
1794d257 CW |
1229 | mode->force = force; |
1230 | ||
1231 | return true; | |
1232 | } | |
1233 | EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); | |
1234 | ||
1235 | struct drm_display_mode * | |
1236 | drm_mode_create_from_cmdline_mode(struct drm_device *dev, | |
1237 | struct drm_cmdline_mode *cmd) | |
1238 | { | |
1239 | struct drm_display_mode *mode; | |
1240 | ||
1241 | if (cmd->cvt) | |
1242 | mode = drm_cvt_mode(dev, | |
1243 | cmd->xres, cmd->yres, | |
1244 | cmd->refresh_specified ? cmd->refresh : 60, | |
1245 | cmd->rb, cmd->interlace, | |
1246 | cmd->margins); | |
1247 | else | |
1248 | mode = drm_gtf_mode(dev, | |
1249 | cmd->xres, cmd->yres, | |
1250 | cmd->refresh_specified ? cmd->refresh : 60, | |
1251 | cmd->interlace, | |
1252 | cmd->margins); | |
1253 | if (!mode) | |
1254 | return NULL; | |
1255 | ||
1256 | drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); | |
1257 | return mode; | |
1258 | } | |
1259 | EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); |