]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/gpu/drm/exynos/exynos_drm_plane.c
drm/exynos: cleanup name of gem object for exynos_drm
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / exynos / exynos_drm_plane.c
CommitLineData
864ee9e6
JS
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
760285e7 12#include <drm/drmP.h>
864ee9e6 13
760285e7 14#include <drm/exynos_drm.h>
adf5691c 15#include <drm/drm_plane_helper.h>
4ea9526b 16#include <drm/drm_atomic_helper.h>
864ee9e6 17#include "exynos_drm_drv.h"
080be03d 18#include "exynos_drm_crtc.h"
4070d212
JS
19#include "exynos_drm_fb.h"
20#include "exynos_drm_gem.h"
e30655d0 21#include "exynos_drm_plane.h"
864ee9e6 22
2ab97921
JS
23/*
24 * This function is to get X or Y size shown via screen. This needs length and
25 * start position of CRTC.
26 *
27 * <--- length --->
28 * CRTC ----------------
29 * ^ start ^ end
30 *
60a705a9 31 * There are six cases from a to f.
2ab97921
JS
32 *
33 * <----- SCREEN ----->
34 * 0 last
35 * ----------|------------------|----------
36 * CRTCs
37 * a -------
38 * b -------
39 * c --------------------------
40 * d --------
41 * e -------
42 * f -------
43 */
44static int exynos_plane_get_size(int start, unsigned length, unsigned last)
45{
46 int end = start + length;
47 int size = 0;
48
49 if (start <= 0) {
50 if (end > 0)
51 size = min_t(unsigned, end, last);
52 } else if (start <= last) {
53 size = min_t(unsigned, last - start, length);
54 }
55
56 return size;
57}
58
d5f5223c
GP
59static void exynos_plane_mode_set(struct drm_plane *plane,
60 struct drm_crtc *crtc,
61 struct drm_framebuffer *fb,
62 int crtc_x, int crtc_y,
63 unsigned int crtc_w, unsigned int crtc_h,
64 uint32_t src_x, uint32_t src_y,
65 uint32_t src_w, uint32_t src_h)
adf5691c
GP
66{
67 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
020e79de 68 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
adf5691c
GP
69 unsigned int actual_w;
70 unsigned int actual_h;
71
020e79de
JS
72 actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
73 actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);
2ab97921
JS
74
75 if (crtc_x < 0) {
76 if (actual_w)
77 src_x -= crtc_x;
2ab97921
JS
78 crtc_x = 0;
79 }
80
81 if (crtc_y < 0) {
82 if (actual_h)
83 src_y -= crtc_y;
2ab97921
JS
84 crtc_y = 0;
85 }
4070d212 86
3cabaf7e
JS
87 /* set ratio */
88 exynos_plane->h_ratio = (src_w << 16) / crtc_w;
89 exynos_plane->v_ratio = (src_h << 16) / crtc_h;
90
4070d212 91 /* set drm framebuffer data. */
cb8a3db2
JS
92 exynos_plane->src_x = src_x;
93 exynos_plane->src_y = src_y;
d88d2463
GP
94 exynos_plane->src_w = (actual_w * exynos_plane->h_ratio) >> 16;
95 exynos_plane->src_h = (actual_h * exynos_plane->v_ratio) >> 16;
8837deea
GP
96
97 /* set plane range to be displayed. */
98 exynos_plane->crtc_x = crtc_x;
99 exynos_plane->crtc_y = crtc_y;
d88d2463
GP
100 exynos_plane->crtc_w = actual_w;
101 exynos_plane->crtc_h = actual_h;
102
8837deea
GP
103 DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
104 exynos_plane->crtc_x, exynos_plane->crtc_y,
d88d2463 105 exynos_plane->crtc_w, exynos_plane->crtc_h);
4070d212 106
72ed6ccd 107 plane->crtc = crtc;
4070d212
JS
108}
109
864ee9e6 110static struct drm_plane_funcs exynos_plane_funcs = {
910874a8
GP
111 .update_plane = drm_atomic_helper_update_plane,
112 .disable_plane = drm_atomic_helper_disable_plane,
97464d7d 113 .destroy = drm_plane_cleanup,
4ea9526b
GP
114 .reset = drm_atomic_helper_plane_reset,
115 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
116 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
864ee9e6
JS
117};
118
43dbdad2
GP
119static int exynos_plane_atomic_check(struct drm_plane *plane,
120 struct drm_plane_state *state)
121{
d5f5223c
GP
122 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
123 int nr;
124 int i;
125
126 if (!state->fb)
127 return 0;
128
faec262b 129 nr = drm_format_num_planes(state->fb->pixel_format);
d5f5223c 130 for (i = 0; i < nr; i++) {
813fd67b
JS
131 struct exynos_drm_gem *exynos_gem =
132 exynos_drm_fb_gem(state->fb, i);
133 if (!exynos_gem) {
2a8cb489 134 DRM_DEBUG_KMS("gem object is null\n");
d5f5223c
GP
135 return -EFAULT;
136 }
137
813fd67b 138 exynos_plane->dma_addr[i] = exynos_gem->dma_addr +
d5f5223c
GP
139 state->fb->offsets[i];
140
141 DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
142 i, (unsigned long)exynos_plane->dma_addr[i]);
143 }
144
145 return 0;
43dbdad2
GP
146}
147
148static void exynos_plane_atomic_update(struct drm_plane *plane,
149 struct drm_plane_state *old_state)
150{
151 struct drm_plane_state *state = plane->state;
d5f5223c
GP
152 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(state->crtc);
153 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
43dbdad2
GP
154
155 if (!state->crtc)
156 return;
157
d5f5223c
GP
158 exynos_plane_mode_set(plane, state->crtc, state->fb,
159 state->crtc_x, state->crtc_y,
160 state->crtc_w, state->crtc_h,
161 state->src_x >> 16, state->src_y >> 16,
162 state->src_w >> 16, state->src_h >> 16);
163
822f6dfd
GP
164 exynos_plane->pending_fb = state->fb;
165
9cc7610a 166 if (exynos_crtc->ops->update_plane)
1e1d1393 167 exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
43dbdad2
GP
168}
169
b744868c
GP
170static void exynos_plane_atomic_disable(struct drm_plane *plane,
171 struct drm_plane_state *old_state)
172{
173 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
174 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);
175
176 if (!old_state->crtc)
177 return;
178
9cc7610a
GP
179 if (exynos_crtc->ops->disable_plane)
180 exynos_crtc->ops->disable_plane(exynos_crtc,
1e1d1393 181 exynos_plane);
b744868c
GP
182}
183
43dbdad2
GP
184static const struct drm_plane_helper_funcs plane_helper_funcs = {
185 .atomic_check = exynos_plane_atomic_check,
186 .atomic_update = exynos_plane_atomic_update,
b744868c 187 .atomic_disable = exynos_plane_atomic_disable,
43dbdad2
GP
188};
189
6e2a3b66
GP
190static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
191 unsigned int zpos)
00ae67cf
JS
192{
193 struct drm_device *dev = plane->dev;
194 struct exynos_drm_private *dev_priv = dev->dev_private;
195 struct drm_property *prop;
196
00ae67cf
JS
197 prop = dev_priv->plane_zpos_property;
198 if (!prop) {
92104886
GP
199 prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
200 "zpos", 0, MAX_PLANE - 1);
00ae67cf
JS
201 if (!prop)
202 return;
203
204 dev_priv->plane_zpos_property = prop;
205 }
206
6e2a3b66 207 drm_object_attach_property(&plane->base, prop, zpos);
00ae67cf
JS
208}
209
323db0ed
GP
210enum drm_plane_type exynos_plane_get_type(unsigned int zpos,
211 unsigned int cursor_win)
212{
213 if (zpos == DEFAULT_WIN)
214 return DRM_PLANE_TYPE_PRIMARY;
215 else if (zpos == cursor_win)
216 return DRM_PLANE_TYPE_CURSOR;
217 else
218 return DRM_PLANE_TYPE_OVERLAY;
219}
220
7ee14cdc
GP
221int exynos_plane_init(struct drm_device *dev,
222 struct exynos_drm_plane *exynos_plane,
6e2a3b66 223 unsigned long possible_crtcs, enum drm_plane_type type,
fbbb1e1a 224 const uint32_t *formats, unsigned int fcount,
6e2a3b66 225 unsigned int zpos)
864ee9e6 226{
b5d2eb3b 227 int err;
864ee9e6 228
72ed6ccd 229 err = drm_universal_plane_init(dev, &exynos_plane->base, possible_crtcs,
fbbb1e1a
MS
230 &exynos_plane_funcs, formats, fcount,
231 type);
b5d2eb3b
JS
232 if (err) {
233 DRM_ERROR("failed to initialize plane\n");
7ee14cdc 234 return err;
b5d2eb3b
JS
235 }
236
43dbdad2
GP
237 drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);
238
6e2a3b66
GP
239 exynos_plane->zpos = zpos;
240
241 if (type == DRM_PLANE_TYPE_OVERLAY)
242 exynos_plane_attach_zpos_property(&exynos_plane->base, zpos);
864ee9e6 243
7ee14cdc 244 return 0;
864ee9e6 245}