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[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / i915 / i915_debugfs.c
CommitLineData
2017263e
BG
1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
5a0e3ad6 31#include <linux/slab.h>
2017263e
BG
32#include "drmP.h"
33#include "drm.h"
4e5359cd 34#include "intel_drv.h"
e5c65260 35#include "intel_ringbuffer.h"
2017263e
BG
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39#define DRM_I915_RING_DEBUG 1
40
41
42#if defined(CONFIG_DEBUG_FS)
43
f13d3f73 44enum {
69dc4987 45 ACTIVE_LIST,
f13d3f73
CW
46 FLUSHING_LIST,
47 INACTIVE_LIST,
d21d5975
CW
48 PINNED_LIST,
49 DEFERRED_FREE_LIST,
f13d3f73 50};
2017263e 51
70d39fe4
CW
52static const char *yesno(int v)
53{
54 return v ? "yes" : "no";
55}
56
57static int i915_capabilities(struct seq_file *m, void *data)
58{
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
62
63 seq_printf(m, "gen: %d\n", info->gen);
64#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 B(is_mobile);
70d39fe4
CW
66 B(is_i85x);
67 B(is_i915g);
70d39fe4 68 B(is_i945gm);
70d39fe4
CW
69 B(is_g33);
70 B(need_gfx_hws);
71 B(is_g4x);
72 B(is_pineview);
73 B(is_broadwater);
74 B(is_crestline);
70d39fe4
CW
75 B(has_fbc);
76 B(has_rc6);
77 B(has_pipe_cxsr);
78 B(has_hotplug);
79 B(cursor_needs_physical);
80 B(has_overlay);
81 B(overlay_needs_physical);
a6c45cf0 82 B(supports_tv);
549f7365
CW
83 B(has_bsd_ring);
84 B(has_blt_ring);
70d39fe4
CW
85#undef B
86
87 return 0;
88}
2017263e 89
05394f39 90static const char *get_pin_flag(struct drm_i915_gem_object *obj)
a6172a80 91{
05394f39 92 if (obj->user_pin_count > 0)
a6172a80 93 return "P";
05394f39 94 else if (obj->pin_count > 0)
a6172a80
CW
95 return "p";
96 else
97 return " ";
98}
99
05394f39 100static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
a6172a80 101{
05394f39 102 switch (obj->tiling_mode) {
a6172a80
CW
103 default:
104 case I915_TILING_NONE: return " ";
105 case I915_TILING_X: return "X";
106 case I915_TILING_Y: return "Y";
107 }
108}
109
37811fcc
CW
110static void
111describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
112{
113 seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
114 &obj->base,
115 get_pin_flag(obj),
116 get_tiling_flag(obj),
117 obj->base.size,
118 obj->base.read_domains,
119 obj->base.write_domain,
120 obj->last_rendering_seqno,
121 obj->dirty ? " dirty" : "",
122 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
123 if (obj->base.name)
124 seq_printf(m, " (name: %d)", obj->base.name);
125 if (obj->fence_reg != I915_FENCE_REG_NONE)
126 seq_printf(m, " (fence: %d)", obj->fence_reg);
127 if (obj->gtt_space != NULL)
a00b10c3
CW
128 seq_printf(m, " (gtt offset: %08x, size: %08x)",
129 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
fb7d516a
DV
130 if (obj->pin_mappable || obj->fault_mappable)
131 seq_printf(m, " (mappable)");
69dc4987
CW
132 if (obj->ring != NULL)
133 seq_printf(m, " (%s)", obj->ring->name);
37811fcc
CW
134}
135
433e12f7 136static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG
137{
138 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG
139 uintptr_t list = (uintptr_t) node->info_ent->data;
140 struct list_head *head;
2017263e
BG
141 struct drm_device *dev = node->minor->dev;
142 drm_i915_private_t *dev_priv = dev->dev_private;
05394f39 143 struct drm_i915_gem_object *obj;
8f2480fb
CW
144 size_t total_obj_size, total_gtt_size;
145 int count, ret;
de227ef0
CW
146
147 ret = mutex_lock_interruptible(&dev->struct_mutex);
148 if (ret)
149 return ret;
2017263e 150
433e12f7
BG
151 switch (list) {
152 case ACTIVE_LIST:
153 seq_printf(m, "Active:\n");
69dc4987 154 head = &dev_priv->mm.active_list;
433e12f7
BG
155 break;
156 case INACTIVE_LIST:
a17458fc 157 seq_printf(m, "Inactive:\n");
433e12f7
BG
158 head = &dev_priv->mm.inactive_list;
159 break;
f13d3f73
CW
160 case PINNED_LIST:
161 seq_printf(m, "Pinned:\n");
162 head = &dev_priv->mm.pinned_list;
163 break;
433e12f7
BG
164 case FLUSHING_LIST:
165 seq_printf(m, "Flushing:\n");
166 head = &dev_priv->mm.flushing_list;
167 break;
d21d5975
CW
168 case DEFERRED_FREE_LIST:
169 seq_printf(m, "Deferred free:\n");
170 head = &dev_priv->mm.deferred_free_list;
171 break;
433e12f7 172 default:
de227ef0
CW
173 mutex_unlock(&dev->struct_mutex);
174 return -EINVAL;
2017263e 175 }
2017263e 176
8f2480fb 177 total_obj_size = total_gtt_size = count = 0;
05394f39 178 list_for_each_entry(obj, head, mm_list) {
37811fcc 179 seq_printf(m, " ");
05394f39 180 describe_obj(m, obj);
f4ceda89 181 seq_printf(m, "\n");
05394f39
CW
182 total_obj_size += obj->base.size;
183 total_gtt_size += obj->gtt_space->size;
8f2480fb 184 count++;
2017263e 185 }
de227ef0 186 mutex_unlock(&dev->struct_mutex);
5e118f41 187
8f2480fb
CW
188 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
189 count, total_obj_size, total_gtt_size);
2017263e
BG
190 return 0;
191}
192
73aa808f
CW
193static int i915_gem_object_info(struct seq_file *m, void* data)
194{
195 struct drm_info_node *node = (struct drm_info_node *) m->private;
196 struct drm_device *dev = node->minor->dev;
197 struct drm_i915_private *dev_priv = dev->dev_private;
198 int ret;
199
200 ret = mutex_lock_interruptible(&dev->struct_mutex);
201 if (ret)
202 return ret;
203
204 seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
205 seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
206 seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
207 seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
fb7d516a
DV
208 seq_printf(m, "%u mappable objects in gtt\n", dev_priv->mm.gtt_mappable_count);
209 seq_printf(m, "%zu mappable gtt bytes\n", dev_priv->mm.gtt_mappable_memory);
210 seq_printf(m, "%zu mappable gtt used bytes\n", dev_priv->mm.mappable_gtt_used);
211 seq_printf(m, "%zu mappable gtt total\n", dev_priv->mm.mappable_gtt_total);
73aa808f
CW
212 seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
213 seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
214 seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
215
216 mutex_unlock(&dev->struct_mutex);
217
218 return 0;
219}
220
221
4e5359cd
SF
222static int i915_gem_pageflip_info(struct seq_file *m, void *data)
223{
224 struct drm_info_node *node = (struct drm_info_node *) m->private;
225 struct drm_device *dev = node->minor->dev;
226 unsigned long flags;
227 struct intel_crtc *crtc;
228
229 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
230 const char *pipe = crtc->pipe ? "B" : "A";
231 const char *plane = crtc->plane ? "B" : "A";
232 struct intel_unpin_work *work;
233
234 spin_lock_irqsave(&dev->event_lock, flags);
235 work = crtc->unpin_work;
236 if (work == NULL) {
237 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
238 pipe, plane);
239 } else {
240 if (!work->pending) {
241 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
242 pipe, plane);
243 } else {
244 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
245 pipe, plane);
246 }
247 if (work->enable_stall_check)
248 seq_printf(m, "Stall check enabled, ");
249 else
250 seq_printf(m, "Stall check waiting for page flip ioctl, ");
251 seq_printf(m, "%d prepares\n", work->pending);
252
253 if (work->old_fb_obj) {
05394f39
CW
254 struct drm_i915_gem_object *obj = work->old_fb_obj;
255 if (obj)
256 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
4e5359cd
SF
257 }
258 if (work->pending_flip_obj) {
05394f39
CW
259 struct drm_i915_gem_object *obj = work->pending_flip_obj;
260 if (obj)
261 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
4e5359cd
SF
262 }
263 }
264 spin_unlock_irqrestore(&dev->event_lock, flags);
265 }
266
267 return 0;
268}
269
2017263e
BG
270static int i915_gem_request_info(struct seq_file *m, void *data)
271{
272 struct drm_info_node *node = (struct drm_info_node *) m->private;
273 struct drm_device *dev = node->minor->dev;
274 drm_i915_private_t *dev_priv = dev->dev_private;
275 struct drm_i915_gem_request *gem_request;
c2c347a9 276 int ret, count;
de227ef0
CW
277
278 ret = mutex_lock_interruptible(&dev->struct_mutex);
279 if (ret)
280 return ret;
2017263e 281
c2c347a9
CW
282 count = 0;
283 if (!list_empty(&dev_priv->render_ring.request_list)) {
284 seq_printf(m, "Render requests:\n");
285 list_for_each_entry(gem_request,
286 &dev_priv->render_ring.request_list,
287 list) {
288 seq_printf(m, " %d @ %d\n",
289 gem_request->seqno,
290 (int) (jiffies - gem_request->emitted_jiffies));
291 }
292 count++;
293 }
294 if (!list_empty(&dev_priv->bsd_ring.request_list)) {
295 seq_printf(m, "BSD requests:\n");
296 list_for_each_entry(gem_request,
297 &dev_priv->bsd_ring.request_list,
298 list) {
299 seq_printf(m, " %d @ %d\n",
300 gem_request->seqno,
301 (int) (jiffies - gem_request->emitted_jiffies));
302 }
303 count++;
304 }
305 if (!list_empty(&dev_priv->blt_ring.request_list)) {
306 seq_printf(m, "BLT requests:\n");
307 list_for_each_entry(gem_request,
308 &dev_priv->blt_ring.request_list,
309 list) {
310 seq_printf(m, " %d @ %d\n",
311 gem_request->seqno,
312 (int) (jiffies - gem_request->emitted_jiffies));
313 }
314 count++;
2017263e 315 }
de227ef0
CW
316 mutex_unlock(&dev->struct_mutex);
317
c2c347a9
CW
318 if (count == 0)
319 seq_printf(m, "No requests\n");
320
2017263e
BG
321 return 0;
322}
323
b2223497
CW
324static void i915_ring_seqno_info(struct seq_file *m,
325 struct intel_ring_buffer *ring)
326{
327 if (ring->get_seqno) {
328 seq_printf(m, "Current sequence (%s): %d\n",
329 ring->name, ring->get_seqno(ring));
330 seq_printf(m, "Waiter sequence (%s): %d\n",
331 ring->name, ring->waiting_seqno);
332 seq_printf(m, "IRQ sequence (%s): %d\n",
333 ring->name, ring->irq_seqno);
334 }
335}
336
2017263e
BG
337static int i915_gem_seqno_info(struct seq_file *m, void *data)
338{
339 struct drm_info_node *node = (struct drm_info_node *) m->private;
340 struct drm_device *dev = node->minor->dev;
341 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW
342 int ret;
343
344 ret = mutex_lock_interruptible(&dev->struct_mutex);
345 if (ret)
346 return ret;
2017263e 347
b2223497
CW
348 i915_ring_seqno_info(m, &dev_priv->render_ring);
349 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
350 i915_ring_seqno_info(m, &dev_priv->blt_ring);
de227ef0
CW
351
352 mutex_unlock(&dev->struct_mutex);
353
2017263e
BG
354 return 0;
355}
356
357
358static int i915_interrupt_info(struct seq_file *m, void *data)
359{
360 struct drm_info_node *node = (struct drm_info_node *) m->private;
361 struct drm_device *dev = node->minor->dev;
362 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW
363 int ret;
364
365 ret = mutex_lock_interruptible(&dev->struct_mutex);
366 if (ret)
367 return ret;
2017263e 368
bad720ff 369 if (!HAS_PCH_SPLIT(dev)) {
5f6a1695
ZW
370 seq_printf(m, "Interrupt enable: %08x\n",
371 I915_READ(IER));
372 seq_printf(m, "Interrupt identity: %08x\n",
373 I915_READ(IIR));
374 seq_printf(m, "Interrupt mask: %08x\n",
375 I915_READ(IMR));
376 seq_printf(m, "Pipe A stat: %08x\n",
377 I915_READ(PIPEASTAT));
378 seq_printf(m, "Pipe B stat: %08x\n",
379 I915_READ(PIPEBSTAT));
380 } else {
381 seq_printf(m, "North Display Interrupt enable: %08x\n",
382 I915_READ(DEIER));
383 seq_printf(m, "North Display Interrupt identity: %08x\n",
384 I915_READ(DEIIR));
385 seq_printf(m, "North Display Interrupt mask: %08x\n",
386 I915_READ(DEIMR));
387 seq_printf(m, "South Display Interrupt enable: %08x\n",
388 I915_READ(SDEIER));
389 seq_printf(m, "South Display Interrupt identity: %08x\n",
390 I915_READ(SDEIIR));
391 seq_printf(m, "South Display Interrupt mask: %08x\n",
392 I915_READ(SDEIMR));
393 seq_printf(m, "Graphics Interrupt enable: %08x\n",
394 I915_READ(GTIER));
395 seq_printf(m, "Graphics Interrupt identity: %08x\n",
396 I915_READ(GTIIR));
397 seq_printf(m, "Graphics Interrupt mask: %08x\n",
398 I915_READ(GTIMR));
399 }
2017263e
BG
400 seq_printf(m, "Interrupts received: %d\n",
401 atomic_read(&dev_priv->irq_received));
b2223497
CW
402 i915_ring_seqno_info(m, &dev_priv->render_ring);
403 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
404 i915_ring_seqno_info(m, &dev_priv->blt_ring);
de227ef0
CW
405 mutex_unlock(&dev->struct_mutex);
406
2017263e
BG
407 return 0;
408}
409
a6172a80
CW
410static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
411{
412 struct drm_info_node *node = (struct drm_info_node *) m->private;
413 struct drm_device *dev = node->minor->dev;
414 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW
415 int i, ret;
416
417 ret = mutex_lock_interruptible(&dev->struct_mutex);
418 if (ret)
419 return ret;
a6172a80
CW
420
421 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
422 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
423 for (i = 0; i < dev_priv->num_fence_regs; i++) {
05394f39 424 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
a6172a80 425
c2c347a9
CW
426 seq_printf(m, "Fenced object[%2d] = ", i);
427 if (obj == NULL)
428 seq_printf(m, "unused");
429 else
05394f39 430 describe_obj(m, obj);
c2c347a9 431 seq_printf(m, "\n");
a6172a80
CW
432 }
433
05394f39 434 mutex_unlock(&dev->struct_mutex);
a6172a80
CW
435 return 0;
436}
437
2017263e
BG
438static int i915_hws_info(struct seq_file *m, void *data)
439{
440 struct drm_info_node *node = (struct drm_info_node *) m->private;
441 struct drm_device *dev = node->minor->dev;
442 drm_i915_private_t *dev_priv = dev->dev_private;
4066c0ae 443 struct intel_ring_buffer *ring;
2017263e 444 volatile u32 *hws;
4066c0ae
CW
445 int i;
446
447 switch ((uintptr_t)node->info_ent->data) {
e5c65260
CW
448 case RING_RENDER: ring = &dev_priv->render_ring; break;
449 case RING_BSD: ring = &dev_priv->bsd_ring; break;
450 case RING_BLT: ring = &dev_priv->blt_ring; break;
4066c0ae
CW
451 default: return -EINVAL;
452 }
2017263e 453
4066c0ae 454 hws = (volatile u32 *)ring->status_page.page_addr;
2017263e
BG
455 if (hws == NULL)
456 return 0;
457
458 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
459 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
460 i * 4,
461 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
462 }
463 return 0;
464}
465
5cdf5881
CW
466static void i915_dump_object(struct seq_file *m,
467 struct io_mapping *mapping,
05394f39 468 struct drm_i915_gem_object *obj)
6911a9b8 469{
5cdf5881 470 int page, page_count, i;
6911a9b8 471
05394f39 472 page_count = obj->base.size / PAGE_SIZE;
6911a9b8 473 for (page = 0; page < page_count; page++) {
5cdf5881 474 u32 *mem = io_mapping_map_wc(mapping,
05394f39 475 obj->gtt_offset + page * PAGE_SIZE);
6911a9b8
BG
476 for (i = 0; i < PAGE_SIZE; i += 4)
477 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
5cdf5881 478 io_mapping_unmap(mem);
6911a9b8
BG
479 }
480}
481
482static int i915_batchbuffer_info(struct seq_file *m, void *data)
483{
484 struct drm_info_node *node = (struct drm_info_node *) m->private;
485 struct drm_device *dev = node->minor->dev;
486 drm_i915_private_t *dev_priv = dev->dev_private;
05394f39 487 struct drm_i915_gem_object *obj;
6911a9b8
BG
488 int ret;
489
de227ef0
CW
490 ret = mutex_lock_interruptible(&dev->struct_mutex);
491 if (ret)
492 return ret;
6911a9b8 493
05394f39
CW
494 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
495 if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
496 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
497 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
6911a9b8
BG
498 }
499 }
500
de227ef0 501 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG
502 return 0;
503}
504
505static int i915_ringbuffer_data(struct seq_file *m, void *data)
506{
507 struct drm_info_node *node = (struct drm_info_node *) m->private;
508 struct drm_device *dev = node->minor->dev;
509 drm_i915_private_t *dev_priv = dev->dev_private;
c2c347a9 510 struct intel_ring_buffer *ring;
de227ef0
CW
511 int ret;
512
c2c347a9 513 switch ((uintptr_t)node->info_ent->data) {
e5c65260
CW
514 case RING_RENDER: ring = &dev_priv->render_ring; break;
515 case RING_BSD: ring = &dev_priv->bsd_ring; break;
516 case RING_BLT: ring = &dev_priv->blt_ring; break;
c2c347a9
CW
517 default: return -EINVAL;
518 }
519
de227ef0
CW
520 ret = mutex_lock_interruptible(&dev->struct_mutex);
521 if (ret)
522 return ret;
6911a9b8 523
05394f39 524 if (!ring->obj) {
6911a9b8 525 seq_printf(m, "No ringbuffer setup\n");
de227ef0 526 } else {
c2c347a9 527 u8 *virt = ring->virtual_start;
de227ef0 528 uint32_t off;
6911a9b8 529
c2c347a9 530 for (off = 0; off < ring->size; off += 4) {
de227ef0
CW
531 uint32_t *ptr = (uint32_t *)(virt + off);
532 seq_printf(m, "%08x : %08x\n", off, *ptr);
533 }
6911a9b8 534 }
de227ef0 535 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG
536
537 return 0;
538}
539
540static int i915_ringbuffer_info(struct seq_file *m, void *data)
541{
542 struct drm_info_node *node = (struct drm_info_node *) m->private;
543 struct drm_device *dev = node->minor->dev;
544 drm_i915_private_t *dev_priv = dev->dev_private;
c2c347a9
CW
545 struct intel_ring_buffer *ring;
546
547 switch ((uintptr_t)node->info_ent->data) {
e5c65260
CW
548 case RING_RENDER: ring = &dev_priv->render_ring; break;
549 case RING_BSD: ring = &dev_priv->bsd_ring; break;
550 case RING_BLT: ring = &dev_priv->blt_ring; break;
c2c347a9
CW
551 default: return -EINVAL;
552 }
6911a9b8 553
c2c347a9
CW
554 if (ring->size == 0)
555 return 0;
6911a9b8 556
c2c347a9
CW
557 seq_printf(m, "Ring %s:\n", ring->name);
558 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
559 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
560 seq_printf(m, " Size : %08x\n", ring->size);
561 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
562 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
563 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
6911a9b8
BG
564
565 return 0;
566}
567
e5c65260
CW
568static const char *ring_str(int ring)
569{
570 switch (ring) {
3685092b
CW
571 case RING_RENDER: return " render";
572 case RING_BSD: return " bsd";
573 case RING_BLT: return " blt";
e5c65260
CW
574 default: return "";
575 }
576}
577
9df30794
CW
578static const char *pin_flag(int pinned)
579{
580 if (pinned > 0)
581 return " P";
582 else if (pinned < 0)
583 return " p";
584 else
585 return "";
586}
587
588static const char *tiling_flag(int tiling)
589{
590 switch (tiling) {
591 default:
592 case I915_TILING_NONE: return "";
593 case I915_TILING_X: return " X";
594 case I915_TILING_Y: return " Y";
595 }
596}
597
598static const char *dirty_flag(int dirty)
599{
600 return dirty ? " dirty" : "";
601}
602
603static const char *purgeable_flag(int purgeable)
604{
605 return purgeable ? " purgeable" : "";
606}
607
c724e8a9
CW
608static void print_error_buffers(struct seq_file *m,
609 const char *name,
610 struct drm_i915_error_buffer *err,
611 int count)
612{
613 seq_printf(m, "%s [%d]:\n", name, count);
614
615 while (count--) {
616 seq_printf(m, " %08x %8zd %04x %04x %08x%s%s%s%s%s",
617 err->gtt_offset,
618 err->size,
619 err->read_domains,
620 err->write_domain,
621 err->seqno,
622 pin_flag(err->pinned),
623 tiling_flag(err->tiling),
624 dirty_flag(err->dirty),
625 purgeable_flag(err->purgeable),
626 ring_str(err->ring));
627
628 if (err->name)
629 seq_printf(m, " (name: %d)", err->name);
630 if (err->fence_reg != I915_FENCE_REG_NONE)
631 seq_printf(m, " (fence: %d)", err->fence_reg);
632
633 seq_printf(m, "\n");
634 err++;
635 }
636}
637
63eeaf38
JB
638static int i915_error_state(struct seq_file *m, void *unused)
639{
640 struct drm_info_node *node = (struct drm_info_node *) m->private;
641 struct drm_device *dev = node->minor->dev;
642 drm_i915_private_t *dev_priv = dev->dev_private;
643 struct drm_i915_error_state *error;
644 unsigned long flags;
9df30794 645 int i, page, offset, elt;
63eeaf38
JB
646
647 spin_lock_irqsave(&dev_priv->error_lock, flags);
648 if (!dev_priv->first_error) {
649 seq_printf(m, "no error state collected\n");
650 goto out;
651 }
652
653 error = dev_priv->first_error;
654
8a905236
JB
655 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
656 error->time.tv_usec);
9df30794 657 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
1d8f38f4
CW
658 seq_printf(m, "EIR: 0x%08x\n", error->eir);
659 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
f406839f
CW
660 if (INTEL_INFO(dev)->gen >= 6) {
661 seq_printf(m, "ERROR: 0x%08x\n", error->error);
1d8f38f4
CW
662 seq_printf(m, "Blitter command stream:\n");
663 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
1d8f38f4 664 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
e5c65260 665 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
1d8f38f4
CW
666 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
667 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
add354dd
CW
668 seq_printf(m, "Video (BSD) command stream:\n");
669 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
add354dd 670 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
e5c65260 671 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
add354dd
CW
672 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
673 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
f406839f 674 }
1d8f38f4
CW
675 seq_printf(m, "Render command stream:\n");
676 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
63eeaf38
JB
677 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
678 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
679 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
a6c45cf0 680 if (INTEL_INFO(dev)->gen >= 4) {
63eeaf38 681 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
1d8f38f4 682 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
63eeaf38 683 }
1d8f38f4
CW
684 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
685 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
9df30794 686
c724e8a9
CW
687 if (error->active_bo)
688 print_error_buffers(m, "Active",
689 error->active_bo,
690 error->active_bo_count);
691
692 if (error->pinned_bo)
693 print_error_buffers(m, "Pinned",
694 error->pinned_bo,
695 error->pinned_bo_count);
9df30794
CW
696
697 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
698 if (error->batchbuffer[i]) {
699 struct drm_i915_error_object *obj = error->batchbuffer[i];
700
701 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
702 offset = 0;
703 for (page = 0; page < obj->page_count; page++) {
704 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
705 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
706 offset += 4;
707 }
708 }
709 }
710 }
711
712 if (error->ringbuffer) {
713 struct drm_i915_error_object *obj = error->ringbuffer;
714
715 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
716 offset = 0;
717 for (page = 0; page < obj->page_count; page++) {
718 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
719 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
720 offset += 4;
721 }
722 }
723 }
63eeaf38 724
6ef3d427
CW
725 if (error->overlay)
726 intel_overlay_print_error_state(m, error->overlay);
727
c4a1d9e4
CW
728 if (error->display)
729 intel_display_print_error_state(m, dev, error->display);
730
63eeaf38
JB
731out:
732 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
733
734 return 0;
735}
6911a9b8 736
f97108d1
JB
737static int i915_rstdby_delays(struct seq_file *m, void *unused)
738{
739 struct drm_info_node *node = (struct drm_info_node *) m->private;
740 struct drm_device *dev = node->minor->dev;
741 drm_i915_private_t *dev_priv = dev->dev_private;
742 u16 crstanddelay = I915_READ16(CRSTANDVID);
743
744 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
745
746 return 0;
747}
748
749static int i915_cur_delayinfo(struct seq_file *m, void *unused)
750{
751 struct drm_info_node *node = (struct drm_info_node *) m->private;
752 struct drm_device *dev = node->minor->dev;
753 drm_i915_private_t *dev_priv = dev->dev_private;
754 u16 rgvswctl = I915_READ16(MEMSWCTL);
7648fa99 755 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
f97108d1 756
7648fa99
JB
757 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
758 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
759 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
760 MEMSTAT_VID_SHIFT);
761 seq_printf(m, "Current P-state: %d\n",
762 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
f97108d1
JB
763
764 return 0;
765}
766
767static int i915_delayfreq_table(struct seq_file *m, void *unused)
768{
769 struct drm_info_node *node = (struct drm_info_node *) m->private;
770 struct drm_device *dev = node->minor->dev;
771 drm_i915_private_t *dev_priv = dev->dev_private;
772 u32 delayfreq;
773 int i;
774
775 for (i = 0; i < 16; i++) {
776 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
7648fa99
JB
777 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
778 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
f97108d1
JB
779 }
780
781 return 0;
782}
783
784static inline int MAP_TO_MV(int map)
785{
786 return 1250 - (map * 25);
787}
788
789static int i915_inttoext_table(struct seq_file *m, void *unused)
790{
791 struct drm_info_node *node = (struct drm_info_node *) m->private;
792 struct drm_device *dev = node->minor->dev;
793 drm_i915_private_t *dev_priv = dev->dev_private;
794 u32 inttoext;
795 int i;
796
797 for (i = 1; i <= 32; i++) {
798 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
799 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
800 }
801
802 return 0;
803}
804
805static int i915_drpc_info(struct seq_file *m, void *unused)
806{
807 struct drm_info_node *node = (struct drm_info_node *) m->private;
808 struct drm_device *dev = node->minor->dev;
809 drm_i915_private_t *dev_priv = dev->dev_private;
810 u32 rgvmodectl = I915_READ(MEMMODECTL);
7648fa99
JB
811 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
812 u16 crstandvid = I915_READ16(CRSTANDVID);
f97108d1
JB
813
814 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
815 "yes" : "no");
816 seq_printf(m, "Boost freq: %d\n",
817 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
818 MEMMODE_BOOST_FREQ_SHIFT);
819 seq_printf(m, "HW control enabled: %s\n",
820 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
821 seq_printf(m, "SW control enabled: %s\n",
822 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
823 seq_printf(m, "Gated voltage change: %s\n",
824 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
825 seq_printf(m, "Starting frequency: P%d\n",
826 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
7648fa99 827 seq_printf(m, "Max P-state: P%d\n",
f97108d1 828 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
7648fa99
JB
829 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
830 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
831 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
832 seq_printf(m, "Render standby enabled: %s\n",
833 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
f97108d1
JB
834
835 return 0;
836}
837
b5e50c3f
JB
838static int i915_fbc_status(struct seq_file *m, void *unused)
839{
840 struct drm_info_node *node = (struct drm_info_node *) m->private;
841 struct drm_device *dev = node->minor->dev;
b5e50c3f 842 drm_i915_private_t *dev_priv = dev->dev_private;
b5e50c3f 843
ee5382ae 844 if (!I915_HAS_FBC(dev)) {
b5e50c3f
JB
845 seq_printf(m, "FBC unsupported on this chipset\n");
846 return 0;
847 }
848
ee5382ae 849 if (intel_fbc_enabled(dev)) {
b5e50c3f
JB
850 seq_printf(m, "FBC enabled\n");
851 } else {
852 seq_printf(m, "FBC disabled: ");
853 switch (dev_priv->no_fbc_reason) {
bed4a673
CW
854 case FBC_NO_OUTPUT:
855 seq_printf(m, "no outputs");
856 break;
b5e50c3f
JB
857 case FBC_STOLEN_TOO_SMALL:
858 seq_printf(m, "not enough stolen memory");
859 break;
860 case FBC_UNSUPPORTED_MODE:
861 seq_printf(m, "mode not supported");
862 break;
863 case FBC_MODE_TOO_LARGE:
864 seq_printf(m, "mode too large");
865 break;
866 case FBC_BAD_PLANE:
867 seq_printf(m, "FBC unsupported on plane");
868 break;
869 case FBC_NOT_TILED:
870 seq_printf(m, "scanout buffer not tiled");
871 break;
9c928d16
JB
872 case FBC_MULTIPLE_PIPES:
873 seq_printf(m, "multiple pipes are enabled");
874 break;
b5e50c3f
JB
875 default:
876 seq_printf(m, "unknown reason");
877 }
878 seq_printf(m, "\n");
879 }
880 return 0;
881}
882
4a9bef37
JB
883static int i915_sr_status(struct seq_file *m, void *unused)
884{
885 struct drm_info_node *node = (struct drm_info_node *) m->private;
886 struct drm_device *dev = node->minor->dev;
887 drm_i915_private_t *dev_priv = dev->dev_private;
888 bool sr_enabled = false;
889
f00a3ddf 890 if (IS_GEN5(dev))
5ba2aaaa 891 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
a6c45cf0 892 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
4a9bef37
JB
893 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
894 else if (IS_I915GM(dev))
895 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
896 else if (IS_PINEVIEW(dev))
897 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
898
5ba2aaaa
CW
899 seq_printf(m, "self-refresh: %s\n",
900 sr_enabled ? "enabled" : "disabled");
4a9bef37
JB
901
902 return 0;
903}
904
7648fa99
JB
905static int i915_emon_status(struct seq_file *m, void *unused)
906{
907 struct drm_info_node *node = (struct drm_info_node *) m->private;
908 struct drm_device *dev = node->minor->dev;
909 drm_i915_private_t *dev_priv = dev->dev_private;
910 unsigned long temp, chipset, gfx;
de227ef0
CW
911 int ret;
912
913 ret = mutex_lock_interruptible(&dev->struct_mutex);
914 if (ret)
915 return ret;
7648fa99
JB
916
917 temp = i915_mch_val(dev_priv);
918 chipset = i915_chipset_val(dev_priv);
919 gfx = i915_gfx_val(dev_priv);
de227ef0 920 mutex_unlock(&dev->struct_mutex);
7648fa99
JB
921
922 seq_printf(m, "GMCH temp: %ld\n", temp);
923 seq_printf(m, "Chipset power: %ld\n", chipset);
924 seq_printf(m, "GFX power: %ld\n", gfx);
925 seq_printf(m, "Total power: %ld\n", chipset + gfx);
926
927 return 0;
928}
929
930static int i915_gfxec(struct seq_file *m, void *unused)
931{
932 struct drm_info_node *node = (struct drm_info_node *) m->private;
933 struct drm_device *dev = node->minor->dev;
934 drm_i915_private_t *dev_priv = dev->dev_private;
935
936 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
937
938 return 0;
939}
940
44834a67
CW
941static int i915_opregion(struct seq_file *m, void *unused)
942{
943 struct drm_info_node *node = (struct drm_info_node *) m->private;
944 struct drm_device *dev = node->minor->dev;
945 drm_i915_private_t *dev_priv = dev->dev_private;
946 struct intel_opregion *opregion = &dev_priv->opregion;
947 int ret;
948
949 ret = mutex_lock_interruptible(&dev->struct_mutex);
950 if (ret)
951 return ret;
952
953 if (opregion->header)
954 seq_write(m, opregion->header, OPREGION_SIZE);
955
956 mutex_unlock(&dev->struct_mutex);
957
958 return 0;
959}
960
37811fcc
CW
961static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
962{
963 struct drm_info_node *node = (struct drm_info_node *) m->private;
964 struct drm_device *dev = node->minor->dev;
965 drm_i915_private_t *dev_priv = dev->dev_private;
966 struct intel_fbdev *ifbdev;
967 struct intel_framebuffer *fb;
968 int ret;
969
970 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
971 if (ret)
972 return ret;
973
974 ifbdev = dev_priv->fbdev;
975 fb = to_intel_framebuffer(ifbdev->helper.fb);
976
977 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
978 fb->base.width,
979 fb->base.height,
980 fb->base.depth,
981 fb->base.bits_per_pixel);
05394f39 982 describe_obj(m, fb->obj);
37811fcc
CW
983 seq_printf(m, "\n");
984
985 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
986 if (&fb->base == ifbdev->helper.fb)
987 continue;
988
989 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
990 fb->base.width,
991 fb->base.height,
992 fb->base.depth,
993 fb->base.bits_per_pixel);
05394f39 994 describe_obj(m, fb->obj);
37811fcc
CW
995 seq_printf(m, "\n");
996 }
997
998 mutex_unlock(&dev->mode_config.mutex);
999
1000 return 0;
1001}
1002
f3cd474b
CW
1003static int
1004i915_wedged_open(struct inode *inode,
1005 struct file *filp)
1006{
1007 filp->private_data = inode->i_private;
1008 return 0;
1009}
1010
1011static ssize_t
1012i915_wedged_read(struct file *filp,
1013 char __user *ubuf,
1014 size_t max,
1015 loff_t *ppos)
1016{
1017 struct drm_device *dev = filp->private_data;
1018 drm_i915_private_t *dev_priv = dev->dev_private;
1019 char buf[80];
1020 int len;
1021
1022 len = snprintf(buf, sizeof (buf),
1023 "wedged : %d\n",
1024 atomic_read(&dev_priv->mm.wedged));
1025
f4433a8d
DC
1026 if (len > sizeof (buf))
1027 len = sizeof (buf);
1028
f3cd474b
CW
1029 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1030}
1031
1032static ssize_t
1033i915_wedged_write(struct file *filp,
1034 const char __user *ubuf,
1035 size_t cnt,
1036 loff_t *ppos)
1037{
1038 struct drm_device *dev = filp->private_data;
f3cd474b
CW
1039 char buf[20];
1040 int val = 1;
1041
1042 if (cnt > 0) {
1043 if (cnt > sizeof (buf) - 1)
1044 return -EINVAL;
1045
1046 if (copy_from_user(buf, ubuf, cnt))
1047 return -EFAULT;
1048 buf[cnt] = 0;
1049
1050 val = simple_strtoul(buf, NULL, 0);
1051 }
1052
1053 DRM_INFO("Manually setting wedged to %d\n", val);
527f9e90 1054 i915_handle_error(dev, val);
f3cd474b
CW
1055
1056 return cnt;
1057}
1058
1059static const struct file_operations i915_wedged_fops = {
1060 .owner = THIS_MODULE,
1061 .open = i915_wedged_open,
1062 .read = i915_wedged_read,
1063 .write = i915_wedged_write,
6038f373 1064 .llseek = default_llseek,
f3cd474b
CW
1065};
1066
1067/* As the drm_debugfs_init() routines are called before dev->dev_private is
1068 * allocated we need to hook into the minor for release. */
1069static int
1070drm_add_fake_info_node(struct drm_minor *minor,
1071 struct dentry *ent,
1072 const void *key)
1073{
1074 struct drm_info_node *node;
1075
1076 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1077 if (node == NULL) {
1078 debugfs_remove(ent);
1079 return -ENOMEM;
1080 }
1081
1082 node->minor = minor;
1083 node->dent = ent;
1084 node->info_ent = (void *) key;
1085 list_add(&node->list, &minor->debugfs_nodes.list);
1086
1087 return 0;
1088}
1089
1090static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1091{
1092 struct drm_device *dev = minor->dev;
1093 struct dentry *ent;
1094
1095 ent = debugfs_create_file("i915_wedged",
1096 S_IRUGO | S_IWUSR,
1097 root, dev,
1098 &i915_wedged_fops);
1099 if (IS_ERR(ent))
1100 return PTR_ERR(ent);
1101
1102 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1103}
9e3a6d15 1104
27c202ad 1105static struct drm_info_list i915_debugfs_list[] = {
70d39fe4 1106 {"i915_capabilities", i915_capabilities, 0, 0},
73aa808f 1107 {"i915_gem_objects", i915_gem_object_info, 0},
433e12f7
BG
1108 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1109 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1110 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
f13d3f73 1111 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
d21d5975 1112 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
4e5359cd 1113 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2017263e
BG
1114 {"i915_gem_request", i915_gem_request_info, 0},
1115 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 1116 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e 1117 {"i915_gem_interrupt", i915_interrupt_info, 0},
e5c65260
CW
1118 {"i915_gem_hws", i915_hws_info, 0, (void *)RING_RENDER},
1119 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)RING_BLT},
1120 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)RING_BSD},
1121 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_RENDER},
1122 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_RENDER},
1123 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BSD},
1124 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BSD},
1125 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BLT},
1126 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BLT},
6911a9b8 1127 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 1128 {"i915_error_state", i915_error_state, 0},
f97108d1
JB
1129 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1130 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1131 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1132 {"i915_inttoext_table", i915_inttoext_table, 0},
1133 {"i915_drpc_info", i915_drpc_info, 0},
7648fa99
JB
1134 {"i915_emon_status", i915_emon_status, 0},
1135 {"i915_gfxec", i915_gfxec, 0},
b5e50c3f 1136 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 1137 {"i915_sr_status", i915_sr_status, 0},
44834a67 1138 {"i915_opregion", i915_opregion, 0},
37811fcc 1139 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2017263e 1140};
27c202ad 1141#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 1142
27c202ad 1143int i915_debugfs_init(struct drm_minor *minor)
2017263e 1144{
f3cd474b
CW
1145 int ret;
1146
1147 ret = i915_wedged_create(minor->debugfs_root, minor);
1148 if (ret)
1149 return ret;
1150
27c202ad
BG
1151 return drm_debugfs_create_files(i915_debugfs_list,
1152 I915_DEBUGFS_ENTRIES,
2017263e
BG
1153 minor->debugfs_root, minor);
1154}
1155
27c202ad 1156void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 1157{
27c202ad
BG
1158 drm_debugfs_remove_files(i915_debugfs_list,
1159 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH
1160 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1161 1, minor);
2017263e
BG
1162}
1163
1164#endif /* CONFIG_DEBUG_FS */