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CommitLineData
2017263e
BG
1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
5a0e3ad6 31#include <linux/slab.h>
2017263e
BG
32#include "drmP.h"
33#include "drm.h"
4e5359cd 34#include "intel_drv.h"
e5c65260 35#include "intel_ringbuffer.h"
2017263e
BG
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39#define DRM_I915_RING_DEBUG 1
40
41
42#if defined(CONFIG_DEBUG_FS)
43
f13d3f73 44enum {
69dc4987 45 ACTIVE_LIST,
f13d3f73
CW
46 FLUSHING_LIST,
47 INACTIVE_LIST,
d21d5975
CW
48 PINNED_LIST,
49 DEFERRED_FREE_LIST,
f13d3f73 50};
2017263e 51
70d39fe4
CW
52static const char *yesno(int v)
53{
54 return v ? "yes" : "no";
55}
56
57static int i915_capabilities(struct seq_file *m, void *data)
58{
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
62
63 seq_printf(m, "gen: %d\n", info->gen);
64#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 B(is_mobile);
70d39fe4
CW
66 B(is_i85x);
67 B(is_i915g);
70d39fe4 68 B(is_i945gm);
70d39fe4
CW
69 B(is_g33);
70 B(need_gfx_hws);
71 B(is_g4x);
72 B(is_pineview);
73 B(is_broadwater);
74 B(is_crestline);
70d39fe4 75 B(has_fbc);
70d39fe4
CW
76 B(has_pipe_cxsr);
77 B(has_hotplug);
78 B(cursor_needs_physical);
79 B(has_overlay);
80 B(overlay_needs_physical);
a6c45cf0 81 B(supports_tv);
549f7365
CW
82 B(has_bsd_ring);
83 B(has_blt_ring);
70d39fe4
CW
84#undef B
85
86 return 0;
87}
2017263e 88
05394f39 89static const char *get_pin_flag(struct drm_i915_gem_object *obj)
a6172a80 90{
05394f39 91 if (obj->user_pin_count > 0)
a6172a80 92 return "P";
05394f39 93 else if (obj->pin_count > 0)
a6172a80
CW
94 return "p";
95 else
96 return " ";
97}
98
05394f39 99static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
a6172a80 100{
05394f39 101 switch (obj->tiling_mode) {
a6172a80
CW
102 default:
103 case I915_TILING_NONE: return " ";
104 case I915_TILING_X: return "X";
105 case I915_TILING_Y: return "Y";
106 }
107}
108
37811fcc
CW
109static void
110describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
111{
caea7476 112 seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s",
37811fcc
CW
113 &obj->base,
114 get_pin_flag(obj),
115 get_tiling_flag(obj),
116 obj->base.size,
117 obj->base.read_domains,
118 obj->base.write_domain,
119 obj->last_rendering_seqno,
caea7476 120 obj->last_fenced_seqno,
37811fcc
CW
121 obj->dirty ? " dirty" : "",
122 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
123 if (obj->base.name)
124 seq_printf(m, " (name: %d)", obj->base.name);
125 if (obj->fence_reg != I915_FENCE_REG_NONE)
126 seq_printf(m, " (fence: %d)", obj->fence_reg);
127 if (obj->gtt_space != NULL)
a00b10c3
CW
128 seq_printf(m, " (gtt offset: %08x, size: %08x)",
129 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
6299f992
CW
130 if (obj->pin_mappable || obj->fault_mappable) {
131 char s[3], *t = s;
132 if (obj->pin_mappable)
133 *t++ = 'p';
134 if (obj->fault_mappable)
135 *t++ = 'f';
136 *t = '\0';
137 seq_printf(m, " (%s mappable)", s);
138 }
69dc4987
CW
139 if (obj->ring != NULL)
140 seq_printf(m, " (%s)", obj->ring->name);
37811fcc
CW
141}
142
433e12f7 143static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG
144{
145 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG
146 uintptr_t list = (uintptr_t) node->info_ent->data;
147 struct list_head *head;
2017263e
BG
148 struct drm_device *dev = node->minor->dev;
149 drm_i915_private_t *dev_priv = dev->dev_private;
05394f39 150 struct drm_i915_gem_object *obj;
8f2480fb
CW
151 size_t total_obj_size, total_gtt_size;
152 int count, ret;
de227ef0
CW
153
154 ret = mutex_lock_interruptible(&dev->struct_mutex);
155 if (ret)
156 return ret;
2017263e 157
433e12f7
BG
158 switch (list) {
159 case ACTIVE_LIST:
160 seq_printf(m, "Active:\n");
69dc4987 161 head = &dev_priv->mm.active_list;
433e12f7
BG
162 break;
163 case INACTIVE_LIST:
a17458fc 164 seq_printf(m, "Inactive:\n");
433e12f7
BG
165 head = &dev_priv->mm.inactive_list;
166 break;
f13d3f73
CW
167 case PINNED_LIST:
168 seq_printf(m, "Pinned:\n");
169 head = &dev_priv->mm.pinned_list;
170 break;
433e12f7
BG
171 case FLUSHING_LIST:
172 seq_printf(m, "Flushing:\n");
173 head = &dev_priv->mm.flushing_list;
174 break;
d21d5975
CW
175 case DEFERRED_FREE_LIST:
176 seq_printf(m, "Deferred free:\n");
177 head = &dev_priv->mm.deferred_free_list;
178 break;
433e12f7 179 default:
de227ef0
CW
180 mutex_unlock(&dev->struct_mutex);
181 return -EINVAL;
2017263e 182 }
2017263e 183
8f2480fb 184 total_obj_size = total_gtt_size = count = 0;
05394f39 185 list_for_each_entry(obj, head, mm_list) {
37811fcc 186 seq_printf(m, " ");
05394f39 187 describe_obj(m, obj);
f4ceda89 188 seq_printf(m, "\n");
05394f39
CW
189 total_obj_size += obj->base.size;
190 total_gtt_size += obj->gtt_space->size;
8f2480fb 191 count++;
2017263e 192 }
de227ef0 193 mutex_unlock(&dev->struct_mutex);
5e118f41 194
8f2480fb
CW
195 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
196 count, total_obj_size, total_gtt_size);
2017263e
BG
197 return 0;
198}
199
6299f992
CW
200#define count_objects(list, member) do { \
201 list_for_each_entry(obj, list, member) { \
202 size += obj->gtt_space->size; \
203 ++count; \
204 if (obj->map_and_fenceable) { \
205 mappable_size += obj->gtt_space->size; \
206 ++mappable_count; \
207 } \
208 } \
209} while(0)
210
73aa808f
CW
211static int i915_gem_object_info(struct seq_file *m, void* data)
212{
213 struct drm_info_node *node = (struct drm_info_node *) m->private;
214 struct drm_device *dev = node->minor->dev;
215 struct drm_i915_private *dev_priv = dev->dev_private;
6299f992
CW
216 u32 count, mappable_count;
217 size_t size, mappable_size;
218 struct drm_i915_gem_object *obj;
73aa808f
CW
219 int ret;
220
221 ret = mutex_lock_interruptible(&dev->struct_mutex);
222 if (ret)
223 return ret;
224
6299f992
CW
225 seq_printf(m, "%u objects, %zu bytes\n",
226 dev_priv->mm.object_count,
227 dev_priv->mm.object_memory);
228
229 size = count = mappable_size = mappable_count = 0;
230 count_objects(&dev_priv->mm.gtt_list, gtt_list);
231 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
232 count, mappable_count, size, mappable_size);
233
234 size = count = mappable_size = mappable_count = 0;
235 count_objects(&dev_priv->mm.active_list, mm_list);
236 count_objects(&dev_priv->mm.flushing_list, mm_list);
237 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
238 count, mappable_count, size, mappable_size);
239
240 size = count = mappable_size = mappable_count = 0;
241 count_objects(&dev_priv->mm.pinned_list, mm_list);
242 seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n",
243 count, mappable_count, size, mappable_size);
244
245 size = count = mappable_size = mappable_count = 0;
246 count_objects(&dev_priv->mm.inactive_list, mm_list);
247 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
248 count, mappable_count, size, mappable_size);
249
250 size = count = mappable_size = mappable_count = 0;
251 count_objects(&dev_priv->mm.deferred_free_list, mm_list);
252 seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n",
253 count, mappable_count, size, mappable_size);
254
255 size = count = mappable_size = mappable_count = 0;
256 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
257 if (obj->fault_mappable) {
258 size += obj->gtt_space->size;
259 ++count;
260 }
261 if (obj->pin_mappable) {
262 mappable_size += obj->gtt_space->size;
263 ++mappable_count;
264 }
265 }
266 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
267 mappable_count, mappable_size);
268 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
269 count, size);
270
271 seq_printf(m, "%zu [%zu] gtt total\n",
272 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
73aa808f
CW
273
274 mutex_unlock(&dev->struct_mutex);
275
276 return 0;
277}
278
279
4e5359cd
SF
280static int i915_gem_pageflip_info(struct seq_file *m, void *data)
281{
282 struct drm_info_node *node = (struct drm_info_node *) m->private;
283 struct drm_device *dev = node->minor->dev;
284 unsigned long flags;
285 struct intel_crtc *crtc;
286
287 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
288 const char *pipe = crtc->pipe ? "B" : "A";
289 const char *plane = crtc->plane ? "B" : "A";
290 struct intel_unpin_work *work;
291
292 spin_lock_irqsave(&dev->event_lock, flags);
293 work = crtc->unpin_work;
294 if (work == NULL) {
295 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
296 pipe, plane);
297 } else {
298 if (!work->pending) {
299 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
300 pipe, plane);
301 } else {
302 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
303 pipe, plane);
304 }
305 if (work->enable_stall_check)
306 seq_printf(m, "Stall check enabled, ");
307 else
308 seq_printf(m, "Stall check waiting for page flip ioctl, ");
309 seq_printf(m, "%d prepares\n", work->pending);
310
311 if (work->old_fb_obj) {
05394f39
CW
312 struct drm_i915_gem_object *obj = work->old_fb_obj;
313 if (obj)
314 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
4e5359cd
SF
315 }
316 if (work->pending_flip_obj) {
05394f39
CW
317 struct drm_i915_gem_object *obj = work->pending_flip_obj;
318 if (obj)
319 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
4e5359cd
SF
320 }
321 }
322 spin_unlock_irqrestore(&dev->event_lock, flags);
323 }
324
325 return 0;
326}
327
2017263e
BG
328static int i915_gem_request_info(struct seq_file *m, void *data)
329{
330 struct drm_info_node *node = (struct drm_info_node *) m->private;
331 struct drm_device *dev = node->minor->dev;
332 drm_i915_private_t *dev_priv = dev->dev_private;
333 struct drm_i915_gem_request *gem_request;
c2c347a9 334 int ret, count;
de227ef0
CW
335
336 ret = mutex_lock_interruptible(&dev->struct_mutex);
337 if (ret)
338 return ret;
2017263e 339
c2c347a9 340 count = 0;
1ec14ad3 341 if (!list_empty(&dev_priv->ring[RCS].request_list)) {
c2c347a9
CW
342 seq_printf(m, "Render requests:\n");
343 list_for_each_entry(gem_request,
1ec14ad3 344 &dev_priv->ring[RCS].request_list,
c2c347a9
CW
345 list) {
346 seq_printf(m, " %d @ %d\n",
347 gem_request->seqno,
348 (int) (jiffies - gem_request->emitted_jiffies));
349 }
350 count++;
351 }
1ec14ad3 352 if (!list_empty(&dev_priv->ring[VCS].request_list)) {
c2c347a9
CW
353 seq_printf(m, "BSD requests:\n");
354 list_for_each_entry(gem_request,
1ec14ad3 355 &dev_priv->ring[VCS].request_list,
c2c347a9
CW
356 list) {
357 seq_printf(m, " %d @ %d\n",
358 gem_request->seqno,
359 (int) (jiffies - gem_request->emitted_jiffies));
360 }
361 count++;
362 }
1ec14ad3 363 if (!list_empty(&dev_priv->ring[BCS].request_list)) {
c2c347a9
CW
364 seq_printf(m, "BLT requests:\n");
365 list_for_each_entry(gem_request,
1ec14ad3 366 &dev_priv->ring[BCS].request_list,
c2c347a9
CW
367 list) {
368 seq_printf(m, " %d @ %d\n",
369 gem_request->seqno,
370 (int) (jiffies - gem_request->emitted_jiffies));
371 }
372 count++;
2017263e 373 }
de227ef0
CW
374 mutex_unlock(&dev->struct_mutex);
375
c2c347a9
CW
376 if (count == 0)
377 seq_printf(m, "No requests\n");
378
2017263e
BG
379 return 0;
380}
381
b2223497
CW
382static void i915_ring_seqno_info(struct seq_file *m,
383 struct intel_ring_buffer *ring)
384{
385 if (ring->get_seqno) {
386 seq_printf(m, "Current sequence (%s): %d\n",
387 ring->name, ring->get_seqno(ring));
388 seq_printf(m, "Waiter sequence (%s): %d\n",
389 ring->name, ring->waiting_seqno);
390 seq_printf(m, "IRQ sequence (%s): %d\n",
391 ring->name, ring->irq_seqno);
392 }
393}
394
2017263e
BG
395static int i915_gem_seqno_info(struct seq_file *m, void *data)
396{
397 struct drm_info_node *node = (struct drm_info_node *) m->private;
398 struct drm_device *dev = node->minor->dev;
399 drm_i915_private_t *dev_priv = dev->dev_private;
1ec14ad3 400 int ret, i;
de227ef0
CW
401
402 ret = mutex_lock_interruptible(&dev->struct_mutex);
403 if (ret)
404 return ret;
2017263e 405
1ec14ad3
CW
406 for (i = 0; i < I915_NUM_RINGS; i++)
407 i915_ring_seqno_info(m, &dev_priv->ring[i]);
de227ef0
CW
408
409 mutex_unlock(&dev->struct_mutex);
410
2017263e
BG
411 return 0;
412}
413
414
415static int i915_interrupt_info(struct seq_file *m, void *data)
416{
417 struct drm_info_node *node = (struct drm_info_node *) m->private;
418 struct drm_device *dev = node->minor->dev;
419 drm_i915_private_t *dev_priv = dev->dev_private;
1ec14ad3 420 int ret, i;
de227ef0
CW
421
422 ret = mutex_lock_interruptible(&dev->struct_mutex);
423 if (ret)
424 return ret;
2017263e 425
bad720ff 426 if (!HAS_PCH_SPLIT(dev)) {
5f6a1695
ZW
427 seq_printf(m, "Interrupt enable: %08x\n",
428 I915_READ(IER));
429 seq_printf(m, "Interrupt identity: %08x\n",
430 I915_READ(IIR));
431 seq_printf(m, "Interrupt mask: %08x\n",
432 I915_READ(IMR));
433 seq_printf(m, "Pipe A stat: %08x\n",
434 I915_READ(PIPEASTAT));
435 seq_printf(m, "Pipe B stat: %08x\n",
436 I915_READ(PIPEBSTAT));
437 } else {
438 seq_printf(m, "North Display Interrupt enable: %08x\n",
439 I915_READ(DEIER));
440 seq_printf(m, "North Display Interrupt identity: %08x\n",
441 I915_READ(DEIIR));
442 seq_printf(m, "North Display Interrupt mask: %08x\n",
443 I915_READ(DEIMR));
444 seq_printf(m, "South Display Interrupt enable: %08x\n",
445 I915_READ(SDEIER));
446 seq_printf(m, "South Display Interrupt identity: %08x\n",
447 I915_READ(SDEIIR));
448 seq_printf(m, "South Display Interrupt mask: %08x\n",
449 I915_READ(SDEIMR));
450 seq_printf(m, "Graphics Interrupt enable: %08x\n",
451 I915_READ(GTIER));
452 seq_printf(m, "Graphics Interrupt identity: %08x\n",
453 I915_READ(GTIIR));
454 seq_printf(m, "Graphics Interrupt mask: %08x\n",
455 I915_READ(GTIMR));
456 }
2017263e
BG
457 seq_printf(m, "Interrupts received: %d\n",
458 atomic_read(&dev_priv->irq_received));
1ec14ad3
CW
459 for (i = 0; i < I915_NUM_RINGS; i++)
460 i915_ring_seqno_info(m, &dev_priv->ring[i]);
de227ef0
CW
461 mutex_unlock(&dev->struct_mutex);
462
2017263e
BG
463 return 0;
464}
465
a6172a80
CW
466static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
467{
468 struct drm_info_node *node = (struct drm_info_node *) m->private;
469 struct drm_device *dev = node->minor->dev;
470 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW
471 int i, ret;
472
473 ret = mutex_lock_interruptible(&dev->struct_mutex);
474 if (ret)
475 return ret;
a6172a80
CW
476
477 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
478 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
479 for (i = 0; i < dev_priv->num_fence_regs; i++) {
05394f39 480 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
a6172a80 481
c2c347a9
CW
482 seq_printf(m, "Fenced object[%2d] = ", i);
483 if (obj == NULL)
484 seq_printf(m, "unused");
485 else
05394f39 486 describe_obj(m, obj);
c2c347a9 487 seq_printf(m, "\n");
a6172a80
CW
488 }
489
05394f39 490 mutex_unlock(&dev->struct_mutex);
a6172a80
CW
491 return 0;
492}
493
2017263e
BG
494static int i915_hws_info(struct seq_file *m, void *data)
495{
496 struct drm_info_node *node = (struct drm_info_node *) m->private;
497 struct drm_device *dev = node->minor->dev;
498 drm_i915_private_t *dev_priv = dev->dev_private;
4066c0ae 499 struct intel_ring_buffer *ring;
2017263e 500 volatile u32 *hws;
4066c0ae
CW
501 int i;
502
1ec14ad3 503 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
4066c0ae 504 hws = (volatile u32 *)ring->status_page.page_addr;
2017263e
BG
505 if (hws == NULL)
506 return 0;
507
508 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
509 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
510 i * 4,
511 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
512 }
513 return 0;
514}
515
5cdf5881
CW
516static void i915_dump_object(struct seq_file *m,
517 struct io_mapping *mapping,
05394f39 518 struct drm_i915_gem_object *obj)
6911a9b8 519{
5cdf5881 520 int page, page_count, i;
6911a9b8 521
05394f39 522 page_count = obj->base.size / PAGE_SIZE;
6911a9b8 523 for (page = 0; page < page_count; page++) {
5cdf5881 524 u32 *mem = io_mapping_map_wc(mapping,
05394f39 525 obj->gtt_offset + page * PAGE_SIZE);
6911a9b8
BG
526 for (i = 0; i < PAGE_SIZE; i += 4)
527 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
5cdf5881 528 io_mapping_unmap(mem);
6911a9b8
BG
529 }
530}
531
532static int i915_batchbuffer_info(struct seq_file *m, void *data)
533{
534 struct drm_info_node *node = (struct drm_info_node *) m->private;
535 struct drm_device *dev = node->minor->dev;
536 drm_i915_private_t *dev_priv = dev->dev_private;
05394f39 537 struct drm_i915_gem_object *obj;
6911a9b8
BG
538 int ret;
539
de227ef0
CW
540 ret = mutex_lock_interruptible(&dev->struct_mutex);
541 if (ret)
542 return ret;
6911a9b8 543
05394f39
CW
544 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
545 if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
546 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
547 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
6911a9b8
BG
548 }
549 }
550
de227ef0 551 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG
552 return 0;
553}
554
555static int i915_ringbuffer_data(struct seq_file *m, void *data)
556{
557 struct drm_info_node *node = (struct drm_info_node *) m->private;
558 struct drm_device *dev = node->minor->dev;
559 drm_i915_private_t *dev_priv = dev->dev_private;
c2c347a9 560 struct intel_ring_buffer *ring;
de227ef0
CW
561 int ret;
562
563 ret = mutex_lock_interruptible(&dev->struct_mutex);
564 if (ret)
565 return ret;
6911a9b8 566
1ec14ad3 567 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
05394f39 568 if (!ring->obj) {
6911a9b8 569 seq_printf(m, "No ringbuffer setup\n");
de227ef0 570 } else {
c2c347a9 571 u8 *virt = ring->virtual_start;
de227ef0 572 uint32_t off;
6911a9b8 573
c2c347a9 574 for (off = 0; off < ring->size; off += 4) {
de227ef0
CW
575 uint32_t *ptr = (uint32_t *)(virt + off);
576 seq_printf(m, "%08x : %08x\n", off, *ptr);
577 }
6911a9b8 578 }
de227ef0 579 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG
580
581 return 0;
582}
583
584static int i915_ringbuffer_info(struct seq_file *m, void *data)
585{
586 struct drm_info_node *node = (struct drm_info_node *) m->private;
587 struct drm_device *dev = node->minor->dev;
588 drm_i915_private_t *dev_priv = dev->dev_private;
c2c347a9
CW
589 struct intel_ring_buffer *ring;
590
1ec14ad3 591 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
c2c347a9 592 if (ring->size == 0)
1ec14ad3 593 return 0;
6911a9b8 594
c2c347a9
CW
595 seq_printf(m, "Ring %s:\n", ring->name);
596 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
597 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
598 seq_printf(m, " Size : %08x\n", ring->size);
599 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
1ec14ad3
CW
600 seq_printf(m, " NOPID : %08x\n", I915_READ_NOPID(ring));
601 if (IS_GEN6(dev)) {
602 seq_printf(m, " Sync 0 : %08x\n", I915_READ_SYNC_0(ring));
603 seq_printf(m, " Sync 1 : %08x\n", I915_READ_SYNC_1(ring));
604 }
c2c347a9
CW
605 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
606 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
6911a9b8
BG
607
608 return 0;
609}
610
e5c65260
CW
611static const char *ring_str(int ring)
612{
613 switch (ring) {
3685092b
CW
614 case RING_RENDER: return " render";
615 case RING_BSD: return " bsd";
616 case RING_BLT: return " blt";
e5c65260
CW
617 default: return "";
618 }
619}
620
9df30794
CW
621static const char *pin_flag(int pinned)
622{
623 if (pinned > 0)
624 return " P";
625 else if (pinned < 0)
626 return " p";
627 else
628 return "";
629}
630
631static const char *tiling_flag(int tiling)
632{
633 switch (tiling) {
634 default:
635 case I915_TILING_NONE: return "";
636 case I915_TILING_X: return " X";
637 case I915_TILING_Y: return " Y";
638 }
639}
640
641static const char *dirty_flag(int dirty)
642{
643 return dirty ? " dirty" : "";
644}
645
646static const char *purgeable_flag(int purgeable)
647{
648 return purgeable ? " purgeable" : "";
649}
650
c724e8a9
CW
651static void print_error_buffers(struct seq_file *m,
652 const char *name,
653 struct drm_i915_error_buffer *err,
654 int count)
655{
656 seq_printf(m, "%s [%d]:\n", name, count);
657
658 while (count--) {
659 seq_printf(m, " %08x %8zd %04x %04x %08x%s%s%s%s%s",
660 err->gtt_offset,
661 err->size,
662 err->read_domains,
663 err->write_domain,
664 err->seqno,
665 pin_flag(err->pinned),
666 tiling_flag(err->tiling),
667 dirty_flag(err->dirty),
668 purgeable_flag(err->purgeable),
669 ring_str(err->ring));
670
671 if (err->name)
672 seq_printf(m, " (name: %d)", err->name);
673 if (err->fence_reg != I915_FENCE_REG_NONE)
674 seq_printf(m, " (fence: %d)", err->fence_reg);
675
676 seq_printf(m, "\n");
677 err++;
678 }
679}
680
63eeaf38
JB
681static int i915_error_state(struct seq_file *m, void *unused)
682{
683 struct drm_info_node *node = (struct drm_info_node *) m->private;
684 struct drm_device *dev = node->minor->dev;
685 drm_i915_private_t *dev_priv = dev->dev_private;
686 struct drm_i915_error_state *error;
687 unsigned long flags;
9df30794 688 int i, page, offset, elt;
63eeaf38
JB
689
690 spin_lock_irqsave(&dev_priv->error_lock, flags);
691 if (!dev_priv->first_error) {
692 seq_printf(m, "no error state collected\n");
693 goto out;
694 }
695
696 error = dev_priv->first_error;
697
8a905236
JB
698 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
699 error->time.tv_usec);
9df30794 700 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
1d8f38f4
CW
701 seq_printf(m, "EIR: 0x%08x\n", error->eir);
702 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
f406839f
CW
703 if (INTEL_INFO(dev)->gen >= 6) {
704 seq_printf(m, "ERROR: 0x%08x\n", error->error);
1d8f38f4
CW
705 seq_printf(m, "Blitter command stream:\n");
706 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
1d8f38f4 707 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
e5c65260 708 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
1d8f38f4
CW
709 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
710 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
add354dd
CW
711 seq_printf(m, "Video (BSD) command stream:\n");
712 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
add354dd 713 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
e5c65260 714 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
add354dd
CW
715 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
716 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
f406839f 717 }
1d8f38f4
CW
718 seq_printf(m, "Render command stream:\n");
719 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
63eeaf38
JB
720 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
721 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
722 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
a6c45cf0 723 if (INTEL_INFO(dev)->gen >= 4) {
63eeaf38 724 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
1d8f38f4 725 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
63eeaf38 726 }
1d8f38f4
CW
727 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
728 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
9df30794 729
748ebc60
CW
730 for (i = 0; i < 16; i++)
731 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
732
c724e8a9
CW
733 if (error->active_bo)
734 print_error_buffers(m, "Active",
735 error->active_bo,
736 error->active_bo_count);
737
738 if (error->pinned_bo)
739 print_error_buffers(m, "Pinned",
740 error->pinned_bo,
741 error->pinned_bo_count);
9df30794
CW
742
743 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
744 if (error->batchbuffer[i]) {
745 struct drm_i915_error_object *obj = error->batchbuffer[i];
746
747 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
748 offset = 0;
749 for (page = 0; page < obj->page_count; page++) {
750 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
751 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
752 offset += 4;
753 }
754 }
755 }
756 }
757
758 if (error->ringbuffer) {
759 struct drm_i915_error_object *obj = error->ringbuffer;
760
761 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
762 offset = 0;
763 for (page = 0; page < obj->page_count; page++) {
764 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
765 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
766 offset += 4;
767 }
768 }
769 }
63eeaf38 770
6ef3d427
CW
771 if (error->overlay)
772 intel_overlay_print_error_state(m, error->overlay);
773
c4a1d9e4
CW
774 if (error->display)
775 intel_display_print_error_state(m, dev, error->display);
776
63eeaf38
JB
777out:
778 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
779
780 return 0;
781}
6911a9b8 782
f97108d1
JB
783static int i915_rstdby_delays(struct seq_file *m, void *unused)
784{
785 struct drm_info_node *node = (struct drm_info_node *) m->private;
786 struct drm_device *dev = node->minor->dev;
787 drm_i915_private_t *dev_priv = dev->dev_private;
788 u16 crstanddelay = I915_READ16(CRSTANDVID);
789
790 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
791
792 return 0;
793}
794
795static int i915_cur_delayinfo(struct seq_file *m, void *unused)
796{
797 struct drm_info_node *node = (struct drm_info_node *) m->private;
798 struct drm_device *dev = node->minor->dev;
799 drm_i915_private_t *dev_priv = dev->dev_private;
800 u16 rgvswctl = I915_READ16(MEMSWCTL);
7648fa99 801 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
f97108d1 802
7648fa99
JB
803 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
804 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
805 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
806 MEMSTAT_VID_SHIFT);
807 seq_printf(m, "Current P-state: %d\n",
808 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
f97108d1
JB
809
810 return 0;
811}
812
813static int i915_delayfreq_table(struct seq_file *m, void *unused)
814{
815 struct drm_info_node *node = (struct drm_info_node *) m->private;
816 struct drm_device *dev = node->minor->dev;
817 drm_i915_private_t *dev_priv = dev->dev_private;
818 u32 delayfreq;
819 int i;
820
821 for (i = 0; i < 16; i++) {
822 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
7648fa99
JB
823 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
824 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
f97108d1
JB
825 }
826
827 return 0;
828}
829
830static inline int MAP_TO_MV(int map)
831{
832 return 1250 - (map * 25);
833}
834
835static int i915_inttoext_table(struct seq_file *m, void *unused)
836{
837 struct drm_info_node *node = (struct drm_info_node *) m->private;
838 struct drm_device *dev = node->minor->dev;
839 drm_i915_private_t *dev_priv = dev->dev_private;
840 u32 inttoext;
841 int i;
842
843 for (i = 1; i <= 32; i++) {
844 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
845 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
846 }
847
848 return 0;
849}
850
851static int i915_drpc_info(struct seq_file *m, void *unused)
852{
853 struct drm_info_node *node = (struct drm_info_node *) m->private;
854 struct drm_device *dev = node->minor->dev;
855 drm_i915_private_t *dev_priv = dev->dev_private;
856 u32 rgvmodectl = I915_READ(MEMMODECTL);
7648fa99
JB
857 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
858 u16 crstandvid = I915_READ16(CRSTANDVID);
f97108d1
JB
859
860 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
861 "yes" : "no");
862 seq_printf(m, "Boost freq: %d\n",
863 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
864 MEMMODE_BOOST_FREQ_SHIFT);
865 seq_printf(m, "HW control enabled: %s\n",
866 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
867 seq_printf(m, "SW control enabled: %s\n",
868 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
869 seq_printf(m, "Gated voltage change: %s\n",
870 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
871 seq_printf(m, "Starting frequency: P%d\n",
872 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
7648fa99 873 seq_printf(m, "Max P-state: P%d\n",
f97108d1 874 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
7648fa99
JB
875 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
876 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
877 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
878 seq_printf(m, "Render standby enabled: %s\n",
879 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
f97108d1
JB
880
881 return 0;
882}
883
b5e50c3f
JB
884static int i915_fbc_status(struct seq_file *m, void *unused)
885{
886 struct drm_info_node *node = (struct drm_info_node *) m->private;
887 struct drm_device *dev = node->minor->dev;
b5e50c3f 888 drm_i915_private_t *dev_priv = dev->dev_private;
b5e50c3f 889
ee5382ae 890 if (!I915_HAS_FBC(dev)) {
b5e50c3f
JB
891 seq_printf(m, "FBC unsupported on this chipset\n");
892 return 0;
893 }
894
ee5382ae 895 if (intel_fbc_enabled(dev)) {
b5e50c3f
JB
896 seq_printf(m, "FBC enabled\n");
897 } else {
898 seq_printf(m, "FBC disabled: ");
899 switch (dev_priv->no_fbc_reason) {
bed4a673
CW
900 case FBC_NO_OUTPUT:
901 seq_printf(m, "no outputs");
902 break;
b5e50c3f
JB
903 case FBC_STOLEN_TOO_SMALL:
904 seq_printf(m, "not enough stolen memory");
905 break;
906 case FBC_UNSUPPORTED_MODE:
907 seq_printf(m, "mode not supported");
908 break;
909 case FBC_MODE_TOO_LARGE:
910 seq_printf(m, "mode too large");
911 break;
912 case FBC_BAD_PLANE:
913 seq_printf(m, "FBC unsupported on plane");
914 break;
915 case FBC_NOT_TILED:
916 seq_printf(m, "scanout buffer not tiled");
917 break;
9c928d16
JB
918 case FBC_MULTIPLE_PIPES:
919 seq_printf(m, "multiple pipes are enabled");
920 break;
b5e50c3f
JB
921 default:
922 seq_printf(m, "unknown reason");
923 }
924 seq_printf(m, "\n");
925 }
926 return 0;
927}
928
4a9bef37
JB
929static int i915_sr_status(struct seq_file *m, void *unused)
930{
931 struct drm_info_node *node = (struct drm_info_node *) m->private;
932 struct drm_device *dev = node->minor->dev;
933 drm_i915_private_t *dev_priv = dev->dev_private;
934 bool sr_enabled = false;
935
f00a3ddf 936 if (IS_GEN5(dev))
5ba2aaaa 937 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
a6c45cf0 938 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
4a9bef37
JB
939 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
940 else if (IS_I915GM(dev))
941 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
942 else if (IS_PINEVIEW(dev))
943 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
944
5ba2aaaa
CW
945 seq_printf(m, "self-refresh: %s\n",
946 sr_enabled ? "enabled" : "disabled");
4a9bef37
JB
947
948 return 0;
949}
950
7648fa99
JB
951static int i915_emon_status(struct seq_file *m, void *unused)
952{
953 struct drm_info_node *node = (struct drm_info_node *) m->private;
954 struct drm_device *dev = node->minor->dev;
955 drm_i915_private_t *dev_priv = dev->dev_private;
956 unsigned long temp, chipset, gfx;
de227ef0
CW
957 int ret;
958
959 ret = mutex_lock_interruptible(&dev->struct_mutex);
960 if (ret)
961 return ret;
7648fa99
JB
962
963 temp = i915_mch_val(dev_priv);
964 chipset = i915_chipset_val(dev_priv);
965 gfx = i915_gfx_val(dev_priv);
de227ef0 966 mutex_unlock(&dev->struct_mutex);
7648fa99
JB
967
968 seq_printf(m, "GMCH temp: %ld\n", temp);
969 seq_printf(m, "Chipset power: %ld\n", chipset);
970 seq_printf(m, "GFX power: %ld\n", gfx);
971 seq_printf(m, "Total power: %ld\n", chipset + gfx);
972
973 return 0;
974}
975
976static int i915_gfxec(struct seq_file *m, void *unused)
977{
978 struct drm_info_node *node = (struct drm_info_node *) m->private;
979 struct drm_device *dev = node->minor->dev;
980 drm_i915_private_t *dev_priv = dev->dev_private;
981
982 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
983
984 return 0;
985}
986
44834a67
CW
987static int i915_opregion(struct seq_file *m, void *unused)
988{
989 struct drm_info_node *node = (struct drm_info_node *) m->private;
990 struct drm_device *dev = node->minor->dev;
991 drm_i915_private_t *dev_priv = dev->dev_private;
992 struct intel_opregion *opregion = &dev_priv->opregion;
993 int ret;
994
995 ret = mutex_lock_interruptible(&dev->struct_mutex);
996 if (ret)
997 return ret;
998
999 if (opregion->header)
1000 seq_write(m, opregion->header, OPREGION_SIZE);
1001
1002 mutex_unlock(&dev->struct_mutex);
1003
1004 return 0;
1005}
1006
37811fcc
CW
1007static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1008{
1009 struct drm_info_node *node = (struct drm_info_node *) m->private;
1010 struct drm_device *dev = node->minor->dev;
1011 drm_i915_private_t *dev_priv = dev->dev_private;
1012 struct intel_fbdev *ifbdev;
1013 struct intel_framebuffer *fb;
1014 int ret;
1015
1016 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1017 if (ret)
1018 return ret;
1019
1020 ifbdev = dev_priv->fbdev;
1021 fb = to_intel_framebuffer(ifbdev->helper.fb);
1022
1023 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1024 fb->base.width,
1025 fb->base.height,
1026 fb->base.depth,
1027 fb->base.bits_per_pixel);
05394f39 1028 describe_obj(m, fb->obj);
37811fcc
CW
1029 seq_printf(m, "\n");
1030
1031 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1032 if (&fb->base == ifbdev->helper.fb)
1033 continue;
1034
1035 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1036 fb->base.width,
1037 fb->base.height,
1038 fb->base.depth,
1039 fb->base.bits_per_pixel);
05394f39 1040 describe_obj(m, fb->obj);
37811fcc
CW
1041 seq_printf(m, "\n");
1042 }
1043
1044 mutex_unlock(&dev->mode_config.mutex);
1045
1046 return 0;
1047}
1048
f3cd474b
CW
1049static int
1050i915_wedged_open(struct inode *inode,
1051 struct file *filp)
1052{
1053 filp->private_data = inode->i_private;
1054 return 0;
1055}
1056
1057static ssize_t
1058i915_wedged_read(struct file *filp,
1059 char __user *ubuf,
1060 size_t max,
1061 loff_t *ppos)
1062{
1063 struct drm_device *dev = filp->private_data;
1064 drm_i915_private_t *dev_priv = dev->dev_private;
1065 char buf[80];
1066 int len;
1067
1068 len = snprintf(buf, sizeof (buf),
1069 "wedged : %d\n",
1070 atomic_read(&dev_priv->mm.wedged));
1071
f4433a8d
DC
1072 if (len > sizeof (buf))
1073 len = sizeof (buf);
1074
f3cd474b
CW
1075 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1076}
1077
1078static ssize_t
1079i915_wedged_write(struct file *filp,
1080 const char __user *ubuf,
1081 size_t cnt,
1082 loff_t *ppos)
1083{
1084 struct drm_device *dev = filp->private_data;
f3cd474b
CW
1085 char buf[20];
1086 int val = 1;
1087
1088 if (cnt > 0) {
1089 if (cnt > sizeof (buf) - 1)
1090 return -EINVAL;
1091
1092 if (copy_from_user(buf, ubuf, cnt))
1093 return -EFAULT;
1094 buf[cnt] = 0;
1095
1096 val = simple_strtoul(buf, NULL, 0);
1097 }
1098
1099 DRM_INFO("Manually setting wedged to %d\n", val);
527f9e90 1100 i915_handle_error(dev, val);
f3cd474b
CW
1101
1102 return cnt;
1103}
1104
1105static const struct file_operations i915_wedged_fops = {
1106 .owner = THIS_MODULE,
1107 .open = i915_wedged_open,
1108 .read = i915_wedged_read,
1109 .write = i915_wedged_write,
6038f373 1110 .llseek = default_llseek,
f3cd474b
CW
1111};
1112
1113/* As the drm_debugfs_init() routines are called before dev->dev_private is
1114 * allocated we need to hook into the minor for release. */
1115static int
1116drm_add_fake_info_node(struct drm_minor *minor,
1117 struct dentry *ent,
1118 const void *key)
1119{
1120 struct drm_info_node *node;
1121
1122 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1123 if (node == NULL) {
1124 debugfs_remove(ent);
1125 return -ENOMEM;
1126 }
1127
1128 node->minor = minor;
1129 node->dent = ent;
1130 node->info_ent = (void *) key;
1131 list_add(&node->list, &minor->debugfs_nodes.list);
1132
1133 return 0;
1134}
1135
1136static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1137{
1138 struct drm_device *dev = minor->dev;
1139 struct dentry *ent;
1140
1141 ent = debugfs_create_file("i915_wedged",
1142 S_IRUGO | S_IWUSR,
1143 root, dev,
1144 &i915_wedged_fops);
1145 if (IS_ERR(ent))
1146 return PTR_ERR(ent);
1147
1148 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1149}
9e3a6d15 1150
27c202ad 1151static struct drm_info_list i915_debugfs_list[] = {
70d39fe4 1152 {"i915_capabilities", i915_capabilities, 0, 0},
73aa808f 1153 {"i915_gem_objects", i915_gem_object_info, 0},
433e12f7
BG
1154 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1155 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1156 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
f13d3f73 1157 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
d21d5975 1158 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
4e5359cd 1159 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2017263e
BG
1160 {"i915_gem_request", i915_gem_request_info, 0},
1161 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 1162 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e 1163 {"i915_gem_interrupt", i915_interrupt_info, 0},
1ec14ad3
CW
1164 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
1165 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
1166 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
1167 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS},
1168 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS},
1169 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS},
1170 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS},
1171 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS},
1172 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS},
6911a9b8 1173 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 1174 {"i915_error_state", i915_error_state, 0},
f97108d1
JB
1175 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1176 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1177 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1178 {"i915_inttoext_table", i915_inttoext_table, 0},
1179 {"i915_drpc_info", i915_drpc_info, 0},
7648fa99
JB
1180 {"i915_emon_status", i915_emon_status, 0},
1181 {"i915_gfxec", i915_gfxec, 0},
b5e50c3f 1182 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 1183 {"i915_sr_status", i915_sr_status, 0},
44834a67 1184 {"i915_opregion", i915_opregion, 0},
37811fcc 1185 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2017263e 1186};
27c202ad 1187#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 1188
27c202ad 1189int i915_debugfs_init(struct drm_minor *minor)
2017263e 1190{
f3cd474b
CW
1191 int ret;
1192
1193 ret = i915_wedged_create(minor->debugfs_root, minor);
1194 if (ret)
1195 return ret;
1196
27c202ad
BG
1197 return drm_debugfs_create_files(i915_debugfs_list,
1198 I915_DEBUGFS_ENTRIES,
2017263e
BG
1199 minor->debugfs_root, minor);
1200}
1201
27c202ad 1202void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 1203{
27c202ad
BG
1204 drm_debugfs_remove_files(i915_debugfs_list,
1205 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH
1206 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1207 1, minor);
2017263e
BG
1208}
1209
1210#endif /* CONFIG_DEBUG_FS */