[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / i915 / i915_gem_dmabuf.c

/*
 * Copyright 2012 Red Hat Inc
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Dave Airlie <airlied@redhat.com>
 */

#include <linux/dma-buf.h>
#include <linux/reservation.h>

#include <drm/drmP.h>

#include "i915_drv.h"

static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
{
	return to_intel_bo(buf->priv);
}

static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,
					     enum dma_data_direction dir)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
	struct sg_table *st;
	struct scatterlist *src, *dst;
	int ret, i;

	ret = i915_gem_object_pin_pages(obj);
	if (ret)
		goto err;

	/* Copy sg so that we make an independent mapping */
	st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
	if (st == NULL) {
		ret = -ENOMEM;
		goto err_unpin_pages;
	}

	ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
	if (ret)
		goto err_free;

	src = obj->mm.pages->sgl;
	dst = st->sgl;
	for (i = 0; i < obj->mm.pages->nents; i++) {
		sg_set_page(dst, sg_page(src), src->length, 0);
		dst = sg_next(dst);
		src = sg_next(src);
	}

	if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) {
		ret = -ENOMEM;
		goto err_free_sg;
	}

	return st;

err_free_sg:
	sg_free_table(st);
err_free:
	kfree(st);
err_unpin_pages:
	i915_gem_object_unpin_pages(obj);
err:
	return ERR_PTR(ret);
}

static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
				   struct sg_table *sg,
				   enum dma_data_direction dir)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);

	dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, dir);
	sg_free_table(sg);
	kfree(sg);

	i915_gem_object_unpin_pages(obj);
}

static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);

	return i915_gem_object_pin_map(obj, I915_MAP_WB);
}

static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);

	i915_gem_object_unpin_map(obj);
}

static void *i915_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf, unsigned long page_num)
{
	return NULL;
}

static void i915_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf, unsigned long page_num, void *addr)
{

}
static void *i915_gem_dmabuf_kmap(struct dma_buf *dma_buf, unsigned long page_num)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct page *page;

	if (page_num >= obj->base.size >> PAGE_SHIFT)
		return NULL;

	if (!i915_gem_object_has_struct_page(obj))
		return NULL;

	if (i915_gem_object_pin_pages(obj))
		return NULL;

	/* Synchronisation is left to the caller (via .begin_cpu_access()) */
	page = i915_gem_object_get_page(obj, page_num);
	if (IS_ERR(page))
		goto err_unpin;

	return kmap(page);

err_unpin:
	i915_gem_object_unpin_pages(obj);
	return NULL;
}

static void i915_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsigned long page_num, void *addr)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);

	kunmap(virt_to_page(addr));
	i915_gem_object_unpin_pages(obj);
}

static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	int ret;

	if (obj->base.size < vma->vm_end - vma->vm_start)
		return -EINVAL;

	if (!obj->base.filp)
		return -ENODEV;

	ret = call_mmap(obj->base.filp, vma);
	if (ret)
		return ret;

	fput(vma->vm_file);
	vma->vm_file = get_file(obj->base.filp);

	return 0;
}

static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct drm_device *dev = obj->base.dev;
	bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);
	int err;

	err = i915_gem_object_pin_pages(obj);
	if (err)
		return err;

	err = i915_mutex_lock_interruptible(dev);
	if (err)
		goto out;

	err = i915_gem_object_set_to_cpu_domain(obj, write);
	mutex_unlock(&dev->struct_mutex);

out:
	i915_gem_object_unpin_pages(obj);
	return err;
}

static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct drm_device *dev = obj->base.dev;
	int err;

	err = i915_gem_object_pin_pages(obj);
	if (err)
		return err;

	err = i915_mutex_lock_interruptible(dev);
	if (err)
		goto out;

	err = i915_gem_object_set_to_gtt_domain(obj, false);
	mutex_unlock(&dev->struct_mutex);

out:
	i915_gem_object_unpin_pages(obj);
	return err;
}

static const struct dma_buf_ops i915_dmabuf_ops =  {
	.map_dma_buf = i915_gem_map_dma_buf,
	.unmap_dma_buf = i915_gem_unmap_dma_buf,
	.release = drm_gem_dmabuf_release,
	.map = i915_gem_dmabuf_kmap,
	.map_atomic = i915_gem_dmabuf_kmap_atomic,
	.unmap = i915_gem_dmabuf_kunmap,
	.unmap_atomic = i915_gem_dmabuf_kunmap_atomic,
	.mmap = i915_gem_dmabuf_mmap,
	.vmap = i915_gem_dmabuf_vmap,
	.vunmap = i915_gem_dmabuf_vunmap,
	.begin_cpu_access = i915_gem_begin_cpu_access,
	.end_cpu_access = i915_gem_end_cpu_access,
};

struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
				      struct drm_gem_object *gem_obj, int flags)
{
	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
	DEFINE_DMA_BUF_EXPORT_INFO(exp_info);

	exp_info.ops = &i915_dmabuf_ops;
	exp_info.size = gem_obj->size;
	exp_info.flags = flags;
	exp_info.priv = gem_obj;
	exp_info.resv = obj->resv;

	if (obj->ops->dmabuf_export) {
		int ret = obj->ops->dmabuf_export(obj);
		if (ret)
			return ERR_PTR(ret);
	}

	return drm_gem_dmabuf_export(dev, &exp_info);
}

static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
{
	struct sg_table *pages;
	unsigned int sg_page_sizes;

	pages = dma_buf_map_attachment(obj->base.import_attach,
				       DMA_BIDIRECTIONAL);
	if (IS_ERR(pages))
		return PTR_ERR(pages);

	sg_page_sizes = i915_sg_page_sizes(pages->sgl);

	__i915_gem_object_set_pages(obj, pages, sg_page_sizes);

	return 0;
}

static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
					     struct sg_table *pages)
{
	dma_buf_unmap_attachment(obj->base.import_attach, pages,
				 DMA_BIDIRECTIONAL);
}

static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
	.get_pages = i915_gem_object_get_pages_dmabuf,
	.put_pages = i915_gem_object_put_pages_dmabuf,
};

struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
					     struct dma_buf *dma_buf)
{
	struct dma_buf_attachment *attach;
	struct drm_i915_gem_object *obj;
	int ret;

	/* is this one of own objects? */
	if (dma_buf->ops == &i915_dmabuf_ops) {
		obj = dma_buf_to_obj(dma_buf);
		/* is it from our device? */
		if (obj->base.dev == dev) {
			/*
			 * Importing dmabuf exported from out own gem increases
			 * refcount on gem itself instead of f_count of dmabuf.
			 */
			return &i915_gem_object_get(obj)->base;
		}
	}

	/* need to attach */
	attach = dma_buf_attach(dma_buf, dev->dev);
	if (IS_ERR(attach))
		return ERR_CAST(attach);

	get_dma_buf(dma_buf);

	obj = i915_gem_object_alloc(to_i915(dev));
	if (obj == NULL) {
		ret = -ENOMEM;
		goto fail_detach;
	}

	drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
	i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops);
	obj->base.import_attach = attach;
	obj->resv = dma_buf->resv;

	/* We use GTT as shorthand for a coherent domain, one that is
	 * neither in the GPU cache nor in the CPU cache, where all
	 * writes are immediately visible in memory. (That's not strictly
	 * true, but it's close! There are internal buffers such as the
	 * write-combined buffer or a delay through the chipset for GTT
	 * writes that do require us to treat GTT as a separate cache domain.)
	 */
	obj->base.read_domains = I915_GEM_DOMAIN_GTT;
	obj->base.write_domain = 0;

	return &obj->base;

fail_detach:
	dma_buf_detach(dma_buf, attach);
	dma_buf_put(dma_buf);

	return ERR_PTR(ret);
}

#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_dmabuf.c"
#include "selftests/i915_gem_dmabuf.c"
#endif
Commit	Line	Data
1286ff73 DV	1	/*
	2	* Copyright 2012 Red Hat Inc
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	21	* DEALINGS IN THE SOFTWARE.
	22	*
	23	* Authors:
	24	* Dave Airlie <airlied@redhat.com>
	25	*/
ad778f89 CW	26
	27	#include <linux/dma-buf.h>
	28	#include <linux/reservation.h>
	29
760285e7	30	#include <drm/drmP.h>
ad778f89	31
1286ff73	32	#include "i915_drv.h"
1286ff73	33
608806a5 DV	34	static struct drm_i915_gem_object dma_buf_to_obj(struct dma_buf buf)
	35	{
	36	return to_intel_bo(buf->priv);
	37	}
	38
6a101cb2	39	static struct sg_table i915_gem_map_dma_buf(struct dma_buf_attachment attachment,
9da3da66	40	enum dma_data_direction dir)
1286ff73	41	{
608806a5	42	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
9da3da66 CW	43	struct sg_table *st;
	44	struct scatterlist src, dst;
	45	int ret, i;
1286ff73	46
a4f5ea64	47	ret = i915_gem_object_pin_pages(obj);
5cfacded	48	if (ret)
7dd737f3	49	goto err;
5cfacded	50
9da3da66 CW	51	/* Copy sg so that we make an independent mapping */
	52	st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
	53	if (st == NULL) {
5cfacded	54	ret = -ENOMEM;
7dd737f3	55	goto err_unpin_pages;
1286ff73 DV	56	}
1286ff73 DV	57
a4f5ea64	58	ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
5cfacded CW	59	if (ret)
5cfacded CW	60	goto err_free;
9da3da66	61
a4f5ea64	62	src = obj->mm.pages->sgl;
9da3da66	63	dst = st->sgl;
a4f5ea64	64	for (i = 0; i < obj->mm.pages->nents; i++) {
67d5a50c	65	sg_set_page(dst, sg_page(src), src->length, 0);
9da3da66 CW	66	dst = sg_next(dst);
	67	src = sg_next(src);
	68	}
	69
	70	if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) {
7dd737f3	71	ret = -ENOMEM;
5cfacded	72	goto err_free_sg;
1286ff73 DV	73	}
1286ff73 DV	74
9da3da66	75	return st;
5cfacded CW	76
	77	err_free_sg:
	78	sg_free_table(st);
	79	err_free:
	80	kfree(st);
7dd737f3	81	err_unpin_pages:
5cfacded	82	i915_gem_object_unpin_pages(obj);
5cfacded CW	83	err:
5cfacded CW	84	return ERR_PTR(ret);
1286ff73 DV	85	}
1286ff73 DV	86
6a101cb2	87	static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
2f745ad3 CW	88	struct sg_table *sg,
2f745ad3 CW	89	enum dma_data_direction dir)
1286ff73	90	{
608806a5	91	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
f214266c	92
1286ff73 DV	93	dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, dir);
	94	sg_free_table(sg);
	95	kfree(sg);
f214266c DV	96
f214266c DV	97	i915_gem_object_unpin_pages(obj);
1286ff73 DV	98	}
1286ff73 DV	99
9a70cc2a DA	100	static void i915_gem_dmabuf_vmap(struct dma_buf dma_buf)
9a70cc2a DA	101	{
608806a5	102	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
9a70cc2a	103
7dd737f3	104	return i915_gem_object_pin_map(obj, I915_MAP_WB);
9a70cc2a DA	105	}
	106
	107	static void i915_gem_dmabuf_vunmap(struct dma_buf dma_buf, void vaddr)
	108	{
608806a5	109	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
9a70cc2a	110
0a798eb9	111	i915_gem_object_unpin_map(obj);
9a70cc2a DA	112	}
9a70cc2a DA	113
1286ff73 DV	114	static void i915_gem_dmabuf_kmap_atomic(struct dma_buf dma_buf, unsigned long page_num)
	115	{
	116	return NULL;
	117	}
	118
	119	static void i915_gem_dmabuf_kunmap_atomic(struct dma_buf dma_buf, unsigned long page_num, void addr)
	120	{
	121
	122	}
	123	static void i915_gem_dmabuf_kmap(struct dma_buf dma_buf, unsigned long page_num)
	124	{
c944a308 CW	125	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	126	struct page *page;
	127
	128	if (page_num >= obj->base.size >> PAGE_SHIFT)
	129	return NULL;
	130
	131	if (!i915_gem_object_has_struct_page(obj))
	132	return NULL;
	133
	134	if (i915_gem_object_pin_pages(obj))
	135	return NULL;
	136
	137	/* Synchronisation is left to the caller (via .begin_cpu_access()) */
	138	page = i915_gem_object_get_page(obj, page_num);
	139	if (IS_ERR(page))
	140	goto err_unpin;
	141
	142	return kmap(page);
	143
	144	err_unpin:
	145	i915_gem_object_unpin_pages(obj);
1286ff73 DV	146	return NULL;
	147	}
	148
	149	static void i915_gem_dmabuf_kunmap(struct dma_buf dma_buf, unsigned long page_num, void addr)
	150	{
c944a308	151	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
1286ff73	152
c944a308 CW	153	kunmap(virt_to_page(addr));
c944a308 CW	154	i915_gem_object_unpin_pages(obj);
1286ff73 DV	155	}
1286ff73 DV	156
2dad9d4d DA	157	static int i915_gem_dmabuf_mmap(struct dma_buf dma_buf, struct vm_area_struct vma)
2dad9d4d DA	158	{
2dbf0d90 TV	159	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	160	int ret;
	161
	162	if (obj->base.size < vma->vm_end - vma->vm_start)
	163	return -EINVAL;
	164
	165	if (!obj->base.filp)
	166	return -ENODEV;
	167
f74ac015	168	ret = call_mmap(obj->base.filp, vma);
2dbf0d90 TV	169	if (ret)
	170	return ret;
	171
	172	fput(vma->vm_file);
	173	vma->vm_file = get_file(obj->base.filp);
	174
	175	return 0;
2dad9d4d DA	176	}
2dad9d4d DA	177
831e9da7	178	static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
ec6f1bb9	179	{
608806a5	180	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
ec6f1bb9	181	struct drm_device *dev = obj->base.dev;
ec6f1bb9	182	bool write = (direction == DMA_BIDIRECTIONAL \|\| direction == DMA_TO_DEVICE);
7dd737f3	183	int err;
ec6f1bb9	184
7dd737f3 CW	185	err = i915_gem_object_pin_pages(obj);
	186	if (err)
	187	return err;
	188
	189	err = i915_mutex_lock_interruptible(dev);
	190	if (err)
	191	goto out;
ec6f1bb9	192
7dd737f3	193	err = i915_gem_object_set_to_cpu_domain(obj, write);
ec6f1bb9	194	mutex_unlock(&dev->struct_mutex);
7dd737f3 CW	195
	196	out:
	197	i915_gem_object_unpin_pages(obj);
	198	return err;
ec6f1bb9 DA	199	}
ec6f1bb9 DA	200
18b862dc	201	static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
346400c8 TV	202	{
	203	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	204	struct drm_device *dev = obj->base.dev;
7dd737f3	205	int err;
346400c8	206
7dd737f3 CW	207	err = i915_gem_object_pin_pages(obj);
	208	if (err)
	209	return err;
	210
	211	err = i915_mutex_lock_interruptible(dev);
	212	if (err)
	213	goto out;
346400c8	214
7dd737f3	215	err = i915_gem_object_set_to_gtt_domain(obj, false);
346400c8 TV	216	mutex_unlock(&dev->struct_mutex);
346400c8 TV	217
7dd737f3 CW	218	out:
	219	i915_gem_object_unpin_pages(obj);
	220	return err;
346400c8 TV	221	}
346400c8 TV	222
6a101cb2	223	static const struct dma_buf_ops i915_dmabuf_ops = {
1286ff73 DV	224	.map_dma_buf = i915_gem_map_dma_buf,
1286ff73 DV	225	.unmap_dma_buf = i915_gem_unmap_dma_buf,
c1d6798d	226	.release = drm_gem_dmabuf_release,
f9b67f00 LG	227	.map = i915_gem_dmabuf_kmap,
	228	.map_atomic = i915_gem_dmabuf_kmap_atomic,
	229	.unmap = i915_gem_dmabuf_kunmap,
	230	.unmap_atomic = i915_gem_dmabuf_kunmap_atomic,
2dad9d4d	231	.mmap = i915_gem_dmabuf_mmap,
9a70cc2a DA	232	.vmap = i915_gem_dmabuf_vmap,
9a70cc2a DA	233	.vunmap = i915_gem_dmabuf_vunmap,
ec6f1bb9	234	.begin_cpu_access = i915_gem_begin_cpu_access,
346400c8	235	.end_cpu_access = i915_gem_end_cpu_access,
1286ff73 DV	236	};
	237
	238	struct dma_buf i915_gem_prime_export(struct drm_device dev,
9da3da66	239	struct drm_gem_object *gem_obj, int flags)
1286ff73	240	{
5cc9ed4b	241	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
d8fbe341 SS	242	DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
	243
	244	exp_info.ops = &i915_dmabuf_ops;
	245	exp_info.size = gem_obj->size;
	246	exp_info.flags = flags;
	247	exp_info.priv = gem_obj;
d07f0e59	248	exp_info.resv = obj->resv;
d8fbe341	249
5cc9ed4b CW	250	if (obj->ops->dmabuf_export) {
	251	int ret = obj->ops->dmabuf_export(obj);
	252	if (ret)
	253	return ERR_PTR(ret);
	254	}
	255
d07f0e59	256	return drm_gem_dmabuf_export(dev, &exp_info);
1286ff73 DV	257	}
1286ff73 DV	258
b91b09ee	259	static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
2f745ad3	260	{
b91b09ee	261	struct sg_table *pages;
84e8978e	262	unsigned int sg_page_sizes;
b91b09ee MA	263
	264	pages = dma_buf_map_attachment(obj->base.import_attach,
	265	DMA_BIDIRECTIONAL);
	266	if (IS_ERR(pages))
	267	return PTR_ERR(pages);
	268
84e8978e	269	sg_page_sizes = i915_sg_page_sizes(pages->sgl);
a5c08166	270
84e8978e	271	__i915_gem_object_set_pages(obj, pages, sg_page_sizes);
b91b09ee MA	272
b91b09ee MA	273	return 0;
1286ff73 DV	274	}
1286ff73 DV	275
03ac84f1 CW	276	static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
03ac84f1 CW	277	struct sg_table *pages)
2f745ad3	278	{
03ac84f1 CW	279	dma_buf_unmap_attachment(obj->base.import_attach, pages,
03ac84f1 CW	280	DMA_BIDIRECTIONAL);
2f745ad3 CW	281	}
	282
	283	static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
	284	.get_pages = i915_gem_object_get_pages_dmabuf,
	285	.put_pages = i915_gem_object_put_pages_dmabuf,
	286	};
	287
1286ff73	288	struct drm_gem_object i915_gem_prime_import(struct drm_device dev,
9da3da66	289	struct dma_buf *dma_buf)
1286ff73 DV	290	{
1286ff73 DV	291	struct dma_buf_attachment *attach;
1286ff73	292	struct drm_i915_gem_object *obj;
1286ff73 DV	293	int ret;
	294
	295	/* is this one of own objects? */
	296	if (dma_buf->ops == &i915_dmabuf_ops) {
608806a5	297	obj = dma_buf_to_obj(dma_buf);
1286ff73 DV	298	/* is it from our device? */
1286ff73 DV	299	if (obj->base.dev == dev) {
be8a42ae SWK	300	/*
	301	* Importing dmabuf exported from out own gem increases
	302	* refcount on gem itself instead of f_count of dmabuf.
	303	*/
25dc556a	304	return &i915_gem_object_get(obj)->base;
1286ff73 DV	305	}
	306	}
	307
	308	/* need to attach */
	309	attach = dma_buf_attach(dma_buf, dev->dev);
	310	if (IS_ERR(attach))
	311	return ERR_CAST(attach);
	312
011c2282 ID	313	get_dma_buf(dma_buf);
011c2282 ID	314
187685cb	315	obj = i915_gem_object_alloc(to_i915(dev));
1286ff73 DV	316	if (obj == NULL) {
1286ff73 DV	317	ret = -ENOMEM;
2f745ad3	318	goto fail_detach;
1286ff73 DV	319	}
1286ff73 DV	320
89c8233f	321	drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
2f745ad3	322	i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops);
1286ff73	323	obj->base.import_attach = attach;
d07f0e59	324	obj->resv = dma_buf->resv;
1286ff73	325
30bc06c0 CW	326	/* We use GTT as shorthand for a coherent domain, one that is
	327	* neither in the GPU cache nor in the CPU cache, where all
	328	* writes are immediately visible in memory. (That's not strictly
	329	* true, but it's close! There are internal buffers such as the
	330	* write-combined buffer or a delay through the chipset for GTT
	331	* writes that do require us to treat GTT as a separate cache domain.)
	332	*/
	333	obj->base.read_domains = I915_GEM_DOMAIN_GTT;
	334	obj->base.write_domain = 0;
	335
1286ff73 DV	336	return &obj->base;
1286ff73 DV	337
1286ff73 DV	338	fail_detach:
1286ff73 DV	339	dma_buf_detach(dma_buf, attach);
011c2282 ID	340	dma_buf_put(dma_buf);
011c2282 ID	341
1286ff73 DV	342	return ERR_PTR(ret);
1286ff73 DV	343	}
6cca22ed CW	344
	345	#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
	346	#include "selftests/mock_dmabuf.c"
	347	#include "selftests/i915_gem_dmabuf.c"
	348	#endif