[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / i915 / i915_gem_dmabuf.c

/*
 * Copyright 2012 Red Hat Inc
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Dave Airlie <airlied@redhat.com>
 */

#include <linux/dma-buf.h>
#include <linux/reservation.h>

#include <drm/drmP.h>

#include "i915_drv.h"

static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
{
	return to_intel_bo(buf->priv);
}

static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,
					     enum dma_data_direction dir)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
	struct sg_table *st;
	struct scatterlist *src, *dst;
	int ret, i;

	ret = i915_mutex_lock_interruptible(obj->base.dev);
	if (ret)
		goto err;

	ret = i915_gem_object_pin_pages(obj);
	if (ret)
		goto err_unlock;

	/* Copy sg so that we make an independent mapping */
	st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
	if (st == NULL) {
		ret = -ENOMEM;
		goto err_unpin;
	}

	ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
	if (ret)
		goto err_free;

	src = obj->mm.pages->sgl;
	dst = st->sgl;
	for (i = 0; i < obj->mm.pages->nents; i++) {
		sg_set_page(dst, sg_page(src), src->length, 0);
		dst = sg_next(dst);
		src = sg_next(src);
	}

	if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) {
		ret =-ENOMEM;
		goto err_free_sg;
	}

	mutex_unlock(&obj->base.dev->struct_mutex);
	return st;

err_free_sg:
	sg_free_table(st);
err_free:
	kfree(st);
err_unpin:
	i915_gem_object_unpin_pages(obj);
err_unlock:
	mutex_unlock(&obj->base.dev->struct_mutex);
err:
	return ERR_PTR(ret);
}

static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
				   struct sg_table *sg,
				   enum dma_data_direction dir)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);

	dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, dir);
	sg_free_table(sg);
	kfree(sg);

	mutex_lock(&obj->base.dev->struct_mutex);
	i915_gem_object_unpin_pages(obj);
	mutex_unlock(&obj->base.dev->struct_mutex);
}

static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct drm_device *dev = obj->base.dev;
	void *addr;
	int ret;

	ret = i915_mutex_lock_interruptible(dev);
	if (ret)
		return ERR_PTR(ret);

	addr = i915_gem_object_pin_map(obj, I915_MAP_WB);
	mutex_unlock(&dev->struct_mutex);

	return addr;
}

static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct drm_device *dev = obj->base.dev;

	mutex_lock(&dev->struct_mutex);
	i915_gem_object_unpin_map(obj);
	mutex_unlock(&dev->struct_mutex);
}

static void *i915_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf, unsigned long page_num)
{
	return NULL;
}

static void i915_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf, unsigned long page_num, void *addr)
{

}
static void *i915_gem_dmabuf_kmap(struct dma_buf *dma_buf, unsigned long page_num)
{
	return NULL;
}

static void i915_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsigned long page_num, void *addr)
{

}

static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	int ret;

	if (obj->base.size < vma->vm_end - vma->vm_start)
		return -EINVAL;

	if (!obj->base.filp)
		return -ENODEV;

	ret = obj->base.filp->f_op->mmap(obj->base.filp, vma);
	if (ret)
		return ret;

	fput(vma->vm_file);
	vma->vm_file = get_file(obj->base.filp);

	return 0;
}

static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct drm_device *dev = obj->base.dev;
	int ret;
	bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);

	ret = i915_mutex_lock_interruptible(dev);
	if (ret)
		return ret;

	ret = i915_gem_object_set_to_cpu_domain(obj, write);
	mutex_unlock(&dev->struct_mutex);
	return ret;
}

static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
{
	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	struct drm_device *dev = obj->base.dev;
	int ret;

	ret = i915_mutex_lock_interruptible(dev);
	if (ret)
		return ret;

	ret = i915_gem_object_set_to_gtt_domain(obj, false);
	mutex_unlock(&dev->struct_mutex);

	return ret;
}

static const struct dma_buf_ops i915_dmabuf_ops =  {
	.map_dma_buf = i915_gem_map_dma_buf,
	.unmap_dma_buf = i915_gem_unmap_dma_buf,
	.release = drm_gem_dmabuf_release,
	.kmap = i915_gem_dmabuf_kmap,
	.kmap_atomic = i915_gem_dmabuf_kmap_atomic,
	.kunmap = i915_gem_dmabuf_kunmap,
	.kunmap_atomic = i915_gem_dmabuf_kunmap_atomic,
	.mmap = i915_gem_dmabuf_mmap,
	.vmap = i915_gem_dmabuf_vmap,
	.vunmap = i915_gem_dmabuf_vunmap,
	.begin_cpu_access = i915_gem_begin_cpu_access,
	.end_cpu_access = i915_gem_end_cpu_access,
};

static void export_fences(struct drm_i915_gem_object *obj,
			  struct dma_buf *dma_buf)
{
	struct reservation_object *resv = dma_buf->resv;
	struct drm_i915_gem_request *req;
	unsigned long active;
	int idx;

	active = __I915_BO_ACTIVE(obj);
	if (!active)
		return;

	/* Serialise with execbuf to prevent concurrent fence-loops */
	mutex_lock(&obj->base.dev->struct_mutex);

	/* Mark the object for future fences before racily adding old fences */
	obj->base.dma_buf = dma_buf;

	ww_mutex_lock(&resv->lock, NULL);

	for_each_active(active, idx) {
		req = i915_gem_active_get(&obj->last_read[idx],
					  &obj->base.dev->struct_mutex);
		if (!req)
			continue;

		if (reservation_object_reserve_shared(resv) == 0)
			reservation_object_add_shared_fence(resv, &req->fence);

		i915_gem_request_put(req);
	}

	req = i915_gem_active_get(&obj->last_write,
				  &obj->base.dev->struct_mutex);
	if (req) {
		reservation_object_add_excl_fence(resv, &req->fence);
		i915_gem_request_put(req);
	}

	ww_mutex_unlock(&resv->lock);
	mutex_unlock(&obj->base.dev->struct_mutex);
}

struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
				      struct drm_gem_object *gem_obj, int flags)
{
	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
	DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
	struct dma_buf *dma_buf;

	exp_info.ops = &i915_dmabuf_ops;
	exp_info.size = gem_obj->size;
	exp_info.flags = flags;
	exp_info.priv = gem_obj;

	if (obj->ops->dmabuf_export) {
		int ret = obj->ops->dmabuf_export(obj);
		if (ret)
			return ERR_PTR(ret);
	}

	dma_buf = drm_gem_dmabuf_export(dev, &exp_info);
	if (IS_ERR(dma_buf))
		return dma_buf;

	export_fences(obj, dma_buf);
	return dma_buf;
}

static struct sg_table *
i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
{
	return dma_buf_map_attachment(obj->base.import_attach,
				      DMA_BIDIRECTIONAL);
}

static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
					     struct sg_table *pages)
{
	dma_buf_unmap_attachment(obj->base.import_attach, pages,
				 DMA_BIDIRECTIONAL);
}

static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
	.get_pages = i915_gem_object_get_pages_dmabuf,
	.put_pages = i915_gem_object_put_pages_dmabuf,
};

struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
					     struct dma_buf *dma_buf)
{
	struct dma_buf_attachment *attach;
	struct drm_i915_gem_object *obj;
	int ret;

	/* is this one of own objects? */
	if (dma_buf->ops == &i915_dmabuf_ops) {
		obj = dma_buf_to_obj(dma_buf);
		/* is it from our device? */
		if (obj->base.dev == dev) {
			/*
			 * Importing dmabuf exported from out own gem increases
			 * refcount on gem itself instead of f_count of dmabuf.
			 */
			return &i915_gem_object_get(obj)->base;
		}
	}

	/* need to attach */
	attach = dma_buf_attach(dma_buf, dev->dev);
	if (IS_ERR(attach))
		return ERR_CAST(attach);

	get_dma_buf(dma_buf);

	obj = i915_gem_object_alloc(dev);
	if (obj == NULL) {
		ret = -ENOMEM;
		goto fail_detach;
	}

	drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
	i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops);
	obj->base.import_attach = attach;

	/* We use GTT as shorthand for a coherent domain, one that is
	 * neither in the GPU cache nor in the CPU cache, where all
	 * writes are immediately visible in memory. (That's not strictly
	 * true, but it's close! There are internal buffers such as the
	 * write-combined buffer or a delay through the chipset for GTT
	 * writes that do require us to treat GTT as a separate cache domain.)
	 */
	obj->base.read_domains = I915_GEM_DOMAIN_GTT;
	obj->base.write_domain = 0;

	return &obj->base;

fail_detach:
	dma_buf_detach(dma_buf, attach);
	dma_buf_put(dma_buf);

	return ERR_PTR(ret);
}
Commit	Line	Data
1286ff73 DV	1	/*
	2	* Copyright 2012 Red Hat Inc
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	21	* DEALINGS IN THE SOFTWARE.
	22	*
	23	* Authors:
	24	* Dave Airlie <airlied@redhat.com>
	25	*/
ad778f89 CW	26
	27	#include <linux/dma-buf.h>
	28	#include <linux/reservation.h>
	29
760285e7	30	#include <drm/drmP.h>
ad778f89	31
1286ff73	32	#include "i915_drv.h"
1286ff73	33
608806a5 DV	34	static struct drm_i915_gem_object dma_buf_to_obj(struct dma_buf buf)
	35	{
	36	return to_intel_bo(buf->priv);
	37	}
	38
6a101cb2	39	static struct sg_table i915_gem_map_dma_buf(struct dma_buf_attachment attachment,
9da3da66	40	enum dma_data_direction dir)
1286ff73	41	{
608806a5	42	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
9da3da66 CW	43	struct sg_table *st;
	44	struct scatterlist src, dst;
	45	int ret, i;
1286ff73	46
9da3da66	47	ret = i915_mutex_lock_interruptible(obj->base.dev);
1286ff73	48	if (ret)
5cfacded	49	goto err;
1286ff73	50
a4f5ea64	51	ret = i915_gem_object_pin_pages(obj);
5cfacded CW	52	if (ret)
	53	goto err_unlock;
	54
9da3da66 CW	55	/* Copy sg so that we make an independent mapping */
	56	st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
	57	if (st == NULL) {
5cfacded CW	58	ret = -ENOMEM;
5cfacded CW	59	goto err_unpin;
1286ff73 DV	60	}
1286ff73 DV	61
a4f5ea64	62	ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
5cfacded CW	63	if (ret)
5cfacded CW	64	goto err_free;
9da3da66	65
a4f5ea64	66	src = obj->mm.pages->sgl;
9da3da66	67	dst = st->sgl;
a4f5ea64	68	for (i = 0; i < obj->mm.pages->nents; i++) {
67d5a50c	69	sg_set_page(dst, sg_page(src), src->length, 0);
9da3da66 CW	70	dst = sg_next(dst);
	71	src = sg_next(src);
	72	}
	73
	74	if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) {
5cfacded CW	75	ret =-ENOMEM;
5cfacded CW	76	goto err_free_sg;
1286ff73 DV	77	}
1286ff73 DV	78
9da3da66 CW	79	mutex_unlock(&obj->base.dev->struct_mutex);
9da3da66 CW	80	return st;
5cfacded CW	81
	82	err_free_sg:
	83	sg_free_table(st);
	84	err_free:
	85	kfree(st);
	86	err_unpin:
	87	i915_gem_object_unpin_pages(obj);
	88	err_unlock:
	89	mutex_unlock(&obj->base.dev->struct_mutex);
	90	err:
	91	return ERR_PTR(ret);
1286ff73 DV	92	}
1286ff73 DV	93
6a101cb2	94	static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
2f745ad3 CW	95	struct sg_table *sg,
2f745ad3 CW	96	enum dma_data_direction dir)
1286ff73	97	{
608806a5	98	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
f214266c	99
1286ff73 DV	100	dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, dir);
	101	sg_free_table(sg);
	102	kfree(sg);
f214266c	103
6d19245f	104	mutex_lock(&obj->base.dev->struct_mutex);
f214266c	105	i915_gem_object_unpin_pages(obj);
f214266c	106	mutex_unlock(&obj->base.dev->struct_mutex);
1286ff73 DV	107	}
1286ff73 DV	108
9a70cc2a DA	109	static void i915_gem_dmabuf_vmap(struct dma_buf dma_buf)
9a70cc2a DA	110	{
608806a5	111	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
9a70cc2a	112	struct drm_device *dev = obj->base.dev;
0a798eb9 CW	113	void *addr;
0a798eb9 CW	114	int ret;
9a70cc2a DA	115
	116	ret = i915_mutex_lock_interruptible(dev);
	117	if (ret)
	118	return ERR_PTR(ret);
	119
d31d7cb1	120	addr = i915_gem_object_pin_map(obj, I915_MAP_WB);
9a70cc2a	121	mutex_unlock(&dev->struct_mutex);
9da3da66	122
0a798eb9	123	return addr;
9a70cc2a DA	124	}
	125
	126	static void i915_gem_dmabuf_vunmap(struct dma_buf dma_buf, void vaddr)
	127	{
608806a5	128	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
9a70cc2a	129	struct drm_device *dev = obj->base.dev;
9a70cc2a	130
ce7ec768	131	mutex_lock(&dev->struct_mutex);
0a798eb9	132	i915_gem_object_unpin_map(obj);
9a70cc2a DA	133	mutex_unlock(&dev->struct_mutex);
	134	}
	135
1286ff73 DV	136	static void i915_gem_dmabuf_kmap_atomic(struct dma_buf dma_buf, unsigned long page_num)
	137	{
	138	return NULL;
	139	}
	140
	141	static void i915_gem_dmabuf_kunmap_atomic(struct dma_buf dma_buf, unsigned long page_num, void addr)
	142	{
	143
	144	}
	145	static void i915_gem_dmabuf_kmap(struct dma_buf dma_buf, unsigned long page_num)
	146	{
	147	return NULL;
	148	}
	149
	150	static void i915_gem_dmabuf_kunmap(struct dma_buf dma_buf, unsigned long page_num, void addr)
	151	{
	152
	153	}
	154
2dad9d4d DA	155	static int i915_gem_dmabuf_mmap(struct dma_buf dma_buf, struct vm_area_struct vma)
2dad9d4d DA	156	{
2dbf0d90 TV	157	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	158	int ret;
	159
	160	if (obj->base.size < vma->vm_end - vma->vm_start)
	161	return -EINVAL;
	162
	163	if (!obj->base.filp)
	164	return -ENODEV;
	165
	166	ret = obj->base.filp->f_op->mmap(obj->base.filp, vma);
	167	if (ret)
	168	return ret;
	169
	170	fput(vma->vm_file);
	171	vma->vm_file = get_file(obj->base.filp);
	172
	173	return 0;
2dad9d4d DA	174	}
2dad9d4d DA	175
831e9da7	176	static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
ec6f1bb9	177	{
608806a5	178	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
ec6f1bb9 DA	179	struct drm_device *dev = obj->base.dev;
	180	int ret;
	181	bool write = (direction == DMA_BIDIRECTIONAL \|\| direction == DMA_TO_DEVICE);
	182
	183	ret = i915_mutex_lock_interruptible(dev);
	184	if (ret)
	185	return ret;
	186
	187	ret = i915_gem_object_set_to_cpu_domain(obj, write);
	188	mutex_unlock(&dev->struct_mutex);
	189	return ret;
	190	}
	191
18b862dc	192	static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
346400c8 TV	193	{
	194	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
	195	struct drm_device *dev = obj->base.dev;
346400c8 TV	196	int ret;
346400c8 TV	197
18b862dc CW	198	ret = i915_mutex_lock_interruptible(dev);
	199	if (ret)
	200	return ret;
346400c8 TV	201
346400c8 TV	202	ret = i915_gem_object_set_to_gtt_domain(obj, false);
346400c8 TV	203	mutex_unlock(&dev->struct_mutex);
346400c8 TV	204
18b862dc	205	return ret;
346400c8 TV	206	}
346400c8 TV	207
6a101cb2	208	static const struct dma_buf_ops i915_dmabuf_ops = {
1286ff73 DV	209	.map_dma_buf = i915_gem_map_dma_buf,
1286ff73 DV	210	.unmap_dma_buf = i915_gem_unmap_dma_buf,
c1d6798d	211	.release = drm_gem_dmabuf_release,
1286ff73 DV	212	.kmap = i915_gem_dmabuf_kmap,
	213	.kmap_atomic = i915_gem_dmabuf_kmap_atomic,
	214	.kunmap = i915_gem_dmabuf_kunmap,
	215	.kunmap_atomic = i915_gem_dmabuf_kunmap_atomic,
2dad9d4d	216	.mmap = i915_gem_dmabuf_mmap,
9a70cc2a DA	217	.vmap = i915_gem_dmabuf_vmap,
9a70cc2a DA	218	.vunmap = i915_gem_dmabuf_vunmap,
ec6f1bb9	219	.begin_cpu_access = i915_gem_begin_cpu_access,
346400c8	220	.end_cpu_access = i915_gem_end_cpu_access,
1286ff73 DV	221	};
1286ff73 DV	222
ad778f89 CW	223	static void export_fences(struct drm_i915_gem_object *obj,
	224	struct dma_buf *dma_buf)
	225	{
	226	struct reservation_object *resv = dma_buf->resv;
	227	struct drm_i915_gem_request *req;
	228	unsigned long active;
	229	int idx;
	230
	231	active = __I915_BO_ACTIVE(obj);
	232	if (!active)
	233	return;
	234
	235	/* Serialise with execbuf to prevent concurrent fence-loops */
	236	mutex_lock(&obj->base.dev->struct_mutex);
	237
	238	/* Mark the object for future fences before racily adding old fences */
	239	obj->base.dma_buf = dma_buf;
	240
	241	ww_mutex_lock(&resv->lock, NULL);
	242
	243	for_each_active(active, idx) {
	244	req = i915_gem_active_get(&obj->last_read[idx],
	245	&obj->base.dev->struct_mutex);
	246	if (!req)
	247	continue;
	248
	249	if (reservation_object_reserve_shared(resv) == 0)
	250	reservation_object_add_shared_fence(resv, &req->fence);
	251
	252	i915_gem_request_put(req);
	253	}
	254
	255	req = i915_gem_active_get(&obj->last_write,
	256	&obj->base.dev->struct_mutex);
	257	if (req) {
	258	reservation_object_add_excl_fence(resv, &req->fence);
	259	i915_gem_request_put(req);
	260	}
	261
	262	ww_mutex_unlock(&resv->lock);
	263	mutex_unlock(&obj->base.dev->struct_mutex);
	264	}
	265
1286ff73	266	struct dma_buf i915_gem_prime_export(struct drm_device dev,
9da3da66	267	struct drm_gem_object *gem_obj, int flags)
1286ff73	268	{
5cc9ed4b	269	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
d8fbe341	270	DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
ad778f89	271	struct dma_buf *dma_buf;
d8fbe341 SS	272
	273	exp_info.ops = &i915_dmabuf_ops;
	274	exp_info.size = gem_obj->size;
	275	exp_info.flags = flags;
	276	exp_info.priv = gem_obj;
	277
5cc9ed4b CW	278	if (obj->ops->dmabuf_export) {
	279	int ret = obj->ops->dmabuf_export(obj);
	280	if (ret)
	281	return ERR_PTR(ret);
	282	}
	283
a4fce9cb	284	dma_buf = drm_gem_dmabuf_export(dev, &exp_info);
ad778f89 CW	285	if (IS_ERR(dma_buf))
	286	return dma_buf;
	287
	288	export_fences(obj, dma_buf);
	289	return dma_buf;
1286ff73 DV	290	}
1286ff73 DV	291
03ac84f1 CW	292	static struct sg_table *
03ac84f1 CW	293	i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
2f745ad3	294	{
03ac84f1 CW	295	return dma_buf_map_attachment(obj->base.import_attach,
03ac84f1 CW	296	DMA_BIDIRECTIONAL);
1286ff73 DV	297	}
1286ff73 DV	298
03ac84f1 CW	299	static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
03ac84f1 CW	300	struct sg_table *pages)
2f745ad3	301	{
03ac84f1 CW	302	dma_buf_unmap_attachment(obj->base.import_attach, pages,
03ac84f1 CW	303	DMA_BIDIRECTIONAL);
2f745ad3 CW	304	}
	305
	306	static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
	307	.get_pages = i915_gem_object_get_pages_dmabuf,
	308	.put_pages = i915_gem_object_put_pages_dmabuf,
	309	};
	310
1286ff73	311	struct drm_gem_object i915_gem_prime_import(struct drm_device dev,
9da3da66	312	struct dma_buf *dma_buf)
1286ff73 DV	313	{
1286ff73 DV	314	struct dma_buf_attachment *attach;
1286ff73	315	struct drm_i915_gem_object *obj;
1286ff73 DV	316	int ret;
	317
	318	/* is this one of own objects? */
	319	if (dma_buf->ops == &i915_dmabuf_ops) {
608806a5	320	obj = dma_buf_to_obj(dma_buf);
1286ff73 DV	321	/* is it from our device? */
1286ff73 DV	322	if (obj->base.dev == dev) {
be8a42ae SWK	323	/*
	324	* Importing dmabuf exported from out own gem increases
	325	* refcount on gem itself instead of f_count of dmabuf.
	326	*/
25dc556a	327	return &i915_gem_object_get(obj)->base;
1286ff73 DV	328	}
	329	}
	330
	331	/* need to attach */
	332	attach = dma_buf_attach(dma_buf, dev->dev);
	333	if (IS_ERR(attach))
	334	return ERR_CAST(attach);
	335
011c2282 ID	336	get_dma_buf(dma_buf);
011c2282 ID	337
42dcedd4	338	obj = i915_gem_object_alloc(dev);
1286ff73 DV	339	if (obj == NULL) {
1286ff73 DV	340	ret = -ENOMEM;
2f745ad3	341	goto fail_detach;
1286ff73 DV	342	}
1286ff73 DV	343
89c8233f	344	drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
2f745ad3	345	i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops);
1286ff73 DV	346	obj->base.import_attach = attach;
1286ff73 DV	347
30bc06c0 CW	348	/* We use GTT as shorthand for a coherent domain, one that is
	349	* neither in the GPU cache nor in the CPU cache, where all
	350	* writes are immediately visible in memory. (That's not strictly
	351	* true, but it's close! There are internal buffers such as the
	352	* write-combined buffer or a delay through the chipset for GTT
	353	* writes that do require us to treat GTT as a separate cache domain.)
	354	*/
	355	obj->base.read_domains = I915_GEM_DOMAIN_GTT;
	356	obj->base.write_domain = 0;
	357
1286ff73 DV	358	return &obj->base;
1286ff73 DV	359
1286ff73 DV	360	fail_detach:
1286ff73 DV	361	dma_buf_detach(dma_buf, attach);
011c2282 ID	362	dma_buf_put(dma_buf);
011c2282 ID	363
1286ff73 DV	364	return ERR_PTR(ret);
1286ff73 DV	365	}