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drm/i915: Enable GSE interrupt on BDW+
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79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
9bc35499
AJ
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
88631706
ML
142 /* Some VBTs have bogus h/vtotal values */
143 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
144 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
145 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
146 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
147
148 drm_mode_set_name(panel_fixed_mode);
149}
150
99834ea4
CW
151static const struct lvds_dvo_timing *
152get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
153 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
154 int index)
155{
156 /*
157 * the size of fp_timing varies on the different platform.
158 * So calculate the DVO timing relative offset in LVDS data
159 * entry to get the DVO timing entry
160 */
161
162 int lfp_data_size =
163 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
164 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
165 int dvo_timing_offset =
166 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
168 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
169
170 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
171}
172
b0354385
TI
173/* get lvds_fp_timing entry
174 * this function may return NULL if the corresponding entry is invalid
175 */
176static const struct lvds_fp_timing *
177get_lvds_fp_timing(const struct bdb_header *bdb,
178 const struct bdb_lvds_lfp_data *data,
179 const struct bdb_lvds_lfp_data_ptrs *ptrs,
180 int index)
181{
182 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
183 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
184 size_t ofs;
185
186 if (index >= ARRAY_SIZE(ptrs->ptr))
187 return NULL;
188 ofs = ptrs->ptr[index].fp_timing_offset;
189 if (ofs < data_ofs ||
190 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
191 return NULL;
192 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
193}
194
88631706
ML
195/* Try to find integrated panel data */
196static void
197parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 198 const struct bdb_header *bdb)
79e53945 199{
99834ea4
CW
200 const struct bdb_lvds_options *lvds_options;
201 const struct bdb_lvds_lfp_data *lvds_lfp_data;
202 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
203 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 204 const struct lvds_fp_timing *fp_timing;
79e53945 205 struct drm_display_mode *panel_fixed_mode;
3e845c7a 206 int panel_type;
c329a4ec 207 int drrs_mode;
a0562819 208 int ret;
79e53945 209
79e53945
JB
210 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
211 if (!lvds_options)
212 return;
213
41aa3448 214 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819
VS
215
216 ret = intel_opregion_get_panel_type(dev_priv->dev);
217 if (ret >= 0) {
218 WARN_ON(ret > 0xf);
219 panel_type = ret;
220 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
221 } else {
222 if (lvds_options->panel_type > 0xf) {
223 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
224 lvds_options->panel_type);
225 return;
226 }
227 panel_type = lvds_options->panel_type;
228 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 229 }
6a04002b 230
3e845c7a 231 dev_priv->vbt.panel_type = panel_type;
79e53945 232
83a7280e
PB
233 drrs_mode = (lvds_options->dps_panel_type_bits
234 >> (panel_type * 2)) & MODE_MASK;
235 /*
236 * VBT has static DRRS = 0 and seamless DRRS = 2.
237 * The below piece of code is required to adjust vbt.drrs_type
238 * to match the enum drrs_support_type.
239 */
240 switch (drrs_mode) {
241 case 0:
242 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
243 DRM_DEBUG_KMS("DRRS supported mode is static\n");
244 break;
245 case 2:
246 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
247 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
248 break;
249 default:
250 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
251 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
252 break;
253 }
254
79e53945
JB
255 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
256 if (!lvds_lfp_data)
257 return;
258
1b16de0b
JB
259 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
260 if (!lvds_lfp_data_ptrs)
261 return;
262
41aa3448 263 dev_priv->vbt.lvds_vbt = 1;
79e53945 264
99834ea4
CW
265 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
266 lvds_lfp_data_ptrs,
3e845c7a 267 panel_type);
79e53945 268
9a298b2a 269 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
270 if (!panel_fixed_mode)
271 return;
79e53945 272
99834ea4 273 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 274
41aa3448 275 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 276
28c97730 277 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 278 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 279
b0354385
TI
280 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
281 lvds_lfp_data_ptrs,
3e845c7a 282 panel_type);
b0354385
TI
283 if (fp_timing) {
284 /* check the resolution, just to be sure */
285 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
286 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 287 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 288 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 289 dev_priv->vbt.bios_lvds_val);
b0354385
TI
290 }
291 }
88631706
ML
292}
293
f00076d2 294static void
dcb58a40
JN
295parse_lfp_backlight(struct drm_i915_private *dev_priv,
296 const struct bdb_header *bdb)
f00076d2
JN
297{
298 const struct bdb_lfp_backlight_data *backlight_data;
299 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 300 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
301
302 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
303 if (!backlight_data)
304 return;
305
306 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
307 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
308 backlight_data->entry_size);
309 return;
310 }
311
312 entry = &backlight_data->data[panel_type];
313
39fbc9c8
JN
314 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
315 if (!dev_priv->vbt.backlight.present) {
316 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
317 entry->type);
318 return;
319 }
320
9a41e17d
D
321 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
322 if (bdb->version >= 191 &&
323 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
324 const struct bdb_lfp_backlight_control_method *method;
325
326 method = &backlight_data->backlight_control[panel_type];
327 dev_priv->vbt.backlight.type = method->type;
328 }
329
f00076d2
JN
330 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
331 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 332 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2
JN
333 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
334 "active %s, min brightness %u, level %u\n",
335 dev_priv->vbt.backlight.pwm_freq_hz,
336 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 337 dev_priv->vbt.backlight.min_brightness,
f00076d2
JN
338 backlight_data->level[panel_type]);
339}
340
88631706
ML
341/* Try to find sdvo panel data */
342static void
343parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 344 const struct bdb_header *bdb)
88631706 345{
e8ef3b4c 346 const struct lvds_dvo_timing *dvo_timing;
88631706 347 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 348 int index;
79e53945 349
d330a953 350 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
351 if (index == -2) {
352 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
353 return;
354 }
355
5a1e5b6c 356 if (index == -1) {
e8ef3b4c 357 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
358
359 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
360 if (!sdvo_lvds_options)
361 return;
362
363 index = sdvo_lvds_options->panel_type;
364 }
88631706
ML
365
366 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
367 if (!dvo_timing)
368 return;
369
9a298b2a 370 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
371 if (!panel_fixed_mode)
372 return;
373
5a1e5b6c 374 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 375
41aa3448 376 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 377
5a1e5b6c
CW
378 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
379 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
380}
381
98f3a1dc 382static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
383 bool alternate)
384{
98f3a1dc 385 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 386 case 2:
e91e941b 387 return alternate ? 66667 : 48000;
9a4114ff
BF
388 case 3:
389 case 4:
e91e941b 390 return alternate ? 100000 : 96000;
9a4114ff 391 default:
e91e941b 392 return alternate ? 100000 : 120000;
9a4114ff
BF
393 }
394}
395
79e53945
JB
396static void
397parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 398 const struct bdb_header *bdb)
79e53945 399{
e8ef3b4c 400 const struct bdb_general_features *general;
79e53945 401
79e53945 402 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
403 if (!general)
404 return;
405
406 dev_priv->vbt.int_tv_support = general->int_tv_support;
407 /* int_crt_support can't be trusted on earlier platforms */
408 if (bdb->version >= 155 &&
409 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
410 dev_priv->vbt.int_crt_support = general->int_crt_support;
411 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
412 dev_priv->vbt.lvds_ssc_freq =
413 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
414 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
415 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
416 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
417 dev_priv->vbt.int_tv_support,
418 dev_priv->vbt.int_crt_support,
419 dev_priv->vbt.lvds_use_ssc,
420 dev_priv->vbt.lvds_ssc_freq,
421 dev_priv->vbt.display_clock_mode,
422 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
423}
424
db545019
DMEA
425static void
426parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 427 const struct bdb_header *bdb)
db545019 428{
e8ef3b4c 429 const struct bdb_general_definitions *general;
db545019 430
db545019
DMEA
431 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
432 if (general) {
433 u16 block_size = get_blocksize(general);
434 if (block_size >= sizeof(*general)) {
435 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 436 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 437 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 438 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 439 } else {
28c97730 440 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 441 block_size);
db545019
DMEA
442 }
443 }
444}
445
e8ef3b4c
JN
446static const union child_device_config *
447child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 448{
e8ef3b4c 449 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
450}
451
9b9d172d 452static void
453parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 454 const struct bdb_header *bdb)
9b9d172d 455{
456 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 457 const struct bdb_general_definitions *p_defs;
6cc38aca 458 const struct old_child_dev_config *child; /* legacy */
9b9d172d 459 int i, child_device_num, count;
db545019 460 u16 block_size;
9b9d172d 461
462 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
463 if (!p_defs) {
44834a67 464 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 465 return;
466 }
6cc38aca
JN
467
468 /*
469 * Only parse SDVO mappings when the general definitions block child
470 * device size matches that of the *legacy* child device config
471 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 472 */
6cc38aca
JN
473 if (p_defs->child_dev_size != sizeof(*child)) {
474 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 475 return;
476 }
477 /* get the block size of general definitions */
db545019 478 block_size = get_blocksize(p_defs);
9b9d172d 479 /* get the number of child device */
480 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 481 p_defs->child_dev_size;
9b9d172d 482 count = 0;
483 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
484 child = &child_device_ptr(p_defs, i)->old;
485 if (!child->device_type) {
9b9d172d 486 /* skip the device block if device type is invalid */
487 continue;
488 }
6cc38aca
JN
489 if (child->slave_addr != SLAVE_ADDR1 &&
490 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 491 /*
492 * If the slave address is neither 0x70 nor 0x72,
493 * it is not a SDVO device. Skip it.
494 */
495 continue;
496 }
6cc38aca
JN
497 if (child->dvo_port != DEVICE_PORT_DVOB &&
498 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 499 /* skip the incorrect SDVO port */
0206e353 500 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 501 continue;
502 }
28c97730 503 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
504 " %s port\n",
505 child->slave_addr,
506 (child->dvo_port == DEVICE_PORT_DVOB) ?
507 "SDVOB" : "SDVOC");
9d6c875d 508 p_mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
9b9d172d 509 if (!p_mapping->initialized) {
6cc38aca
JN
510 p_mapping->dvo_port = child->dvo_port;
511 p_mapping->slave_addr = child->slave_addr;
512 p_mapping->dvo_wiring = child->dvo_wiring;
513 p_mapping->ddc_pin = child->ddc_pin;
514 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 515 p_mapping->initialized = 1;
46eb3036 516 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
517 p_mapping->dvo_port,
518 p_mapping->slave_addr,
519 p_mapping->dvo_wiring,
520 p_mapping->ddc_pin,
46eb3036 521 p_mapping->i2c_pin);
9b9d172d 522 } else {
28c97730 523 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 524 "two SDVO device.\n");
525 }
6cc38aca 526 if (child->slave2_addr) {
9b9d172d 527 /* Maybe this is a SDVO device with multiple inputs */
528 /* And the mapping info is not added */
28c97730
ZY
529 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
530 " is a SDVO device with multiple inputs.\n");
9b9d172d 531 }
532 count++;
533 }
534
535 if (!count) {
536 /* No SDVO device info is found */
28c97730 537 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 538 }
539 return;
540}
32f9d658
ZW
541
542static void
543parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 544 const struct bdb_header *bdb)
32f9d658 545{
e8ef3b4c 546 const struct bdb_driver_features *driver;
32f9d658 547
32f9d658 548 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
549 if (!driver)
550 return;
551
6fca55b1 552 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 553 dev_priv->vbt.edp.support = 1;
652c393a 554
83a7280e
PB
555 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
556 /*
557 * If DRRS is not supported, drrs_type has to be set to 0.
558 * This is because, VBT is configured in such a way that
559 * static DRRS is 0 and DRRS not supported is represented by
560 * driver->drrs_enabled=false
561 */
562 if (!driver->drrs_enabled)
563 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
564}
565
500a8cc4 566static void
dcb58a40 567parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 568{
e8ef3b4c
JN
569 const struct bdb_edp *edp;
570 const struct edp_power_seq *edp_pps;
571 const struct edp_link_params *edp_link_params;
3e845c7a 572 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
573
574 edp = find_section(bdb, BDB_EDP);
575 if (!edp) {
6aa23e65 576 if (dev_priv->vbt.edp.support)
9a30a61f 577 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
578 return;
579 }
580
581 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
582 case EDP_18BPP:
6aa23e65 583 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
584 break;
585 case EDP_24BPP:
6aa23e65 586 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
587 break;
588 case EDP_30BPP:
6aa23e65 589 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
590 break;
591 }
5ceb0f9b 592
9f0e7ff4
JB
593 /* Get the eDP sequencing and link info */
594 edp_pps = &edp->power_seqs[panel_type];
595 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 596
6aa23e65 597 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 598
e13e2b2c
JN
599 switch (edp_link_params->rate) {
600 case EDP_RATE_1_62:
6aa23e65 601 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
602 break;
603 case EDP_RATE_2_7:
6aa23e65 604 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
605 break;
606 default:
607 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
608 edp_link_params->rate);
609 break;
610 }
611
9f0e7ff4 612 switch (edp_link_params->lanes) {
e13e2b2c 613 case EDP_LANE_1:
6aa23e65 614 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 615 break;
e13e2b2c 616 case EDP_LANE_2:
6aa23e65 617 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 618 break;
e13e2b2c 619 case EDP_LANE_4:
6aa23e65 620 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 621 break;
e13e2b2c
JN
622 default:
623 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
624 edp_link_params->lanes);
625 break;
9f0e7ff4 626 }
e13e2b2c 627
9f0e7ff4 628 switch (edp_link_params->preemphasis) {
e13e2b2c 629 case EDP_PREEMPHASIS_NONE:
6aa23e65 630 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 631 break;
e13e2b2c 632 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 633 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 634 break;
e13e2b2c 635 case EDP_PREEMPHASIS_6dB:
6aa23e65 636 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 637 break;
e13e2b2c 638 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 639 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 640 break;
e13e2b2c
JN
641 default:
642 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
643 edp_link_params->preemphasis);
644 break;
9f0e7ff4 645 }
e13e2b2c 646
9f0e7ff4 647 switch (edp_link_params->vswing) {
e13e2b2c 648 case EDP_VSWING_0_4V:
6aa23e65 649 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 650 break;
e13e2b2c 651 case EDP_VSWING_0_6V:
6aa23e65 652 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 653 break;
e13e2b2c 654 case EDP_VSWING_0_8V:
6aa23e65 655 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 656 break;
e13e2b2c 657 case EDP_VSWING_1_2V:
6aa23e65 658 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 659 break;
e13e2b2c
JN
660 default:
661 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
662 edp_link_params->vswing);
663 break;
9f0e7ff4 664 }
9a57f5bb
SJ
665
666 if (bdb->version >= 173) {
667 uint8_t vswing;
668
9e458034
SJ
669 /* Don't read from VBT if module parameter has valid value*/
670 if (i915.edp_vswing) {
06411f08 671 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
9e458034
SJ
672 } else {
673 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 674 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 675 }
9a57f5bb 676 }
500a8cc4
ZW
677}
678
bfd7ebda 679static void
dcb58a40 680parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 681{
e8ef3b4c
JN
682 const struct bdb_psr *psr;
683 const struct psr_table *psr_table;
3e845c7a 684 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
685
686 psr = find_section(bdb, BDB_PSR);
687 if (!psr) {
688 DRM_DEBUG_KMS("No PSR BDB found.\n");
689 return;
690 }
691
692 psr_table = &psr->psr_table[panel_type];
693
694 dev_priv->vbt.psr.full_link = psr_table->full_link;
695 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
696
697 /* Allowed VBT values goes from 0 to 15 */
698 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
699 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
700
701 switch (psr_table->lines_to_wait) {
702 case 0:
703 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
704 break;
705 case 1:
706 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
707 break;
708 case 2:
709 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
710 break;
711 case 3:
712 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
713 break;
714 default:
715 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
716 psr_table->lines_to_wait);
717 break;
718 }
719
720 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
721 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
722}
723
d17c5443 724static void
0f8689f5
JN
725parse_mipi_config(struct drm_i915_private *dev_priv,
726 const struct bdb_header *bdb)
d17c5443 727{
e8ef3b4c 728 const struct bdb_mipi_config *start;
e8ef3b4c
JN
729 const struct mipi_config *config;
730 const struct mipi_pps_data *pps;
3e845c7a 731 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 732
3e6bd011 733 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 734 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
735 return;
736
d3b542fc
SK
737 /* Initialize this to undefined indicating no generic MIPI support */
738 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
739
740 /* Block #40 is already parsed and panel_fixed_mode is
741 * stored in dev_priv->lfp_lvds_vbt_mode
742 * resuse this when needed
743 */
d17c5443 744
d3b542fc
SK
745 /* Parse #52 for panel index used from panel_type already
746 * parsed
747 */
748 start = find_section(bdb, BDB_MIPI_CONFIG);
749 if (!start) {
750 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
751 return;
752 }
753
d3b542fc
SK
754 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
755 panel_type);
756
757 /*
758 * get hold of the correct configuration block and pps data as per
759 * the panel_type as index
760 */
761 config = &start->config[panel_type];
762 pps = &start->pps[panel_type];
763
764 /* store as of now full data. Trim when we realise all is not needed */
765 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
766 if (!dev_priv->vbt.dsi.config)
767 return;
768
769 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
770 if (!dev_priv->vbt.dsi.pps) {
771 kfree(dev_priv->vbt.dsi.config);
772 return;
773 }
774
9f7c5b17
D
775 /*
776 * These fields are introduced from the VBT version 197 onwards,
777 * so making sure that these bits are set zero in the previous
778 * versions.
779 */
780 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
781 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
782 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
783 }
784
d3b542fc 785 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 786 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
787}
788
5db72099
JN
789/* Find the sequence block and size for the given panel. */
790static const u8 *
791find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 792 u16 panel_id, u32 *seq_size)
5db72099
JN
793{
794 u32 total = get_blocksize(sequence);
795 const u8 *data = &sequence->data[0];
796 u8 current_id;
2a33d934
JN
797 u32 current_size;
798 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
799 int index = 0;
800 int i;
801
2a33d934
JN
802 /* skip new block size */
803 if (sequence->version >= 3)
804 data += 4;
805
806 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
807 if (index + header_size > total) {
808 DRM_ERROR("Invalid sequence block (header)\n");
809 return NULL;
810 }
811
5db72099 812 current_id = *(data + index);
2a33d934
JN
813 if (sequence->version >= 3)
814 current_size = *((const u32 *)(data + index + 1));
815 else
816 current_size = *((const u16 *)(data + index + 1));
5db72099 817
2a33d934 818 index += header_size;
5db72099
JN
819
820 if (index + current_size > total) {
821 DRM_ERROR("Invalid sequence block\n");
822 return NULL;
823 }
824
825 if (current_id == panel_id) {
826 *seq_size = current_size;
827 return data + index;
828 }
829
830 index += current_size;
831 }
832
833 DRM_ERROR("Sequence block detected but no valid configuration\n");
834
835 return NULL;
836}
837
8d3ed2f3
JN
838static int goto_next_sequence(const u8 *data, int index, int total)
839{
840 u16 len;
841
842 /* Skip Sequence Byte. */
843 for (index = index + 1; index < total; index += len) {
844 u8 operation_byte = *(data + index);
845 index++;
846
847 switch (operation_byte) {
848 case MIPI_SEQ_ELEM_END:
849 return index;
850 case MIPI_SEQ_ELEM_SEND_PKT:
851 if (index + 4 > total)
852 return 0;
853
854 len = *((const u16 *)(data + index + 2)) + 4;
855 break;
856 case MIPI_SEQ_ELEM_DELAY:
857 len = 4;
858 break;
859 case MIPI_SEQ_ELEM_GPIO:
860 len = 2;
861 break;
f4d64936
JN
862 case MIPI_SEQ_ELEM_I2C:
863 if (index + 7 > total)
864 return 0;
865 len = *(data + index + 6) + 7;
866 break;
8d3ed2f3
JN
867 default:
868 DRM_ERROR("Unknown operation byte\n");
869 return 0;
870 }
871 }
872
873 return 0;
874}
875
2a33d934
JN
876static int goto_next_sequence_v3(const u8 *data, int index, int total)
877{
878 int seq_end;
879 u16 len;
6765bd6d 880 u32 size_of_sequence;
2a33d934
JN
881
882 /*
883 * Could skip sequence based on Size of Sequence alone, but also do some
884 * checking on the structure.
885 */
886 if (total < 5) {
887 DRM_ERROR("Too small sequence size\n");
888 return 0;
889 }
890
6765bd6d
JN
891 /* Skip Sequence Byte. */
892 index++;
893
894 /*
895 * Size of Sequence. Excludes the Sequence Byte and the size itself,
896 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
897 * byte.
898 */
899 size_of_sequence = *((const uint32_t *)(data + index));
900 index += 4;
901
902 seq_end = index + size_of_sequence;
2a33d934
JN
903 if (seq_end > total) {
904 DRM_ERROR("Invalid sequence size\n");
905 return 0;
906 }
907
6765bd6d 908 for (; index < total; index += len) {
2a33d934
JN
909 u8 operation_byte = *(data + index);
910 index++;
911
912 if (operation_byte == MIPI_SEQ_ELEM_END) {
913 if (index != seq_end) {
914 DRM_ERROR("Invalid element structure\n");
915 return 0;
916 }
917 return index;
918 }
919
920 len = *(data + index);
921 index++;
922
923 /*
924 * FIXME: Would be nice to check elements like for v1/v2 in
925 * goto_next_sequence() above.
926 */
927 switch (operation_byte) {
928 case MIPI_SEQ_ELEM_SEND_PKT:
929 case MIPI_SEQ_ELEM_DELAY:
930 case MIPI_SEQ_ELEM_GPIO:
931 case MIPI_SEQ_ELEM_I2C:
932 case MIPI_SEQ_ELEM_SPI:
933 case MIPI_SEQ_ELEM_PMIC:
934 break;
935 default:
936 DRM_ERROR("Unknown operation byte %u\n",
937 operation_byte);
938 break;
939 }
940 }
941
942 return 0;
943}
944
0f8689f5
JN
945static void
946parse_mipi_sequence(struct drm_i915_private *dev_priv,
947 const struct bdb_header *bdb)
948{
3e845c7a 949 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
950 const struct bdb_mipi_sequence *sequence;
951 const u8 *seq_data;
2a33d934 952 u32 seq_size;
0f8689f5 953 u8 *data;
8d3ed2f3 954 int index = 0;
0f8689f5
JN
955
956 /* Only our generic panel driver uses the sequence block. */
957 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
958 return;
d3b542fc 959
d3b542fc
SK
960 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
961 if (!sequence) {
962 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
963 return;
964 }
965
cd67d226 966 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
967 if (sequence->version >= 4) {
968 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
969 sequence->version);
cd67d226
JN
970 return;
971 }
972
2a33d934 973 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 974
5db72099
JN
975 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
976 if (!seq_data)
d3b542fc 977 return;
d3b542fc 978
8d3ed2f3
JN
979 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
980 if (!data)
d3b542fc
SK
981 return;
982
8d3ed2f3
JN
983 /* Parse the sequences, store pointers to each sequence. */
984 for (;;) {
985 u8 seq_id = *(data + index);
986 if (seq_id == MIPI_SEQ_END)
987 break;
d3b542fc 988
8d3ed2f3
JN
989 if (seq_id >= MIPI_SEQ_MAX) {
990 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
991 goto err;
992 }
993
8d3ed2f3 994 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 995
2a33d934
JN
996 if (sequence->version >= 3)
997 index = goto_next_sequence_v3(data, index, seq_size);
998 else
999 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
1000 if (!index) {
1001 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
1002 goto err;
1003 }
d3b542fc
SK
1004 }
1005
8d3ed2f3
JN
1006 dev_priv->vbt.dsi.data = data;
1007 dev_priv->vbt.dsi.size = seq_size;
1008 dev_priv->vbt.dsi.seq_version = sequence->version;
1009
1010 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 1011 return;
d3b542fc 1012
8d3ed2f3
JN
1013err:
1014 kfree(data);
ed3b6679 1015 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
1016}
1017
75067dde
AK
1018static u8 translate_iboost(u8 val)
1019{
1020 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1021
1022 if (val >= ARRAY_SIZE(mapping)) {
1023 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1024 return 0;
1025 }
1026 return mapping[val];
1027}
1028
6acab15a 1029static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1030 const struct bdb_header *bdb)
6acab15a
PZ
1031{
1032 union child_device_config *it, *child = NULL;
1033 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1034 uint8_t hdmi_level_shift;
1035 int i, j;
554d6af5 1036 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1037 uint8_t aux_channel, ddc_pin;
6acab15a
PZ
1038 /* Each DDI port can have more than one value on the "DVO Port" field,
1039 * so look for all the possible values for each port and abort if more
1040 * than one is found. */
2800e4c2
RV
1041 int dvo_ports[][3] = {
1042 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1043 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1044 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1045 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1046 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1047 };
1048
1049 /* Find the child device to use, abort if more than one found. */
1050 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1051 it = dev_priv->vbt.child_dev + i;
1052
2800e4c2 1053 for (j = 0; j < 3; j++) {
6acab15a
PZ
1054 if (dvo_ports[port][j] == -1)
1055 break;
1056
1057 if (it->common.dvo_port == dvo_ports[port][j]) {
1058 if (child) {
1059 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1060 port_name(port));
1061 return;
1062 }
1063 child = it;
1064 }
1065 }
1066 }
1067 if (!child)
1068 return;
1069
6bf19e7c 1070 aux_channel = child->raw[25];
11c1b657 1071 ddc_pin = child->common.ddc_pin;
6bf19e7c 1072
78eb06c3
VS
1073 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1074 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1075 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1076 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1077 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1078
311a2094
PZ
1079 info->supports_dvi = is_dvi;
1080 info->supports_hdmi = is_hdmi;
1081 info->supports_dp = is_dp;
1082
554d6af5
PZ
1083 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1084 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1085
1086 if (is_edp && is_dvi)
1087 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1088 port_name(port));
1089 if (is_crt && port != PORT_E)
1090 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1091 if (is_crt && (is_dvi || is_dp))
1092 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1093 port_name(port));
1094 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1095 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1096 if (!is_dvi && !is_dp && !is_crt)
1097 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1098 port_name(port));
1099 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1100 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1101
1102 if (is_dvi) {
11c1b657
XZ
1103 if (port == PORT_E) {
1104 info->alternate_ddc_pin = ddc_pin;
1105 /* if DDIE share ddc pin with other port, then
1106 * dvi/hdmi couldn't exist on the shared port.
1107 * Otherwise they share the same ddc bin and system
1108 * couldn't communicate with them seperately. */
1109 if (ddc_pin == DDC_PIN_B) {
1110 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1111 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1112 } else if (ddc_pin == DDC_PIN_C) {
1113 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1114 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1115 } else if (ddc_pin == DDC_PIN_D) {
1116 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1117 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1118 }
1119 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
6bf19e7c 1120 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
11c1b657 1121 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
6bf19e7c 1122 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
11c1b657 1123 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
6bf19e7c
PZ
1124 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1125 }
1126
1127 if (is_dp) {
500ea70d
RV
1128 if (port == PORT_E) {
1129 info->alternate_aux_channel = aux_channel;
1130 /* if DDIE share aux channel with other port, then
1131 * DP couldn't exist on the shared port. Otherwise
1132 * they share the same aux channel and system
1133 * couldn't communicate with them seperately. */
1134 if (aux_channel == DP_AUX_A)
1135 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1136 else if (aux_channel == DP_AUX_B)
1137 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1138 else if (aux_channel == DP_AUX_C)
1139 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1140 else if (aux_channel == DP_AUX_D)
1141 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1142 }
1143 else if (aux_channel == DP_AUX_A && port != PORT_A)
6bf19e7c 1144 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
500ea70d 1145 else if (aux_channel == DP_AUX_B && port != PORT_B)
6bf19e7c 1146 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
500ea70d 1147 else if (aux_channel == DP_AUX_C && port != PORT_C)
6bf19e7c 1148 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
500ea70d 1149 else if (aux_channel == DP_AUX_D && port != PORT_D)
6bf19e7c
PZ
1150 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1151 }
1152
6acab15a
PZ
1153 if (bdb->version >= 158) {
1154 /* The VBT HDMI level shift values match the table we have. */
1155 hdmi_level_shift = child->raw[7] & 0xF;
ce4dd49e
DL
1156 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1157 port_name(port),
1158 hdmi_level_shift);
1159 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1160 }
75067dde
AK
1161
1162 /* Parse the I_boost config for SKL and above */
4e27bd50 1163 if (bdb->version >= 196 && child->common.iboost) {
75067dde
AK
1164 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1165 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1166 port_name(port), info->dp_boost_level);
1167 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1168 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1169 port_name(port), info->hdmi_boost_level);
1170 }
6acab15a
PZ
1171}
1172
1173static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1174 const struct bdb_header *bdb)
6acab15a 1175{
6acab15a
PZ
1176 enum port port;
1177
98f3a1dc 1178 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1179 return;
1180
1181 if (!dev_priv->vbt.child_dev_num)
1182 return;
1183
1184 if (bdb->version < 155)
1185 return;
1186
1187 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1188 parse_ddi_port(dev_priv, port, bdb);
1189}
1190
6363ee6f
ZY
1191static void
1192parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1193 const struct bdb_header *bdb)
6363ee6f 1194{
e8ef3b4c
JN
1195 const struct bdb_general_definitions *p_defs;
1196 const union child_device_config *p_child;
1197 union child_device_config *child_dev_ptr;
6363ee6f 1198 int i, child_device_num, count;
e2d6cf7f
DW
1199 u8 expected_size;
1200 u16 block_size;
6363ee6f
ZY
1201
1202 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1203 if (!p_defs) {
44834a67 1204 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1205 return;
1206 }
7244f309
VS
1207 if (bdb->version < 106) {
1208 expected_size = 22;
1209 } else if (bdb->version < 109) {
52b69c84
VS
1210 expected_size = 27;
1211 } else if (bdb->version < 195) {
1212 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1213 expected_size = sizeof(struct old_child_dev_config);
1214 } else if (bdb->version == 195) {
1215 expected_size = 37;
1216 } else if (bdb->version <= 197) {
1217 expected_size = 38;
1218 } else {
1219 expected_size = 38;
1220 BUILD_BUG_ON(sizeof(*p_child) < 38);
1221 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1222 bdb->version, expected_size);
1223 }
1224
e2d6cf7f
DW
1225 /* Flag an error for unexpected size, but continue anyway. */
1226 if (p_defs->child_dev_size != expected_size)
1227 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1228 p_defs->child_dev_size, expected_size, bdb->version);
1229
52b69c84
VS
1230 /* The legacy sized child device config is the minimum we need. */
1231 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1232 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1233 p_defs->child_dev_size);
1234 return;
1235 }
1236
6363ee6f
ZY
1237 /* get the block size of general definitions */
1238 block_size = get_blocksize(p_defs);
1239 /* get the number of child device */
1240 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1241 p_defs->child_dev_size;
6363ee6f
ZY
1242 count = 0;
1243 /* get the number of child device that is present */
1244 for (i = 0; i < child_device_num; i++) {
90e4f159 1245 p_child = child_device_ptr(p_defs, i);
768f69c9 1246 if (!p_child->common.device_type) {
6363ee6f
ZY
1247 /* skip the device block if device type is invalid */
1248 continue;
1249 }
1250 count++;
1251 }
1252 if (!count) {
0206e353 1253 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1254 return;
1255 }
41aa3448
RV
1256 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1257 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1258 DRM_DEBUG_KMS("No memory space for child device\n");
1259 return;
1260 }
1261
41aa3448 1262 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1263 count = 0;
1264 for (i = 0; i < child_device_num; i++) {
90e4f159 1265 p_child = child_device_ptr(p_defs, i);
768f69c9 1266 if (!p_child->common.device_type) {
6363ee6f
ZY
1267 /* skip the device block if device type is invalid */
1268 continue;
1269 }
3e6bd011 1270
41aa3448 1271 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1272 count++;
e2d6cf7f
DW
1273
1274 /*
1275 * Copy as much as we know (sizeof) and is available
1276 * (child_dev_size) of the child device. Accessing the data must
1277 * depend on VBT version.
1278 */
1279 memcpy(child_dev_ptr, p_child,
1280 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
4e27bd50
SS
1281
1282 /*
1283 * copied full block, now init values when they are not
1284 * available in current version
1285 */
1286 if (bdb->version < 196) {
1287 /* Set default values for bits added from v196 */
1288 child_dev_ptr->common.iboost = 0;
1289 child_dev_ptr->common.hpd_invert = 0;
1290 }
1291
1292 if (bdb->version < 192)
1293 child_dev_ptr->common.lspcon = 0;
6363ee6f
ZY
1294 }
1295 return;
1296}
44834a67 1297
6a04002b
SQ
1298static void
1299init_vbt_defaults(struct drm_i915_private *dev_priv)
1300{
6acab15a 1301 enum port port;
9a4114ff 1302
988c7015 1303 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1304
56c4b63a
JN
1305 /* Default to having backlight */
1306 dev_priv->vbt.backlight.present = true;
1307
6a04002b 1308 /* LFP panel data */
41aa3448
RV
1309 dev_priv->vbt.lvds_dither = 1;
1310 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1311
1312 /* SDVO panel data */
41aa3448 1313 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1314
1315 /* general features */
41aa3448
RV
1316 dev_priv->vbt.int_tv_support = 1;
1317 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1318
1319 /* Default to using SSC */
41aa3448 1320 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1321 /*
1322 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1323 * clock for LVDS.
1324 */
98f3a1dc
JN
1325 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1326 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1327 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1328
1329 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1330 struct ddi_vbt_port_info *info =
1331 &dev_priv->vbt.ddi_port_info[port];
1332
ce4dd49e 1333 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
311a2094
PZ
1334
1335 info->supports_dvi = (port != PORT_A && port != PORT_E);
1336 info->supports_hdmi = info->supports_dvi;
1337 info->supports_dp = (port != PORT_E);
6acab15a 1338 }
6a04002b
SQ
1339}
1340
caf37fa4
JN
1341static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1342{
1343 const void *_vbt = vbt;
1344
1345 return _vbt + vbt->bdb_offset;
1346}
1347
f0067a31
JN
1348/**
1349 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1350 * @buf: pointer to a buffer to validate
1351 * @size: size of the buffer
1352 *
1353 * Returns true on valid VBT.
1354 */
1355bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1356{
f0067a31 1357 const struct vbt_header *vbt = buf;
dcb58a40 1358 const struct bdb_header *bdb;
3dd4e846 1359
caf37fa4 1360 if (!vbt)
f0067a31 1361 return false;
caf37fa4 1362
f0067a31 1363 if (sizeof(struct vbt_header) > size) {
3dd4e846 1364 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1365 return false;
3dd4e846
CW
1366 }
1367
1368 if (memcmp(vbt->signature, "$VBT", 4)) {
1369 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1370 return false;
3dd4e846
CW
1371 }
1372
f0067a31 1373 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
3dd4e846 1374 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1375 return false;
3dd4e846
CW
1376 }
1377
caf37fa4 1378 bdb = get_bdb_header(vbt);
f0067a31 1379 if (vbt->bdb_offset + bdb->bdb_size > size) {
3dd4e846 1380 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1381 return false;
3dd4e846
CW
1382 }
1383
caf37fa4 1384 return vbt;
3dd4e846
CW
1385}
1386
caf37fa4 1387static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1388{
b34a991a
JN
1389 size_t i;
1390
1391 /* Scour memory looking for the VBT signature. */
1392 for (i = 0; i + 4 < size; i++) {
f0067a31 1393 void *vbt;
115719fc 1394
f0067a31
JN
1395 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1396 continue;
1397
1398 /*
1399 * This is the one place where we explicitly discard the address
1400 * space (__iomem) of the BIOS/VBT.
1401 */
1402 vbt = (void __force *) bios + i;
1403 if (intel_bios_is_valid_vbt(vbt, size - i))
1404 return vbt;
1405
1406 break;
b34a991a
JN
1407 }
1408
f0067a31 1409 return NULL;
b34a991a
JN
1410}
1411
79e53945 1412/**
8b8e1a89 1413 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1414 * @dev_priv: i915 device instance
79e53945
JB
1415 *
1416 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1417 * to appropriate values.
1418 *
79e53945
JB
1419 * Returns 0 on success, nonzero on failure.
1420 */
0317c6ce 1421int
98f3a1dc 1422intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1423{
98f3a1dc 1424 struct pci_dev *pdev = dev_priv->dev->pdev;
f0067a31 1425 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1426 const struct bdb_header *bdb;
44834a67
CW
1427 u8 __iomem *bios = NULL;
1428
98f3a1dc 1429 if (HAS_PCH_NOP(dev_priv))
ab5c608b
BW
1430 return -ENODEV;
1431
6a04002b 1432 init_vbt_defaults(dev_priv);
f899fc64 1433
f0067a31 1434 if (!vbt) {
b34a991a 1435 size_t size;
79e53945 1436
44834a67
CW
1437 bios = pci_map_rom(pdev, &size);
1438 if (!bios)
1439 return -1;
1440
caf37fa4
JN
1441 vbt = find_vbt(bios, size);
1442 if (!vbt) {
44834a67
CW
1443 pci_unmap_rom(pdev, bios);
1444 return -1;
1445 }
e2051c44
JN
1446
1447 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1448 }
79e53945 1449
caf37fa4
JN
1450 bdb = get_bdb_header(vbt);
1451
3556dd40
JN
1452 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1453 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1454
79e53945
JB
1455 /* Grab useful general definitions */
1456 parse_general_features(dev_priv, bdb);
db545019 1457 parse_general_definitions(dev_priv, bdb);
88631706 1458 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1459 parse_lfp_backlight(dev_priv, bdb);
88631706 1460 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1461 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1462 parse_device_mapping(dev_priv, bdb);
32f9d658 1463 parse_driver_features(dev_priv, bdb);
500a8cc4 1464 parse_edp(dev_priv, bdb);
bfd7ebda 1465 parse_psr(dev_priv, bdb);
0f8689f5
JN
1466 parse_mipi_config(dev_priv, bdb);
1467 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1468 parse_ddi_ports(dev_priv, bdb);
32f9d658 1469
44834a67
CW
1470 if (bios)
1471 pci_unmap_rom(pdev, bios);
79e53945
JB
1472
1473 return 0;
1474}
3bdd14d5
JN
1475
1476/**
1477 * intel_bios_is_tv_present - is integrated TV present in VBT
1478 * @dev_priv: i915 device instance
1479 *
1480 * Return true if TV is present. If no child devices were parsed from VBT,
1481 * assume TV is present.
1482 */
1483bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1484{
1485 union child_device_config *p_child;
1486 int i;
1487
1488 if (!dev_priv->vbt.int_tv_support)
1489 return false;
1490
1491 if (!dev_priv->vbt.child_dev_num)
1492 return true;
1493
1494 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1495 p_child = dev_priv->vbt.child_dev + i;
1496 /*
1497 * If the device type is not TV, continue.
1498 */
1499 switch (p_child->old.device_type) {
1500 case DEVICE_TYPE_INT_TV:
1501 case DEVICE_TYPE_TV:
1502 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1503 break;
1504 default:
1505 continue;
1506 }
1507 /* Only when the addin_offset is non-zero, it is regarded
1508 * as present.
1509 */
1510 if (p_child->old.addin_offset)
1511 return true;
1512 }
1513
1514 return false;
1515}
5a69d13d
JN
1516
1517/**
1518 * intel_bios_is_lvds_present - is LVDS present in VBT
1519 * @dev_priv: i915 device instance
1520 * @i2c_pin: i2c pin for LVDS if present
1521 *
1522 * Return true if LVDS is present. If no child devices were parsed from VBT,
1523 * assume LVDS is present.
1524 */
1525bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1526{
1527 int i;
1528
1529 if (!dev_priv->vbt.child_dev_num)
1530 return true;
1531
1532 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1533 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1534 struct old_child_dev_config *child = &uchild->old;
1535
1536 /* If the device type is not LFP, continue.
1537 * We have to check both the new identifiers as well as the
1538 * old for compatibility with some BIOSes.
1539 */
1540 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1541 child->device_type != DEVICE_TYPE_LFP)
1542 continue;
1543
1544 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1545 *i2c_pin = child->i2c_pin;
1546
1547 /* However, we cannot trust the BIOS writers to populate
1548 * the VBT correctly. Since LVDS requires additional
1549 * information from AIM blocks, a non-zero addin offset is
1550 * a good indicator that the LVDS is actually present.
1551 */
1552 if (child->addin_offset)
1553 return true;
1554
1555 /* But even then some BIOS writers perform some black magic
1556 * and instantiate the device without reference to any
1557 * additional data. Trust that if the VBT was written into
1558 * the OpRegion then they have validated the LVDS's existence.
1559 */
1560 if (dev_priv->opregion.vbt)
1561 return true;
1562 }
1563
1564 return false;
1565}
951d9efe
JN
1566
1567/**
1568 * intel_bios_is_port_edp - is the device in given port eDP
1569 * @dev_priv: i915 device instance
1570 * @port: port to check
1571 *
1572 * Return true if the device in %port is eDP.
1573 */
1574bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1575{
1576 union child_device_config *p_child;
1577 static const short port_mapping[] = {
1578 [PORT_B] = DVO_PORT_DPB,
1579 [PORT_C] = DVO_PORT_DPC,
1580 [PORT_D] = DVO_PORT_DPD,
1581 [PORT_E] = DVO_PORT_DPE,
1582 };
1583 int i;
1584
1585 if (!dev_priv->vbt.child_dev_num)
1586 return false;
1587
1588 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1589 p_child = dev_priv->vbt.child_dev + i;
1590
1591 if (p_child->common.dvo_port == port_mapping[port] &&
1592 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1593 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1594 return true;
1595 }
1596
1597 return false;
1598}
7137aec1 1599
d6199256
VS
1600bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port)
1601{
1602 static const struct {
1603 u16 dp, hdmi;
1604 } port_mapping[] = {
1605 /*
1606 * Buggy VBTs may declare DP ports as having
1607 * HDMI type dvo_port :( So let's check both.
1608 */
1609 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1610 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1611 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1612 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1613 };
1614 int i;
1615
1616 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1617 return false;
1618
1619 if (!dev_priv->vbt.child_dev_num)
1620 return false;
1621
1622 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1623 const union child_device_config *p_child =
1624 &dev_priv->vbt.child_dev[i];
1625
1626 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1627 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1628 (p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) ==
1629 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
1630 return true;
1631 }
1632
1633 return false;
1634}
1635
7137aec1
JN
1636/**
1637 * intel_bios_is_dsi_present - is DSI present in VBT
1638 * @dev_priv: i915 device instance
1639 * @port: port for DSI if present
1640 *
1641 * Return true if DSI is present, and return the port in %port.
1642 */
1643bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1644 enum port *port)
1645{
1646 union child_device_config *p_child;
1647 u8 dvo_port;
1648 int i;
1649
1650 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1651 p_child = dev_priv->vbt.child_dev + i;
1652
1653 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1654 continue;
1655
1656 dvo_port = p_child->common.dvo_port;
1657
1658 switch (dvo_port) {
1659 case DVO_PORT_MIPIA:
1660 case DVO_PORT_MIPIC:
7caaef33
JN
1661 if (port)
1662 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1663 return true;
1664 case DVO_PORT_MIPIB:
1665 case DVO_PORT_MIPID:
1666 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1667 port_name(dvo_port - DVO_PORT_MIPIA));
1668 break;
1669 }
1670 }
1671
1672 return false;
1673}
d252bf68
SS
1674
1675/**
1676 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1677 * @dev_priv: i915 device instance
1678 * @port: port to check
1679 *
1680 * Return true if HPD should be inverted for %port.
1681 */
1682bool
1683intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1684 enum port port)
1685{
1686 int i;
1687
1688 if (WARN_ON_ONCE(!IS_BROXTON(dev_priv)))
1689 return false;
1690
1691 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1692 if (!dev_priv->vbt.child_dev[i].common.hpd_invert)
1693 continue;
1694
1695 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1696 case DVO_PORT_DPA:
1697 case DVO_PORT_HDMIA:
1698 if (port == PORT_A)
1699 return true;
1700 break;
1701 case DVO_PORT_DPB:
1702 case DVO_PORT_HDMIB:
1703 if (port == PORT_B)
1704 return true;
1705 break;
1706 case DVO_PORT_DPC:
1707 case DVO_PORT_HDMIC:
1708 if (port == PORT_C)
1709 return true;
1710 break;
1711 default:
1712 break;
1713 }
1714 }
1715
1716 return false;
1717}