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Merge tag 'drm-amdkfd-next-2017-10-18' of git://people.freedesktop.org/~gabbayo/linux...
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / intel_bios.c
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79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
ce2e87b4
VT
117 ((dvo_timing->hsync_pulse_width_hi << 8) |
118 dvo_timing->hsync_pulse_width_lo);
88631706
ML
119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
120 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
121
122 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
123 dvo_timing->vactive_lo;
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
ce2e87b4 125 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
88631706 126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
ce2e87b4
VT
127 ((dvo_timing->vsync_pulse_width_hi << 4) |
128 dvo_timing->vsync_pulse_width_lo);
88631706
ML
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
9bc35499
AJ
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
df457245
VS
144 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
145 dvo_timing->himage_lo;
146 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
147 dvo_timing->vimage_lo;
148
88631706
ML
149 /* Some VBTs have bogus h/vtotal values */
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
154
155 drm_mode_set_name(panel_fixed_mode);
156}
157
99834ea4
CW
158static const struct lvds_dvo_timing *
159get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
160 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
161 int index)
162{
163 /*
164 * the size of fp_timing varies on the different platform.
165 * So calculate the DVO timing relative offset in LVDS data
166 * entry to get the DVO timing entry
167 */
168
169 int lfp_data_size =
170 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
172 int dvo_timing_offset =
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
175 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
176
177 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178}
179
b0354385
TI
180/* get lvds_fp_timing entry
181 * this function may return NULL if the corresponding entry is invalid
182 */
183static const struct lvds_fp_timing *
184get_lvds_fp_timing(const struct bdb_header *bdb,
185 const struct bdb_lvds_lfp_data *data,
186 const struct bdb_lvds_lfp_data_ptrs *ptrs,
187 int index)
188{
189 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
190 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
191 size_t ofs;
192
193 if (index >= ARRAY_SIZE(ptrs->ptr))
194 return NULL;
195 ofs = ptrs->ptr[index].fp_timing_offset;
196 if (ofs < data_ofs ||
197 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
198 return NULL;
199 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
200}
201
88631706
ML
202/* Try to find integrated panel data */
203static void
204parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 205 const struct bdb_header *bdb)
79e53945 206{
99834ea4
CW
207 const struct bdb_lvds_options *lvds_options;
208 const struct bdb_lvds_lfp_data *lvds_lfp_data;
209 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
210 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 211 const struct lvds_fp_timing *fp_timing;
79e53945 212 struct drm_display_mode *panel_fixed_mode;
3e845c7a 213 int panel_type;
c329a4ec 214 int drrs_mode;
a0562819 215 int ret;
79e53945 216
79e53945
JB
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
41aa3448 221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819 222
6f9f4b7a 223 ret = intel_opregion_get_panel_type(dev_priv);
a0562819
VS
224 if (ret >= 0) {
225 WARN_ON(ret > 0xf);
226 panel_type = ret;
227 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
228 } else {
229 if (lvds_options->panel_type > 0xf) {
230 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
231 lvds_options->panel_type);
232 return;
233 }
234 panel_type = lvds_options->panel_type;
235 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 236 }
6a04002b 237
3e845c7a 238 dev_priv->vbt.panel_type = panel_type;
79e53945 239
83a7280e
PB
240 drrs_mode = (lvds_options->dps_panel_type_bits
241 >> (panel_type * 2)) & MODE_MASK;
242 /*
243 * VBT has static DRRS = 0 and seamless DRRS = 2.
244 * The below piece of code is required to adjust vbt.drrs_type
245 * to match the enum drrs_support_type.
246 */
247 switch (drrs_mode) {
248 case 0:
249 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
250 DRM_DEBUG_KMS("DRRS supported mode is static\n");
251 break;
252 case 2:
253 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
254 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
255 break;
256 default:
257 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
258 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
259 break;
260 }
261
79e53945
JB
262 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
263 if (!lvds_lfp_data)
264 return;
265
1b16de0b
JB
266 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
267 if (!lvds_lfp_data_ptrs)
268 return;
269
41aa3448 270 dev_priv->vbt.lvds_vbt = 1;
79e53945 271
99834ea4
CW
272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
273 lvds_lfp_data_ptrs,
3e845c7a 274 panel_type);
79e53945 275
9a298b2a 276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
277 if (!panel_fixed_mode)
278 return;
79e53945 279
99834ea4 280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 281
41aa3448 282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 283
28c97730 284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 285 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 286
b0354385
TI
287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
288 lvds_lfp_data_ptrs,
3e845c7a 289 panel_type);
b0354385
TI
290 if (fp_timing) {
291 /* check the resolution, just to be sure */
292 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
293 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 296 dev_priv->vbt.bios_lvds_val);
b0354385
TI
297 }
298 }
88631706
ML
299}
300
f00076d2 301static void
dcb58a40
JN
302parse_lfp_backlight(struct drm_i915_private *dev_priv,
303 const struct bdb_header *bdb)
f00076d2
JN
304{
305 const struct bdb_lfp_backlight_data *backlight_data;
306 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 307 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
308
309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
310 if (!backlight_data)
311 return;
312
313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
315 backlight_data->entry_size);
316 return;
317 }
318
319 entry = &backlight_data->data[panel_type];
320
39fbc9c8
JN
321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
322 if (!dev_priv->vbt.backlight.present) {
323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
324 entry->type);
325 return;
326 }
327
9a41e17d
D
328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
329 if (bdb->version >= 191 &&
330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
331 const struct bdb_lfp_backlight_control_method *method;
332
333 method = &backlight_data->backlight_control[panel_type];
334 dev_priv->vbt.backlight.type = method->type;
add03379 335 dev_priv->vbt.backlight.controller = method->controller;
9a41e17d
D
336 }
337
f00076d2
JN
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2 341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
add03379 342 "active %s, min brightness %u, level %u, controller %u\n",
f00076d2
JN
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 345 dev_priv->vbt.backlight.min_brightness,
add03379
VS
346 backlight_data->level[panel_type],
347 dev_priv->vbt.backlight.controller);
f00076d2
JN
348}
349
88631706
ML
350/* Try to find sdvo panel data */
351static void
352parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 353 const struct bdb_header *bdb)
88631706 354{
e8ef3b4c 355 const struct lvds_dvo_timing *dvo_timing;
88631706 356 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 357 int index;
79e53945 358
4f044a88 359 index = i915_modparams.vbt_sdvo_panel_type;
c10e408a
MF
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
5a1e5b6c 365 if (index == -1) {
e8ef3b4c 366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
88631706
ML
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
9a298b2a 379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
380 if (!panel_fixed_mode)
381 return;
382
5a1e5b6c 383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 384
41aa3448 385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 386
5a1e5b6c
CW
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
389}
390
98f3a1dc 391static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
392 bool alternate)
393{
98f3a1dc 394 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 395 case 2:
e91e941b 396 return alternate ? 66667 : 48000;
9a4114ff
BF
397 case 3:
398 case 4:
e91e941b 399 return alternate ? 100000 : 96000;
9a4114ff 400 default:
e91e941b 401 return alternate ? 100000 : 120000;
9a4114ff
BF
402 }
403}
404
79e53945
JB
405static void
406parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 407 const struct bdb_header *bdb)
79e53945 408{
e8ef3b4c 409 const struct bdb_general_features *general;
79e53945 410
79e53945 411 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
412 if (!general)
413 return;
414
415 dev_priv->vbt.int_tv_support = general->int_tv_support;
416 /* int_crt_support can't be trusted on earlier platforms */
417 if (bdb->version >= 155 &&
418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
419 dev_priv->vbt.int_crt_support = general->int_crt_support;
420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
421 dev_priv->vbt.lvds_ssc_freq =
422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
423 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
425 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
426 dev_priv->vbt.int_tv_support,
427 dev_priv->vbt.int_crt_support,
428 dev_priv->vbt.lvds_use_ssc,
429 dev_priv->vbt.lvds_ssc_freq,
430 dev_priv->vbt.display_clock_mode,
431 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
432}
433
cc998589 434static const struct child_device_config *
e192839e 435child_device_ptr(const struct bdb_general_definitions *defs, int i)
90e4f159 436{
e192839e 437 return (const void *) &defs->devices[i * defs->child_dev_size];
90e4f159
VS
438}
439
9b9d172d 440static void
0ead5f81 441parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
9b9d172d 442{
e192839e 443 struct sdvo_device_mapping *mapping;
cc998589 444 const struct child_device_config *child;
0ebdabe6 445 int i, count = 0;
6cc38aca
JN
446
447 /*
0ebdabe6
JN
448 * Only parse SDVO mappings on gens that could have SDVO. This isn't
449 * accurate and doesn't have to be, as long as it's not too strict.
9b9d172d 450 */
0ebdabe6
JN
451 if (!IS_GEN(dev_priv, 3, 7)) {
452 DRM_DEBUG_KMS("Skipping SDVO device mapping\n");
9b9d172d 453 return;
454 }
0ebdabe6
JN
455
456 for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
457 child = dev_priv->vbt.child_dev + i;
458
6cc38aca
JN
459 if (child->slave_addr != SLAVE_ADDR1 &&
460 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 461 /*
462 * If the slave address is neither 0x70 nor 0x72,
463 * it is not a SDVO device. Skip it.
464 */
465 continue;
466 }
6cc38aca
JN
467 if (child->dvo_port != DEVICE_PORT_DVOB &&
468 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 469 /* skip the incorrect SDVO port */
0206e353 470 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 471 continue;
472 }
28c97730 473 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
474 " %s port\n",
475 child->slave_addr,
476 (child->dvo_port == DEVICE_PORT_DVOB) ?
477 "SDVOB" : "SDVOC");
e192839e
JN
478 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
479 if (!mapping->initialized) {
480 mapping->dvo_port = child->dvo_port;
481 mapping->slave_addr = child->slave_addr;
482 mapping->dvo_wiring = child->dvo_wiring;
483 mapping->ddc_pin = child->ddc_pin;
484 mapping->i2c_pin = child->i2c_pin;
485 mapping->initialized = 1;
46eb3036 486 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e192839e
JN
487 mapping->dvo_port,
488 mapping->slave_addr,
489 mapping->dvo_wiring,
490 mapping->ddc_pin,
491 mapping->i2c_pin);
9b9d172d 492 } else {
28c97730 493 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 494 "two SDVO device.\n");
495 }
6cc38aca 496 if (child->slave2_addr) {
9b9d172d 497 /* Maybe this is a SDVO device with multiple inputs */
498 /* And the mapping info is not added */
28c97730
ZY
499 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
500 " is a SDVO device with multiple inputs.\n");
9b9d172d 501 }
502 count++;
503 }
504
505 if (!count) {
506 /* No SDVO device info is found */
28c97730 507 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 508 }
9b9d172d 509}
32f9d658
ZW
510
511static void
512parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 513 const struct bdb_header *bdb)
32f9d658 514{
e8ef3b4c 515 const struct bdb_driver_features *driver;
32f9d658 516
32f9d658 517 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
518 if (!driver)
519 return;
520
6fca55b1 521 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 522 dev_priv->vbt.edp.support = 1;
652c393a 523
83a7280e
PB
524 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
525 /*
526 * If DRRS is not supported, drrs_type has to be set to 0.
527 * This is because, VBT is configured in such a way that
528 * static DRRS is 0 and DRRS not supported is represented by
529 * driver->drrs_enabled=false
530 */
531 if (!driver->drrs_enabled)
532 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
533}
534
500a8cc4 535static void
dcb58a40 536parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 537{
e8ef3b4c
JN
538 const struct bdb_edp *edp;
539 const struct edp_power_seq *edp_pps;
058727ee 540 const struct edp_fast_link_params *edp_link_params;
3e845c7a 541 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
542
543 edp = find_section(bdb, BDB_EDP);
544 if (!edp) {
6aa23e65 545 if (dev_priv->vbt.edp.support)
9a30a61f 546 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
547 return;
548 }
549
550 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
551 case EDP_18BPP:
6aa23e65 552 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
553 break;
554 case EDP_24BPP:
6aa23e65 555 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
556 break;
557 case EDP_30BPP:
6aa23e65 558 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
559 break;
560 }
5ceb0f9b 561
9f0e7ff4
JB
562 /* Get the eDP sequencing and link info */
563 edp_pps = &edp->power_seqs[panel_type];
058727ee 564 edp_link_params = &edp->fast_link_params[panel_type];
5ceb0f9b 565
6aa23e65 566 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 567
e13e2b2c
JN
568 switch (edp_link_params->rate) {
569 case EDP_RATE_1_62:
6aa23e65 570 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
571 break;
572 case EDP_RATE_2_7:
6aa23e65 573 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
574 break;
575 default:
576 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
577 edp_link_params->rate);
578 break;
579 }
580
9f0e7ff4 581 switch (edp_link_params->lanes) {
e13e2b2c 582 case EDP_LANE_1:
6aa23e65 583 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 584 break;
e13e2b2c 585 case EDP_LANE_2:
6aa23e65 586 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 587 break;
e13e2b2c 588 case EDP_LANE_4:
6aa23e65 589 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 590 break;
e13e2b2c
JN
591 default:
592 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
593 edp_link_params->lanes);
594 break;
9f0e7ff4 595 }
e13e2b2c 596
9f0e7ff4 597 switch (edp_link_params->preemphasis) {
e13e2b2c 598 case EDP_PREEMPHASIS_NONE:
6aa23e65 599 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 600 break;
e13e2b2c 601 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 602 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 603 break;
e13e2b2c 604 case EDP_PREEMPHASIS_6dB:
6aa23e65 605 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 606 break;
e13e2b2c 607 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 608 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 609 break;
e13e2b2c
JN
610 default:
611 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
612 edp_link_params->preemphasis);
613 break;
9f0e7ff4 614 }
e13e2b2c 615
9f0e7ff4 616 switch (edp_link_params->vswing) {
e13e2b2c 617 case EDP_VSWING_0_4V:
6aa23e65 618 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 619 break;
e13e2b2c 620 case EDP_VSWING_0_6V:
6aa23e65 621 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 622 break;
e13e2b2c 623 case EDP_VSWING_0_8V:
6aa23e65 624 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 625 break;
e13e2b2c 626 case EDP_VSWING_1_2V:
6aa23e65 627 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 628 break;
e13e2b2c
JN
629 default:
630 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
631 edp_link_params->vswing);
632 break;
9f0e7ff4 633 }
9a57f5bb
SJ
634
635 if (bdb->version >= 173) {
636 uint8_t vswing;
637
9e458034 638 /* Don't read from VBT if module parameter has valid value*/
4f044a88
MW
639 if (i915_modparams.edp_vswing) {
640 dev_priv->vbt.edp.low_vswing =
641 i915_modparams.edp_vswing == 1;
9e458034
SJ
642 } else {
643 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 644 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 645 }
9a57f5bb 646 }
500a8cc4
ZW
647}
648
bfd7ebda 649static void
dcb58a40 650parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 651{
e8ef3b4c
JN
652 const struct bdb_psr *psr;
653 const struct psr_table *psr_table;
3e845c7a 654 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
655
656 psr = find_section(bdb, BDB_PSR);
657 if (!psr) {
658 DRM_DEBUG_KMS("No PSR BDB found.\n");
659 return;
660 }
661
662 psr_table = &psr->psr_table[panel_type];
663
664 dev_priv->vbt.psr.full_link = psr_table->full_link;
665 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
666
667 /* Allowed VBT values goes from 0 to 15 */
668 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
669 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
670
671 switch (psr_table->lines_to_wait) {
672 case 0:
673 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
674 break;
675 case 1:
676 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
677 break;
678 case 2:
679 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
680 break;
681 case 3:
682 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
683 break;
684 default:
685 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
686 psr_table->lines_to_wait);
687 break;
688 }
689
690 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
691 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
692}
693
d17c5443 694static void
0f8689f5
JN
695parse_mipi_config(struct drm_i915_private *dev_priv,
696 const struct bdb_header *bdb)
d17c5443 697{
e8ef3b4c 698 const struct bdb_mipi_config *start;
e8ef3b4c
JN
699 const struct mipi_config *config;
700 const struct mipi_pps_data *pps;
3e845c7a 701 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 702
3e6bd011 703 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 704 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
705 return;
706
d3b542fc
SK
707 /* Initialize this to undefined indicating no generic MIPI support */
708 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
709
710 /* Block #40 is already parsed and panel_fixed_mode is
711 * stored in dev_priv->lfp_lvds_vbt_mode
712 * resuse this when needed
713 */
d17c5443 714
d3b542fc
SK
715 /* Parse #52 for panel index used from panel_type already
716 * parsed
717 */
718 start = find_section(bdb, BDB_MIPI_CONFIG);
719 if (!start) {
720 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
721 return;
722 }
723
d3b542fc
SK
724 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
725 panel_type);
726
727 /*
728 * get hold of the correct configuration block and pps data as per
729 * the panel_type as index
730 */
731 config = &start->config[panel_type];
732 pps = &start->pps[panel_type];
733
734 /* store as of now full data. Trim when we realise all is not needed */
735 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
736 if (!dev_priv->vbt.dsi.config)
737 return;
738
739 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
740 if (!dev_priv->vbt.dsi.pps) {
741 kfree(dev_priv->vbt.dsi.config);
742 return;
743 }
744
9f7c5b17
D
745 /*
746 * These fields are introduced from the VBT version 197 onwards,
747 * so making sure that these bits are set zero in the previous
748 * versions.
749 */
750 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
751 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
752 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
753 }
754
d3b542fc 755 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 756 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
757}
758
5db72099
JN
759/* Find the sequence block and size for the given panel. */
760static const u8 *
761find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 762 u16 panel_id, u32 *seq_size)
5db72099
JN
763{
764 u32 total = get_blocksize(sequence);
765 const u8 *data = &sequence->data[0];
766 u8 current_id;
2a33d934
JN
767 u32 current_size;
768 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
769 int index = 0;
770 int i;
771
2a33d934
JN
772 /* skip new block size */
773 if (sequence->version >= 3)
774 data += 4;
775
776 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
777 if (index + header_size > total) {
778 DRM_ERROR("Invalid sequence block (header)\n");
779 return NULL;
780 }
781
5db72099 782 current_id = *(data + index);
2a33d934
JN
783 if (sequence->version >= 3)
784 current_size = *((const u32 *)(data + index + 1));
785 else
786 current_size = *((const u16 *)(data + index + 1));
5db72099 787
2a33d934 788 index += header_size;
5db72099
JN
789
790 if (index + current_size > total) {
791 DRM_ERROR("Invalid sequence block\n");
792 return NULL;
793 }
794
795 if (current_id == panel_id) {
796 *seq_size = current_size;
797 return data + index;
798 }
799
800 index += current_size;
801 }
802
803 DRM_ERROR("Sequence block detected but no valid configuration\n");
804
805 return NULL;
806}
807
8d3ed2f3
JN
808static int goto_next_sequence(const u8 *data, int index, int total)
809{
810 u16 len;
811
812 /* Skip Sequence Byte. */
813 for (index = index + 1; index < total; index += len) {
814 u8 operation_byte = *(data + index);
815 index++;
816
817 switch (operation_byte) {
818 case MIPI_SEQ_ELEM_END:
819 return index;
820 case MIPI_SEQ_ELEM_SEND_PKT:
821 if (index + 4 > total)
822 return 0;
823
824 len = *((const u16 *)(data + index + 2)) + 4;
825 break;
826 case MIPI_SEQ_ELEM_DELAY:
827 len = 4;
828 break;
829 case MIPI_SEQ_ELEM_GPIO:
830 len = 2;
831 break;
f4d64936
JN
832 case MIPI_SEQ_ELEM_I2C:
833 if (index + 7 > total)
834 return 0;
835 len = *(data + index + 6) + 7;
836 break;
8d3ed2f3
JN
837 default:
838 DRM_ERROR("Unknown operation byte\n");
839 return 0;
840 }
841 }
842
843 return 0;
844}
845
2a33d934
JN
846static int goto_next_sequence_v3(const u8 *data, int index, int total)
847{
848 int seq_end;
849 u16 len;
6765bd6d 850 u32 size_of_sequence;
2a33d934
JN
851
852 /*
853 * Could skip sequence based on Size of Sequence alone, but also do some
854 * checking on the structure.
855 */
856 if (total < 5) {
857 DRM_ERROR("Too small sequence size\n");
858 return 0;
859 }
860
6765bd6d
JN
861 /* Skip Sequence Byte. */
862 index++;
863
864 /*
865 * Size of Sequence. Excludes the Sequence Byte and the size itself,
866 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
867 * byte.
868 */
869 size_of_sequence = *((const uint32_t *)(data + index));
870 index += 4;
871
872 seq_end = index + size_of_sequence;
2a33d934
JN
873 if (seq_end > total) {
874 DRM_ERROR("Invalid sequence size\n");
875 return 0;
876 }
877
6765bd6d 878 for (; index < total; index += len) {
2a33d934
JN
879 u8 operation_byte = *(data + index);
880 index++;
881
882 if (operation_byte == MIPI_SEQ_ELEM_END) {
883 if (index != seq_end) {
884 DRM_ERROR("Invalid element structure\n");
885 return 0;
886 }
887 return index;
888 }
889
890 len = *(data + index);
891 index++;
892
893 /*
894 * FIXME: Would be nice to check elements like for v1/v2 in
895 * goto_next_sequence() above.
896 */
897 switch (operation_byte) {
898 case MIPI_SEQ_ELEM_SEND_PKT:
899 case MIPI_SEQ_ELEM_DELAY:
900 case MIPI_SEQ_ELEM_GPIO:
901 case MIPI_SEQ_ELEM_I2C:
902 case MIPI_SEQ_ELEM_SPI:
903 case MIPI_SEQ_ELEM_PMIC:
904 break;
905 default:
906 DRM_ERROR("Unknown operation byte %u\n",
907 operation_byte);
908 break;
909 }
910 }
911
912 return 0;
913}
914
0f8689f5
JN
915static void
916parse_mipi_sequence(struct drm_i915_private *dev_priv,
917 const struct bdb_header *bdb)
918{
3e845c7a 919 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
920 const struct bdb_mipi_sequence *sequence;
921 const u8 *seq_data;
2a33d934 922 u32 seq_size;
0f8689f5 923 u8 *data;
8d3ed2f3 924 int index = 0;
0f8689f5
JN
925
926 /* Only our generic panel driver uses the sequence block. */
927 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
928 return;
d3b542fc 929
d3b542fc
SK
930 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
931 if (!sequence) {
932 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
933 return;
934 }
935
cd67d226 936 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
937 if (sequence->version >= 4) {
938 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
939 sequence->version);
cd67d226
JN
940 return;
941 }
942
2a33d934 943 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 944
5db72099
JN
945 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
946 if (!seq_data)
d3b542fc 947 return;
d3b542fc 948
8d3ed2f3
JN
949 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
950 if (!data)
d3b542fc
SK
951 return;
952
8d3ed2f3
JN
953 /* Parse the sequences, store pointers to each sequence. */
954 for (;;) {
955 u8 seq_id = *(data + index);
956 if (seq_id == MIPI_SEQ_END)
957 break;
d3b542fc 958
8d3ed2f3
JN
959 if (seq_id >= MIPI_SEQ_MAX) {
960 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
961 goto err;
962 }
963
4b4f497e
JN
964 /* Log about presence of sequences we won't run. */
965 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
966 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
967
8d3ed2f3 968 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 969
2a33d934
JN
970 if (sequence->version >= 3)
971 index = goto_next_sequence_v3(data, index, seq_size);
972 else
973 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
974 if (!index) {
975 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
976 goto err;
977 }
d3b542fc
SK
978 }
979
8d3ed2f3
JN
980 dev_priv->vbt.dsi.data = data;
981 dev_priv->vbt.dsi.size = seq_size;
982 dev_priv->vbt.dsi.seq_version = sequence->version;
983
984 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 985 return;
d3b542fc 986
8d3ed2f3
JN
987err:
988 kfree(data);
ed3b6679 989 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
990}
991
75067dde
AK
992static u8 translate_iboost(u8 val)
993{
994 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
995
996 if (val >= ARRAY_SIZE(mapping)) {
997 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
998 return 0;
999 }
1000 return mapping[val];
1001}
1002
9454fa87
VS
1003static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1004 enum port port)
1005{
1006 const struct ddi_vbt_port_info *info =
1007 &dev_priv->vbt.ddi_port_info[port];
1008 enum port p;
1009
1010 if (!info->alternate_ddc_pin)
1011 return;
1012
1013 for_each_port_masked(p, (1 << port) - 1) {
1014 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1015
1016 if (info->alternate_ddc_pin != i->alternate_ddc_pin)
1017 continue;
1018
1019 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1020 "disabling port %c DVI/HDMI support\n",
1021 port_name(p), i->alternate_ddc_pin,
1022 port_name(port), port_name(p));
1023
1024 /*
1025 * If we have multiple ports supposedly sharing the
1026 * pin, then dvi/hdmi couldn't exist on the shared
1027 * port. Otherwise they share the same ddc bin and
1028 * system couldn't communicate with them separately.
1029 *
1030 * Due to parsing the ports in alphabetical order,
1031 * a higher port will always clobber a lower one.
1032 */
1033 i->supports_dvi = false;
1034 i->supports_hdmi = false;
1035 i->alternate_ddc_pin = 0;
1036 }
1037}
1038
1039static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1040 enum port port)
1041{
1042 const struct ddi_vbt_port_info *info =
1043 &dev_priv->vbt.ddi_port_info[port];
1044 enum port p;
1045
1046 if (!info->alternate_aux_channel)
1047 return;
1048
1049 for_each_port_masked(p, (1 << port) - 1) {
1050 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1051
1052 if (info->alternate_aux_channel != i->alternate_aux_channel)
1053 continue;
1054
1055 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1056 "disabling port %c DP support\n",
1057 port_name(p), i->alternate_aux_channel,
1058 port_name(port), port_name(p));
1059
1060 /*
1061 * If we have multiple ports supposedlt sharing the
1062 * aux channel, then DP couldn't exist on the shared
1063 * port. Otherwise they share the same aux channel
1064 * and system couldn't communicate with them separately.
1065 *
1066 * Due to parsing the ports in alphabetical order,
1067 * a higher port will always clobber a lower one.
1068 */
1069 i->supports_dp = false;
1070 i->alternate_aux_channel = 0;
1071 }
1072}
1073
6acab15a 1074static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
0ead5f81 1075 u8 bdb_version)
6acab15a 1076{
cc998589 1077 struct child_device_config *it, *child = NULL;
6acab15a
PZ
1078 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1079 uint8_t hdmi_level_shift;
1080 int i, j;
554d6af5 1081 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1082 uint8_t aux_channel, ddc_pin;
6acab15a 1083 /* Each DDI port can have more than one value on the "DVO Port" field,
b5273d72
JN
1084 * so look for all the possible values for each port.
1085 */
2800e4c2
RV
1086 int dvo_ports[][3] = {
1087 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1088 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1089 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1090 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1091 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1092 };
1093
b5273d72
JN
1094 /*
1095 * Find the first child device to reference the port, report if more
1096 * than one found.
1097 */
6acab15a
PZ
1098 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1099 it = dev_priv->vbt.child_dev + i;
1100
2800e4c2 1101 for (j = 0; j < 3; j++) {
6acab15a
PZ
1102 if (dvo_ports[port][j] == -1)
1103 break;
1104
cc998589 1105 if (it->dvo_port == dvo_ports[port][j]) {
6acab15a 1106 if (child) {
b5273d72 1107 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
6acab15a 1108 port_name(port));
b5273d72
JN
1109 } else {
1110 child = it;
6acab15a 1111 }
6acab15a
PZ
1112 }
1113 }
1114 }
1115 if (!child)
1116 return;
1117
cc998589
JN
1118 aux_channel = child->aux_channel;
1119 ddc_pin = child->ddc_pin;
6bf19e7c 1120
cc998589
JN
1121 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1122 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1123 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1124 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1125 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1126
d27ffc1d
JN
1127 if (port == PORT_A && is_dvi) {
1128 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1129 is_hdmi ? "/HDMI" : "");
1130 is_dvi = false;
1131 is_hdmi = false;
1132 }
1133
311a2094
PZ
1134 info->supports_dvi = is_dvi;
1135 info->supports_hdmi = is_hdmi;
1136 info->supports_dp = is_dp;
a98d9c1d 1137 info->supports_edp = is_edp;
311a2094 1138
554d6af5
PZ
1139 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1140 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1141
1142 if (is_edp && is_dvi)
1143 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1144 port_name(port));
1145 if (is_crt && port != PORT_E)
1146 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1147 if (is_crt && (is_dvi || is_dp))
1148 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1149 port_name(port));
1150 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1151 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1152 if (!is_dvi && !is_dp && !is_crt)
1153 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1154 port_name(port));
1155 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1156 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1157
1158 if (is_dvi) {
9454fa87
VS
1159 info->alternate_ddc_pin = ddc_pin;
1160
75be7756
RV
1161 /*
1162 * All VBTs that we got so far for B Stepping has this
1163 * information wrong for Port D. So, let's just ignore for now.
1164 */
1165 if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
1166 port == PORT_D) {
1167 info->alternate_ddc_pin = 0;
1168 }
1169
9454fa87 1170 sanitize_ddc_pin(dev_priv, port);
6bf19e7c
PZ
1171 }
1172
1173 if (is_dp) {
9454fa87
VS
1174 info->alternate_aux_channel = aux_channel;
1175
1176 sanitize_aux_ch(dev_priv, port);
6bf19e7c
PZ
1177 }
1178
0ead5f81 1179 if (bdb_version >= 158) {
6acab15a 1180 /* The VBT HDMI level shift values match the table we have. */
cc998589 1181 hdmi_level_shift = child->hdmi_level_shifter_value;
ce4dd49e
DL
1182 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1183 port_name(port),
1184 hdmi_level_shift);
1185 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1186 }
75067dde
AK
1187
1188 /* Parse the I_boost config for SKL and above */
0ead5f81 1189 if (bdb_version >= 196 && child->iboost) {
f22bb358 1190 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
75067dde
AK
1191 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1192 port_name(port), info->dp_boost_level);
f22bb358 1193 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
75067dde
AK
1194 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1195 port_name(port), info->hdmi_boost_level);
1196 }
6acab15a
PZ
1197}
1198
0ead5f81 1199static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
6acab15a 1200{
6acab15a
PZ
1201 enum port port;
1202
348e4058 1203 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
6acab15a
PZ
1204 return;
1205
1206 if (!dev_priv->vbt.child_dev_num)
1207 return;
1208
0ead5f81 1209 if (bdb_version < 155)
6acab15a
PZ
1210 return;
1211
1212 for (port = PORT_A; port < I915_MAX_PORTS; port++)
0ead5f81 1213 parse_ddi_port(dev_priv, port, bdb_version);
6acab15a
PZ
1214}
1215
6363ee6f 1216static void
b3ca1f43
JN
1217parse_general_definitions(struct drm_i915_private *dev_priv,
1218 const struct bdb_header *bdb)
6363ee6f 1219{
e192839e
JN
1220 const struct bdb_general_definitions *defs;
1221 const struct child_device_config *child;
6363ee6f 1222 int i, child_device_num, count;
e2d6cf7f
DW
1223 u8 expected_size;
1224 u16 block_size;
b3ca1f43 1225 int bus_pin;
6363ee6f 1226
e192839e
JN
1227 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1228 if (!defs) {
44834a67 1229 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1230 return;
1231 }
b3ca1f43
JN
1232
1233 block_size = get_blocksize(defs);
1234 if (block_size < sizeof(*defs)) {
1235 DRM_DEBUG_KMS("General definitions block too small (%u)\n",
1236 block_size);
1237 return;
1238 }
1239
1240 bus_pin = defs->crt_ddc_gmbus_pin;
1241 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
1242 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1243 dev_priv->vbt.crt_ddc_pin = bus_pin;
1244
7244f309
VS
1245 if (bdb->version < 106) {
1246 expected_size = 22;
fa05178c 1247 } else if (bdb->version < 111) {
52b69c84
VS
1248 expected_size = 27;
1249 } else if (bdb->version < 195) {
21907e72 1250 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
e2d6cf7f
DW
1251 } else if (bdb->version == 195) {
1252 expected_size = 37;
1253 } else if (bdb->version <= 197) {
1254 expected_size = 38;
1255 } else {
1256 expected_size = 38;
e192839e 1257 BUILD_BUG_ON(sizeof(*child) < 38);
e2d6cf7f
DW
1258 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1259 bdb->version, expected_size);
1260 }
1261
e2d6cf7f 1262 /* Flag an error for unexpected size, but continue anyway. */
e192839e 1263 if (defs->child_dev_size != expected_size)
e2d6cf7f 1264 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
e192839e 1265 defs->child_dev_size, expected_size, bdb->version);
e2d6cf7f 1266
52b69c84 1267 /* The legacy sized child device config is the minimum we need. */
e192839e 1268 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
52b69c84 1269 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
e192839e 1270 defs->child_dev_size);
52b69c84
VS
1271 return;
1272 }
1273
6363ee6f 1274 /* get the number of child device */
e192839e 1275 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
6363ee6f
ZY
1276 count = 0;
1277 /* get the number of child device that is present */
1278 for (i = 0; i < child_device_num; i++) {
e192839e 1279 child = child_device_ptr(defs, i);
53f6b243 1280 if (!child->device_type)
6363ee6f 1281 continue;
6363ee6f
ZY
1282 count++;
1283 }
1284 if (!count) {
0206e353 1285 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1286 return;
1287 }
e192839e 1288 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
41aa3448 1289 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1290 DRM_DEBUG_KMS("No memory space for child device\n");
1291 return;
1292 }
1293
41aa3448 1294 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1295 count = 0;
1296 for (i = 0; i < child_device_num; i++) {
e192839e 1297 child = child_device_ptr(defs, i);
53f6b243 1298 if (!child->device_type)
6363ee6f 1299 continue;
3e6bd011 1300
e2d6cf7f
DW
1301 /*
1302 * Copy as much as we know (sizeof) and is available
1303 * (child_dev_size) of the child device. Accessing the data must
1304 * depend on VBT version.
1305 */
127704f5 1306 memcpy(dev_priv->vbt.child_dev + count, child,
e192839e 1307 min_t(size_t, defs->child_dev_size, sizeof(*child)));
127704f5 1308 count++;
6363ee6f 1309 }
6363ee6f 1310}
44834a67 1311
bb1d1329 1312/* Common defaults which may be overridden by VBT. */
6a04002b
SQ
1313static void
1314init_vbt_defaults(struct drm_i915_private *dev_priv)
1315{
6acab15a 1316 enum port port;
9a4114ff 1317
988c7015 1318 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1319
56c4b63a
JN
1320 /* Default to having backlight */
1321 dev_priv->vbt.backlight.present = true;
1322
6a04002b 1323 /* LFP panel data */
41aa3448
RV
1324 dev_priv->vbt.lvds_dither = 1;
1325 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1326
1327 /* SDVO panel data */
41aa3448 1328 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1329
1330 /* general features */
41aa3448
RV
1331 dev_priv->vbt.int_tv_support = 1;
1332 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1333
1334 /* Default to using SSC */
41aa3448 1335 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1336 /*
1337 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1338 * clock for LVDS.
1339 */
98f3a1dc
JN
1340 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1341 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1342 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1343
1344 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1345 struct ddi_vbt_port_info *info =
1346 &dev_priv->vbt.ddi_port_info[port];
1347
ce4dd49e 1348 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
bb1d1329
JN
1349 }
1350}
1351
1352/* Defaults to initialize only if there is no VBT. */
1353static void
1354init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1355{
1356 enum port port;
1357
1358 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1359 struct ddi_vbt_port_info *info =
1360 &dev_priv->vbt.ddi_port_info[port];
311a2094
PZ
1361
1362 info->supports_dvi = (port != PORT_A && port != PORT_E);
1363 info->supports_hdmi = info->supports_dvi;
1364 info->supports_dp = (port != PORT_E);
6acab15a 1365 }
6a04002b
SQ
1366}
1367
caf37fa4
JN
1368static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1369{
1370 const void *_vbt = vbt;
1371
1372 return _vbt + vbt->bdb_offset;
1373}
1374
f0067a31
JN
1375/**
1376 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1377 * @buf: pointer to a buffer to validate
1378 * @size: size of the buffer
1379 *
1380 * Returns true on valid VBT.
1381 */
1382bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1383{
f0067a31 1384 const struct vbt_header *vbt = buf;
dcb58a40 1385 const struct bdb_header *bdb;
3dd4e846 1386
caf37fa4 1387 if (!vbt)
f0067a31 1388 return false;
caf37fa4 1389
f0067a31 1390 if (sizeof(struct vbt_header) > size) {
3dd4e846 1391 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1392 return false;
3dd4e846
CW
1393 }
1394
1395 if (memcmp(vbt->signature, "$VBT", 4)) {
1396 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1397 return false;
3dd4e846
CW
1398 }
1399
e8f9ae9b
CW
1400 if (range_overflows_t(size_t,
1401 vbt->bdb_offset,
1402 sizeof(struct bdb_header),
1403 size)) {
3dd4e846 1404 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1405 return false;
3dd4e846
CW
1406 }
1407
caf37fa4 1408 bdb = get_bdb_header(vbt);
e8f9ae9b 1409 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3dd4e846 1410 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1411 return false;
3dd4e846
CW
1412 }
1413
caf37fa4 1414 return vbt;
3dd4e846
CW
1415}
1416
caf37fa4 1417static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1418{
b34a991a
JN
1419 size_t i;
1420
1421 /* Scour memory looking for the VBT signature. */
1422 for (i = 0; i + 4 < size; i++) {
f0067a31 1423 void *vbt;
115719fc 1424
f0067a31
JN
1425 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1426 continue;
1427
1428 /*
1429 * This is the one place where we explicitly discard the address
1430 * space (__iomem) of the BIOS/VBT.
1431 */
1432 vbt = (void __force *) bios + i;
1433 if (intel_bios_is_valid_vbt(vbt, size - i))
1434 return vbt;
1435
1436 break;
b34a991a
JN
1437 }
1438
f0067a31 1439 return NULL;
b34a991a
JN
1440}
1441
79e53945 1442/**
8b8e1a89 1443 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1444 * @dev_priv: i915 device instance
79e53945 1445 *
66578857
JN
1446 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
1447 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
1448 * initialize some defaults if the VBT is not present at all.
79e53945 1449 */
66578857 1450void intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1451{
91c8a326 1452 struct pci_dev *pdev = dev_priv->drm.pdev;
f0067a31 1453 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1454 const struct bdb_header *bdb;
44834a67
CW
1455 u8 __iomem *bios = NULL;
1456
66578857
JN
1457 if (HAS_PCH_NOP(dev_priv)) {
1458 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
1459 return;
1460 }
ab5c608b 1461
6a04002b 1462 init_vbt_defaults(dev_priv);
f899fc64 1463
66578857 1464 /* If the OpRegion does not have VBT, look in PCI ROM. */
f0067a31 1465 if (!vbt) {
b34a991a 1466 size_t size;
79e53945 1467
44834a67
CW
1468 bios = pci_map_rom(pdev, &size);
1469 if (!bios)
66578857 1470 goto out;
44834a67 1471
caf37fa4 1472 vbt = find_vbt(bios, size);
66578857
JN
1473 if (!vbt)
1474 goto out;
e2051c44
JN
1475
1476 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1477 }
79e53945 1478
caf37fa4
JN
1479 bdb = get_bdb_header(vbt);
1480
3556dd40
JN
1481 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1482 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1483
79e53945
JB
1484 /* Grab useful general definitions */
1485 parse_general_features(dev_priv, bdb);
db545019 1486 parse_general_definitions(dev_priv, bdb);
88631706 1487 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1488 parse_lfp_backlight(dev_priv, bdb);
88631706 1489 parse_sdvo_panel_data(dev_priv, bdb);
32f9d658 1490 parse_driver_features(dev_priv, bdb);
500a8cc4 1491 parse_edp(dev_priv, bdb);
bfd7ebda 1492 parse_psr(dev_priv, bdb);
0f8689f5
JN
1493 parse_mipi_config(dev_priv, bdb);
1494 parse_mipi_sequence(dev_priv, bdb);
0ebdabe6
JN
1495
1496 /* Further processing on pre-parsed data */
0ead5f81
JN
1497 parse_sdvo_device_mapping(dev_priv, bdb->version);
1498 parse_ddi_ports(dev_priv, bdb->version);
32f9d658 1499
66578857 1500out:
bb1d1329 1501 if (!vbt) {
66578857 1502 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
bb1d1329
JN
1503 init_vbt_missing_defaults(dev_priv);
1504 }
66578857 1505
44834a67
CW
1506 if (bios)
1507 pci_unmap_rom(pdev, bios);
79e53945 1508}
3bdd14d5
JN
1509
1510/**
1511 * intel_bios_is_tv_present - is integrated TV present in VBT
1512 * @dev_priv: i915 device instance
1513 *
1514 * Return true if TV is present. If no child devices were parsed from VBT,
1515 * assume TV is present.
1516 */
1517bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1518{
cc998589 1519 const struct child_device_config *child;
3bdd14d5
JN
1520 int i;
1521
1522 if (!dev_priv->vbt.int_tv_support)
1523 return false;
1524
1525 if (!dev_priv->vbt.child_dev_num)
1526 return true;
1527
1528 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1529 child = dev_priv->vbt.child_dev + i;
3bdd14d5
JN
1530 /*
1531 * If the device type is not TV, continue.
1532 */
cc998589 1533 switch (child->device_type) {
3bdd14d5
JN
1534 case DEVICE_TYPE_INT_TV:
1535 case DEVICE_TYPE_TV:
1536 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1537 break;
1538 default:
1539 continue;
1540 }
1541 /* Only when the addin_offset is non-zero, it is regarded
1542 * as present.
1543 */
cc998589 1544 if (child->addin_offset)
3bdd14d5
JN
1545 return true;
1546 }
1547
1548 return false;
1549}
5a69d13d
JN
1550
1551/**
1552 * intel_bios_is_lvds_present - is LVDS present in VBT
1553 * @dev_priv: i915 device instance
1554 * @i2c_pin: i2c pin for LVDS if present
1555 *
1556 * Return true if LVDS is present. If no child devices were parsed from VBT,
1557 * assume LVDS is present.
1558 */
1559bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1560{
cc998589 1561 const struct child_device_config *child;
5a69d13d
JN
1562 int i;
1563
1564 if (!dev_priv->vbt.child_dev_num)
1565 return true;
1566
1567 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1568 child = dev_priv->vbt.child_dev + i;
5a69d13d
JN
1569
1570 /* If the device type is not LFP, continue.
1571 * We have to check both the new identifiers as well as the
1572 * old for compatibility with some BIOSes.
1573 */
1574 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1575 child->device_type != DEVICE_TYPE_LFP)
1576 continue;
1577
1578 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1579 *i2c_pin = child->i2c_pin;
1580
1581 /* However, we cannot trust the BIOS writers to populate
1582 * the VBT correctly. Since LVDS requires additional
1583 * information from AIM blocks, a non-zero addin offset is
1584 * a good indicator that the LVDS is actually present.
1585 */
1586 if (child->addin_offset)
1587 return true;
1588
1589 /* But even then some BIOS writers perform some black magic
1590 * and instantiate the device without reference to any
1591 * additional data. Trust that if the VBT was written into
1592 * the OpRegion then they have validated the LVDS's existence.
1593 */
1594 if (dev_priv->opregion.vbt)
1595 return true;
1596 }
1597
1598 return false;
1599}
951d9efe 1600
22f35042
VS
1601/**
1602 * intel_bios_is_port_present - is the specified digital port present
1603 * @dev_priv: i915 device instance
1604 * @port: port to check
1605 *
1606 * Return true if the device in %port is present.
1607 */
1608bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1609{
cc998589 1610 const struct child_device_config *child;
22f35042
VS
1611 static const struct {
1612 u16 dp, hdmi;
1613 } port_mapping[] = {
1614 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1615 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1616 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1617 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1618 };
1619 int i;
1620
1621 /* FIXME maybe deal with port A as well? */
1622 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1623 return false;
1624
1625 if (!dev_priv->vbt.child_dev_num)
1626 return false;
1627
1628 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1629 child = dev_priv->vbt.child_dev + i;
1630
1631 if ((child->dvo_port == port_mapping[port].dp ||
1632 child->dvo_port == port_mapping[port].hdmi) &&
1633 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1634 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
22f35042
VS
1635 return true;
1636 }
1637
1638 return false;
1639}
1640
951d9efe
JN
1641/**
1642 * intel_bios_is_port_edp - is the device in given port eDP
1643 * @dev_priv: i915 device instance
1644 * @port: port to check
1645 *
1646 * Return true if the device in %port is eDP.
1647 */
1648bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1649{
cc998589 1650 const struct child_device_config *child;
951d9efe
JN
1651 static const short port_mapping[] = {
1652 [PORT_B] = DVO_PORT_DPB,
1653 [PORT_C] = DVO_PORT_DPC,
1654 [PORT_D] = DVO_PORT_DPD,
1655 [PORT_E] = DVO_PORT_DPE,
1656 };
1657 int i;
1658
a98d9c1d
ID
1659 if (HAS_DDI(dev_priv))
1660 return dev_priv->vbt.ddi_port_info[port].supports_edp;
1661
951d9efe
JN
1662 if (!dev_priv->vbt.child_dev_num)
1663 return false;
1664
1665 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1666 child = dev_priv->vbt.child_dev + i;
951d9efe 1667
cc998589
JN
1668 if (child->dvo_port == port_mapping[port] &&
1669 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
951d9efe
JN
1670 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1671 return true;
1672 }
1673
1674 return false;
1675}
7137aec1 1676
cc998589 1677static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
7a17995a 1678 enum port port)
d6199256
VS
1679{
1680 static const struct {
1681 u16 dp, hdmi;
1682 } port_mapping[] = {
1683 /*
1684 * Buggy VBTs may declare DP ports as having
1685 * HDMI type dvo_port :( So let's check both.
1686 */
1687 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1688 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1689 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1690 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1691 };
d6199256
VS
1692
1693 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1694 return false;
1695
cc998589 1696 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
7a17995a 1697 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
d6199256
VS
1698 return false;
1699
cc998589 1700 if (child->dvo_port == port_mapping[port].dp)
7a17995a
VS
1701 return true;
1702
1703 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
cc998589
JN
1704 if (child->dvo_port == port_mapping[port].hdmi &&
1705 child->aux_channel != 0)
7a17995a
VS
1706 return true;
1707
1708 return false;
1709}
1710
1711bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
1712 enum port port)
1713{
cc998589 1714 const struct child_device_config *child;
7a17995a
VS
1715 int i;
1716
d6199256 1717 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1718 child = dev_priv->vbt.child_dev + i;
d6199256 1719
cc998589 1720 if (child_dev_is_dp_dual_mode(child, port))
d6199256
VS
1721 return true;
1722 }
1723
1724 return false;
1725}
1726
7137aec1
JN
1727/**
1728 * intel_bios_is_dsi_present - is DSI present in VBT
1729 * @dev_priv: i915 device instance
1730 * @port: port for DSI if present
1731 *
1732 * Return true if DSI is present, and return the port in %port.
1733 */
1734bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1735 enum port *port)
1736{
cc998589 1737 const struct child_device_config *child;
7137aec1
JN
1738 u8 dvo_port;
1739 int i;
1740
1741 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1742 child = dev_priv->vbt.child_dev + i;
7137aec1 1743
cc998589 1744 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
7137aec1
JN
1745 continue;
1746
cc998589 1747 dvo_port = child->dvo_port;
7137aec1
JN
1748
1749 switch (dvo_port) {
1750 case DVO_PORT_MIPIA:
1751 case DVO_PORT_MIPIC:
7caaef33
JN
1752 if (port)
1753 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1754 return true;
1755 case DVO_PORT_MIPIB:
1756 case DVO_PORT_MIPID:
1757 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1758 port_name(dvo_port - DVO_PORT_MIPIA));
1759 break;
1760 }
1761 }
1762
1763 return false;
1764}
d252bf68
SS
1765
1766/**
1767 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1768 * @dev_priv: i915 device instance
1769 * @port: port to check
1770 *
1771 * Return true if HPD should be inverted for %port.
1772 */
1773bool
1774intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1775 enum port port)
1776{
cc998589 1777 const struct child_device_config *child;
d252bf68
SS
1778 int i;
1779
cc3f90f0 1780 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
d252bf68
SS
1781 return false;
1782
1783 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1784 child = dev_priv->vbt.child_dev + i;
1785
1786 if (!child->hpd_invert)
d252bf68
SS
1787 continue;
1788
cc998589 1789 switch (child->dvo_port) {
d252bf68
SS
1790 case DVO_PORT_DPA:
1791 case DVO_PORT_HDMIA:
1792 if (port == PORT_A)
1793 return true;
1794 break;
1795 case DVO_PORT_DPB:
1796 case DVO_PORT_HDMIB:
1797 if (port == PORT_B)
1798 return true;
1799 break;
1800 case DVO_PORT_DPC:
1801 case DVO_PORT_HDMIC:
1802 if (port == PORT_C)
1803 return true;
1804 break;
1805 default:
1806 break;
1807 }
1808 }
1809
1810 return false;
1811}
6389dd83
SS
1812
1813/**
1814 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
1815 * @dev_priv: i915 device instance
1816 * @port: port to check
1817 *
1818 * Return true if LSPCON is present on this port
1819 */
1820bool
1821intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
1822 enum port port)
1823{
cc998589 1824 const struct child_device_config *child;
6389dd83
SS
1825 int i;
1826
1827 if (!HAS_LSPCON(dev_priv))
1828 return false;
1829
1830 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1831 child = dev_priv->vbt.child_dev + i;
1832
1833 if (!child->lspcon)
6389dd83
SS
1834 continue;
1835
cc998589 1836 switch (child->dvo_port) {
6389dd83
SS
1837 case DVO_PORT_DPA:
1838 case DVO_PORT_HDMIA:
1839 if (port == PORT_A)
1840 return true;
1841 break;
1842 case DVO_PORT_DPB:
1843 case DVO_PORT_HDMIB:
1844 if (port == PORT_B)
1845 return true;
1846 break;
1847 case DVO_PORT_DPC:
1848 case DVO_PORT_HDMIC:
1849 if (port == PORT_C)
1850 return true;
1851 break;
1852 case DVO_PORT_DPD:
1853 case DVO_PORT_HDMID:
1854 if (port == PORT_D)
1855 return true;
1856 break;
1857 default:
1858 break;
1859 }
1860 }
1861
1862 return false;
1863}