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drm/i915/bios: cleanup comments and useless return
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79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
ce2e87b4
VT
117 ((dvo_timing->hsync_pulse_width_hi << 8) |
118 dvo_timing->hsync_pulse_width_lo);
88631706
ML
119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
120 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
121
122 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
123 dvo_timing->vactive_lo;
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
ce2e87b4 125 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
88631706 126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
ce2e87b4
VT
127 ((dvo_timing->vsync_pulse_width_hi << 4) |
128 dvo_timing->vsync_pulse_width_lo);
88631706
ML
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
9bc35499
AJ
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
df457245
VS
144 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
145 dvo_timing->himage_lo;
146 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
147 dvo_timing->vimage_lo;
148
88631706
ML
149 /* Some VBTs have bogus h/vtotal values */
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
154
155 drm_mode_set_name(panel_fixed_mode);
156}
157
99834ea4
CW
158static const struct lvds_dvo_timing *
159get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
160 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
161 int index)
162{
163 /*
164 * the size of fp_timing varies on the different platform.
165 * So calculate the DVO timing relative offset in LVDS data
166 * entry to get the DVO timing entry
167 */
168
169 int lfp_data_size =
170 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
172 int dvo_timing_offset =
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
175 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
176
177 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178}
179
b0354385
TI
180/* get lvds_fp_timing entry
181 * this function may return NULL if the corresponding entry is invalid
182 */
183static const struct lvds_fp_timing *
184get_lvds_fp_timing(const struct bdb_header *bdb,
185 const struct bdb_lvds_lfp_data *data,
186 const struct bdb_lvds_lfp_data_ptrs *ptrs,
187 int index)
188{
189 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
190 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
191 size_t ofs;
192
193 if (index >= ARRAY_SIZE(ptrs->ptr))
194 return NULL;
195 ofs = ptrs->ptr[index].fp_timing_offset;
196 if (ofs < data_ofs ||
197 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
198 return NULL;
199 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
200}
201
88631706
ML
202/* Try to find integrated panel data */
203static void
204parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 205 const struct bdb_header *bdb)
79e53945 206{
99834ea4
CW
207 const struct bdb_lvds_options *lvds_options;
208 const struct bdb_lvds_lfp_data *lvds_lfp_data;
209 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
210 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 211 const struct lvds_fp_timing *fp_timing;
79e53945 212 struct drm_display_mode *panel_fixed_mode;
3e845c7a 213 int panel_type;
c329a4ec 214 int drrs_mode;
a0562819 215 int ret;
79e53945 216
79e53945
JB
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
41aa3448 221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819 222
6f9f4b7a 223 ret = intel_opregion_get_panel_type(dev_priv);
a0562819
VS
224 if (ret >= 0) {
225 WARN_ON(ret > 0xf);
226 panel_type = ret;
227 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
228 } else {
229 if (lvds_options->panel_type > 0xf) {
230 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
231 lvds_options->panel_type);
232 return;
233 }
234 panel_type = lvds_options->panel_type;
235 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 236 }
6a04002b 237
3e845c7a 238 dev_priv->vbt.panel_type = panel_type;
79e53945 239
83a7280e
PB
240 drrs_mode = (lvds_options->dps_panel_type_bits
241 >> (panel_type * 2)) & MODE_MASK;
242 /*
243 * VBT has static DRRS = 0 and seamless DRRS = 2.
244 * The below piece of code is required to adjust vbt.drrs_type
245 * to match the enum drrs_support_type.
246 */
247 switch (drrs_mode) {
248 case 0:
249 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
250 DRM_DEBUG_KMS("DRRS supported mode is static\n");
251 break;
252 case 2:
253 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
254 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
255 break;
256 default:
257 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
258 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
259 break;
260 }
261
79e53945
JB
262 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
263 if (!lvds_lfp_data)
264 return;
265
1b16de0b
JB
266 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
267 if (!lvds_lfp_data_ptrs)
268 return;
269
41aa3448 270 dev_priv->vbt.lvds_vbt = 1;
79e53945 271
99834ea4
CW
272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
273 lvds_lfp_data_ptrs,
3e845c7a 274 panel_type);
79e53945 275
9a298b2a 276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
277 if (!panel_fixed_mode)
278 return;
79e53945 279
99834ea4 280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 281
41aa3448 282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 283
28c97730 284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 285 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 286
b0354385
TI
287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
288 lvds_lfp_data_ptrs,
3e845c7a 289 panel_type);
b0354385
TI
290 if (fp_timing) {
291 /* check the resolution, just to be sure */
292 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
293 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 296 dev_priv->vbt.bios_lvds_val);
b0354385
TI
297 }
298 }
88631706
ML
299}
300
f00076d2 301static void
dcb58a40
JN
302parse_lfp_backlight(struct drm_i915_private *dev_priv,
303 const struct bdb_header *bdb)
f00076d2
JN
304{
305 const struct bdb_lfp_backlight_data *backlight_data;
306 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 307 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
308
309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
310 if (!backlight_data)
311 return;
312
313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
315 backlight_data->entry_size);
316 return;
317 }
318
319 entry = &backlight_data->data[panel_type];
320
39fbc9c8
JN
321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
322 if (!dev_priv->vbt.backlight.present) {
323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
324 entry->type);
325 return;
326 }
327
9a41e17d
D
328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
329 if (bdb->version >= 191 &&
330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
331 const struct bdb_lfp_backlight_control_method *method;
332
333 method = &backlight_data->backlight_control[panel_type];
334 dev_priv->vbt.backlight.type = method->type;
add03379 335 dev_priv->vbt.backlight.controller = method->controller;
9a41e17d
D
336 }
337
f00076d2
JN
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2 341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
add03379 342 "active %s, min brightness %u, level %u, controller %u\n",
f00076d2
JN
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 345 dev_priv->vbt.backlight.min_brightness,
add03379
VS
346 backlight_data->level[panel_type],
347 dev_priv->vbt.backlight.controller);
f00076d2
JN
348}
349
88631706
ML
350/* Try to find sdvo panel data */
351static void
352parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 353 const struct bdb_header *bdb)
88631706 354{
e8ef3b4c 355 const struct lvds_dvo_timing *dvo_timing;
88631706 356 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 357 int index;
79e53945 358
4f044a88 359 index = i915_modparams.vbt_sdvo_panel_type;
c10e408a
MF
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
5a1e5b6c 365 if (index == -1) {
e8ef3b4c 366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
88631706
ML
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
9a298b2a 379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
380 if (!panel_fixed_mode)
381 return;
382
5a1e5b6c 383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 384
41aa3448 385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 386
5a1e5b6c
CW
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
389}
390
98f3a1dc 391static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
392 bool alternate)
393{
98f3a1dc 394 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 395 case 2:
e91e941b 396 return alternate ? 66667 : 48000;
9a4114ff
BF
397 case 3:
398 case 4:
e91e941b 399 return alternate ? 100000 : 96000;
9a4114ff 400 default:
e91e941b 401 return alternate ? 100000 : 120000;
9a4114ff
BF
402 }
403}
404
79e53945
JB
405static void
406parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 407 const struct bdb_header *bdb)
79e53945 408{
e8ef3b4c 409 const struct bdb_general_features *general;
79e53945 410
79e53945 411 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
412 if (!general)
413 return;
414
415 dev_priv->vbt.int_tv_support = general->int_tv_support;
416 /* int_crt_support can't be trusted on earlier platforms */
417 if (bdb->version >= 155 &&
418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
419 dev_priv->vbt.int_crt_support = general->int_crt_support;
420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
421 dev_priv->vbt.lvds_ssc_freq =
422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
423 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
425 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
426 dev_priv->vbt.int_tv_support,
427 dev_priv->vbt.int_crt_support,
428 dev_priv->vbt.lvds_use_ssc,
429 dev_priv->vbt.lvds_ssc_freq,
430 dev_priv->vbt.display_clock_mode,
431 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
432}
433
db545019
DMEA
434static void
435parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 436 const struct bdb_header *bdb)
db545019 437{
a87145ca
JN
438 const struct bdb_general_definitions *defs;
439 u16 block_size;
440 int bus_pin;
441
442 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
443 if (!defs) {
444 DRM_DEBUG_KMS("General definitions block not found\n");
445 return;
db545019 446 }
a87145ca
JN
447
448 block_size = get_blocksize(defs);
449 if (block_size < sizeof(*defs)) {
450 DRM_DEBUG_KMS("General definitions block too small (%u)\n",
451 block_size);
452 return;
453 }
454
455 bus_pin = defs->crt_ddc_gmbus_pin;
456 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
457 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
458 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019
DMEA
459}
460
cc998589 461static const struct child_device_config *
e192839e 462child_device_ptr(const struct bdb_general_definitions *defs, int i)
90e4f159 463{
e192839e 464 return (const void *) &defs->devices[i * defs->child_dev_size];
90e4f159
VS
465}
466
9b9d172d 467static void
468parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 469 const struct bdb_header *bdb)
9b9d172d 470{
e192839e
JN
471 struct sdvo_device_mapping *mapping;
472 const struct bdb_general_definitions *defs;
cc998589 473 const struct child_device_config *child;
9b9d172d 474 int i, child_device_num, count;
db545019 475 u16 block_size;
9b9d172d 476
e192839e
JN
477 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
478 if (!defs) {
44834a67 479 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 480 return;
481 }
6cc38aca
JN
482
483 /*
484 * Only parse SDVO mappings when the general definitions block child
485 * device size matches that of the *legacy* child device config
486 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 487 */
e192839e 488 if (defs->child_dev_size != LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
6cc38aca 489 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 490 return;
491 }
492 /* get the block size of general definitions */
e192839e 493 block_size = get_blocksize(defs);
9b9d172d 494 /* get the number of child device */
e192839e 495 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
9b9d172d 496 count = 0;
497 for (i = 0; i < child_device_num; i++) {
e192839e 498 child = child_device_ptr(defs, i);
6cc38aca 499 if (!child->device_type) {
9b9d172d 500 /* skip the device block if device type is invalid */
501 continue;
502 }
6cc38aca
JN
503 if (child->slave_addr != SLAVE_ADDR1 &&
504 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 505 /*
506 * If the slave address is neither 0x70 nor 0x72,
507 * it is not a SDVO device. Skip it.
508 */
509 continue;
510 }
6cc38aca
JN
511 if (child->dvo_port != DEVICE_PORT_DVOB &&
512 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 513 /* skip the incorrect SDVO port */
0206e353 514 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 515 continue;
516 }
28c97730 517 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
518 " %s port\n",
519 child->slave_addr,
520 (child->dvo_port == DEVICE_PORT_DVOB) ?
521 "SDVOB" : "SDVOC");
e192839e
JN
522 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
523 if (!mapping->initialized) {
524 mapping->dvo_port = child->dvo_port;
525 mapping->slave_addr = child->slave_addr;
526 mapping->dvo_wiring = child->dvo_wiring;
527 mapping->ddc_pin = child->ddc_pin;
528 mapping->i2c_pin = child->i2c_pin;
529 mapping->initialized = 1;
46eb3036 530 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e192839e
JN
531 mapping->dvo_port,
532 mapping->slave_addr,
533 mapping->dvo_wiring,
534 mapping->ddc_pin,
535 mapping->i2c_pin);
9b9d172d 536 } else {
28c97730 537 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 538 "two SDVO device.\n");
539 }
6cc38aca 540 if (child->slave2_addr) {
9b9d172d 541 /* Maybe this is a SDVO device with multiple inputs */
542 /* And the mapping info is not added */
28c97730
ZY
543 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
544 " is a SDVO device with multiple inputs.\n");
9b9d172d 545 }
546 count++;
547 }
548
549 if (!count) {
550 /* No SDVO device info is found */
28c97730 551 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 552 }
553 return;
554}
32f9d658
ZW
555
556static void
557parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 558 const struct bdb_header *bdb)
32f9d658 559{
e8ef3b4c 560 const struct bdb_driver_features *driver;
32f9d658 561
32f9d658 562 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
563 if (!driver)
564 return;
565
6fca55b1 566 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 567 dev_priv->vbt.edp.support = 1;
652c393a 568
83a7280e
PB
569 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
570 /*
571 * If DRRS is not supported, drrs_type has to be set to 0.
572 * This is because, VBT is configured in such a way that
573 * static DRRS is 0 and DRRS not supported is represented by
574 * driver->drrs_enabled=false
575 */
576 if (!driver->drrs_enabled)
577 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
578}
579
500a8cc4 580static void
dcb58a40 581parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 582{
e8ef3b4c
JN
583 const struct bdb_edp *edp;
584 const struct edp_power_seq *edp_pps;
058727ee 585 const struct edp_fast_link_params *edp_link_params;
3e845c7a 586 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
587
588 edp = find_section(bdb, BDB_EDP);
589 if (!edp) {
6aa23e65 590 if (dev_priv->vbt.edp.support)
9a30a61f 591 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
592 return;
593 }
594
595 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
596 case EDP_18BPP:
6aa23e65 597 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
598 break;
599 case EDP_24BPP:
6aa23e65 600 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
601 break;
602 case EDP_30BPP:
6aa23e65 603 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
604 break;
605 }
5ceb0f9b 606
9f0e7ff4
JB
607 /* Get the eDP sequencing and link info */
608 edp_pps = &edp->power_seqs[panel_type];
058727ee 609 edp_link_params = &edp->fast_link_params[panel_type];
5ceb0f9b 610
6aa23e65 611 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 612
e13e2b2c
JN
613 switch (edp_link_params->rate) {
614 case EDP_RATE_1_62:
6aa23e65 615 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
616 break;
617 case EDP_RATE_2_7:
6aa23e65 618 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
619 break;
620 default:
621 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
622 edp_link_params->rate);
623 break;
624 }
625
9f0e7ff4 626 switch (edp_link_params->lanes) {
e13e2b2c 627 case EDP_LANE_1:
6aa23e65 628 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 629 break;
e13e2b2c 630 case EDP_LANE_2:
6aa23e65 631 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 632 break;
e13e2b2c 633 case EDP_LANE_4:
6aa23e65 634 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 635 break;
e13e2b2c
JN
636 default:
637 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
638 edp_link_params->lanes);
639 break;
9f0e7ff4 640 }
e13e2b2c 641
9f0e7ff4 642 switch (edp_link_params->preemphasis) {
e13e2b2c 643 case EDP_PREEMPHASIS_NONE:
6aa23e65 644 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 645 break;
e13e2b2c 646 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 647 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 648 break;
e13e2b2c 649 case EDP_PREEMPHASIS_6dB:
6aa23e65 650 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 651 break;
e13e2b2c 652 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 653 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 654 break;
e13e2b2c
JN
655 default:
656 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
657 edp_link_params->preemphasis);
658 break;
9f0e7ff4 659 }
e13e2b2c 660
9f0e7ff4 661 switch (edp_link_params->vswing) {
e13e2b2c 662 case EDP_VSWING_0_4V:
6aa23e65 663 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 664 break;
e13e2b2c 665 case EDP_VSWING_0_6V:
6aa23e65 666 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 667 break;
e13e2b2c 668 case EDP_VSWING_0_8V:
6aa23e65 669 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 670 break;
e13e2b2c 671 case EDP_VSWING_1_2V:
6aa23e65 672 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 673 break;
e13e2b2c
JN
674 default:
675 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
676 edp_link_params->vswing);
677 break;
9f0e7ff4 678 }
9a57f5bb
SJ
679
680 if (bdb->version >= 173) {
681 uint8_t vswing;
682
9e458034 683 /* Don't read from VBT if module parameter has valid value*/
4f044a88
MW
684 if (i915_modparams.edp_vswing) {
685 dev_priv->vbt.edp.low_vswing =
686 i915_modparams.edp_vswing == 1;
9e458034
SJ
687 } else {
688 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 689 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 690 }
9a57f5bb 691 }
500a8cc4
ZW
692}
693
bfd7ebda 694static void
dcb58a40 695parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 696{
e8ef3b4c
JN
697 const struct bdb_psr *psr;
698 const struct psr_table *psr_table;
3e845c7a 699 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
700
701 psr = find_section(bdb, BDB_PSR);
702 if (!psr) {
703 DRM_DEBUG_KMS("No PSR BDB found.\n");
704 return;
705 }
706
707 psr_table = &psr->psr_table[panel_type];
708
709 dev_priv->vbt.psr.full_link = psr_table->full_link;
710 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
711
712 /* Allowed VBT values goes from 0 to 15 */
713 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
714 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
715
716 switch (psr_table->lines_to_wait) {
717 case 0:
718 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
719 break;
720 case 1:
721 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
722 break;
723 case 2:
724 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
725 break;
726 case 3:
727 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
728 break;
729 default:
730 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
731 psr_table->lines_to_wait);
732 break;
733 }
734
735 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
736 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
737}
738
d17c5443 739static void
0f8689f5
JN
740parse_mipi_config(struct drm_i915_private *dev_priv,
741 const struct bdb_header *bdb)
d17c5443 742{
e8ef3b4c 743 const struct bdb_mipi_config *start;
e8ef3b4c
JN
744 const struct mipi_config *config;
745 const struct mipi_pps_data *pps;
3e845c7a 746 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 747
3e6bd011 748 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 749 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
750 return;
751
d3b542fc
SK
752 /* Initialize this to undefined indicating no generic MIPI support */
753 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
754
755 /* Block #40 is already parsed and panel_fixed_mode is
756 * stored in dev_priv->lfp_lvds_vbt_mode
757 * resuse this when needed
758 */
d17c5443 759
d3b542fc
SK
760 /* Parse #52 for panel index used from panel_type already
761 * parsed
762 */
763 start = find_section(bdb, BDB_MIPI_CONFIG);
764 if (!start) {
765 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
766 return;
767 }
768
d3b542fc
SK
769 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
770 panel_type);
771
772 /*
773 * get hold of the correct configuration block and pps data as per
774 * the panel_type as index
775 */
776 config = &start->config[panel_type];
777 pps = &start->pps[panel_type];
778
779 /* store as of now full data. Trim when we realise all is not needed */
780 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
781 if (!dev_priv->vbt.dsi.config)
782 return;
783
784 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
785 if (!dev_priv->vbt.dsi.pps) {
786 kfree(dev_priv->vbt.dsi.config);
787 return;
788 }
789
9f7c5b17
D
790 /*
791 * These fields are introduced from the VBT version 197 onwards,
792 * so making sure that these bits are set zero in the previous
793 * versions.
794 */
795 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
796 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
797 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
798 }
799
d3b542fc 800 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 801 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
802}
803
5db72099
JN
804/* Find the sequence block and size for the given panel. */
805static const u8 *
806find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 807 u16 panel_id, u32 *seq_size)
5db72099
JN
808{
809 u32 total = get_blocksize(sequence);
810 const u8 *data = &sequence->data[0];
811 u8 current_id;
2a33d934
JN
812 u32 current_size;
813 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
814 int index = 0;
815 int i;
816
2a33d934
JN
817 /* skip new block size */
818 if (sequence->version >= 3)
819 data += 4;
820
821 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
822 if (index + header_size > total) {
823 DRM_ERROR("Invalid sequence block (header)\n");
824 return NULL;
825 }
826
5db72099 827 current_id = *(data + index);
2a33d934
JN
828 if (sequence->version >= 3)
829 current_size = *((const u32 *)(data + index + 1));
830 else
831 current_size = *((const u16 *)(data + index + 1));
5db72099 832
2a33d934 833 index += header_size;
5db72099
JN
834
835 if (index + current_size > total) {
836 DRM_ERROR("Invalid sequence block\n");
837 return NULL;
838 }
839
840 if (current_id == panel_id) {
841 *seq_size = current_size;
842 return data + index;
843 }
844
845 index += current_size;
846 }
847
848 DRM_ERROR("Sequence block detected but no valid configuration\n");
849
850 return NULL;
851}
852
8d3ed2f3
JN
853static int goto_next_sequence(const u8 *data, int index, int total)
854{
855 u16 len;
856
857 /* Skip Sequence Byte. */
858 for (index = index + 1; index < total; index += len) {
859 u8 operation_byte = *(data + index);
860 index++;
861
862 switch (operation_byte) {
863 case MIPI_SEQ_ELEM_END:
864 return index;
865 case MIPI_SEQ_ELEM_SEND_PKT:
866 if (index + 4 > total)
867 return 0;
868
869 len = *((const u16 *)(data + index + 2)) + 4;
870 break;
871 case MIPI_SEQ_ELEM_DELAY:
872 len = 4;
873 break;
874 case MIPI_SEQ_ELEM_GPIO:
875 len = 2;
876 break;
f4d64936
JN
877 case MIPI_SEQ_ELEM_I2C:
878 if (index + 7 > total)
879 return 0;
880 len = *(data + index + 6) + 7;
881 break;
8d3ed2f3
JN
882 default:
883 DRM_ERROR("Unknown operation byte\n");
884 return 0;
885 }
886 }
887
888 return 0;
889}
890
2a33d934
JN
891static int goto_next_sequence_v3(const u8 *data, int index, int total)
892{
893 int seq_end;
894 u16 len;
6765bd6d 895 u32 size_of_sequence;
2a33d934
JN
896
897 /*
898 * Could skip sequence based on Size of Sequence alone, but also do some
899 * checking on the structure.
900 */
901 if (total < 5) {
902 DRM_ERROR("Too small sequence size\n");
903 return 0;
904 }
905
6765bd6d
JN
906 /* Skip Sequence Byte. */
907 index++;
908
909 /*
910 * Size of Sequence. Excludes the Sequence Byte and the size itself,
911 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
912 * byte.
913 */
914 size_of_sequence = *((const uint32_t *)(data + index));
915 index += 4;
916
917 seq_end = index + size_of_sequence;
2a33d934
JN
918 if (seq_end > total) {
919 DRM_ERROR("Invalid sequence size\n");
920 return 0;
921 }
922
6765bd6d 923 for (; index < total; index += len) {
2a33d934
JN
924 u8 operation_byte = *(data + index);
925 index++;
926
927 if (operation_byte == MIPI_SEQ_ELEM_END) {
928 if (index != seq_end) {
929 DRM_ERROR("Invalid element structure\n");
930 return 0;
931 }
932 return index;
933 }
934
935 len = *(data + index);
936 index++;
937
938 /*
939 * FIXME: Would be nice to check elements like for v1/v2 in
940 * goto_next_sequence() above.
941 */
942 switch (operation_byte) {
943 case MIPI_SEQ_ELEM_SEND_PKT:
944 case MIPI_SEQ_ELEM_DELAY:
945 case MIPI_SEQ_ELEM_GPIO:
946 case MIPI_SEQ_ELEM_I2C:
947 case MIPI_SEQ_ELEM_SPI:
948 case MIPI_SEQ_ELEM_PMIC:
949 break;
950 default:
951 DRM_ERROR("Unknown operation byte %u\n",
952 operation_byte);
953 break;
954 }
955 }
956
957 return 0;
958}
959
0f8689f5
JN
960static void
961parse_mipi_sequence(struct drm_i915_private *dev_priv,
962 const struct bdb_header *bdb)
963{
3e845c7a 964 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
965 const struct bdb_mipi_sequence *sequence;
966 const u8 *seq_data;
2a33d934 967 u32 seq_size;
0f8689f5 968 u8 *data;
8d3ed2f3 969 int index = 0;
0f8689f5
JN
970
971 /* Only our generic panel driver uses the sequence block. */
972 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
973 return;
d3b542fc 974
d3b542fc
SK
975 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
976 if (!sequence) {
977 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
978 return;
979 }
980
cd67d226 981 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
982 if (sequence->version >= 4) {
983 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
984 sequence->version);
cd67d226
JN
985 return;
986 }
987
2a33d934 988 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 989
5db72099
JN
990 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
991 if (!seq_data)
d3b542fc 992 return;
d3b542fc 993
8d3ed2f3
JN
994 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
995 if (!data)
d3b542fc
SK
996 return;
997
8d3ed2f3
JN
998 /* Parse the sequences, store pointers to each sequence. */
999 for (;;) {
1000 u8 seq_id = *(data + index);
1001 if (seq_id == MIPI_SEQ_END)
1002 break;
d3b542fc 1003
8d3ed2f3
JN
1004 if (seq_id >= MIPI_SEQ_MAX) {
1005 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
1006 goto err;
1007 }
1008
4b4f497e
JN
1009 /* Log about presence of sequences we won't run. */
1010 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1011 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
1012
8d3ed2f3 1013 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 1014
2a33d934
JN
1015 if (sequence->version >= 3)
1016 index = goto_next_sequence_v3(data, index, seq_size);
1017 else
1018 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
1019 if (!index) {
1020 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
1021 goto err;
1022 }
d3b542fc
SK
1023 }
1024
8d3ed2f3
JN
1025 dev_priv->vbt.dsi.data = data;
1026 dev_priv->vbt.dsi.size = seq_size;
1027 dev_priv->vbt.dsi.seq_version = sequence->version;
1028
1029 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 1030 return;
d3b542fc 1031
8d3ed2f3
JN
1032err:
1033 kfree(data);
ed3b6679 1034 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
1035}
1036
75067dde
AK
1037static u8 translate_iboost(u8 val)
1038{
1039 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1040
1041 if (val >= ARRAY_SIZE(mapping)) {
1042 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1043 return 0;
1044 }
1045 return mapping[val];
1046}
1047
9454fa87
VS
1048static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1049 enum port port)
1050{
1051 const struct ddi_vbt_port_info *info =
1052 &dev_priv->vbt.ddi_port_info[port];
1053 enum port p;
1054
1055 if (!info->alternate_ddc_pin)
1056 return;
1057
1058 for_each_port_masked(p, (1 << port) - 1) {
1059 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1060
1061 if (info->alternate_ddc_pin != i->alternate_ddc_pin)
1062 continue;
1063
1064 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1065 "disabling port %c DVI/HDMI support\n",
1066 port_name(p), i->alternate_ddc_pin,
1067 port_name(port), port_name(p));
1068
1069 /*
1070 * If we have multiple ports supposedly sharing the
1071 * pin, then dvi/hdmi couldn't exist on the shared
1072 * port. Otherwise they share the same ddc bin and
1073 * system couldn't communicate with them separately.
1074 *
1075 * Due to parsing the ports in alphabetical order,
1076 * a higher port will always clobber a lower one.
1077 */
1078 i->supports_dvi = false;
1079 i->supports_hdmi = false;
1080 i->alternate_ddc_pin = 0;
1081 }
1082}
1083
1084static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1085 enum port port)
1086{
1087 const struct ddi_vbt_port_info *info =
1088 &dev_priv->vbt.ddi_port_info[port];
1089 enum port p;
1090
1091 if (!info->alternate_aux_channel)
1092 return;
1093
1094 for_each_port_masked(p, (1 << port) - 1) {
1095 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1096
1097 if (info->alternate_aux_channel != i->alternate_aux_channel)
1098 continue;
1099
1100 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1101 "disabling port %c DP support\n",
1102 port_name(p), i->alternate_aux_channel,
1103 port_name(port), port_name(p));
1104
1105 /*
1106 * If we have multiple ports supposedlt sharing the
1107 * aux channel, then DP couldn't exist on the shared
1108 * port. Otherwise they share the same aux channel
1109 * and system couldn't communicate with them separately.
1110 *
1111 * Due to parsing the ports in alphabetical order,
1112 * a higher port will always clobber a lower one.
1113 */
1114 i->supports_dp = false;
1115 i->alternate_aux_channel = 0;
1116 }
1117}
1118
6acab15a 1119static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1120 const struct bdb_header *bdb)
6acab15a 1121{
cc998589 1122 struct child_device_config *it, *child = NULL;
6acab15a
PZ
1123 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1124 uint8_t hdmi_level_shift;
1125 int i, j;
554d6af5 1126 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1127 uint8_t aux_channel, ddc_pin;
6acab15a 1128 /* Each DDI port can have more than one value on the "DVO Port" field,
b5273d72
JN
1129 * so look for all the possible values for each port.
1130 */
2800e4c2
RV
1131 int dvo_ports[][3] = {
1132 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1133 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1134 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1135 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1136 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1137 };
1138
b5273d72
JN
1139 /*
1140 * Find the first child device to reference the port, report if more
1141 * than one found.
1142 */
6acab15a
PZ
1143 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1144 it = dev_priv->vbt.child_dev + i;
1145
2800e4c2 1146 for (j = 0; j < 3; j++) {
6acab15a
PZ
1147 if (dvo_ports[port][j] == -1)
1148 break;
1149
cc998589 1150 if (it->dvo_port == dvo_ports[port][j]) {
6acab15a 1151 if (child) {
b5273d72 1152 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
6acab15a 1153 port_name(port));
b5273d72
JN
1154 } else {
1155 child = it;
6acab15a 1156 }
6acab15a
PZ
1157 }
1158 }
1159 }
1160 if (!child)
1161 return;
1162
cc998589
JN
1163 aux_channel = child->aux_channel;
1164 ddc_pin = child->ddc_pin;
6bf19e7c 1165
cc998589
JN
1166 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1167 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1168 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1169 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1170 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1171
d27ffc1d
JN
1172 if (port == PORT_A && is_dvi) {
1173 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1174 is_hdmi ? "/HDMI" : "");
1175 is_dvi = false;
1176 is_hdmi = false;
1177 }
1178
311a2094
PZ
1179 info->supports_dvi = is_dvi;
1180 info->supports_hdmi = is_hdmi;
1181 info->supports_dp = is_dp;
a98d9c1d 1182 info->supports_edp = is_edp;
311a2094 1183
554d6af5
PZ
1184 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1185 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1186
1187 if (is_edp && is_dvi)
1188 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1189 port_name(port));
1190 if (is_crt && port != PORT_E)
1191 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1192 if (is_crt && (is_dvi || is_dp))
1193 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1194 port_name(port));
1195 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1196 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1197 if (!is_dvi && !is_dp && !is_crt)
1198 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1199 port_name(port));
1200 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1201 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1202
1203 if (is_dvi) {
9454fa87
VS
1204 info->alternate_ddc_pin = ddc_pin;
1205
75be7756
RV
1206 /*
1207 * All VBTs that we got so far for B Stepping has this
1208 * information wrong for Port D. So, let's just ignore for now.
1209 */
1210 if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
1211 port == PORT_D) {
1212 info->alternate_ddc_pin = 0;
1213 }
1214
9454fa87 1215 sanitize_ddc_pin(dev_priv, port);
6bf19e7c
PZ
1216 }
1217
1218 if (is_dp) {
9454fa87
VS
1219 info->alternate_aux_channel = aux_channel;
1220
1221 sanitize_aux_ch(dev_priv, port);
6bf19e7c
PZ
1222 }
1223
6acab15a
PZ
1224 if (bdb->version >= 158) {
1225 /* The VBT HDMI level shift values match the table we have. */
cc998589 1226 hdmi_level_shift = child->hdmi_level_shifter_value;
ce4dd49e
DL
1227 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1228 port_name(port),
1229 hdmi_level_shift);
1230 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1231 }
75067dde
AK
1232
1233 /* Parse the I_boost config for SKL and above */
cc998589 1234 if (bdb->version >= 196 && child->iboost) {
f22bb358 1235 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
75067dde
AK
1236 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1237 port_name(port), info->dp_boost_level);
f22bb358 1238 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
75067dde
AK
1239 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1240 port_name(port), info->hdmi_boost_level);
1241 }
6acab15a
PZ
1242}
1243
1244static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1245 const struct bdb_header *bdb)
6acab15a 1246{
6acab15a
PZ
1247 enum port port;
1248
348e4058 1249 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
6acab15a
PZ
1250 return;
1251
1252 if (!dev_priv->vbt.child_dev_num)
1253 return;
1254
1255 if (bdb->version < 155)
1256 return;
1257
1258 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1259 parse_ddi_port(dev_priv, port, bdb);
1260}
1261
6363ee6f
ZY
1262static void
1263parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1264 const struct bdb_header *bdb)
6363ee6f 1265{
e192839e
JN
1266 const struct bdb_general_definitions *defs;
1267 const struct child_device_config *child;
6363ee6f 1268 int i, child_device_num, count;
e2d6cf7f
DW
1269 u8 expected_size;
1270 u16 block_size;
6363ee6f 1271
e192839e
JN
1272 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1273 if (!defs) {
44834a67 1274 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1275 return;
1276 }
7244f309
VS
1277 if (bdb->version < 106) {
1278 expected_size = 22;
fa05178c 1279 } else if (bdb->version < 111) {
52b69c84
VS
1280 expected_size = 27;
1281 } else if (bdb->version < 195) {
21907e72 1282 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
e2d6cf7f
DW
1283 } else if (bdb->version == 195) {
1284 expected_size = 37;
1285 } else if (bdb->version <= 197) {
1286 expected_size = 38;
1287 } else {
1288 expected_size = 38;
e192839e 1289 BUILD_BUG_ON(sizeof(*child) < 38);
e2d6cf7f
DW
1290 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1291 bdb->version, expected_size);
1292 }
1293
e2d6cf7f 1294 /* Flag an error for unexpected size, but continue anyway. */
e192839e 1295 if (defs->child_dev_size != expected_size)
e2d6cf7f 1296 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
e192839e 1297 defs->child_dev_size, expected_size, bdb->version);
e2d6cf7f 1298
52b69c84 1299 /* The legacy sized child device config is the minimum we need. */
e192839e 1300 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
52b69c84 1301 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
e192839e 1302 defs->child_dev_size);
52b69c84
VS
1303 return;
1304 }
1305
6363ee6f 1306 /* get the block size of general definitions */
e192839e 1307 block_size = get_blocksize(defs);
6363ee6f 1308 /* get the number of child device */
e192839e 1309 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
6363ee6f
ZY
1310 count = 0;
1311 /* get the number of child device that is present */
1312 for (i = 0; i < child_device_num; i++) {
e192839e 1313 child = child_device_ptr(defs, i);
53f6b243 1314 if (!child->device_type)
6363ee6f 1315 continue;
6363ee6f
ZY
1316 count++;
1317 }
1318 if (!count) {
0206e353 1319 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1320 return;
1321 }
e192839e 1322 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
41aa3448 1323 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1324 DRM_DEBUG_KMS("No memory space for child device\n");
1325 return;
1326 }
1327
41aa3448 1328 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1329 count = 0;
1330 for (i = 0; i < child_device_num; i++) {
e192839e 1331 child = child_device_ptr(defs, i);
53f6b243 1332 if (!child->device_type)
6363ee6f 1333 continue;
3e6bd011 1334
e2d6cf7f
DW
1335 /*
1336 * Copy as much as we know (sizeof) and is available
1337 * (child_dev_size) of the child device. Accessing the data must
1338 * depend on VBT version.
1339 */
127704f5 1340 memcpy(dev_priv->vbt.child_dev + count, child,
e192839e 1341 min_t(size_t, defs->child_dev_size, sizeof(*child)));
127704f5 1342 count++;
6363ee6f 1343 }
6363ee6f 1344}
44834a67 1345
bb1d1329 1346/* Common defaults which may be overridden by VBT. */
6a04002b
SQ
1347static void
1348init_vbt_defaults(struct drm_i915_private *dev_priv)
1349{
6acab15a 1350 enum port port;
9a4114ff 1351
988c7015 1352 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1353
56c4b63a
JN
1354 /* Default to having backlight */
1355 dev_priv->vbt.backlight.present = true;
1356
6a04002b 1357 /* LFP panel data */
41aa3448
RV
1358 dev_priv->vbt.lvds_dither = 1;
1359 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1360
1361 /* SDVO panel data */
41aa3448 1362 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1363
1364 /* general features */
41aa3448
RV
1365 dev_priv->vbt.int_tv_support = 1;
1366 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1367
1368 /* Default to using SSC */
41aa3448 1369 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1370 /*
1371 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1372 * clock for LVDS.
1373 */
98f3a1dc
JN
1374 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1375 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1376 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1377
1378 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1379 struct ddi_vbt_port_info *info =
1380 &dev_priv->vbt.ddi_port_info[port];
1381
ce4dd49e 1382 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
bb1d1329
JN
1383 }
1384}
1385
1386/* Defaults to initialize only if there is no VBT. */
1387static void
1388init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1389{
1390 enum port port;
1391
1392 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1393 struct ddi_vbt_port_info *info =
1394 &dev_priv->vbt.ddi_port_info[port];
311a2094
PZ
1395
1396 info->supports_dvi = (port != PORT_A && port != PORT_E);
1397 info->supports_hdmi = info->supports_dvi;
1398 info->supports_dp = (port != PORT_E);
6acab15a 1399 }
6a04002b
SQ
1400}
1401
caf37fa4
JN
1402static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1403{
1404 const void *_vbt = vbt;
1405
1406 return _vbt + vbt->bdb_offset;
1407}
1408
f0067a31
JN
1409/**
1410 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1411 * @buf: pointer to a buffer to validate
1412 * @size: size of the buffer
1413 *
1414 * Returns true on valid VBT.
1415 */
1416bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1417{
f0067a31 1418 const struct vbt_header *vbt = buf;
dcb58a40 1419 const struct bdb_header *bdb;
3dd4e846 1420
caf37fa4 1421 if (!vbt)
f0067a31 1422 return false;
caf37fa4 1423
f0067a31 1424 if (sizeof(struct vbt_header) > size) {
3dd4e846 1425 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1426 return false;
3dd4e846
CW
1427 }
1428
1429 if (memcmp(vbt->signature, "$VBT", 4)) {
1430 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1431 return false;
3dd4e846
CW
1432 }
1433
e8f9ae9b
CW
1434 if (range_overflows_t(size_t,
1435 vbt->bdb_offset,
1436 sizeof(struct bdb_header),
1437 size)) {
3dd4e846 1438 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1439 return false;
3dd4e846
CW
1440 }
1441
caf37fa4 1442 bdb = get_bdb_header(vbt);
e8f9ae9b 1443 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3dd4e846 1444 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1445 return false;
3dd4e846
CW
1446 }
1447
caf37fa4 1448 return vbt;
3dd4e846
CW
1449}
1450
caf37fa4 1451static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1452{
b34a991a
JN
1453 size_t i;
1454
1455 /* Scour memory looking for the VBT signature. */
1456 for (i = 0; i + 4 < size; i++) {
f0067a31 1457 void *vbt;
115719fc 1458
f0067a31
JN
1459 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1460 continue;
1461
1462 /*
1463 * This is the one place where we explicitly discard the address
1464 * space (__iomem) of the BIOS/VBT.
1465 */
1466 vbt = (void __force *) bios + i;
1467 if (intel_bios_is_valid_vbt(vbt, size - i))
1468 return vbt;
1469
1470 break;
b34a991a
JN
1471 }
1472
f0067a31 1473 return NULL;
b34a991a
JN
1474}
1475
79e53945 1476/**
8b8e1a89 1477 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1478 * @dev_priv: i915 device instance
79e53945 1479 *
66578857
JN
1480 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
1481 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
1482 * initialize some defaults if the VBT is not present at all.
79e53945 1483 */
66578857 1484void intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1485{
91c8a326 1486 struct pci_dev *pdev = dev_priv->drm.pdev;
f0067a31 1487 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1488 const struct bdb_header *bdb;
44834a67
CW
1489 u8 __iomem *bios = NULL;
1490
66578857
JN
1491 if (HAS_PCH_NOP(dev_priv)) {
1492 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
1493 return;
1494 }
ab5c608b 1495
6a04002b 1496 init_vbt_defaults(dev_priv);
f899fc64 1497
66578857 1498 /* If the OpRegion does not have VBT, look in PCI ROM. */
f0067a31 1499 if (!vbt) {
b34a991a 1500 size_t size;
79e53945 1501
44834a67
CW
1502 bios = pci_map_rom(pdev, &size);
1503 if (!bios)
66578857 1504 goto out;
44834a67 1505
caf37fa4 1506 vbt = find_vbt(bios, size);
66578857
JN
1507 if (!vbt)
1508 goto out;
e2051c44
JN
1509
1510 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1511 }
79e53945 1512
caf37fa4
JN
1513 bdb = get_bdb_header(vbt);
1514
3556dd40
JN
1515 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1516 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1517
79e53945
JB
1518 /* Grab useful general definitions */
1519 parse_general_features(dev_priv, bdb);
db545019 1520 parse_general_definitions(dev_priv, bdb);
88631706 1521 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1522 parse_lfp_backlight(dev_priv, bdb);
88631706 1523 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1524 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1525 parse_device_mapping(dev_priv, bdb);
32f9d658 1526 parse_driver_features(dev_priv, bdb);
500a8cc4 1527 parse_edp(dev_priv, bdb);
bfd7ebda 1528 parse_psr(dev_priv, bdb);
0f8689f5
JN
1529 parse_mipi_config(dev_priv, bdb);
1530 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1531 parse_ddi_ports(dev_priv, bdb);
32f9d658 1532
66578857 1533out:
bb1d1329 1534 if (!vbt) {
66578857 1535 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
bb1d1329
JN
1536 init_vbt_missing_defaults(dev_priv);
1537 }
66578857 1538
44834a67
CW
1539 if (bios)
1540 pci_unmap_rom(pdev, bios);
79e53945 1541}
3bdd14d5
JN
1542
1543/**
1544 * intel_bios_is_tv_present - is integrated TV present in VBT
1545 * @dev_priv: i915 device instance
1546 *
1547 * Return true if TV is present. If no child devices were parsed from VBT,
1548 * assume TV is present.
1549 */
1550bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1551{
cc998589 1552 const struct child_device_config *child;
3bdd14d5
JN
1553 int i;
1554
1555 if (!dev_priv->vbt.int_tv_support)
1556 return false;
1557
1558 if (!dev_priv->vbt.child_dev_num)
1559 return true;
1560
1561 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1562 child = dev_priv->vbt.child_dev + i;
3bdd14d5
JN
1563 /*
1564 * If the device type is not TV, continue.
1565 */
cc998589 1566 switch (child->device_type) {
3bdd14d5
JN
1567 case DEVICE_TYPE_INT_TV:
1568 case DEVICE_TYPE_TV:
1569 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1570 break;
1571 default:
1572 continue;
1573 }
1574 /* Only when the addin_offset is non-zero, it is regarded
1575 * as present.
1576 */
cc998589 1577 if (child->addin_offset)
3bdd14d5
JN
1578 return true;
1579 }
1580
1581 return false;
1582}
5a69d13d
JN
1583
1584/**
1585 * intel_bios_is_lvds_present - is LVDS present in VBT
1586 * @dev_priv: i915 device instance
1587 * @i2c_pin: i2c pin for LVDS if present
1588 *
1589 * Return true if LVDS is present. If no child devices were parsed from VBT,
1590 * assume LVDS is present.
1591 */
1592bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1593{
cc998589 1594 const struct child_device_config *child;
5a69d13d
JN
1595 int i;
1596
1597 if (!dev_priv->vbt.child_dev_num)
1598 return true;
1599
1600 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1601 child = dev_priv->vbt.child_dev + i;
5a69d13d
JN
1602
1603 /* If the device type is not LFP, continue.
1604 * We have to check both the new identifiers as well as the
1605 * old for compatibility with some BIOSes.
1606 */
1607 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1608 child->device_type != DEVICE_TYPE_LFP)
1609 continue;
1610
1611 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1612 *i2c_pin = child->i2c_pin;
1613
1614 /* However, we cannot trust the BIOS writers to populate
1615 * the VBT correctly. Since LVDS requires additional
1616 * information from AIM blocks, a non-zero addin offset is
1617 * a good indicator that the LVDS is actually present.
1618 */
1619 if (child->addin_offset)
1620 return true;
1621
1622 /* But even then some BIOS writers perform some black magic
1623 * and instantiate the device without reference to any
1624 * additional data. Trust that if the VBT was written into
1625 * the OpRegion then they have validated the LVDS's existence.
1626 */
1627 if (dev_priv->opregion.vbt)
1628 return true;
1629 }
1630
1631 return false;
1632}
951d9efe 1633
22f35042
VS
1634/**
1635 * intel_bios_is_port_present - is the specified digital port present
1636 * @dev_priv: i915 device instance
1637 * @port: port to check
1638 *
1639 * Return true if the device in %port is present.
1640 */
1641bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1642{
cc998589 1643 const struct child_device_config *child;
22f35042
VS
1644 static const struct {
1645 u16 dp, hdmi;
1646 } port_mapping[] = {
1647 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1648 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1649 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1650 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1651 };
1652 int i;
1653
1654 /* FIXME maybe deal with port A as well? */
1655 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1656 return false;
1657
1658 if (!dev_priv->vbt.child_dev_num)
1659 return false;
1660
1661 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1662 child = dev_priv->vbt.child_dev + i;
1663
1664 if ((child->dvo_port == port_mapping[port].dp ||
1665 child->dvo_port == port_mapping[port].hdmi) &&
1666 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1667 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
22f35042
VS
1668 return true;
1669 }
1670
1671 return false;
1672}
1673
951d9efe
JN
1674/**
1675 * intel_bios_is_port_edp - is the device in given port eDP
1676 * @dev_priv: i915 device instance
1677 * @port: port to check
1678 *
1679 * Return true if the device in %port is eDP.
1680 */
1681bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1682{
cc998589 1683 const struct child_device_config *child;
951d9efe
JN
1684 static const short port_mapping[] = {
1685 [PORT_B] = DVO_PORT_DPB,
1686 [PORT_C] = DVO_PORT_DPC,
1687 [PORT_D] = DVO_PORT_DPD,
1688 [PORT_E] = DVO_PORT_DPE,
1689 };
1690 int i;
1691
a98d9c1d
ID
1692 if (HAS_DDI(dev_priv))
1693 return dev_priv->vbt.ddi_port_info[port].supports_edp;
1694
951d9efe
JN
1695 if (!dev_priv->vbt.child_dev_num)
1696 return false;
1697
1698 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1699 child = dev_priv->vbt.child_dev + i;
951d9efe 1700
cc998589
JN
1701 if (child->dvo_port == port_mapping[port] &&
1702 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
951d9efe
JN
1703 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1704 return true;
1705 }
1706
1707 return false;
1708}
7137aec1 1709
cc998589 1710static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
7a17995a 1711 enum port port)
d6199256
VS
1712{
1713 static const struct {
1714 u16 dp, hdmi;
1715 } port_mapping[] = {
1716 /*
1717 * Buggy VBTs may declare DP ports as having
1718 * HDMI type dvo_port :( So let's check both.
1719 */
1720 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1721 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1722 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1723 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1724 };
d6199256
VS
1725
1726 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1727 return false;
1728
cc998589 1729 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
7a17995a 1730 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
d6199256
VS
1731 return false;
1732
cc998589 1733 if (child->dvo_port == port_mapping[port].dp)
7a17995a
VS
1734 return true;
1735
1736 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
cc998589
JN
1737 if (child->dvo_port == port_mapping[port].hdmi &&
1738 child->aux_channel != 0)
7a17995a
VS
1739 return true;
1740
1741 return false;
1742}
1743
1744bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
1745 enum port port)
1746{
cc998589 1747 const struct child_device_config *child;
7a17995a
VS
1748 int i;
1749
d6199256 1750 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1751 child = dev_priv->vbt.child_dev + i;
d6199256 1752
cc998589 1753 if (child_dev_is_dp_dual_mode(child, port))
d6199256
VS
1754 return true;
1755 }
1756
1757 return false;
1758}
1759
7137aec1
JN
1760/**
1761 * intel_bios_is_dsi_present - is DSI present in VBT
1762 * @dev_priv: i915 device instance
1763 * @port: port for DSI if present
1764 *
1765 * Return true if DSI is present, and return the port in %port.
1766 */
1767bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1768 enum port *port)
1769{
cc998589 1770 const struct child_device_config *child;
7137aec1
JN
1771 u8 dvo_port;
1772 int i;
1773
1774 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1775 child = dev_priv->vbt.child_dev + i;
7137aec1 1776
cc998589 1777 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
7137aec1
JN
1778 continue;
1779
cc998589 1780 dvo_port = child->dvo_port;
7137aec1
JN
1781
1782 switch (dvo_port) {
1783 case DVO_PORT_MIPIA:
1784 case DVO_PORT_MIPIC:
7caaef33
JN
1785 if (port)
1786 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1787 return true;
1788 case DVO_PORT_MIPIB:
1789 case DVO_PORT_MIPID:
1790 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1791 port_name(dvo_port - DVO_PORT_MIPIA));
1792 break;
1793 }
1794 }
1795
1796 return false;
1797}
d252bf68
SS
1798
1799/**
1800 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1801 * @dev_priv: i915 device instance
1802 * @port: port to check
1803 *
1804 * Return true if HPD should be inverted for %port.
1805 */
1806bool
1807intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1808 enum port port)
1809{
cc998589 1810 const struct child_device_config *child;
d252bf68
SS
1811 int i;
1812
cc3f90f0 1813 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
d252bf68
SS
1814 return false;
1815
1816 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1817 child = dev_priv->vbt.child_dev + i;
1818
1819 if (!child->hpd_invert)
d252bf68
SS
1820 continue;
1821
cc998589 1822 switch (child->dvo_port) {
d252bf68
SS
1823 case DVO_PORT_DPA:
1824 case DVO_PORT_HDMIA:
1825 if (port == PORT_A)
1826 return true;
1827 break;
1828 case DVO_PORT_DPB:
1829 case DVO_PORT_HDMIB:
1830 if (port == PORT_B)
1831 return true;
1832 break;
1833 case DVO_PORT_DPC:
1834 case DVO_PORT_HDMIC:
1835 if (port == PORT_C)
1836 return true;
1837 break;
1838 default:
1839 break;
1840 }
1841 }
1842
1843 return false;
1844}
6389dd83
SS
1845
1846/**
1847 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
1848 * @dev_priv: i915 device instance
1849 * @port: port to check
1850 *
1851 * Return true if LSPCON is present on this port
1852 */
1853bool
1854intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
1855 enum port port)
1856{
cc998589 1857 const struct child_device_config *child;
6389dd83
SS
1858 int i;
1859
1860 if (!HAS_LSPCON(dev_priv))
1861 return false;
1862
1863 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1864 child = dev_priv->vbt.child_dev + i;
1865
1866 if (!child->lspcon)
6389dd83
SS
1867 continue;
1868
cc998589 1869 switch (child->dvo_port) {
6389dd83
SS
1870 case DVO_PORT_DPA:
1871 case DVO_PORT_HDMIA:
1872 if (port == PORT_A)
1873 return true;
1874 break;
1875 case DVO_PORT_DPB:
1876 case DVO_PORT_HDMIB:
1877 if (port == PORT_B)
1878 return true;
1879 break;
1880 case DVO_PORT_DPC:
1881 case DVO_PORT_HDMIC:
1882 if (port == PORT_C)
1883 return true;
1884 break;
1885 case DVO_PORT_DPD:
1886 case DVO_PORT_HDMID:
1887 if (port == PORT_D)
1888 return true;
1889 break;
1890 default:
1891 break;
1892 }
1893 }
1894
1895 return false;
1896}