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drm/i915: move VBT based LVDS presence check to intel_bios.c
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945
JB
31#include "i915_drv.h"
32#include "intel_bios.h"
33
dd97950a
JN
34/**
35 * DOC: Video BIOS Table (VBT)
36 *
37 * The Video BIOS Table, or VBT, provides platform and board specific
38 * configuration information to the driver that is not discoverable or available
39 * through other means. The configuration is mostly related to display
40 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
41 * the PCI ROM.
42 *
43 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
44 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
45 * contain the actual configuration information. The VBT Header, and thus the
46 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
47 * BDB Header. The data blocks are concatenated after the BDB Header. The data
48 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
49 * data. (Block 53, the MIPI Sequence Block is an exception.)
50 *
51 * The driver parses the VBT during load. The relevant information is stored in
52 * driver private data for ease of use, and the actual VBT is not read after
53 * that.
54 */
55
9b9d172d 56#define SLAVE_ADDR1 0x70
57#define SLAVE_ADDR2 0x72
79e53945 58
500a8cc4
ZW
59static int panel_type;
60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
9bc35499
AJ
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
88631706
ML
142 /* Some VBTs have bogus h/vtotal values */
143 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
144 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
145 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
146 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
147
148 drm_mode_set_name(panel_fixed_mode);
149}
150
99834ea4
CW
151static const struct lvds_dvo_timing *
152get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
153 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
154 int index)
155{
156 /*
157 * the size of fp_timing varies on the different platform.
158 * So calculate the DVO timing relative offset in LVDS data
159 * entry to get the DVO timing entry
160 */
161
162 int lfp_data_size =
163 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
164 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
165 int dvo_timing_offset =
166 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
168 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
169
170 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
171}
172
b0354385
TI
173/* get lvds_fp_timing entry
174 * this function may return NULL if the corresponding entry is invalid
175 */
176static const struct lvds_fp_timing *
177get_lvds_fp_timing(const struct bdb_header *bdb,
178 const struct bdb_lvds_lfp_data *data,
179 const struct bdb_lvds_lfp_data_ptrs *ptrs,
180 int index)
181{
182 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
183 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
184 size_t ofs;
185
186 if (index >= ARRAY_SIZE(ptrs->ptr))
187 return NULL;
188 ofs = ptrs->ptr[index].fp_timing_offset;
189 if (ofs < data_ofs ||
190 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
191 return NULL;
192 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
193}
194
88631706
ML
195/* Try to find integrated panel data */
196static void
197parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 198 const struct bdb_header *bdb)
79e53945 199{
99834ea4
CW
200 const struct bdb_lvds_options *lvds_options;
201 const struct bdb_lvds_lfp_data *lvds_lfp_data;
202 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
203 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 204 const struct lvds_fp_timing *fp_timing;
79e53945 205 struct drm_display_mode *panel_fixed_mode;
c329a4ec 206 int drrs_mode;
79e53945 207
79e53945
JB
208 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
209 if (!lvds_options)
210 return;
211
41aa3448 212 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
79e53945
JB
213 if (lvds_options->panel_type == 0xff)
214 return;
6a04002b 215
500a8cc4 216 panel_type = lvds_options->panel_type;
79e53945 217
83a7280e
PB
218 drrs_mode = (lvds_options->dps_panel_type_bits
219 >> (panel_type * 2)) & MODE_MASK;
220 /*
221 * VBT has static DRRS = 0 and seamless DRRS = 2.
222 * The below piece of code is required to adjust vbt.drrs_type
223 * to match the enum drrs_support_type.
224 */
225 switch (drrs_mode) {
226 case 0:
227 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
228 DRM_DEBUG_KMS("DRRS supported mode is static\n");
229 break;
230 case 2:
231 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
232 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
233 break;
234 default:
235 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
236 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
237 break;
238 }
239
79e53945
JB
240 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
241 if (!lvds_lfp_data)
242 return;
243
1b16de0b
JB
244 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
245 if (!lvds_lfp_data_ptrs)
246 return;
247
41aa3448 248 dev_priv->vbt.lvds_vbt = 1;
79e53945 249
99834ea4
CW
250 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
251 lvds_lfp_data_ptrs,
252 lvds_options->panel_type);
79e53945 253
9a298b2a 254 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
255 if (!panel_fixed_mode)
256 return;
79e53945 257
99834ea4 258 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 259
41aa3448 260 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 261
28c97730 262 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 263 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 264
b0354385
TI
265 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
266 lvds_lfp_data_ptrs,
267 lvds_options->panel_type);
268 if (fp_timing) {
269 /* check the resolution, just to be sure */
270 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
271 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 272 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 273 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 274 dev_priv->vbt.bios_lvds_val);
b0354385
TI
275 }
276 }
88631706
ML
277}
278
f00076d2 279static void
dcb58a40
JN
280parse_lfp_backlight(struct drm_i915_private *dev_priv,
281 const struct bdb_header *bdb)
f00076d2
JN
282{
283 const struct bdb_lfp_backlight_data *backlight_data;
284 const struct bdb_lfp_backlight_data_entry *entry;
285
286 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
287 if (!backlight_data)
288 return;
289
290 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
291 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
292 backlight_data->entry_size);
293 return;
294 }
295
296 entry = &backlight_data->data[panel_type];
297
39fbc9c8
JN
298 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
299 if (!dev_priv->vbt.backlight.present) {
300 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
301 entry->type);
302 return;
303 }
304
f00076d2
JN
305 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
306 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 307 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2
JN
308 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
309 "active %s, min brightness %u, level %u\n",
310 dev_priv->vbt.backlight.pwm_freq_hz,
311 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 312 dev_priv->vbt.backlight.min_brightness,
f00076d2
JN
313 backlight_data->level[panel_type]);
314}
315
88631706
ML
316/* Try to find sdvo panel data */
317static void
318parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 319 const struct bdb_header *bdb)
88631706 320{
e8ef3b4c 321 const struct lvds_dvo_timing *dvo_timing;
88631706 322 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 323 int index;
79e53945 324
d330a953 325 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
326 if (index == -2) {
327 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
328 return;
329 }
330
5a1e5b6c 331 if (index == -1) {
e8ef3b4c 332 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
333
334 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
335 if (!sdvo_lvds_options)
336 return;
337
338 index = sdvo_lvds_options->panel_type;
339 }
88631706
ML
340
341 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
342 if (!dvo_timing)
343 return;
344
9a298b2a 345 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
346 if (!panel_fixed_mode)
347 return;
348
5a1e5b6c 349 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 350
41aa3448 351 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 352
5a1e5b6c
CW
353 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
354 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
355}
356
98f3a1dc 357static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
358 bool alternate)
359{
98f3a1dc 360 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 361 case 2:
e91e941b 362 return alternate ? 66667 : 48000;
9a4114ff
BF
363 case 3:
364 case 4:
e91e941b 365 return alternate ? 100000 : 96000;
9a4114ff 366 default:
e91e941b 367 return alternate ? 100000 : 120000;
9a4114ff
BF
368 }
369}
370
79e53945
JB
371static void
372parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 373 const struct bdb_header *bdb)
79e53945 374{
e8ef3b4c 375 const struct bdb_general_features *general;
79e53945 376
79e53945 377 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
378 if (!general)
379 return;
380
381 dev_priv->vbt.int_tv_support = general->int_tv_support;
382 /* int_crt_support can't be trusted on earlier platforms */
383 if (bdb->version >= 155 &&
384 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
385 dev_priv->vbt.int_crt_support = general->int_crt_support;
386 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
387 dev_priv->vbt.lvds_ssc_freq =
388 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
389 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
390 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
391 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
392 dev_priv->vbt.int_tv_support,
393 dev_priv->vbt.int_crt_support,
394 dev_priv->vbt.lvds_use_ssc,
395 dev_priv->vbt.lvds_ssc_freq,
396 dev_priv->vbt.display_clock_mode,
397 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
398}
399
db545019
DMEA
400static void
401parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 402 const struct bdb_header *bdb)
db545019 403{
e8ef3b4c 404 const struct bdb_general_definitions *general;
db545019 405
db545019
DMEA
406 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
407 if (general) {
408 u16 block_size = get_blocksize(general);
409 if (block_size >= sizeof(*general)) {
410 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 411 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 412 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 413 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 414 } else {
28c97730 415 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 416 block_size);
db545019
DMEA
417 }
418 }
419}
420
e8ef3b4c
JN
421static const union child_device_config *
422child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 423{
e8ef3b4c 424 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
425}
426
9b9d172d 427static void
428parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 429 const struct bdb_header *bdb)
9b9d172d 430{
431 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 432 const struct bdb_general_definitions *p_defs;
6cc38aca 433 const struct old_child_dev_config *child; /* legacy */
9b9d172d 434 int i, child_device_num, count;
db545019 435 u16 block_size;
9b9d172d 436
437 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
438 if (!p_defs) {
44834a67 439 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 440 return;
441 }
6cc38aca
JN
442
443 /*
444 * Only parse SDVO mappings when the general definitions block child
445 * device size matches that of the *legacy* child device config
446 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 447 */
6cc38aca
JN
448 if (p_defs->child_dev_size != sizeof(*child)) {
449 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 450 return;
451 }
452 /* get the block size of general definitions */
db545019 453 block_size = get_blocksize(p_defs);
9b9d172d 454 /* get the number of child device */
455 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 456 p_defs->child_dev_size;
9b9d172d 457 count = 0;
458 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
459 child = &child_device_ptr(p_defs, i)->old;
460 if (!child->device_type) {
9b9d172d 461 /* skip the device block if device type is invalid */
462 continue;
463 }
6cc38aca
JN
464 if (child->slave_addr != SLAVE_ADDR1 &&
465 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 466 /*
467 * If the slave address is neither 0x70 nor 0x72,
468 * it is not a SDVO device. Skip it.
469 */
470 continue;
471 }
6cc38aca
JN
472 if (child->dvo_port != DEVICE_PORT_DVOB &&
473 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 474 /* skip the incorrect SDVO port */
0206e353 475 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 476 continue;
477 }
28c97730 478 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
479 " %s port\n",
480 child->slave_addr,
481 (child->dvo_port == DEVICE_PORT_DVOB) ?
482 "SDVOB" : "SDVOC");
483 p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]);
9b9d172d 484 if (!p_mapping->initialized) {
6cc38aca
JN
485 p_mapping->dvo_port = child->dvo_port;
486 p_mapping->slave_addr = child->slave_addr;
487 p_mapping->dvo_wiring = child->dvo_wiring;
488 p_mapping->ddc_pin = child->ddc_pin;
489 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 490 p_mapping->initialized = 1;
46eb3036 491 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
492 p_mapping->dvo_port,
493 p_mapping->slave_addr,
494 p_mapping->dvo_wiring,
495 p_mapping->ddc_pin,
46eb3036 496 p_mapping->i2c_pin);
9b9d172d 497 } else {
28c97730 498 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 499 "two SDVO device.\n");
500 }
6cc38aca 501 if (child->slave2_addr) {
9b9d172d 502 /* Maybe this is a SDVO device with multiple inputs */
503 /* And the mapping info is not added */
28c97730
ZY
504 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
505 " is a SDVO device with multiple inputs.\n");
9b9d172d 506 }
507 count++;
508 }
509
510 if (!count) {
511 /* No SDVO device info is found */
28c97730 512 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 513 }
514 return;
515}
32f9d658
ZW
516
517static void
518parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 519 const struct bdb_header *bdb)
32f9d658 520{
e8ef3b4c 521 const struct bdb_driver_features *driver;
32f9d658 522
32f9d658 523 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
524 if (!driver)
525 return;
526
6fca55b1 527 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
41aa3448 528 dev_priv->vbt.edp_support = 1;
652c393a 529
5ceb0f9b 530 if (driver->dual_frequency)
652c393a 531 dev_priv->render_reclock_avail = true;
83a7280e
PB
532
533 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
534 /*
535 * If DRRS is not supported, drrs_type has to be set to 0.
536 * This is because, VBT is configured in such a way that
537 * static DRRS is 0 and DRRS not supported is represented by
538 * driver->drrs_enabled=false
539 */
540 if (!driver->drrs_enabled)
541 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
542}
543
500a8cc4 544static void
dcb58a40 545parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 546{
e8ef3b4c
JN
547 const struct bdb_edp *edp;
548 const struct edp_power_seq *edp_pps;
549 const struct edp_link_params *edp_link_params;
500a8cc4
ZW
550
551 edp = find_section(bdb, BDB_EDP);
552 if (!edp) {
6fca55b1 553 if (dev_priv->vbt.edp_support)
9a30a61f 554 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
555 return;
556 }
557
558 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
559 case EDP_18BPP:
41aa3448 560 dev_priv->vbt.edp_bpp = 18;
500a8cc4
ZW
561 break;
562 case EDP_24BPP:
41aa3448 563 dev_priv->vbt.edp_bpp = 24;
500a8cc4
ZW
564 break;
565 case EDP_30BPP:
41aa3448 566 dev_priv->vbt.edp_bpp = 30;
500a8cc4
ZW
567 break;
568 }
5ceb0f9b 569
9f0e7ff4
JB
570 /* Get the eDP sequencing and link info */
571 edp_pps = &edp->power_seqs[panel_type];
572 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 573
41aa3448 574 dev_priv->vbt.edp_pps = *edp_pps;
5ceb0f9b 575
e13e2b2c
JN
576 switch (edp_link_params->rate) {
577 case EDP_RATE_1_62:
578 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
579 break;
580 case EDP_RATE_2_7:
581 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
582 break;
583 default:
584 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
585 edp_link_params->rate);
586 break;
587 }
588
9f0e7ff4 589 switch (edp_link_params->lanes) {
e13e2b2c 590 case EDP_LANE_1:
41aa3448 591 dev_priv->vbt.edp_lanes = 1;
9f0e7ff4 592 break;
e13e2b2c 593 case EDP_LANE_2:
41aa3448 594 dev_priv->vbt.edp_lanes = 2;
9f0e7ff4 595 break;
e13e2b2c 596 case EDP_LANE_4:
41aa3448 597 dev_priv->vbt.edp_lanes = 4;
9f0e7ff4 598 break;
e13e2b2c
JN
599 default:
600 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
601 edp_link_params->lanes);
602 break;
9f0e7ff4 603 }
e13e2b2c 604
9f0e7ff4 605 switch (edp_link_params->preemphasis) {
e13e2b2c 606 case EDP_PREEMPHASIS_NONE:
bd60018a 607 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 608 break;
e13e2b2c 609 case EDP_PREEMPHASIS_3_5dB:
bd60018a 610 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 611 break;
e13e2b2c 612 case EDP_PREEMPHASIS_6dB:
bd60018a 613 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 614 break;
e13e2b2c 615 case EDP_PREEMPHASIS_9_5dB:
bd60018a 616 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 617 break;
e13e2b2c
JN
618 default:
619 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
620 edp_link_params->preemphasis);
621 break;
9f0e7ff4 622 }
e13e2b2c 623
9f0e7ff4 624 switch (edp_link_params->vswing) {
e13e2b2c 625 case EDP_VSWING_0_4V:
bd60018a 626 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 627 break;
e13e2b2c 628 case EDP_VSWING_0_6V:
bd60018a 629 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 630 break;
e13e2b2c 631 case EDP_VSWING_0_8V:
bd60018a 632 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 633 break;
e13e2b2c 634 case EDP_VSWING_1_2V:
bd60018a 635 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 636 break;
e13e2b2c
JN
637 default:
638 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
639 edp_link_params->vswing);
640 break;
9f0e7ff4 641 }
9a57f5bb
SJ
642
643 if (bdb->version >= 173) {
644 uint8_t vswing;
645
9e458034
SJ
646 /* Don't read from VBT if module parameter has valid value*/
647 if (i915.edp_vswing) {
648 dev_priv->edp_low_vswing = i915.edp_vswing == 1;
649 } else {
650 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
651 dev_priv->edp_low_vswing = vswing == 0;
652 }
9a57f5bb 653 }
500a8cc4
ZW
654}
655
bfd7ebda 656static void
dcb58a40 657parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 658{
e8ef3b4c
JN
659 const struct bdb_psr *psr;
660 const struct psr_table *psr_table;
bfd7ebda
RV
661
662 psr = find_section(bdb, BDB_PSR);
663 if (!psr) {
664 DRM_DEBUG_KMS("No PSR BDB found.\n");
665 return;
666 }
667
668 psr_table = &psr->psr_table[panel_type];
669
670 dev_priv->vbt.psr.full_link = psr_table->full_link;
671 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
672
673 /* Allowed VBT values goes from 0 to 15 */
674 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
675 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
676
677 switch (psr_table->lines_to_wait) {
678 case 0:
679 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
680 break;
681 case 1:
682 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
683 break;
684 case 2:
685 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
686 break;
687 case 3:
688 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
689 break;
690 default:
691 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
692 psr_table->lines_to_wait);
693 break;
694 }
695
696 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
697 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
698}
699
d17c5443 700static void
0f8689f5
JN
701parse_mipi_config(struct drm_i915_private *dev_priv,
702 const struct bdb_header *bdb)
d17c5443 703{
e8ef3b4c 704 const struct bdb_mipi_config *start;
e8ef3b4c
JN
705 const struct mipi_config *config;
706 const struct mipi_pps_data *pps;
d3b542fc 707
3e6bd011
SK
708 /* parse MIPI blocks only if LFP type is MIPI */
709 if (!dev_priv->vbt.has_mipi)
710 return;
711
d3b542fc
SK
712 /* Initialize this to undefined indicating no generic MIPI support */
713 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
714
715 /* Block #40 is already parsed and panel_fixed_mode is
716 * stored in dev_priv->lfp_lvds_vbt_mode
717 * resuse this when needed
718 */
d17c5443 719
d3b542fc
SK
720 /* Parse #52 for panel index used from panel_type already
721 * parsed
722 */
723 start = find_section(bdb, BDB_MIPI_CONFIG);
724 if (!start) {
725 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
726 return;
727 }
728
d3b542fc
SK
729 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
730 panel_type);
731
732 /*
733 * get hold of the correct configuration block and pps data as per
734 * the panel_type as index
735 */
736 config = &start->config[panel_type];
737 pps = &start->pps[panel_type];
738
739 /* store as of now full data. Trim when we realise all is not needed */
740 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
741 if (!dev_priv->vbt.dsi.config)
742 return;
743
744 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
745 if (!dev_priv->vbt.dsi.pps) {
746 kfree(dev_priv->vbt.dsi.config);
747 return;
748 }
749
750 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 751 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
752}
753
5db72099
JN
754/* Find the sequence block and size for the given panel. */
755static const u8 *
756find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 757 u16 panel_id, u32 *seq_size)
5db72099
JN
758{
759 u32 total = get_blocksize(sequence);
760 const u8 *data = &sequence->data[0];
761 u8 current_id;
2a33d934
JN
762 u32 current_size;
763 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
764 int index = 0;
765 int i;
766
2a33d934
JN
767 /* skip new block size */
768 if (sequence->version >= 3)
769 data += 4;
770
771 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
772 if (index + header_size > total) {
773 DRM_ERROR("Invalid sequence block (header)\n");
774 return NULL;
775 }
776
5db72099 777 current_id = *(data + index);
2a33d934
JN
778 if (sequence->version >= 3)
779 current_size = *((const u32 *)(data + index + 1));
780 else
781 current_size = *((const u16 *)(data + index + 1));
5db72099 782
2a33d934 783 index += header_size;
5db72099
JN
784
785 if (index + current_size > total) {
786 DRM_ERROR("Invalid sequence block\n");
787 return NULL;
788 }
789
790 if (current_id == panel_id) {
791 *seq_size = current_size;
792 return data + index;
793 }
794
795 index += current_size;
796 }
797
798 DRM_ERROR("Sequence block detected but no valid configuration\n");
799
800 return NULL;
801}
802
8d3ed2f3
JN
803static int goto_next_sequence(const u8 *data, int index, int total)
804{
805 u16 len;
806
807 /* Skip Sequence Byte. */
808 for (index = index + 1; index < total; index += len) {
809 u8 operation_byte = *(data + index);
810 index++;
811
812 switch (operation_byte) {
813 case MIPI_SEQ_ELEM_END:
814 return index;
815 case MIPI_SEQ_ELEM_SEND_PKT:
816 if (index + 4 > total)
817 return 0;
818
819 len = *((const u16 *)(data + index + 2)) + 4;
820 break;
821 case MIPI_SEQ_ELEM_DELAY:
822 len = 4;
823 break;
824 case MIPI_SEQ_ELEM_GPIO:
825 len = 2;
826 break;
f4d64936
JN
827 case MIPI_SEQ_ELEM_I2C:
828 if (index + 7 > total)
829 return 0;
830 len = *(data + index + 6) + 7;
831 break;
8d3ed2f3
JN
832 default:
833 DRM_ERROR("Unknown operation byte\n");
834 return 0;
835 }
836 }
837
838 return 0;
839}
840
2a33d934
JN
841static int goto_next_sequence_v3(const u8 *data, int index, int total)
842{
843 int seq_end;
844 u16 len;
6765bd6d 845 u32 size_of_sequence;
2a33d934
JN
846
847 /*
848 * Could skip sequence based on Size of Sequence alone, but also do some
849 * checking on the structure.
850 */
851 if (total < 5) {
852 DRM_ERROR("Too small sequence size\n");
853 return 0;
854 }
855
6765bd6d
JN
856 /* Skip Sequence Byte. */
857 index++;
858
859 /*
860 * Size of Sequence. Excludes the Sequence Byte and the size itself,
861 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
862 * byte.
863 */
864 size_of_sequence = *((const uint32_t *)(data + index));
865 index += 4;
866
867 seq_end = index + size_of_sequence;
2a33d934
JN
868 if (seq_end > total) {
869 DRM_ERROR("Invalid sequence size\n");
870 return 0;
871 }
872
6765bd6d 873 for (; index < total; index += len) {
2a33d934
JN
874 u8 operation_byte = *(data + index);
875 index++;
876
877 if (operation_byte == MIPI_SEQ_ELEM_END) {
878 if (index != seq_end) {
879 DRM_ERROR("Invalid element structure\n");
880 return 0;
881 }
882 return index;
883 }
884
885 len = *(data + index);
886 index++;
887
888 /*
889 * FIXME: Would be nice to check elements like for v1/v2 in
890 * goto_next_sequence() above.
891 */
892 switch (operation_byte) {
893 case MIPI_SEQ_ELEM_SEND_PKT:
894 case MIPI_SEQ_ELEM_DELAY:
895 case MIPI_SEQ_ELEM_GPIO:
896 case MIPI_SEQ_ELEM_I2C:
897 case MIPI_SEQ_ELEM_SPI:
898 case MIPI_SEQ_ELEM_PMIC:
899 break;
900 default:
901 DRM_ERROR("Unknown operation byte %u\n",
902 operation_byte);
903 break;
904 }
905 }
906
907 return 0;
908}
909
0f8689f5
JN
910static void
911parse_mipi_sequence(struct drm_i915_private *dev_priv,
912 const struct bdb_header *bdb)
913{
914 const struct bdb_mipi_sequence *sequence;
915 const u8 *seq_data;
2a33d934 916 u32 seq_size;
0f8689f5 917 u8 *data;
8d3ed2f3 918 int index = 0;
0f8689f5
JN
919
920 /* Only our generic panel driver uses the sequence block. */
921 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
922 return;
d3b542fc 923
d3b542fc
SK
924 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
925 if (!sequence) {
926 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
927 return;
928 }
929
cd67d226 930 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
931 if (sequence->version >= 4) {
932 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
933 sequence->version);
cd67d226
JN
934 return;
935 }
936
2a33d934 937 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 938
5db72099
JN
939 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
940 if (!seq_data)
d3b542fc 941 return;
d3b542fc 942
8d3ed2f3
JN
943 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
944 if (!data)
d3b542fc
SK
945 return;
946
8d3ed2f3
JN
947 /* Parse the sequences, store pointers to each sequence. */
948 for (;;) {
949 u8 seq_id = *(data + index);
950 if (seq_id == MIPI_SEQ_END)
951 break;
d3b542fc 952
8d3ed2f3
JN
953 if (seq_id >= MIPI_SEQ_MAX) {
954 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
955 goto err;
956 }
957
8d3ed2f3 958 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 959
2a33d934
JN
960 if (sequence->version >= 3)
961 index = goto_next_sequence_v3(data, index, seq_size);
962 else
963 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
964 if (!index) {
965 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
966 goto err;
967 }
d3b542fc
SK
968 }
969
8d3ed2f3
JN
970 dev_priv->vbt.dsi.data = data;
971 dev_priv->vbt.dsi.size = seq_size;
972 dev_priv->vbt.dsi.seq_version = sequence->version;
973
974 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 975 return;
d3b542fc 976
8d3ed2f3
JN
977err:
978 kfree(data);
ed3b6679 979 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
980}
981
75067dde
AK
982static u8 translate_iboost(u8 val)
983{
984 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
985
986 if (val >= ARRAY_SIZE(mapping)) {
987 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
988 return 0;
989 }
990 return mapping[val];
991}
992
6acab15a 993static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 994 const struct bdb_header *bdb)
6acab15a
PZ
995{
996 union child_device_config *it, *child = NULL;
997 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
998 uint8_t hdmi_level_shift;
999 int i, j;
554d6af5 1000 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1001 uint8_t aux_channel, ddc_pin;
6acab15a
PZ
1002 /* Each DDI port can have more than one value on the "DVO Port" field,
1003 * so look for all the possible values for each port and abort if more
1004 * than one is found. */
2800e4c2
RV
1005 int dvo_ports[][3] = {
1006 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1007 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1008 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1009 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1010 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1011 };
1012
1013 /* Find the child device to use, abort if more than one found. */
1014 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1015 it = dev_priv->vbt.child_dev + i;
1016
2800e4c2 1017 for (j = 0; j < 3; j++) {
6acab15a
PZ
1018 if (dvo_ports[port][j] == -1)
1019 break;
1020
1021 if (it->common.dvo_port == dvo_ports[port][j]) {
1022 if (child) {
1023 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1024 port_name(port));
1025 return;
1026 }
1027 child = it;
1028 }
1029 }
1030 }
1031 if (!child)
1032 return;
1033
6bf19e7c 1034 aux_channel = child->raw[25];
11c1b657 1035 ddc_pin = child->common.ddc_pin;
6bf19e7c 1036
78eb06c3
VS
1037 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1038 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1039 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1040 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1041 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1042
311a2094
PZ
1043 info->supports_dvi = is_dvi;
1044 info->supports_hdmi = is_hdmi;
1045 info->supports_dp = is_dp;
1046
554d6af5
PZ
1047 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1048 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1049
1050 if (is_edp && is_dvi)
1051 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1052 port_name(port));
1053 if (is_crt && port != PORT_E)
1054 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1055 if (is_crt && (is_dvi || is_dp))
1056 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1057 port_name(port));
1058 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1059 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1060 if (!is_dvi && !is_dp && !is_crt)
1061 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1062 port_name(port));
1063 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1064 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1065
1066 if (is_dvi) {
11c1b657
XZ
1067 if (port == PORT_E) {
1068 info->alternate_ddc_pin = ddc_pin;
1069 /* if DDIE share ddc pin with other port, then
1070 * dvi/hdmi couldn't exist on the shared port.
1071 * Otherwise they share the same ddc bin and system
1072 * couldn't communicate with them seperately. */
1073 if (ddc_pin == DDC_PIN_B) {
1074 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1075 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1076 } else if (ddc_pin == DDC_PIN_C) {
1077 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1078 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1079 } else if (ddc_pin == DDC_PIN_D) {
1080 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1081 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1082 }
1083 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
6bf19e7c 1084 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
11c1b657 1085 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
6bf19e7c 1086 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
11c1b657 1087 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
6bf19e7c
PZ
1088 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1089 }
1090
1091 if (is_dp) {
500ea70d
RV
1092 if (port == PORT_E) {
1093 info->alternate_aux_channel = aux_channel;
1094 /* if DDIE share aux channel with other port, then
1095 * DP couldn't exist on the shared port. Otherwise
1096 * they share the same aux channel and system
1097 * couldn't communicate with them seperately. */
1098 if (aux_channel == DP_AUX_A)
1099 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1100 else if (aux_channel == DP_AUX_B)
1101 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1102 else if (aux_channel == DP_AUX_C)
1103 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1104 else if (aux_channel == DP_AUX_D)
1105 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1106 }
1107 else if (aux_channel == DP_AUX_A && port != PORT_A)
6bf19e7c 1108 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
500ea70d 1109 else if (aux_channel == DP_AUX_B && port != PORT_B)
6bf19e7c 1110 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
500ea70d 1111 else if (aux_channel == DP_AUX_C && port != PORT_C)
6bf19e7c 1112 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
500ea70d 1113 else if (aux_channel == DP_AUX_D && port != PORT_D)
6bf19e7c
PZ
1114 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1115 }
1116
6acab15a
PZ
1117 if (bdb->version >= 158) {
1118 /* The VBT HDMI level shift values match the table we have. */
1119 hdmi_level_shift = child->raw[7] & 0xF;
ce4dd49e
DL
1120 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1121 port_name(port),
1122 hdmi_level_shift);
1123 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1124 }
75067dde
AK
1125
1126 /* Parse the I_boost config for SKL and above */
1127 if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
1128 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1129 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1130 port_name(port), info->dp_boost_level);
1131 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1132 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1133 port_name(port), info->hdmi_boost_level);
1134 }
6acab15a
PZ
1135}
1136
1137static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1138 const struct bdb_header *bdb)
6acab15a 1139{
6acab15a
PZ
1140 enum port port;
1141
98f3a1dc 1142 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1143 return;
1144
1145 if (!dev_priv->vbt.child_dev_num)
1146 return;
1147
1148 if (bdb->version < 155)
1149 return;
1150
1151 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1152 parse_ddi_port(dev_priv, port, bdb);
1153}
1154
6363ee6f
ZY
1155static void
1156parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1157 const struct bdb_header *bdb)
6363ee6f 1158{
e8ef3b4c
JN
1159 const struct bdb_general_definitions *p_defs;
1160 const union child_device_config *p_child;
1161 union child_device_config *child_dev_ptr;
6363ee6f 1162 int i, child_device_num, count;
e2d6cf7f
DW
1163 u8 expected_size;
1164 u16 block_size;
6363ee6f
ZY
1165
1166 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1167 if (!p_defs) {
44834a67 1168 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1169 return;
1170 }
7244f309
VS
1171 if (bdb->version < 106) {
1172 expected_size = 22;
1173 } else if (bdb->version < 109) {
52b69c84
VS
1174 expected_size = 27;
1175 } else if (bdb->version < 195) {
1176 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1177 expected_size = sizeof(struct old_child_dev_config);
1178 } else if (bdb->version == 195) {
1179 expected_size = 37;
1180 } else if (bdb->version <= 197) {
1181 expected_size = 38;
1182 } else {
1183 expected_size = 38;
1184 BUILD_BUG_ON(sizeof(*p_child) < 38);
1185 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1186 bdb->version, expected_size);
1187 }
1188
e2d6cf7f
DW
1189 /* Flag an error for unexpected size, but continue anyway. */
1190 if (p_defs->child_dev_size != expected_size)
1191 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1192 p_defs->child_dev_size, expected_size, bdb->version);
1193
52b69c84
VS
1194 /* The legacy sized child device config is the minimum we need. */
1195 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1196 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1197 p_defs->child_dev_size);
1198 return;
1199 }
1200
6363ee6f
ZY
1201 /* get the block size of general definitions */
1202 block_size = get_blocksize(p_defs);
1203 /* get the number of child device */
1204 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1205 p_defs->child_dev_size;
6363ee6f
ZY
1206 count = 0;
1207 /* get the number of child device that is present */
1208 for (i = 0; i < child_device_num; i++) {
90e4f159 1209 p_child = child_device_ptr(p_defs, i);
768f69c9 1210 if (!p_child->common.device_type) {
6363ee6f
ZY
1211 /* skip the device block if device type is invalid */
1212 continue;
1213 }
1214 count++;
1215 }
1216 if (!count) {
0206e353 1217 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1218 return;
1219 }
41aa3448
RV
1220 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1221 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1222 DRM_DEBUG_KMS("No memory space for child device\n");
1223 return;
1224 }
1225
41aa3448 1226 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1227 count = 0;
1228 for (i = 0; i < child_device_num; i++) {
90e4f159 1229 p_child = child_device_ptr(p_defs, i);
768f69c9 1230 if (!p_child->common.device_type) {
6363ee6f
ZY
1231 /* skip the device block if device type is invalid */
1232 continue;
1233 }
3e6bd011
SK
1234
1235 if (p_child->common.dvo_port >= DVO_PORT_MIPIA
1236 && p_child->common.dvo_port <= DVO_PORT_MIPID
1237 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
1238 DRM_DEBUG_KMS("Found MIPI as LFP\n");
1239 dev_priv->vbt.has_mipi = 1;
1240 dev_priv->vbt.dsi.port = p_child->common.dvo_port;
1241 }
1242
41aa3448 1243 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1244 count++;
e2d6cf7f
DW
1245
1246 /*
1247 * Copy as much as we know (sizeof) and is available
1248 * (child_dev_size) of the child device. Accessing the data must
1249 * depend on VBT version.
1250 */
1251 memcpy(child_dev_ptr, p_child,
1252 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
6363ee6f
ZY
1253 }
1254 return;
1255}
44834a67 1256
6a04002b
SQ
1257static void
1258init_vbt_defaults(struct drm_i915_private *dev_priv)
1259{
6acab15a 1260 enum port port;
9a4114ff 1261
988c7015 1262 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1263
56c4b63a
JN
1264 /* Default to having backlight */
1265 dev_priv->vbt.backlight.present = true;
1266
6a04002b 1267 /* LFP panel data */
41aa3448
RV
1268 dev_priv->vbt.lvds_dither = 1;
1269 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1270
1271 /* SDVO panel data */
41aa3448 1272 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1273
1274 /* general features */
41aa3448
RV
1275 dev_priv->vbt.int_tv_support = 1;
1276 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1277
1278 /* Default to using SSC */
41aa3448 1279 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1280 /*
1281 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1282 * clock for LVDS.
1283 */
98f3a1dc
JN
1284 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1285 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1286 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1287
1288 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1289 struct ddi_vbt_port_info *info =
1290 &dev_priv->vbt.ddi_port_info[port];
1291
ce4dd49e 1292 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
311a2094
PZ
1293
1294 info->supports_dvi = (port != PORT_A && port != PORT_E);
1295 info->supports_hdmi = info->supports_dvi;
1296 info->supports_dp = (port != PORT_E);
6acab15a 1297 }
6a04002b
SQ
1298}
1299
caf37fa4
JN
1300static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1301{
1302 const void *_vbt = vbt;
1303
1304 return _vbt + vbt->bdb_offset;
1305}
1306
f0067a31
JN
1307/**
1308 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1309 * @buf: pointer to a buffer to validate
1310 * @size: size of the buffer
1311 *
1312 * Returns true on valid VBT.
1313 */
1314bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1315{
f0067a31 1316 const struct vbt_header *vbt = buf;
dcb58a40 1317 const struct bdb_header *bdb;
3dd4e846 1318
caf37fa4 1319 if (!vbt)
f0067a31 1320 return false;
caf37fa4 1321
f0067a31 1322 if (sizeof(struct vbt_header) > size) {
3dd4e846 1323 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1324 return false;
3dd4e846
CW
1325 }
1326
1327 if (memcmp(vbt->signature, "$VBT", 4)) {
1328 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1329 return false;
3dd4e846
CW
1330 }
1331
f0067a31 1332 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
3dd4e846 1333 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1334 return false;
3dd4e846
CW
1335 }
1336
caf37fa4 1337 bdb = get_bdb_header(vbt);
f0067a31 1338 if (vbt->bdb_offset + bdb->bdb_size > size) {
3dd4e846 1339 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1340 return false;
3dd4e846
CW
1341 }
1342
caf37fa4 1343 return vbt;
3dd4e846
CW
1344}
1345
caf37fa4 1346static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1347{
b34a991a
JN
1348 size_t i;
1349
1350 /* Scour memory looking for the VBT signature. */
1351 for (i = 0; i + 4 < size; i++) {
f0067a31 1352 void *vbt;
115719fc 1353
f0067a31
JN
1354 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1355 continue;
1356
1357 /*
1358 * This is the one place where we explicitly discard the address
1359 * space (__iomem) of the BIOS/VBT.
1360 */
1361 vbt = (void __force *) bios + i;
1362 if (intel_bios_is_valid_vbt(vbt, size - i))
1363 return vbt;
1364
1365 break;
b34a991a
JN
1366 }
1367
f0067a31 1368 return NULL;
b34a991a
JN
1369}
1370
79e53945 1371/**
8b8e1a89 1372 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1373 * @dev_priv: i915 device instance
79e53945
JB
1374 *
1375 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1376 * to appropriate values.
1377 *
79e53945
JB
1378 * Returns 0 on success, nonzero on failure.
1379 */
0317c6ce 1380int
98f3a1dc 1381intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1382{
98f3a1dc 1383 struct pci_dev *pdev = dev_priv->dev->pdev;
f0067a31 1384 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1385 const struct bdb_header *bdb;
44834a67
CW
1386 u8 __iomem *bios = NULL;
1387
98f3a1dc 1388 if (HAS_PCH_NOP(dev_priv))
ab5c608b
BW
1389 return -ENODEV;
1390
6a04002b 1391 init_vbt_defaults(dev_priv);
f899fc64 1392
f0067a31 1393 if (!vbt) {
b34a991a 1394 size_t size;
79e53945 1395
44834a67
CW
1396 bios = pci_map_rom(pdev, &size);
1397 if (!bios)
1398 return -1;
1399
caf37fa4
JN
1400 vbt = find_vbt(bios, size);
1401 if (!vbt) {
44834a67
CW
1402 pci_unmap_rom(pdev, bios);
1403 return -1;
1404 }
e2051c44
JN
1405
1406 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1407 }
79e53945 1408
caf37fa4
JN
1409 bdb = get_bdb_header(vbt);
1410
3556dd40
JN
1411 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1412 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1413
79e53945
JB
1414 /* Grab useful general definitions */
1415 parse_general_features(dev_priv, bdb);
db545019 1416 parse_general_definitions(dev_priv, bdb);
88631706 1417 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1418 parse_lfp_backlight(dev_priv, bdb);
88631706 1419 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1420 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1421 parse_device_mapping(dev_priv, bdb);
32f9d658 1422 parse_driver_features(dev_priv, bdb);
500a8cc4 1423 parse_edp(dev_priv, bdb);
bfd7ebda 1424 parse_psr(dev_priv, bdb);
0f8689f5
JN
1425 parse_mipi_config(dev_priv, bdb);
1426 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1427 parse_ddi_ports(dev_priv, bdb);
32f9d658 1428
44834a67
CW
1429 if (bios)
1430 pci_unmap_rom(pdev, bios);
79e53945
JB
1431
1432 return 0;
1433}
3bdd14d5
JN
1434
1435/**
1436 * intel_bios_is_tv_present - is integrated TV present in VBT
1437 * @dev_priv: i915 device instance
1438 *
1439 * Return true if TV is present. If no child devices were parsed from VBT,
1440 * assume TV is present.
1441 */
1442bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1443{
1444 union child_device_config *p_child;
1445 int i;
1446
1447 if (!dev_priv->vbt.int_tv_support)
1448 return false;
1449
1450 if (!dev_priv->vbt.child_dev_num)
1451 return true;
1452
1453 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1454 p_child = dev_priv->vbt.child_dev + i;
1455 /*
1456 * If the device type is not TV, continue.
1457 */
1458 switch (p_child->old.device_type) {
1459 case DEVICE_TYPE_INT_TV:
1460 case DEVICE_TYPE_TV:
1461 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1462 break;
1463 default:
1464 continue;
1465 }
1466 /* Only when the addin_offset is non-zero, it is regarded
1467 * as present.
1468 */
1469 if (p_child->old.addin_offset)
1470 return true;
1471 }
1472
1473 return false;
1474}
5a69d13d
JN
1475
1476/**
1477 * intel_bios_is_lvds_present - is LVDS present in VBT
1478 * @dev_priv: i915 device instance
1479 * @i2c_pin: i2c pin for LVDS if present
1480 *
1481 * Return true if LVDS is present. If no child devices were parsed from VBT,
1482 * assume LVDS is present.
1483 */
1484bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1485{
1486 int i;
1487
1488 if (!dev_priv->vbt.child_dev_num)
1489 return true;
1490
1491 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1492 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1493 struct old_child_dev_config *child = &uchild->old;
1494
1495 /* If the device type is not LFP, continue.
1496 * We have to check both the new identifiers as well as the
1497 * old for compatibility with some BIOSes.
1498 */
1499 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1500 child->device_type != DEVICE_TYPE_LFP)
1501 continue;
1502
1503 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1504 *i2c_pin = child->i2c_pin;
1505
1506 /* However, we cannot trust the BIOS writers to populate
1507 * the VBT correctly. Since LVDS requires additional
1508 * information from AIM blocks, a non-zero addin offset is
1509 * a good indicator that the LVDS is actually present.
1510 */
1511 if (child->addin_offset)
1512 return true;
1513
1514 /* But even then some BIOS writers perform some black magic
1515 * and instantiate the device without reference to any
1516 * additional data. Trust that if the VBT was written into
1517 * the OpRegion then they have validated the LVDS's existence.
1518 */
1519 if (dev_priv->opregion.vbt)
1520 return true;
1521 }
1522
1523 return false;
1524}