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drm/i915/bios: merge parse_device_mapping() into parse_general_definitions()
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
ce2e87b4
VT
117 ((dvo_timing->hsync_pulse_width_hi << 8) |
118 dvo_timing->hsync_pulse_width_lo);
88631706
ML
119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
120 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
121
122 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
123 dvo_timing->vactive_lo;
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
ce2e87b4 125 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
88631706 126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
ce2e87b4
VT
127 ((dvo_timing->vsync_pulse_width_hi << 4) |
128 dvo_timing->vsync_pulse_width_lo);
88631706
ML
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
9bc35499
AJ
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
df457245
VS
144 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
145 dvo_timing->himage_lo;
146 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
147 dvo_timing->vimage_lo;
148
88631706
ML
149 /* Some VBTs have bogus h/vtotal values */
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
154
155 drm_mode_set_name(panel_fixed_mode);
156}
157
99834ea4
CW
158static const struct lvds_dvo_timing *
159get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
160 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
161 int index)
162{
163 /*
164 * the size of fp_timing varies on the different platform.
165 * So calculate the DVO timing relative offset in LVDS data
166 * entry to get the DVO timing entry
167 */
168
169 int lfp_data_size =
170 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
172 int dvo_timing_offset =
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
175 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
176
177 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178}
179
b0354385
TI
180/* get lvds_fp_timing entry
181 * this function may return NULL if the corresponding entry is invalid
182 */
183static const struct lvds_fp_timing *
184get_lvds_fp_timing(const struct bdb_header *bdb,
185 const struct bdb_lvds_lfp_data *data,
186 const struct bdb_lvds_lfp_data_ptrs *ptrs,
187 int index)
188{
189 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
190 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
191 size_t ofs;
192
193 if (index >= ARRAY_SIZE(ptrs->ptr))
194 return NULL;
195 ofs = ptrs->ptr[index].fp_timing_offset;
196 if (ofs < data_ofs ||
197 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
198 return NULL;
199 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
200}
201
88631706
ML
202/* Try to find integrated panel data */
203static void
204parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 205 const struct bdb_header *bdb)
79e53945 206{
99834ea4
CW
207 const struct bdb_lvds_options *lvds_options;
208 const struct bdb_lvds_lfp_data *lvds_lfp_data;
209 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
210 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 211 const struct lvds_fp_timing *fp_timing;
79e53945 212 struct drm_display_mode *panel_fixed_mode;
3e845c7a 213 int panel_type;
c329a4ec 214 int drrs_mode;
a0562819 215 int ret;
79e53945 216
79e53945
JB
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
41aa3448 221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819 222
6f9f4b7a 223 ret = intel_opregion_get_panel_type(dev_priv);
a0562819
VS
224 if (ret >= 0) {
225 WARN_ON(ret > 0xf);
226 panel_type = ret;
227 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
228 } else {
229 if (lvds_options->panel_type > 0xf) {
230 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
231 lvds_options->panel_type);
232 return;
233 }
234 panel_type = lvds_options->panel_type;
235 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 236 }
6a04002b 237
3e845c7a 238 dev_priv->vbt.panel_type = panel_type;
79e53945 239
83a7280e
PB
240 drrs_mode = (lvds_options->dps_panel_type_bits
241 >> (panel_type * 2)) & MODE_MASK;
242 /*
243 * VBT has static DRRS = 0 and seamless DRRS = 2.
244 * The below piece of code is required to adjust vbt.drrs_type
245 * to match the enum drrs_support_type.
246 */
247 switch (drrs_mode) {
248 case 0:
249 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
250 DRM_DEBUG_KMS("DRRS supported mode is static\n");
251 break;
252 case 2:
253 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
254 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
255 break;
256 default:
257 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
258 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
259 break;
260 }
261
79e53945
JB
262 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
263 if (!lvds_lfp_data)
264 return;
265
1b16de0b
JB
266 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
267 if (!lvds_lfp_data_ptrs)
268 return;
269
41aa3448 270 dev_priv->vbt.lvds_vbt = 1;
79e53945 271
99834ea4
CW
272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
273 lvds_lfp_data_ptrs,
3e845c7a 274 panel_type);
79e53945 275
9a298b2a 276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
277 if (!panel_fixed_mode)
278 return;
79e53945 279
99834ea4 280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 281
41aa3448 282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 283
28c97730 284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 285 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 286
b0354385
TI
287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
288 lvds_lfp_data_ptrs,
3e845c7a 289 panel_type);
b0354385
TI
290 if (fp_timing) {
291 /* check the resolution, just to be sure */
292 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
293 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 296 dev_priv->vbt.bios_lvds_val);
b0354385
TI
297 }
298 }
88631706
ML
299}
300
f00076d2 301static void
dcb58a40
JN
302parse_lfp_backlight(struct drm_i915_private *dev_priv,
303 const struct bdb_header *bdb)
f00076d2
JN
304{
305 const struct bdb_lfp_backlight_data *backlight_data;
306 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 307 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
308
309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
310 if (!backlight_data)
311 return;
312
313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
315 backlight_data->entry_size);
316 return;
317 }
318
319 entry = &backlight_data->data[panel_type];
320
39fbc9c8
JN
321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
322 if (!dev_priv->vbt.backlight.present) {
323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
324 entry->type);
325 return;
326 }
327
9a41e17d
D
328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
329 if (bdb->version >= 191 &&
330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
331 const struct bdb_lfp_backlight_control_method *method;
332
333 method = &backlight_data->backlight_control[panel_type];
334 dev_priv->vbt.backlight.type = method->type;
add03379 335 dev_priv->vbt.backlight.controller = method->controller;
9a41e17d
D
336 }
337
f00076d2
JN
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2 341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
add03379 342 "active %s, min brightness %u, level %u, controller %u\n",
f00076d2
JN
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 345 dev_priv->vbt.backlight.min_brightness,
add03379
VS
346 backlight_data->level[panel_type],
347 dev_priv->vbt.backlight.controller);
f00076d2
JN
348}
349
88631706
ML
350/* Try to find sdvo panel data */
351static void
352parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 353 const struct bdb_header *bdb)
88631706 354{
e8ef3b4c 355 const struct lvds_dvo_timing *dvo_timing;
88631706 356 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 357 int index;
79e53945 358
4f044a88 359 index = i915_modparams.vbt_sdvo_panel_type;
c10e408a
MF
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
5a1e5b6c 365 if (index == -1) {
e8ef3b4c 366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
88631706
ML
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
9a298b2a 379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
380 if (!panel_fixed_mode)
381 return;
382
5a1e5b6c 383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 384
41aa3448 385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 386
5a1e5b6c
CW
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
389}
390
98f3a1dc 391static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
392 bool alternate)
393{
98f3a1dc 394 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 395 case 2:
e91e941b 396 return alternate ? 66667 : 48000;
9a4114ff
BF
397 case 3:
398 case 4:
e91e941b 399 return alternate ? 100000 : 96000;
9a4114ff 400 default:
e91e941b 401 return alternate ? 100000 : 120000;
9a4114ff
BF
402 }
403}
404
79e53945
JB
405static void
406parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 407 const struct bdb_header *bdb)
79e53945 408{
e8ef3b4c 409 const struct bdb_general_features *general;
79e53945 410
79e53945 411 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
412 if (!general)
413 return;
414
415 dev_priv->vbt.int_tv_support = general->int_tv_support;
416 /* int_crt_support can't be trusted on earlier platforms */
417 if (bdb->version >= 155 &&
418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
419 dev_priv->vbt.int_crt_support = general->int_crt_support;
420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
421 dev_priv->vbt.lvds_ssc_freq =
422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
423 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
425 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
426 dev_priv->vbt.int_tv_support,
427 dev_priv->vbt.int_crt_support,
428 dev_priv->vbt.lvds_use_ssc,
429 dev_priv->vbt.lvds_ssc_freq,
430 dev_priv->vbt.display_clock_mode,
431 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
432}
433
cc998589 434static const struct child_device_config *
e192839e 435child_device_ptr(const struct bdb_general_definitions *defs, int i)
90e4f159 436{
e192839e 437 return (const void *) &defs->devices[i * defs->child_dev_size];
90e4f159
VS
438}
439
9b9d172d 440static void
441parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 442 const struct bdb_header *bdb)
9b9d172d 443{
e192839e
JN
444 struct sdvo_device_mapping *mapping;
445 const struct bdb_general_definitions *defs;
cc998589 446 const struct child_device_config *child;
9b9d172d 447 int i, child_device_num, count;
db545019 448 u16 block_size;
9b9d172d 449
e192839e
JN
450 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
451 if (!defs) {
44834a67 452 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 453 return;
454 }
6cc38aca
JN
455
456 /*
457 * Only parse SDVO mappings when the general definitions block child
458 * device size matches that of the *legacy* child device config
459 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 460 */
e192839e 461 if (defs->child_dev_size != LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
6cc38aca 462 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 463 return;
464 }
465 /* get the block size of general definitions */
e192839e 466 block_size = get_blocksize(defs);
9b9d172d 467 /* get the number of child device */
e192839e 468 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
9b9d172d 469 count = 0;
470 for (i = 0; i < child_device_num; i++) {
e192839e 471 child = child_device_ptr(defs, i);
6cc38aca 472 if (!child->device_type) {
9b9d172d 473 /* skip the device block if device type is invalid */
474 continue;
475 }
6cc38aca
JN
476 if (child->slave_addr != SLAVE_ADDR1 &&
477 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 478 /*
479 * If the slave address is neither 0x70 nor 0x72,
480 * it is not a SDVO device. Skip it.
481 */
482 continue;
483 }
6cc38aca
JN
484 if (child->dvo_port != DEVICE_PORT_DVOB &&
485 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 486 /* skip the incorrect SDVO port */
0206e353 487 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 488 continue;
489 }
28c97730 490 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
491 " %s port\n",
492 child->slave_addr,
493 (child->dvo_port == DEVICE_PORT_DVOB) ?
494 "SDVOB" : "SDVOC");
e192839e
JN
495 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
496 if (!mapping->initialized) {
497 mapping->dvo_port = child->dvo_port;
498 mapping->slave_addr = child->slave_addr;
499 mapping->dvo_wiring = child->dvo_wiring;
500 mapping->ddc_pin = child->ddc_pin;
501 mapping->i2c_pin = child->i2c_pin;
502 mapping->initialized = 1;
46eb3036 503 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e192839e
JN
504 mapping->dvo_port,
505 mapping->slave_addr,
506 mapping->dvo_wiring,
507 mapping->ddc_pin,
508 mapping->i2c_pin);
9b9d172d 509 } else {
28c97730 510 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 511 "two SDVO device.\n");
512 }
6cc38aca 513 if (child->slave2_addr) {
9b9d172d 514 /* Maybe this is a SDVO device with multiple inputs */
515 /* And the mapping info is not added */
28c97730
ZY
516 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
517 " is a SDVO device with multiple inputs.\n");
9b9d172d 518 }
519 count++;
520 }
521
522 if (!count) {
523 /* No SDVO device info is found */
28c97730 524 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 525 }
526 return;
527}
32f9d658
ZW
528
529static void
530parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 531 const struct bdb_header *bdb)
32f9d658 532{
e8ef3b4c 533 const struct bdb_driver_features *driver;
32f9d658 534
32f9d658 535 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
536 if (!driver)
537 return;
538
6fca55b1 539 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 540 dev_priv->vbt.edp.support = 1;
652c393a 541
83a7280e
PB
542 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
543 /*
544 * If DRRS is not supported, drrs_type has to be set to 0.
545 * This is because, VBT is configured in such a way that
546 * static DRRS is 0 and DRRS not supported is represented by
547 * driver->drrs_enabled=false
548 */
549 if (!driver->drrs_enabled)
550 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
551}
552
500a8cc4 553static void
dcb58a40 554parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 555{
e8ef3b4c
JN
556 const struct bdb_edp *edp;
557 const struct edp_power_seq *edp_pps;
058727ee 558 const struct edp_fast_link_params *edp_link_params;
3e845c7a 559 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
560
561 edp = find_section(bdb, BDB_EDP);
562 if (!edp) {
6aa23e65 563 if (dev_priv->vbt.edp.support)
9a30a61f 564 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
565 return;
566 }
567
568 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
569 case EDP_18BPP:
6aa23e65 570 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
571 break;
572 case EDP_24BPP:
6aa23e65 573 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
574 break;
575 case EDP_30BPP:
6aa23e65 576 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
577 break;
578 }
5ceb0f9b 579
9f0e7ff4
JB
580 /* Get the eDP sequencing and link info */
581 edp_pps = &edp->power_seqs[panel_type];
058727ee 582 edp_link_params = &edp->fast_link_params[panel_type];
5ceb0f9b 583
6aa23e65 584 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 585
e13e2b2c
JN
586 switch (edp_link_params->rate) {
587 case EDP_RATE_1_62:
6aa23e65 588 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
589 break;
590 case EDP_RATE_2_7:
6aa23e65 591 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
592 break;
593 default:
594 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
595 edp_link_params->rate);
596 break;
597 }
598
9f0e7ff4 599 switch (edp_link_params->lanes) {
e13e2b2c 600 case EDP_LANE_1:
6aa23e65 601 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 602 break;
e13e2b2c 603 case EDP_LANE_2:
6aa23e65 604 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 605 break;
e13e2b2c 606 case EDP_LANE_4:
6aa23e65 607 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 608 break;
e13e2b2c
JN
609 default:
610 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
611 edp_link_params->lanes);
612 break;
9f0e7ff4 613 }
e13e2b2c 614
9f0e7ff4 615 switch (edp_link_params->preemphasis) {
e13e2b2c 616 case EDP_PREEMPHASIS_NONE:
6aa23e65 617 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 618 break;
e13e2b2c 619 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 620 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 621 break;
e13e2b2c 622 case EDP_PREEMPHASIS_6dB:
6aa23e65 623 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 624 break;
e13e2b2c 625 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 626 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 627 break;
e13e2b2c
JN
628 default:
629 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
630 edp_link_params->preemphasis);
631 break;
9f0e7ff4 632 }
e13e2b2c 633
9f0e7ff4 634 switch (edp_link_params->vswing) {
e13e2b2c 635 case EDP_VSWING_0_4V:
6aa23e65 636 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 637 break;
e13e2b2c 638 case EDP_VSWING_0_6V:
6aa23e65 639 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 640 break;
e13e2b2c 641 case EDP_VSWING_0_8V:
6aa23e65 642 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 643 break;
e13e2b2c 644 case EDP_VSWING_1_2V:
6aa23e65 645 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 646 break;
e13e2b2c
JN
647 default:
648 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
649 edp_link_params->vswing);
650 break;
9f0e7ff4 651 }
9a57f5bb
SJ
652
653 if (bdb->version >= 173) {
654 uint8_t vswing;
655
9e458034 656 /* Don't read from VBT if module parameter has valid value*/
4f044a88
MW
657 if (i915_modparams.edp_vswing) {
658 dev_priv->vbt.edp.low_vswing =
659 i915_modparams.edp_vswing == 1;
9e458034
SJ
660 } else {
661 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 662 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 663 }
9a57f5bb 664 }
500a8cc4
ZW
665}
666
bfd7ebda 667static void
dcb58a40 668parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 669{
e8ef3b4c
JN
670 const struct bdb_psr *psr;
671 const struct psr_table *psr_table;
3e845c7a 672 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
673
674 psr = find_section(bdb, BDB_PSR);
675 if (!psr) {
676 DRM_DEBUG_KMS("No PSR BDB found.\n");
677 return;
678 }
679
680 psr_table = &psr->psr_table[panel_type];
681
682 dev_priv->vbt.psr.full_link = psr_table->full_link;
683 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
684
685 /* Allowed VBT values goes from 0 to 15 */
686 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
687 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
688
689 switch (psr_table->lines_to_wait) {
690 case 0:
691 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
692 break;
693 case 1:
694 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
695 break;
696 case 2:
697 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
698 break;
699 case 3:
700 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
701 break;
702 default:
703 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
704 psr_table->lines_to_wait);
705 break;
706 }
707
708 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
709 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
710}
711
d17c5443 712static void
0f8689f5
JN
713parse_mipi_config(struct drm_i915_private *dev_priv,
714 const struct bdb_header *bdb)
d17c5443 715{
e8ef3b4c 716 const struct bdb_mipi_config *start;
e8ef3b4c
JN
717 const struct mipi_config *config;
718 const struct mipi_pps_data *pps;
3e845c7a 719 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 720
3e6bd011 721 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 722 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
723 return;
724
d3b542fc
SK
725 /* Initialize this to undefined indicating no generic MIPI support */
726 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
727
728 /* Block #40 is already parsed and panel_fixed_mode is
729 * stored in dev_priv->lfp_lvds_vbt_mode
730 * resuse this when needed
731 */
d17c5443 732
d3b542fc
SK
733 /* Parse #52 for panel index used from panel_type already
734 * parsed
735 */
736 start = find_section(bdb, BDB_MIPI_CONFIG);
737 if (!start) {
738 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
739 return;
740 }
741
d3b542fc
SK
742 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
743 panel_type);
744
745 /*
746 * get hold of the correct configuration block and pps data as per
747 * the panel_type as index
748 */
749 config = &start->config[panel_type];
750 pps = &start->pps[panel_type];
751
752 /* store as of now full data. Trim when we realise all is not needed */
753 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
754 if (!dev_priv->vbt.dsi.config)
755 return;
756
757 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
758 if (!dev_priv->vbt.dsi.pps) {
759 kfree(dev_priv->vbt.dsi.config);
760 return;
761 }
762
9f7c5b17
D
763 /*
764 * These fields are introduced from the VBT version 197 onwards,
765 * so making sure that these bits are set zero in the previous
766 * versions.
767 */
768 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
769 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
770 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
771 }
772
d3b542fc 773 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 774 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
775}
776
5db72099
JN
777/* Find the sequence block and size for the given panel. */
778static const u8 *
779find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 780 u16 panel_id, u32 *seq_size)
5db72099
JN
781{
782 u32 total = get_blocksize(sequence);
783 const u8 *data = &sequence->data[0];
784 u8 current_id;
2a33d934
JN
785 u32 current_size;
786 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
787 int index = 0;
788 int i;
789
2a33d934
JN
790 /* skip new block size */
791 if (sequence->version >= 3)
792 data += 4;
793
794 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
795 if (index + header_size > total) {
796 DRM_ERROR("Invalid sequence block (header)\n");
797 return NULL;
798 }
799
5db72099 800 current_id = *(data + index);
2a33d934
JN
801 if (sequence->version >= 3)
802 current_size = *((const u32 *)(data + index + 1));
803 else
804 current_size = *((const u16 *)(data + index + 1));
5db72099 805
2a33d934 806 index += header_size;
5db72099
JN
807
808 if (index + current_size > total) {
809 DRM_ERROR("Invalid sequence block\n");
810 return NULL;
811 }
812
813 if (current_id == panel_id) {
814 *seq_size = current_size;
815 return data + index;
816 }
817
818 index += current_size;
819 }
820
821 DRM_ERROR("Sequence block detected but no valid configuration\n");
822
823 return NULL;
824}
825
8d3ed2f3
JN
826static int goto_next_sequence(const u8 *data, int index, int total)
827{
828 u16 len;
829
830 /* Skip Sequence Byte. */
831 for (index = index + 1; index < total; index += len) {
832 u8 operation_byte = *(data + index);
833 index++;
834
835 switch (operation_byte) {
836 case MIPI_SEQ_ELEM_END:
837 return index;
838 case MIPI_SEQ_ELEM_SEND_PKT:
839 if (index + 4 > total)
840 return 0;
841
842 len = *((const u16 *)(data + index + 2)) + 4;
843 break;
844 case MIPI_SEQ_ELEM_DELAY:
845 len = 4;
846 break;
847 case MIPI_SEQ_ELEM_GPIO:
848 len = 2;
849 break;
f4d64936
JN
850 case MIPI_SEQ_ELEM_I2C:
851 if (index + 7 > total)
852 return 0;
853 len = *(data + index + 6) + 7;
854 break;
8d3ed2f3
JN
855 default:
856 DRM_ERROR("Unknown operation byte\n");
857 return 0;
858 }
859 }
860
861 return 0;
862}
863
2a33d934
JN
864static int goto_next_sequence_v3(const u8 *data, int index, int total)
865{
866 int seq_end;
867 u16 len;
6765bd6d 868 u32 size_of_sequence;
2a33d934
JN
869
870 /*
871 * Could skip sequence based on Size of Sequence alone, but also do some
872 * checking on the structure.
873 */
874 if (total < 5) {
875 DRM_ERROR("Too small sequence size\n");
876 return 0;
877 }
878
6765bd6d
JN
879 /* Skip Sequence Byte. */
880 index++;
881
882 /*
883 * Size of Sequence. Excludes the Sequence Byte and the size itself,
884 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
885 * byte.
886 */
887 size_of_sequence = *((const uint32_t *)(data + index));
888 index += 4;
889
890 seq_end = index + size_of_sequence;
2a33d934
JN
891 if (seq_end > total) {
892 DRM_ERROR("Invalid sequence size\n");
893 return 0;
894 }
895
6765bd6d 896 for (; index < total; index += len) {
2a33d934
JN
897 u8 operation_byte = *(data + index);
898 index++;
899
900 if (operation_byte == MIPI_SEQ_ELEM_END) {
901 if (index != seq_end) {
902 DRM_ERROR("Invalid element structure\n");
903 return 0;
904 }
905 return index;
906 }
907
908 len = *(data + index);
909 index++;
910
911 /*
912 * FIXME: Would be nice to check elements like for v1/v2 in
913 * goto_next_sequence() above.
914 */
915 switch (operation_byte) {
916 case MIPI_SEQ_ELEM_SEND_PKT:
917 case MIPI_SEQ_ELEM_DELAY:
918 case MIPI_SEQ_ELEM_GPIO:
919 case MIPI_SEQ_ELEM_I2C:
920 case MIPI_SEQ_ELEM_SPI:
921 case MIPI_SEQ_ELEM_PMIC:
922 break;
923 default:
924 DRM_ERROR("Unknown operation byte %u\n",
925 operation_byte);
926 break;
927 }
928 }
929
930 return 0;
931}
932
0f8689f5
JN
933static void
934parse_mipi_sequence(struct drm_i915_private *dev_priv,
935 const struct bdb_header *bdb)
936{
3e845c7a 937 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
938 const struct bdb_mipi_sequence *sequence;
939 const u8 *seq_data;
2a33d934 940 u32 seq_size;
0f8689f5 941 u8 *data;
8d3ed2f3 942 int index = 0;
0f8689f5
JN
943
944 /* Only our generic panel driver uses the sequence block. */
945 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
946 return;
d3b542fc 947
d3b542fc
SK
948 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
949 if (!sequence) {
950 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
951 return;
952 }
953
cd67d226 954 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
955 if (sequence->version >= 4) {
956 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
957 sequence->version);
cd67d226
JN
958 return;
959 }
960
2a33d934 961 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 962
5db72099
JN
963 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
964 if (!seq_data)
d3b542fc 965 return;
d3b542fc 966
8d3ed2f3
JN
967 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
968 if (!data)
d3b542fc
SK
969 return;
970
8d3ed2f3
JN
971 /* Parse the sequences, store pointers to each sequence. */
972 for (;;) {
973 u8 seq_id = *(data + index);
974 if (seq_id == MIPI_SEQ_END)
975 break;
d3b542fc 976
8d3ed2f3
JN
977 if (seq_id >= MIPI_SEQ_MAX) {
978 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
979 goto err;
980 }
981
4b4f497e
JN
982 /* Log about presence of sequences we won't run. */
983 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
984 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
985
8d3ed2f3 986 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 987
2a33d934
JN
988 if (sequence->version >= 3)
989 index = goto_next_sequence_v3(data, index, seq_size);
990 else
991 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
992 if (!index) {
993 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
994 goto err;
995 }
d3b542fc
SK
996 }
997
8d3ed2f3
JN
998 dev_priv->vbt.dsi.data = data;
999 dev_priv->vbt.dsi.size = seq_size;
1000 dev_priv->vbt.dsi.seq_version = sequence->version;
1001
1002 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 1003 return;
d3b542fc 1004
8d3ed2f3
JN
1005err:
1006 kfree(data);
ed3b6679 1007 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
1008}
1009
75067dde
AK
1010static u8 translate_iboost(u8 val)
1011{
1012 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1013
1014 if (val >= ARRAY_SIZE(mapping)) {
1015 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1016 return 0;
1017 }
1018 return mapping[val];
1019}
1020
9454fa87
VS
1021static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1022 enum port port)
1023{
1024 const struct ddi_vbt_port_info *info =
1025 &dev_priv->vbt.ddi_port_info[port];
1026 enum port p;
1027
1028 if (!info->alternate_ddc_pin)
1029 return;
1030
1031 for_each_port_masked(p, (1 << port) - 1) {
1032 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1033
1034 if (info->alternate_ddc_pin != i->alternate_ddc_pin)
1035 continue;
1036
1037 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1038 "disabling port %c DVI/HDMI support\n",
1039 port_name(p), i->alternate_ddc_pin,
1040 port_name(port), port_name(p));
1041
1042 /*
1043 * If we have multiple ports supposedly sharing the
1044 * pin, then dvi/hdmi couldn't exist on the shared
1045 * port. Otherwise they share the same ddc bin and
1046 * system couldn't communicate with them separately.
1047 *
1048 * Due to parsing the ports in alphabetical order,
1049 * a higher port will always clobber a lower one.
1050 */
1051 i->supports_dvi = false;
1052 i->supports_hdmi = false;
1053 i->alternate_ddc_pin = 0;
1054 }
1055}
1056
1057static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1058 enum port port)
1059{
1060 const struct ddi_vbt_port_info *info =
1061 &dev_priv->vbt.ddi_port_info[port];
1062 enum port p;
1063
1064 if (!info->alternate_aux_channel)
1065 return;
1066
1067 for_each_port_masked(p, (1 << port) - 1) {
1068 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1069
1070 if (info->alternate_aux_channel != i->alternate_aux_channel)
1071 continue;
1072
1073 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1074 "disabling port %c DP support\n",
1075 port_name(p), i->alternate_aux_channel,
1076 port_name(port), port_name(p));
1077
1078 /*
1079 * If we have multiple ports supposedlt sharing the
1080 * aux channel, then DP couldn't exist on the shared
1081 * port. Otherwise they share the same aux channel
1082 * and system couldn't communicate with them separately.
1083 *
1084 * Due to parsing the ports in alphabetical order,
1085 * a higher port will always clobber a lower one.
1086 */
1087 i->supports_dp = false;
1088 i->alternate_aux_channel = 0;
1089 }
1090}
1091
6acab15a 1092static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1093 const struct bdb_header *bdb)
6acab15a 1094{
cc998589 1095 struct child_device_config *it, *child = NULL;
6acab15a
PZ
1096 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1097 uint8_t hdmi_level_shift;
1098 int i, j;
554d6af5 1099 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1100 uint8_t aux_channel, ddc_pin;
6acab15a 1101 /* Each DDI port can have more than one value on the "DVO Port" field,
b5273d72
JN
1102 * so look for all the possible values for each port.
1103 */
2800e4c2
RV
1104 int dvo_ports[][3] = {
1105 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1106 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1107 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1108 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1109 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1110 };
1111
b5273d72
JN
1112 /*
1113 * Find the first child device to reference the port, report if more
1114 * than one found.
1115 */
6acab15a
PZ
1116 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1117 it = dev_priv->vbt.child_dev + i;
1118
2800e4c2 1119 for (j = 0; j < 3; j++) {
6acab15a
PZ
1120 if (dvo_ports[port][j] == -1)
1121 break;
1122
cc998589 1123 if (it->dvo_port == dvo_ports[port][j]) {
6acab15a 1124 if (child) {
b5273d72 1125 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
6acab15a 1126 port_name(port));
b5273d72
JN
1127 } else {
1128 child = it;
6acab15a 1129 }
6acab15a
PZ
1130 }
1131 }
1132 }
1133 if (!child)
1134 return;
1135
cc998589
JN
1136 aux_channel = child->aux_channel;
1137 ddc_pin = child->ddc_pin;
6bf19e7c 1138
cc998589
JN
1139 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1140 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1141 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1142 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1143 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1144
d27ffc1d
JN
1145 if (port == PORT_A && is_dvi) {
1146 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1147 is_hdmi ? "/HDMI" : "");
1148 is_dvi = false;
1149 is_hdmi = false;
1150 }
1151
311a2094
PZ
1152 info->supports_dvi = is_dvi;
1153 info->supports_hdmi = is_hdmi;
1154 info->supports_dp = is_dp;
a98d9c1d 1155 info->supports_edp = is_edp;
311a2094 1156
554d6af5
PZ
1157 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1158 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1159
1160 if (is_edp && is_dvi)
1161 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1162 port_name(port));
1163 if (is_crt && port != PORT_E)
1164 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1165 if (is_crt && (is_dvi || is_dp))
1166 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1167 port_name(port));
1168 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1169 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1170 if (!is_dvi && !is_dp && !is_crt)
1171 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1172 port_name(port));
1173 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1174 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1175
1176 if (is_dvi) {
9454fa87
VS
1177 info->alternate_ddc_pin = ddc_pin;
1178
75be7756
RV
1179 /*
1180 * All VBTs that we got so far for B Stepping has this
1181 * information wrong for Port D. So, let's just ignore for now.
1182 */
1183 if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
1184 port == PORT_D) {
1185 info->alternate_ddc_pin = 0;
1186 }
1187
9454fa87 1188 sanitize_ddc_pin(dev_priv, port);
6bf19e7c
PZ
1189 }
1190
1191 if (is_dp) {
9454fa87
VS
1192 info->alternate_aux_channel = aux_channel;
1193
1194 sanitize_aux_ch(dev_priv, port);
6bf19e7c
PZ
1195 }
1196
6acab15a
PZ
1197 if (bdb->version >= 158) {
1198 /* The VBT HDMI level shift values match the table we have. */
cc998589 1199 hdmi_level_shift = child->hdmi_level_shifter_value;
ce4dd49e
DL
1200 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1201 port_name(port),
1202 hdmi_level_shift);
1203 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1204 }
75067dde
AK
1205
1206 /* Parse the I_boost config for SKL and above */
cc998589 1207 if (bdb->version >= 196 && child->iboost) {
f22bb358 1208 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
75067dde
AK
1209 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1210 port_name(port), info->dp_boost_level);
f22bb358 1211 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
75067dde
AK
1212 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1213 port_name(port), info->hdmi_boost_level);
1214 }
6acab15a
PZ
1215}
1216
1217static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1218 const struct bdb_header *bdb)
6acab15a 1219{
6acab15a
PZ
1220 enum port port;
1221
348e4058 1222 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
6acab15a
PZ
1223 return;
1224
1225 if (!dev_priv->vbt.child_dev_num)
1226 return;
1227
1228 if (bdb->version < 155)
1229 return;
1230
1231 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1232 parse_ddi_port(dev_priv, port, bdb);
1233}
1234
6363ee6f 1235static void
b3ca1f43
JN
1236parse_general_definitions(struct drm_i915_private *dev_priv,
1237 const struct bdb_header *bdb)
6363ee6f 1238{
e192839e
JN
1239 const struct bdb_general_definitions *defs;
1240 const struct child_device_config *child;
6363ee6f 1241 int i, child_device_num, count;
e2d6cf7f
DW
1242 u8 expected_size;
1243 u16 block_size;
b3ca1f43 1244 int bus_pin;
6363ee6f 1245
e192839e
JN
1246 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1247 if (!defs) {
44834a67 1248 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1249 return;
1250 }
b3ca1f43
JN
1251
1252 block_size = get_blocksize(defs);
1253 if (block_size < sizeof(*defs)) {
1254 DRM_DEBUG_KMS("General definitions block too small (%u)\n",
1255 block_size);
1256 return;
1257 }
1258
1259 bus_pin = defs->crt_ddc_gmbus_pin;
1260 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
1261 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1262 dev_priv->vbt.crt_ddc_pin = bus_pin;
1263
7244f309
VS
1264 if (bdb->version < 106) {
1265 expected_size = 22;
fa05178c 1266 } else if (bdb->version < 111) {
52b69c84
VS
1267 expected_size = 27;
1268 } else if (bdb->version < 195) {
21907e72 1269 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
e2d6cf7f
DW
1270 } else if (bdb->version == 195) {
1271 expected_size = 37;
1272 } else if (bdb->version <= 197) {
1273 expected_size = 38;
1274 } else {
1275 expected_size = 38;
e192839e 1276 BUILD_BUG_ON(sizeof(*child) < 38);
e2d6cf7f
DW
1277 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1278 bdb->version, expected_size);
1279 }
1280
e2d6cf7f 1281 /* Flag an error for unexpected size, but continue anyway. */
e192839e 1282 if (defs->child_dev_size != expected_size)
e2d6cf7f 1283 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
e192839e 1284 defs->child_dev_size, expected_size, bdb->version);
e2d6cf7f 1285
52b69c84 1286 /* The legacy sized child device config is the minimum we need. */
e192839e 1287 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
52b69c84 1288 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
e192839e 1289 defs->child_dev_size);
52b69c84
VS
1290 return;
1291 }
1292
6363ee6f 1293 /* get the number of child device */
e192839e 1294 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
6363ee6f
ZY
1295 count = 0;
1296 /* get the number of child device that is present */
1297 for (i = 0; i < child_device_num; i++) {
e192839e 1298 child = child_device_ptr(defs, i);
53f6b243 1299 if (!child->device_type)
6363ee6f 1300 continue;
6363ee6f
ZY
1301 count++;
1302 }
1303 if (!count) {
0206e353 1304 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1305 return;
1306 }
e192839e 1307 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
41aa3448 1308 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1309 DRM_DEBUG_KMS("No memory space for child device\n");
1310 return;
1311 }
1312
41aa3448 1313 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1314 count = 0;
1315 for (i = 0; i < child_device_num; i++) {
e192839e 1316 child = child_device_ptr(defs, i);
53f6b243 1317 if (!child->device_type)
6363ee6f 1318 continue;
3e6bd011 1319
e2d6cf7f
DW
1320 /*
1321 * Copy as much as we know (sizeof) and is available
1322 * (child_dev_size) of the child device. Accessing the data must
1323 * depend on VBT version.
1324 */
127704f5 1325 memcpy(dev_priv->vbt.child_dev + count, child,
e192839e 1326 min_t(size_t, defs->child_dev_size, sizeof(*child)));
127704f5 1327 count++;
6363ee6f 1328 }
6363ee6f 1329}
44834a67 1330
bb1d1329 1331/* Common defaults which may be overridden by VBT. */
6a04002b
SQ
1332static void
1333init_vbt_defaults(struct drm_i915_private *dev_priv)
1334{
6acab15a 1335 enum port port;
9a4114ff 1336
988c7015 1337 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1338
56c4b63a
JN
1339 /* Default to having backlight */
1340 dev_priv->vbt.backlight.present = true;
1341
6a04002b 1342 /* LFP panel data */
41aa3448
RV
1343 dev_priv->vbt.lvds_dither = 1;
1344 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1345
1346 /* SDVO panel data */
41aa3448 1347 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1348
1349 /* general features */
41aa3448
RV
1350 dev_priv->vbt.int_tv_support = 1;
1351 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1352
1353 /* Default to using SSC */
41aa3448 1354 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1355 /*
1356 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1357 * clock for LVDS.
1358 */
98f3a1dc
JN
1359 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1360 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1361 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1362
1363 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1364 struct ddi_vbt_port_info *info =
1365 &dev_priv->vbt.ddi_port_info[port];
1366
ce4dd49e 1367 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
bb1d1329
JN
1368 }
1369}
1370
1371/* Defaults to initialize only if there is no VBT. */
1372static void
1373init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1374{
1375 enum port port;
1376
1377 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1378 struct ddi_vbt_port_info *info =
1379 &dev_priv->vbt.ddi_port_info[port];
311a2094
PZ
1380
1381 info->supports_dvi = (port != PORT_A && port != PORT_E);
1382 info->supports_hdmi = info->supports_dvi;
1383 info->supports_dp = (port != PORT_E);
6acab15a 1384 }
6a04002b
SQ
1385}
1386
caf37fa4
JN
1387static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1388{
1389 const void *_vbt = vbt;
1390
1391 return _vbt + vbt->bdb_offset;
1392}
1393
f0067a31
JN
1394/**
1395 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1396 * @buf: pointer to a buffer to validate
1397 * @size: size of the buffer
1398 *
1399 * Returns true on valid VBT.
1400 */
1401bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1402{
f0067a31 1403 const struct vbt_header *vbt = buf;
dcb58a40 1404 const struct bdb_header *bdb;
3dd4e846 1405
caf37fa4 1406 if (!vbt)
f0067a31 1407 return false;
caf37fa4 1408
f0067a31 1409 if (sizeof(struct vbt_header) > size) {
3dd4e846 1410 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1411 return false;
3dd4e846
CW
1412 }
1413
1414 if (memcmp(vbt->signature, "$VBT", 4)) {
1415 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1416 return false;
3dd4e846
CW
1417 }
1418
e8f9ae9b
CW
1419 if (range_overflows_t(size_t,
1420 vbt->bdb_offset,
1421 sizeof(struct bdb_header),
1422 size)) {
3dd4e846 1423 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1424 return false;
3dd4e846
CW
1425 }
1426
caf37fa4 1427 bdb = get_bdb_header(vbt);
e8f9ae9b 1428 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3dd4e846 1429 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1430 return false;
3dd4e846
CW
1431 }
1432
caf37fa4 1433 return vbt;
3dd4e846
CW
1434}
1435
caf37fa4 1436static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1437{
b34a991a
JN
1438 size_t i;
1439
1440 /* Scour memory looking for the VBT signature. */
1441 for (i = 0; i + 4 < size; i++) {
f0067a31 1442 void *vbt;
115719fc 1443
f0067a31
JN
1444 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1445 continue;
1446
1447 /*
1448 * This is the one place where we explicitly discard the address
1449 * space (__iomem) of the BIOS/VBT.
1450 */
1451 vbt = (void __force *) bios + i;
1452 if (intel_bios_is_valid_vbt(vbt, size - i))
1453 return vbt;
1454
1455 break;
b34a991a
JN
1456 }
1457
f0067a31 1458 return NULL;
b34a991a
JN
1459}
1460
79e53945 1461/**
8b8e1a89 1462 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1463 * @dev_priv: i915 device instance
79e53945 1464 *
66578857
JN
1465 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
1466 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
1467 * initialize some defaults if the VBT is not present at all.
79e53945 1468 */
66578857 1469void intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1470{
91c8a326 1471 struct pci_dev *pdev = dev_priv->drm.pdev;
f0067a31 1472 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1473 const struct bdb_header *bdb;
44834a67
CW
1474 u8 __iomem *bios = NULL;
1475
66578857
JN
1476 if (HAS_PCH_NOP(dev_priv)) {
1477 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
1478 return;
1479 }
ab5c608b 1480
6a04002b 1481 init_vbt_defaults(dev_priv);
f899fc64 1482
66578857 1483 /* If the OpRegion does not have VBT, look in PCI ROM. */
f0067a31 1484 if (!vbt) {
b34a991a 1485 size_t size;
79e53945 1486
44834a67
CW
1487 bios = pci_map_rom(pdev, &size);
1488 if (!bios)
66578857 1489 goto out;
44834a67 1490
caf37fa4 1491 vbt = find_vbt(bios, size);
66578857
JN
1492 if (!vbt)
1493 goto out;
e2051c44
JN
1494
1495 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1496 }
79e53945 1497
caf37fa4
JN
1498 bdb = get_bdb_header(vbt);
1499
3556dd40
JN
1500 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1501 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1502
79e53945
JB
1503 /* Grab useful general definitions */
1504 parse_general_features(dev_priv, bdb);
db545019 1505 parse_general_definitions(dev_priv, bdb);
88631706 1506 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1507 parse_lfp_backlight(dev_priv, bdb);
88631706 1508 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1509 parse_sdvo_device_mapping(dev_priv, bdb);
32f9d658 1510 parse_driver_features(dev_priv, bdb);
500a8cc4 1511 parse_edp(dev_priv, bdb);
bfd7ebda 1512 parse_psr(dev_priv, bdb);
0f8689f5
JN
1513 parse_mipi_config(dev_priv, bdb);
1514 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1515 parse_ddi_ports(dev_priv, bdb);
32f9d658 1516
66578857 1517out:
bb1d1329 1518 if (!vbt) {
66578857 1519 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
bb1d1329
JN
1520 init_vbt_missing_defaults(dev_priv);
1521 }
66578857 1522
44834a67
CW
1523 if (bios)
1524 pci_unmap_rom(pdev, bios);
79e53945 1525}
3bdd14d5
JN
1526
1527/**
1528 * intel_bios_is_tv_present - is integrated TV present in VBT
1529 * @dev_priv: i915 device instance
1530 *
1531 * Return true if TV is present. If no child devices were parsed from VBT,
1532 * assume TV is present.
1533 */
1534bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1535{
cc998589 1536 const struct child_device_config *child;
3bdd14d5
JN
1537 int i;
1538
1539 if (!dev_priv->vbt.int_tv_support)
1540 return false;
1541
1542 if (!dev_priv->vbt.child_dev_num)
1543 return true;
1544
1545 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1546 child = dev_priv->vbt.child_dev + i;
3bdd14d5
JN
1547 /*
1548 * If the device type is not TV, continue.
1549 */
cc998589 1550 switch (child->device_type) {
3bdd14d5
JN
1551 case DEVICE_TYPE_INT_TV:
1552 case DEVICE_TYPE_TV:
1553 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1554 break;
1555 default:
1556 continue;
1557 }
1558 /* Only when the addin_offset is non-zero, it is regarded
1559 * as present.
1560 */
cc998589 1561 if (child->addin_offset)
3bdd14d5
JN
1562 return true;
1563 }
1564
1565 return false;
1566}
5a69d13d
JN
1567
1568/**
1569 * intel_bios_is_lvds_present - is LVDS present in VBT
1570 * @dev_priv: i915 device instance
1571 * @i2c_pin: i2c pin for LVDS if present
1572 *
1573 * Return true if LVDS is present. If no child devices were parsed from VBT,
1574 * assume LVDS is present.
1575 */
1576bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1577{
cc998589 1578 const struct child_device_config *child;
5a69d13d
JN
1579 int i;
1580
1581 if (!dev_priv->vbt.child_dev_num)
1582 return true;
1583
1584 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1585 child = dev_priv->vbt.child_dev + i;
5a69d13d
JN
1586
1587 /* If the device type is not LFP, continue.
1588 * We have to check both the new identifiers as well as the
1589 * old for compatibility with some BIOSes.
1590 */
1591 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1592 child->device_type != DEVICE_TYPE_LFP)
1593 continue;
1594
1595 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1596 *i2c_pin = child->i2c_pin;
1597
1598 /* However, we cannot trust the BIOS writers to populate
1599 * the VBT correctly. Since LVDS requires additional
1600 * information from AIM blocks, a non-zero addin offset is
1601 * a good indicator that the LVDS is actually present.
1602 */
1603 if (child->addin_offset)
1604 return true;
1605
1606 /* But even then some BIOS writers perform some black magic
1607 * and instantiate the device without reference to any
1608 * additional data. Trust that if the VBT was written into
1609 * the OpRegion then they have validated the LVDS's existence.
1610 */
1611 if (dev_priv->opregion.vbt)
1612 return true;
1613 }
1614
1615 return false;
1616}
951d9efe 1617
22f35042
VS
1618/**
1619 * intel_bios_is_port_present - is the specified digital port present
1620 * @dev_priv: i915 device instance
1621 * @port: port to check
1622 *
1623 * Return true if the device in %port is present.
1624 */
1625bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1626{
cc998589 1627 const struct child_device_config *child;
22f35042
VS
1628 static const struct {
1629 u16 dp, hdmi;
1630 } port_mapping[] = {
1631 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1632 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1633 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1634 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1635 };
1636 int i;
1637
1638 /* FIXME maybe deal with port A as well? */
1639 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1640 return false;
1641
1642 if (!dev_priv->vbt.child_dev_num)
1643 return false;
1644
1645 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1646 child = dev_priv->vbt.child_dev + i;
1647
1648 if ((child->dvo_port == port_mapping[port].dp ||
1649 child->dvo_port == port_mapping[port].hdmi) &&
1650 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1651 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
22f35042
VS
1652 return true;
1653 }
1654
1655 return false;
1656}
1657
951d9efe
JN
1658/**
1659 * intel_bios_is_port_edp - is the device in given port eDP
1660 * @dev_priv: i915 device instance
1661 * @port: port to check
1662 *
1663 * Return true if the device in %port is eDP.
1664 */
1665bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1666{
cc998589 1667 const struct child_device_config *child;
951d9efe
JN
1668 static const short port_mapping[] = {
1669 [PORT_B] = DVO_PORT_DPB,
1670 [PORT_C] = DVO_PORT_DPC,
1671 [PORT_D] = DVO_PORT_DPD,
1672 [PORT_E] = DVO_PORT_DPE,
1673 };
1674 int i;
1675
a98d9c1d
ID
1676 if (HAS_DDI(dev_priv))
1677 return dev_priv->vbt.ddi_port_info[port].supports_edp;
1678
951d9efe
JN
1679 if (!dev_priv->vbt.child_dev_num)
1680 return false;
1681
1682 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1683 child = dev_priv->vbt.child_dev + i;
951d9efe 1684
cc998589
JN
1685 if (child->dvo_port == port_mapping[port] &&
1686 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
951d9efe
JN
1687 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1688 return true;
1689 }
1690
1691 return false;
1692}
7137aec1 1693
cc998589 1694static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
7a17995a 1695 enum port port)
d6199256
VS
1696{
1697 static const struct {
1698 u16 dp, hdmi;
1699 } port_mapping[] = {
1700 /*
1701 * Buggy VBTs may declare DP ports as having
1702 * HDMI type dvo_port :( So let's check both.
1703 */
1704 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1705 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1706 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1707 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1708 };
d6199256
VS
1709
1710 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1711 return false;
1712
cc998589 1713 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
7a17995a 1714 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
d6199256
VS
1715 return false;
1716
cc998589 1717 if (child->dvo_port == port_mapping[port].dp)
7a17995a
VS
1718 return true;
1719
1720 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
cc998589
JN
1721 if (child->dvo_port == port_mapping[port].hdmi &&
1722 child->aux_channel != 0)
7a17995a
VS
1723 return true;
1724
1725 return false;
1726}
1727
1728bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
1729 enum port port)
1730{
cc998589 1731 const struct child_device_config *child;
7a17995a
VS
1732 int i;
1733
d6199256 1734 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1735 child = dev_priv->vbt.child_dev + i;
d6199256 1736
cc998589 1737 if (child_dev_is_dp_dual_mode(child, port))
d6199256
VS
1738 return true;
1739 }
1740
1741 return false;
1742}
1743
7137aec1
JN
1744/**
1745 * intel_bios_is_dsi_present - is DSI present in VBT
1746 * @dev_priv: i915 device instance
1747 * @port: port for DSI if present
1748 *
1749 * Return true if DSI is present, and return the port in %port.
1750 */
1751bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1752 enum port *port)
1753{
cc998589 1754 const struct child_device_config *child;
7137aec1
JN
1755 u8 dvo_port;
1756 int i;
1757
1758 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589 1759 child = dev_priv->vbt.child_dev + i;
7137aec1 1760
cc998589 1761 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
7137aec1
JN
1762 continue;
1763
cc998589 1764 dvo_port = child->dvo_port;
7137aec1
JN
1765
1766 switch (dvo_port) {
1767 case DVO_PORT_MIPIA:
1768 case DVO_PORT_MIPIC:
7caaef33
JN
1769 if (port)
1770 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1771 return true;
1772 case DVO_PORT_MIPIB:
1773 case DVO_PORT_MIPID:
1774 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1775 port_name(dvo_port - DVO_PORT_MIPIA));
1776 break;
1777 }
1778 }
1779
1780 return false;
1781}
d252bf68
SS
1782
1783/**
1784 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1785 * @dev_priv: i915 device instance
1786 * @port: port to check
1787 *
1788 * Return true if HPD should be inverted for %port.
1789 */
1790bool
1791intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1792 enum port port)
1793{
cc998589 1794 const struct child_device_config *child;
d252bf68
SS
1795 int i;
1796
cc3f90f0 1797 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
d252bf68
SS
1798 return false;
1799
1800 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1801 child = dev_priv->vbt.child_dev + i;
1802
1803 if (!child->hpd_invert)
d252bf68
SS
1804 continue;
1805
cc998589 1806 switch (child->dvo_port) {
d252bf68
SS
1807 case DVO_PORT_DPA:
1808 case DVO_PORT_HDMIA:
1809 if (port == PORT_A)
1810 return true;
1811 break;
1812 case DVO_PORT_DPB:
1813 case DVO_PORT_HDMIB:
1814 if (port == PORT_B)
1815 return true;
1816 break;
1817 case DVO_PORT_DPC:
1818 case DVO_PORT_HDMIC:
1819 if (port == PORT_C)
1820 return true;
1821 break;
1822 default:
1823 break;
1824 }
1825 }
1826
1827 return false;
1828}
6389dd83
SS
1829
1830/**
1831 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
1832 * @dev_priv: i915 device instance
1833 * @port: port to check
1834 *
1835 * Return true if LSPCON is present on this port
1836 */
1837bool
1838intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
1839 enum port port)
1840{
cc998589 1841 const struct child_device_config *child;
6389dd83
SS
1842 int i;
1843
1844 if (!HAS_LSPCON(dev_priv))
1845 return false;
1846
1847 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
cc998589
JN
1848 child = dev_priv->vbt.child_dev + i;
1849
1850 if (!child->lspcon)
6389dd83
SS
1851 continue;
1852
cc998589 1853 switch (child->dvo_port) {
6389dd83
SS
1854 case DVO_PORT_DPA:
1855 case DVO_PORT_HDMIA:
1856 if (port == PORT_A)
1857 return true;
1858 break;
1859 case DVO_PORT_DPB:
1860 case DVO_PORT_HDMIB:
1861 if (port == PORT_B)
1862 return true;
1863 break;
1864 case DVO_PORT_DPC:
1865 case DVO_PORT_HDMIC:
1866 if (port == PORT_C)
1867 return true;
1868 break;
1869 case DVO_PORT_DPD:
1870 case DVO_PORT_HDMID:
1871 if (port == PORT_D)
1872 return true;
1873 break;
1874 default:
1875 break;
1876 }
1877 }
1878
1879 return false;
1880}