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79e53945 | 1 | /* |
39507259 | 2 | * Copyright © 2006 Intel Corporation |
79e53945 JB |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
21 | * SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * | |
26 | */ | |
9f0e7ff4 | 27 | #include <drm/drm_dp_helper.h> |
79e53945 JB |
28 | #include "drmP.h" |
29 | #include "drm.h" | |
30 | #include "i915_drm.h" | |
31 | #include "i915_drv.h" | |
32 | #include "intel_bios.h" | |
33 | ||
9b9d172d | 34 | #define SLAVE_ADDR1 0x70 |
35 | #define SLAVE_ADDR2 0x72 | |
79e53945 | 36 | |
500a8cc4 ZW |
37 | static int panel_type; |
38 | ||
79e53945 JB |
39 | static void * |
40 | find_section(struct bdb_header *bdb, int section_id) | |
41 | { | |
42 | u8 *base = (u8 *)bdb; | |
43 | int index = 0; | |
44 | u16 total, current_size; | |
45 | u8 current_id; | |
46 | ||
47 | /* skip to first section */ | |
48 | index += bdb->header_size; | |
49 | total = bdb->bdb_size; | |
50 | ||
51 | /* walk the sections looking for section_id */ | |
52 | while (index < total) { | |
53 | current_id = *(base + index); | |
54 | index++; | |
55 | current_size = *((u16 *)(base + index)); | |
56 | index += 2; | |
57 | if (current_id == section_id) | |
58 | return base + index; | |
59 | index += current_size; | |
60 | } | |
61 | ||
62 | return NULL; | |
63 | } | |
64 | ||
db545019 DMEA |
65 | static u16 |
66 | get_blocksize(void *p) | |
67 | { | |
68 | u16 *block_ptr, block_size; | |
69 | ||
70 | block_ptr = (u16 *)((char *)p - 2); | |
71 | block_size = *block_ptr; | |
72 | return block_size; | |
73 | } | |
74 | ||
79e53945 | 75 | static void |
88631706 | 76 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
99834ea4 | 77 | const struct lvds_dvo_timing *dvo_timing) |
88631706 ML |
78 | { |
79 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | | |
80 | dvo_timing->hactive_lo; | |
81 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + | |
82 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); | |
83 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + | |
84 | dvo_timing->hsync_pulse_width; | |
85 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + | |
86 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); | |
87 | ||
88 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | | |
89 | dvo_timing->vactive_lo; | |
90 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + | |
91 | dvo_timing->vsync_off; | |
92 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + | |
93 | dvo_timing->vsync_pulse_width; | |
94 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + | |
95 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); | |
96 | panel_fixed_mode->clock = dvo_timing->clock * 10; | |
97 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; | |
98 | ||
9bc35499 AJ |
99 | if (dvo_timing->hsync_positive) |
100 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
101 | else | |
102 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; | |
103 | ||
104 | if (dvo_timing->vsync_positive) | |
105 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
106 | else | |
107 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; | |
108 | ||
88631706 ML |
109 | /* Some VBTs have bogus h/vtotal values */ |
110 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) | |
111 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; | |
112 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) | |
113 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; | |
114 | ||
115 | drm_mode_set_name(panel_fixed_mode); | |
116 | } | |
117 | ||
99834ea4 CW |
118 | static bool |
119 | lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a, | |
120 | const struct lvds_dvo_timing *b) | |
121 | { | |
122 | if (a->hactive_hi != b->hactive_hi || | |
123 | a->hactive_lo != b->hactive_lo) | |
124 | return false; | |
125 | ||
126 | if (a->hsync_off_hi != b->hsync_off_hi || | |
127 | a->hsync_off_lo != b->hsync_off_lo) | |
128 | return false; | |
129 | ||
130 | if (a->hsync_pulse_width != b->hsync_pulse_width) | |
131 | return false; | |
132 | ||
133 | if (a->hblank_hi != b->hblank_hi || | |
134 | a->hblank_lo != b->hblank_lo) | |
135 | return false; | |
136 | ||
137 | if (a->vactive_hi != b->vactive_hi || | |
138 | a->vactive_lo != b->vactive_lo) | |
139 | return false; | |
140 | ||
141 | if (a->vsync_off != b->vsync_off) | |
142 | return false; | |
143 | ||
144 | if (a->vsync_pulse_width != b->vsync_pulse_width) | |
145 | return false; | |
146 | ||
147 | if (a->vblank_hi != b->vblank_hi || | |
148 | a->vblank_lo != b->vblank_lo) | |
149 | return false; | |
150 | ||
151 | return true; | |
152 | } | |
153 | ||
154 | static const struct lvds_dvo_timing * | |
155 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, | |
156 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, | |
157 | int index) | |
158 | { | |
159 | /* | |
160 | * the size of fp_timing varies on the different platform. | |
161 | * So calculate the DVO timing relative offset in LVDS data | |
162 | * entry to get the DVO timing entry | |
163 | */ | |
164 | ||
165 | int lfp_data_size = | |
166 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - | |
167 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; | |
168 | int dvo_timing_offset = | |
169 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - | |
170 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; | |
171 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; | |
172 | ||
173 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); | |
174 | } | |
175 | ||
88631706 ML |
176 | /* Try to find integrated panel data */ |
177 | static void | |
178 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, | |
179 | struct bdb_header *bdb) | |
79e53945 | 180 | { |
99834ea4 CW |
181 | const struct bdb_lvds_options *lvds_options; |
182 | const struct bdb_lvds_lfp_data *lvds_lfp_data; | |
183 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; | |
184 | const struct lvds_dvo_timing *panel_dvo_timing; | |
79e53945 | 185 | struct drm_display_mode *panel_fixed_mode; |
99834ea4 | 186 | int i, downclock; |
79e53945 | 187 | |
79e53945 JB |
188 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
189 | if (!lvds_options) | |
190 | return; | |
191 | ||
192 | dev_priv->lvds_dither = lvds_options->pixel_dither; | |
193 | if (lvds_options->panel_type == 0xff) | |
194 | return; | |
6a04002b | 195 | |
500a8cc4 | 196 | panel_type = lvds_options->panel_type; |
79e53945 JB |
197 | |
198 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); | |
199 | if (!lvds_lfp_data) | |
200 | return; | |
201 | ||
1b16de0b JB |
202 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
203 | if (!lvds_lfp_data_ptrs) | |
204 | return; | |
205 | ||
79e53945 JB |
206 | dev_priv->lvds_vbt = 1; |
207 | ||
99834ea4 CW |
208 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
209 | lvds_lfp_data_ptrs, | |
210 | lvds_options->panel_type); | |
79e53945 | 211 | |
9a298b2a | 212 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
6edc3242 CW |
213 | if (!panel_fixed_mode) |
214 | return; | |
79e53945 | 215 | |
99834ea4 | 216 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
79e53945 | 217 | |
88631706 | 218 | dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 219 | |
28c97730 | 220 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
88631706 | 221 | drm_mode_debug_printmodeline(panel_fixed_mode); |
37df9673 | 222 | |
d1fcea6a | 223 | /* |
99834ea4 CW |
224 | * Iterate over the LVDS panel timing info to find the lowest clock |
225 | * for the native resolution. | |
d1fcea6a | 226 | */ |
99834ea4 | 227 | downclock = panel_dvo_timing->clock; |
d1fcea6a | 228 | for (i = 0; i < 16; i++) { |
99834ea4 CW |
229 | const struct lvds_dvo_timing *dvo_timing; |
230 | ||
231 | dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, | |
232 | lvds_lfp_data_ptrs, | |
233 | i); | |
234 | if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) && | |
235 | dvo_timing->clock < downclock) | |
236 | downclock = dvo_timing->clock; | |
d1fcea6a | 237 | } |
99834ea4 CW |
238 | |
239 | if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) { | |
d1fcea6a | 240 | dev_priv->lvds_downclock_avail = 1; |
99834ea4 | 241 | dev_priv->lvds_downclock = downclock * 10; |
bbb0aef5 JP |
242 | DRM_DEBUG_KMS("LVDS downclock is found in VBT. " |
243 | "Normal Clock %dKHz, downclock %dKHz\n", | |
99834ea4 | 244 | panel_fixed_mode->clock, 10*downclock); |
d1fcea6a | 245 | } |
88631706 ML |
246 | } |
247 | ||
248 | /* Try to find sdvo panel data */ | |
249 | static void | |
250 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, | |
251 | struct bdb_header *bdb) | |
252 | { | |
88631706 ML |
253 | struct lvds_dvo_timing *dvo_timing; |
254 | struct drm_display_mode *panel_fixed_mode; | |
5a1e5b6c | 255 | int index; |
79e53945 | 256 | |
5a1e5b6c CW |
257 | index = i915_vbt_sdvo_panel_type; |
258 | if (index == -1) { | |
259 | struct bdb_sdvo_lvds_options *sdvo_lvds_options; | |
260 | ||
261 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); | |
262 | if (!sdvo_lvds_options) | |
263 | return; | |
264 | ||
265 | index = sdvo_lvds_options->panel_type; | |
266 | } | |
88631706 ML |
267 | |
268 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); | |
269 | if (!dvo_timing) | |
270 | return; | |
271 | ||
9a298b2a | 272 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
88631706 ML |
273 | if (!panel_fixed_mode) |
274 | return; | |
275 | ||
5a1e5b6c | 276 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
88631706 ML |
277 | |
278 | dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode; | |
79e53945 | 279 | |
5a1e5b6c CW |
280 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
281 | drm_mode_debug_printmodeline(panel_fixed_mode); | |
79e53945 JB |
282 | } |
283 | ||
9a4114ff BF |
284 | static int intel_bios_ssc_frequency(struct drm_device *dev, |
285 | bool alternate) | |
286 | { | |
287 | switch (INTEL_INFO(dev)->gen) { | |
288 | case 2: | |
289 | return alternate ? 66 : 48; | |
290 | case 3: | |
291 | case 4: | |
292 | return alternate ? 100 : 96; | |
293 | default: | |
294 | return alternate ? 100 : 120; | |
295 | } | |
296 | } | |
297 | ||
79e53945 JB |
298 | static void |
299 | parse_general_features(struct drm_i915_private *dev_priv, | |
300 | struct bdb_header *bdb) | |
301 | { | |
bad720ff | 302 | struct drm_device *dev = dev_priv->dev; |
79e53945 JB |
303 | struct bdb_general_features *general; |
304 | ||
79e53945 JB |
305 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
306 | if (general) { | |
307 | dev_priv->int_tv_support = general->int_tv_support; | |
308 | dev_priv->int_crt_support = general->int_crt_support; | |
43565a06 | 309 | dev_priv->lvds_use_ssc = general->enable_ssc; |
9a4114ff BF |
310 | dev_priv->lvds_ssc_freq = |
311 | intel_bios_ssc_frequency(dev, general->ssc_freq); | |
abd06860 KP |
312 | dev_priv->display_clock_mode = general->display_clock_mode; |
313 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n", | |
562396b9 KP |
314 | dev_priv->int_tv_support, |
315 | dev_priv->int_crt_support, | |
316 | dev_priv->lvds_use_ssc, | |
abd06860 KP |
317 | dev_priv->lvds_ssc_freq, |
318 | dev_priv->display_clock_mode); | |
79e53945 JB |
319 | } |
320 | } | |
321 | ||
db545019 DMEA |
322 | static void |
323 | parse_general_definitions(struct drm_i915_private *dev_priv, | |
324 | struct bdb_header *bdb) | |
325 | { | |
326 | struct bdb_general_definitions *general; | |
db545019 | 327 | |
db545019 DMEA |
328 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
329 | if (general) { | |
330 | u16 block_size = get_blocksize(general); | |
331 | if (block_size >= sizeof(*general)) { | |
332 | int bus_pin = general->crt_ddc_gmbus_pin; | |
28c97730 | 333 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
f899fc64 | 334 | if (bus_pin >= 1 && bus_pin <= 6) |
2896b539 | 335 | dev_priv->crt_ddc_pin = bus_pin; |
db545019 | 336 | } else { |
28c97730 | 337 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
db545019 DMEA |
338 | block_size); |
339 | } | |
340 | } | |
341 | } | |
342 | ||
9b9d172d | 343 | static void |
344 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |
44834a67 | 345 | struct bdb_header *bdb) |
9b9d172d | 346 | { |
347 | struct sdvo_device_mapping *p_mapping; | |
348 | struct bdb_general_definitions *p_defs; | |
349 | struct child_device_config *p_child; | |
350 | int i, child_device_num, count; | |
db545019 | 351 | u16 block_size; |
9b9d172d | 352 | |
353 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); | |
354 | if (!p_defs) { | |
44834a67 | 355 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
9b9d172d | 356 | return; |
357 | } | |
358 | /* judge whether the size of child device meets the requirements. | |
359 | * If the child device size obtained from general definition block | |
360 | * is different with sizeof(struct child_device_config), skip the | |
361 | * parsing of sdvo device info | |
362 | */ | |
363 | if (p_defs->child_dev_size != sizeof(*p_child)) { | |
364 | /* different child dev size . Ignore it */ | |
28c97730 | 365 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
9b9d172d | 366 | return; |
367 | } | |
368 | /* get the block size of general definitions */ | |
db545019 | 369 | block_size = get_blocksize(p_defs); |
9b9d172d | 370 | /* get the number of child device */ |
371 | child_device_num = (block_size - sizeof(*p_defs)) / | |
372 | sizeof(*p_child); | |
373 | count = 0; | |
374 | for (i = 0; i < child_device_num; i++) { | |
375 | p_child = &(p_defs->devices[i]); | |
376 | if (!p_child->device_type) { | |
377 | /* skip the device block if device type is invalid */ | |
378 | continue; | |
379 | } | |
380 | if (p_child->slave_addr != SLAVE_ADDR1 && | |
381 | p_child->slave_addr != SLAVE_ADDR2) { | |
382 | /* | |
383 | * If the slave address is neither 0x70 nor 0x72, | |
384 | * it is not a SDVO device. Skip it. | |
385 | */ | |
386 | continue; | |
387 | } | |
388 | if (p_child->dvo_port != DEVICE_PORT_DVOB && | |
389 | p_child->dvo_port != DEVICE_PORT_DVOC) { | |
390 | /* skip the incorrect SDVO port */ | |
0206e353 | 391 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
9b9d172d | 392 | continue; |
393 | } | |
28c97730 ZY |
394 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
395 | " %s port\n", | |
9b9d172d | 396 | p_child->slave_addr, |
397 | (p_child->dvo_port == DEVICE_PORT_DVOB) ? | |
398 | "SDVOB" : "SDVOC"); | |
399 | p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]); | |
400 | if (!p_mapping->initialized) { | |
401 | p_mapping->dvo_port = p_child->dvo_port; | |
402 | p_mapping->slave_addr = p_child->slave_addr; | |
403 | p_mapping->dvo_wiring = p_child->dvo_wiring; | |
b1083333 | 404 | p_mapping->ddc_pin = p_child->ddc_pin; |
e957d772 | 405 | p_mapping->i2c_pin = p_child->i2c_pin; |
9b9d172d | 406 | p_mapping->initialized = 1; |
46eb3036 | 407 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
e957d772 CW |
408 | p_mapping->dvo_port, |
409 | p_mapping->slave_addr, | |
410 | p_mapping->dvo_wiring, | |
411 | p_mapping->ddc_pin, | |
46eb3036 | 412 | p_mapping->i2c_pin); |
9b9d172d | 413 | } else { |
28c97730 | 414 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
9b9d172d | 415 | "two SDVO device.\n"); |
416 | } | |
417 | if (p_child->slave2_addr) { | |
418 | /* Maybe this is a SDVO device with multiple inputs */ | |
419 | /* And the mapping info is not added */ | |
28c97730 ZY |
420 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
421 | " is a SDVO device with multiple inputs.\n"); | |
9b9d172d | 422 | } |
423 | count++; | |
424 | } | |
425 | ||
426 | if (!count) { | |
427 | /* No SDVO device info is found */ | |
28c97730 | 428 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
9b9d172d | 429 | } |
430 | return; | |
431 | } | |
32f9d658 ZW |
432 | |
433 | static void | |
434 | parse_driver_features(struct drm_i915_private *dev_priv, | |
435 | struct bdb_header *bdb) | |
436 | { | |
437 | struct drm_device *dev = dev_priv->dev; | |
438 | struct bdb_driver_features *driver; | |
439 | ||
32f9d658 | 440 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
652c393a JB |
441 | if (!driver) |
442 | return; | |
443 | ||
5ceb0f9b CW |
444 | if (SUPPORTS_EDP(dev) && |
445 | driver->lvds_config == BDB_DRIVER_FEATURE_EDP) | |
446 | dev_priv->edp.support = 1; | |
652c393a | 447 | |
5ceb0f9b | 448 | if (driver->dual_frequency) |
652c393a | 449 | dev_priv->render_reclock_avail = true; |
32f9d658 ZW |
450 | } |
451 | ||
500a8cc4 ZW |
452 | static void |
453 | parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
454 | { | |
455 | struct bdb_edp *edp; | |
9f0e7ff4 JB |
456 | struct edp_power_seq *edp_pps; |
457 | struct edp_link_params *edp_link_params; | |
500a8cc4 ZW |
458 | |
459 | edp = find_section(bdb, BDB_EDP); | |
460 | if (!edp) { | |
5ceb0f9b | 461 | if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) { |
76e47c30 | 462 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel " |
5ceb0f9b CW |
463 | "supported, assume %dbpp panel color " |
464 | "depth.\n", | |
465 | dev_priv->edp.bpp); | |
500a8cc4 ZW |
466 | } |
467 | return; | |
468 | } | |
469 | ||
470 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { | |
471 | case EDP_18BPP: | |
5ceb0f9b | 472 | dev_priv->edp.bpp = 18; |
500a8cc4 ZW |
473 | break; |
474 | case EDP_24BPP: | |
5ceb0f9b | 475 | dev_priv->edp.bpp = 24; |
500a8cc4 ZW |
476 | break; |
477 | case EDP_30BPP: | |
5ceb0f9b | 478 | dev_priv->edp.bpp = 30; |
500a8cc4 ZW |
479 | break; |
480 | } | |
5ceb0f9b | 481 | |
9f0e7ff4 JB |
482 | /* Get the eDP sequencing and link info */ |
483 | edp_pps = &edp->power_seqs[panel_type]; | |
484 | edp_link_params = &edp->link_params[panel_type]; | |
5ceb0f9b | 485 | |
9f0e7ff4 | 486 | dev_priv->edp.pps = *edp_pps; |
5ceb0f9b | 487 | |
9f0e7ff4 JB |
488 | dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 : |
489 | DP_LINK_BW_1_62; | |
490 | switch (edp_link_params->lanes) { | |
491 | case 0: | |
492 | dev_priv->edp.lanes = 1; | |
493 | break; | |
494 | case 1: | |
495 | dev_priv->edp.lanes = 2; | |
496 | break; | |
497 | case 3: | |
498 | default: | |
499 | dev_priv->edp.lanes = 4; | |
500 | break; | |
501 | } | |
502 | switch (edp_link_params->preemphasis) { | |
503 | case 0: | |
504 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0; | |
505 | break; | |
506 | case 1: | |
507 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; | |
508 | break; | |
509 | case 2: | |
510 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6; | |
511 | break; | |
512 | case 3: | |
513 | dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; | |
514 | break; | |
515 | } | |
516 | switch (edp_link_params->vswing) { | |
517 | case 0: | |
518 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400; | |
519 | break; | |
520 | case 1: | |
521 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600; | |
522 | break; | |
523 | case 2: | |
524 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800; | |
525 | break; | |
526 | case 3: | |
527 | dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200; | |
528 | break; | |
529 | } | |
500a8cc4 ZW |
530 | } |
531 | ||
6363ee6f ZY |
532 | static void |
533 | parse_device_mapping(struct drm_i915_private *dev_priv, | |
534 | struct bdb_header *bdb) | |
535 | { | |
536 | struct bdb_general_definitions *p_defs; | |
537 | struct child_device_config *p_child, *child_dev_ptr; | |
538 | int i, child_device_num, count; | |
539 | u16 block_size; | |
540 | ||
541 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); | |
542 | if (!p_defs) { | |
44834a67 | 543 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
6363ee6f ZY |
544 | return; |
545 | } | |
546 | /* judge whether the size of child device meets the requirements. | |
547 | * If the child device size obtained from general definition block | |
548 | * is different with sizeof(struct child_device_config), skip the | |
549 | * parsing of sdvo device info | |
550 | */ | |
551 | if (p_defs->child_dev_size != sizeof(*p_child)) { | |
552 | /* different child dev size . Ignore it */ | |
553 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); | |
554 | return; | |
555 | } | |
556 | /* get the block size of general definitions */ | |
557 | block_size = get_blocksize(p_defs); | |
558 | /* get the number of child device */ | |
559 | child_device_num = (block_size - sizeof(*p_defs)) / | |
560 | sizeof(*p_child); | |
561 | count = 0; | |
562 | /* get the number of child device that is present */ | |
563 | for (i = 0; i < child_device_num; i++) { | |
564 | p_child = &(p_defs->devices[i]); | |
565 | if (!p_child->device_type) { | |
566 | /* skip the device block if device type is invalid */ | |
567 | continue; | |
568 | } | |
569 | count++; | |
570 | } | |
571 | if (!count) { | |
0206e353 | 572 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
6363ee6f ZY |
573 | return; |
574 | } | |
493dea28 | 575 | dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); |
6363ee6f ZY |
576 | if (!dev_priv->child_dev) { |
577 | DRM_DEBUG_KMS("No memory space for child device\n"); | |
578 | return; | |
579 | } | |
580 | ||
581 | dev_priv->child_dev_num = count; | |
582 | count = 0; | |
583 | for (i = 0; i < child_device_num; i++) { | |
584 | p_child = &(p_defs->devices[i]); | |
585 | if (!p_child->device_type) { | |
586 | /* skip the device block if device type is invalid */ | |
587 | continue; | |
588 | } | |
589 | child_dev_ptr = dev_priv->child_dev + count; | |
590 | count++; | |
591 | memcpy((void *)child_dev_ptr, (void *)p_child, | |
592 | sizeof(*p_child)); | |
593 | } | |
594 | return; | |
595 | } | |
44834a67 | 596 | |
6a04002b SQ |
597 | static void |
598 | init_vbt_defaults(struct drm_i915_private *dev_priv) | |
599 | { | |
9a4114ff BF |
600 | struct drm_device *dev = dev_priv->dev; |
601 | ||
6a04002b SQ |
602 | dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC; |
603 | ||
604 | /* LFP panel data */ | |
605 | dev_priv->lvds_dither = 1; | |
606 | dev_priv->lvds_vbt = 0; | |
607 | ||
608 | /* SDVO panel data */ | |
609 | dev_priv->sdvo_lvds_vbt_mode = NULL; | |
610 | ||
611 | /* general features */ | |
612 | dev_priv->int_tv_support = 1; | |
613 | dev_priv->int_crt_support = 1; | |
9a4114ff BF |
614 | |
615 | /* Default to using SSC */ | |
616 | dev_priv->lvds_use_ssc = 1; | |
617 | dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1); | |
562396b9 | 618 | DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq); |
6a04002b SQ |
619 | |
620 | /* eDP data */ | |
621 | dev_priv->edp.bpp = 18; | |
622 | } | |
623 | ||
79e53945 | 624 | /** |
6d139a87 | 625 | * intel_parse_bios - find VBT and initialize settings from the BIOS |
79e53945 JB |
626 | * @dev: DRM device |
627 | * | |
628 | * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers | |
629 | * to appropriate values. | |
630 | * | |
79e53945 JB |
631 | * Returns 0 on success, nonzero on failure. |
632 | */ | |
633 | bool | |
6d139a87 | 634 | intel_parse_bios(struct drm_device *dev) |
79e53945 JB |
635 | { |
636 | struct drm_i915_private *dev_priv = dev->dev_private; | |
637 | struct pci_dev *pdev = dev->pdev; | |
44834a67 CW |
638 | struct bdb_header *bdb = NULL; |
639 | u8 __iomem *bios = NULL; | |
640 | ||
6a04002b | 641 | init_vbt_defaults(dev_priv); |
f899fc64 | 642 | |
44834a67 CW |
643 | /* XXX Should this validation be moved to intel_opregion.c? */ |
644 | if (dev_priv->opregion.vbt) { | |
645 | struct vbt_header *vbt = dev_priv->opregion.vbt; | |
646 | if (memcmp(vbt->signature, "$VBT", 4) == 0) { | |
562396b9 | 647 | DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n", |
44834a67 CW |
648 | vbt->signature); |
649 | bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset); | |
650 | } else | |
651 | dev_priv->opregion.vbt = NULL; | |
79e53945 JB |
652 | } |
653 | ||
44834a67 CW |
654 | if (bdb == NULL) { |
655 | struct vbt_header *vbt = NULL; | |
656 | size_t size; | |
657 | int i; | |
79e53945 | 658 | |
44834a67 CW |
659 | bios = pci_map_rom(pdev, &size); |
660 | if (!bios) | |
661 | return -1; | |
662 | ||
663 | /* Scour memory looking for the VBT signature */ | |
664 | for (i = 0; i + 4 < size; i++) { | |
665 | if (!memcmp(bios + i, "$VBT", 4)) { | |
666 | vbt = (struct vbt_header *)(bios + i); | |
667 | break; | |
668 | } | |
669 | } | |
670 | ||
671 | if (!vbt) { | |
bd45545f | 672 | DRM_DEBUG_DRIVER("VBT signature missing\n"); |
44834a67 CW |
673 | pci_unmap_rom(pdev, bios); |
674 | return -1; | |
675 | } | |
676 | ||
677 | bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset); | |
678 | } | |
79e53945 JB |
679 | |
680 | /* Grab useful general definitions */ | |
681 | parse_general_features(dev_priv, bdb); | |
db545019 | 682 | parse_general_definitions(dev_priv, bdb); |
88631706 ML |
683 | parse_lfp_panel_data(dev_priv, bdb); |
684 | parse_sdvo_panel_data(dev_priv, bdb); | |
9b9d172d | 685 | parse_sdvo_device_mapping(dev_priv, bdb); |
6363ee6f | 686 | parse_device_mapping(dev_priv, bdb); |
32f9d658 | 687 | parse_driver_features(dev_priv, bdb); |
500a8cc4 | 688 | parse_edp(dev_priv, bdb); |
32f9d658 | 689 | |
44834a67 CW |
690 | if (bios) |
691 | pci_unmap_rom(pdev, bios); | |
79e53945 JB |
692 | |
693 | return 0; | |
694 | } | |
6d139a87 BF |
695 | |
696 | /* Ensure that vital registers have been initialised, even if the BIOS | |
697 | * is absent or just failing to do its job. | |
698 | */ | |
699 | void intel_setup_bios(struct drm_device *dev) | |
700 | { | |
701 | struct drm_i915_private *dev_priv = dev->dev_private; | |
702 | ||
703 | /* Set the Panel Power On/Off timings if uninitialized. */ | |
704 | if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) { | |
705 | /* Set T2 to 40ms and T5 to 200ms */ | |
706 | I915_WRITE(PP_ON_DELAYS, 0x019007d0); | |
707 | ||
708 | /* Set T3 to 35ms and Tx to 200ms */ | |
709 | I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); | |
710 | } | |
711 | } |