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drm/i915/bios: remove the raw version of child device config
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / intel_bios.c
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79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
ce2e87b4
VT
117 ((dvo_timing->hsync_pulse_width_hi << 8) |
118 dvo_timing->hsync_pulse_width_lo);
88631706
ML
119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
120 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
121
122 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
123 dvo_timing->vactive_lo;
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
ce2e87b4 125 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
88631706 126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
ce2e87b4
VT
127 ((dvo_timing->vsync_pulse_width_hi << 4) |
128 dvo_timing->vsync_pulse_width_lo);
88631706
ML
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
9bc35499
AJ
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
df457245
VS
144 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
145 dvo_timing->himage_lo;
146 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
147 dvo_timing->vimage_lo;
148
88631706
ML
149 /* Some VBTs have bogus h/vtotal values */
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
154
155 drm_mode_set_name(panel_fixed_mode);
156}
157
99834ea4
CW
158static const struct lvds_dvo_timing *
159get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
160 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
161 int index)
162{
163 /*
164 * the size of fp_timing varies on the different platform.
165 * So calculate the DVO timing relative offset in LVDS data
166 * entry to get the DVO timing entry
167 */
168
169 int lfp_data_size =
170 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
172 int dvo_timing_offset =
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
175 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
176
177 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178}
179
b0354385
TI
180/* get lvds_fp_timing entry
181 * this function may return NULL if the corresponding entry is invalid
182 */
183static const struct lvds_fp_timing *
184get_lvds_fp_timing(const struct bdb_header *bdb,
185 const struct bdb_lvds_lfp_data *data,
186 const struct bdb_lvds_lfp_data_ptrs *ptrs,
187 int index)
188{
189 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
190 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
191 size_t ofs;
192
193 if (index >= ARRAY_SIZE(ptrs->ptr))
194 return NULL;
195 ofs = ptrs->ptr[index].fp_timing_offset;
196 if (ofs < data_ofs ||
197 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
198 return NULL;
199 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
200}
201
88631706
ML
202/* Try to find integrated panel data */
203static void
204parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 205 const struct bdb_header *bdb)
79e53945 206{
99834ea4
CW
207 const struct bdb_lvds_options *lvds_options;
208 const struct bdb_lvds_lfp_data *lvds_lfp_data;
209 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
210 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 211 const struct lvds_fp_timing *fp_timing;
79e53945 212 struct drm_display_mode *panel_fixed_mode;
3e845c7a 213 int panel_type;
c329a4ec 214 int drrs_mode;
a0562819 215 int ret;
79e53945 216
79e53945
JB
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
41aa3448 221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819 222
6f9f4b7a 223 ret = intel_opregion_get_panel_type(dev_priv);
a0562819
VS
224 if (ret >= 0) {
225 WARN_ON(ret > 0xf);
226 panel_type = ret;
227 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
228 } else {
229 if (lvds_options->panel_type > 0xf) {
230 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
231 lvds_options->panel_type);
232 return;
233 }
234 panel_type = lvds_options->panel_type;
235 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 236 }
6a04002b 237
3e845c7a 238 dev_priv->vbt.panel_type = panel_type;
79e53945 239
83a7280e
PB
240 drrs_mode = (lvds_options->dps_panel_type_bits
241 >> (panel_type * 2)) & MODE_MASK;
242 /*
243 * VBT has static DRRS = 0 and seamless DRRS = 2.
244 * The below piece of code is required to adjust vbt.drrs_type
245 * to match the enum drrs_support_type.
246 */
247 switch (drrs_mode) {
248 case 0:
249 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
250 DRM_DEBUG_KMS("DRRS supported mode is static\n");
251 break;
252 case 2:
253 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
254 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
255 break;
256 default:
257 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
258 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
259 break;
260 }
261
79e53945
JB
262 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
263 if (!lvds_lfp_data)
264 return;
265
1b16de0b
JB
266 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
267 if (!lvds_lfp_data_ptrs)
268 return;
269
41aa3448 270 dev_priv->vbt.lvds_vbt = 1;
79e53945 271
99834ea4
CW
272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
273 lvds_lfp_data_ptrs,
3e845c7a 274 panel_type);
79e53945 275
9a298b2a 276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
277 if (!panel_fixed_mode)
278 return;
79e53945 279
99834ea4 280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 281
41aa3448 282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 283
28c97730 284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 285 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 286
b0354385
TI
287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
288 lvds_lfp_data_ptrs,
3e845c7a 289 panel_type);
b0354385
TI
290 if (fp_timing) {
291 /* check the resolution, just to be sure */
292 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
293 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 296 dev_priv->vbt.bios_lvds_val);
b0354385
TI
297 }
298 }
88631706
ML
299}
300
f00076d2 301static void
dcb58a40
JN
302parse_lfp_backlight(struct drm_i915_private *dev_priv,
303 const struct bdb_header *bdb)
f00076d2
JN
304{
305 const struct bdb_lfp_backlight_data *backlight_data;
306 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 307 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
308
309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
310 if (!backlight_data)
311 return;
312
313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
315 backlight_data->entry_size);
316 return;
317 }
318
319 entry = &backlight_data->data[panel_type];
320
39fbc9c8
JN
321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
322 if (!dev_priv->vbt.backlight.present) {
323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
324 entry->type);
325 return;
326 }
327
9a41e17d
D
328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
329 if (bdb->version >= 191 &&
330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
331 const struct bdb_lfp_backlight_control_method *method;
332
333 method = &backlight_data->backlight_control[panel_type];
334 dev_priv->vbt.backlight.type = method->type;
add03379 335 dev_priv->vbt.backlight.controller = method->controller;
9a41e17d
D
336 }
337
f00076d2
JN
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2 341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
add03379 342 "active %s, min brightness %u, level %u, controller %u\n",
f00076d2
JN
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 345 dev_priv->vbt.backlight.min_brightness,
add03379
VS
346 backlight_data->level[panel_type],
347 dev_priv->vbt.backlight.controller);
f00076d2
JN
348}
349
88631706
ML
350/* Try to find sdvo panel data */
351static void
352parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 353 const struct bdb_header *bdb)
88631706 354{
e8ef3b4c 355 const struct lvds_dvo_timing *dvo_timing;
88631706 356 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 357 int index;
79e53945 358
d330a953 359 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
5a1e5b6c 365 if (index == -1) {
e8ef3b4c 366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
88631706
ML
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
9a298b2a 379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
380 if (!panel_fixed_mode)
381 return;
382
5a1e5b6c 383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 384
41aa3448 385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 386
5a1e5b6c
CW
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
389}
390
98f3a1dc 391static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
392 bool alternate)
393{
98f3a1dc 394 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 395 case 2:
e91e941b 396 return alternate ? 66667 : 48000;
9a4114ff
BF
397 case 3:
398 case 4:
e91e941b 399 return alternate ? 100000 : 96000;
9a4114ff 400 default:
e91e941b 401 return alternate ? 100000 : 120000;
9a4114ff
BF
402 }
403}
404
79e53945
JB
405static void
406parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 407 const struct bdb_header *bdb)
79e53945 408{
e8ef3b4c 409 const struct bdb_general_features *general;
79e53945 410
79e53945 411 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
412 if (!general)
413 return;
414
415 dev_priv->vbt.int_tv_support = general->int_tv_support;
416 /* int_crt_support can't be trusted on earlier platforms */
417 if (bdb->version >= 155 &&
418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
419 dev_priv->vbt.int_crt_support = general->int_crt_support;
420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
421 dev_priv->vbt.lvds_ssc_freq =
422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
423 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
425 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
426 dev_priv->vbt.int_tv_support,
427 dev_priv->vbt.int_crt_support,
428 dev_priv->vbt.lvds_use_ssc,
429 dev_priv->vbt.lvds_ssc_freq,
430 dev_priv->vbt.display_clock_mode,
431 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
432}
433
db545019
DMEA
434static void
435parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 436 const struct bdb_header *bdb)
db545019 437{
e8ef3b4c 438 const struct bdb_general_definitions *general;
db545019 439
db545019
DMEA
440 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
441 if (general) {
442 u16 block_size = get_blocksize(general);
443 if (block_size >= sizeof(*general)) {
444 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 445 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 446 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 447 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 448 } else {
28c97730 449 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 450 block_size);
db545019
DMEA
451 }
452 }
453}
454
e8ef3b4c
JN
455static const union child_device_config *
456child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 457{
e8ef3b4c 458 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
459}
460
9b9d172d 461static void
462parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 463 const struct bdb_header *bdb)
9b9d172d 464{
465 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 466 const struct bdb_general_definitions *p_defs;
6cc38aca 467 const struct old_child_dev_config *child; /* legacy */
9b9d172d 468 int i, child_device_num, count;
db545019 469 u16 block_size;
9b9d172d 470
471 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
472 if (!p_defs) {
44834a67 473 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 474 return;
475 }
6cc38aca
JN
476
477 /*
478 * Only parse SDVO mappings when the general definitions block child
479 * device size matches that of the *legacy* child device config
480 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 481 */
6cc38aca
JN
482 if (p_defs->child_dev_size != sizeof(*child)) {
483 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 484 return;
485 }
486 /* get the block size of general definitions */
db545019 487 block_size = get_blocksize(p_defs);
9b9d172d 488 /* get the number of child device */
489 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 490 p_defs->child_dev_size;
9b9d172d 491 count = 0;
492 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
493 child = &child_device_ptr(p_defs, i)->old;
494 if (!child->device_type) {
9b9d172d 495 /* skip the device block if device type is invalid */
496 continue;
497 }
6cc38aca
JN
498 if (child->slave_addr != SLAVE_ADDR1 &&
499 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 500 /*
501 * If the slave address is neither 0x70 nor 0x72,
502 * it is not a SDVO device. Skip it.
503 */
504 continue;
505 }
6cc38aca
JN
506 if (child->dvo_port != DEVICE_PORT_DVOB &&
507 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 508 /* skip the incorrect SDVO port */
0206e353 509 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 510 continue;
511 }
28c97730 512 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
513 " %s port\n",
514 child->slave_addr,
515 (child->dvo_port == DEVICE_PORT_DVOB) ?
516 "SDVOB" : "SDVOC");
9d6c875d 517 p_mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
9b9d172d 518 if (!p_mapping->initialized) {
6cc38aca
JN
519 p_mapping->dvo_port = child->dvo_port;
520 p_mapping->slave_addr = child->slave_addr;
521 p_mapping->dvo_wiring = child->dvo_wiring;
522 p_mapping->ddc_pin = child->ddc_pin;
523 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 524 p_mapping->initialized = 1;
46eb3036 525 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
526 p_mapping->dvo_port,
527 p_mapping->slave_addr,
528 p_mapping->dvo_wiring,
529 p_mapping->ddc_pin,
46eb3036 530 p_mapping->i2c_pin);
9b9d172d 531 } else {
28c97730 532 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 533 "two SDVO device.\n");
534 }
6cc38aca 535 if (child->slave2_addr) {
9b9d172d 536 /* Maybe this is a SDVO device with multiple inputs */
537 /* And the mapping info is not added */
28c97730
ZY
538 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
539 " is a SDVO device with multiple inputs.\n");
9b9d172d 540 }
541 count++;
542 }
543
544 if (!count) {
545 /* No SDVO device info is found */
28c97730 546 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 547 }
548 return;
549}
32f9d658
ZW
550
551static void
552parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 553 const struct bdb_header *bdb)
32f9d658 554{
e8ef3b4c 555 const struct bdb_driver_features *driver;
32f9d658 556
32f9d658 557 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
558 if (!driver)
559 return;
560
6fca55b1 561 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 562 dev_priv->vbt.edp.support = 1;
652c393a 563
83a7280e
PB
564 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
565 /*
566 * If DRRS is not supported, drrs_type has to be set to 0.
567 * This is because, VBT is configured in such a way that
568 * static DRRS is 0 and DRRS not supported is represented by
569 * driver->drrs_enabled=false
570 */
571 if (!driver->drrs_enabled)
572 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
573}
574
500a8cc4 575static void
dcb58a40 576parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 577{
e8ef3b4c
JN
578 const struct bdb_edp *edp;
579 const struct edp_power_seq *edp_pps;
580 const struct edp_link_params *edp_link_params;
3e845c7a 581 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
582
583 edp = find_section(bdb, BDB_EDP);
584 if (!edp) {
6aa23e65 585 if (dev_priv->vbt.edp.support)
9a30a61f 586 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
587 return;
588 }
589
590 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
591 case EDP_18BPP:
6aa23e65 592 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
593 break;
594 case EDP_24BPP:
6aa23e65 595 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
596 break;
597 case EDP_30BPP:
6aa23e65 598 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
599 break;
600 }
5ceb0f9b 601
9f0e7ff4
JB
602 /* Get the eDP sequencing and link info */
603 edp_pps = &edp->power_seqs[panel_type];
604 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 605
6aa23e65 606 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 607
e13e2b2c
JN
608 switch (edp_link_params->rate) {
609 case EDP_RATE_1_62:
6aa23e65 610 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
611 break;
612 case EDP_RATE_2_7:
6aa23e65 613 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
614 break;
615 default:
616 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
617 edp_link_params->rate);
618 break;
619 }
620
9f0e7ff4 621 switch (edp_link_params->lanes) {
e13e2b2c 622 case EDP_LANE_1:
6aa23e65 623 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 624 break;
e13e2b2c 625 case EDP_LANE_2:
6aa23e65 626 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 627 break;
e13e2b2c 628 case EDP_LANE_4:
6aa23e65 629 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 630 break;
e13e2b2c
JN
631 default:
632 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
633 edp_link_params->lanes);
634 break;
9f0e7ff4 635 }
e13e2b2c 636
9f0e7ff4 637 switch (edp_link_params->preemphasis) {
e13e2b2c 638 case EDP_PREEMPHASIS_NONE:
6aa23e65 639 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 640 break;
e13e2b2c 641 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 642 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 643 break;
e13e2b2c 644 case EDP_PREEMPHASIS_6dB:
6aa23e65 645 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 646 break;
e13e2b2c 647 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 648 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 649 break;
e13e2b2c
JN
650 default:
651 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
652 edp_link_params->preemphasis);
653 break;
9f0e7ff4 654 }
e13e2b2c 655
9f0e7ff4 656 switch (edp_link_params->vswing) {
e13e2b2c 657 case EDP_VSWING_0_4V:
6aa23e65 658 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 659 break;
e13e2b2c 660 case EDP_VSWING_0_6V:
6aa23e65 661 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 662 break;
e13e2b2c 663 case EDP_VSWING_0_8V:
6aa23e65 664 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 665 break;
e13e2b2c 666 case EDP_VSWING_1_2V:
6aa23e65 667 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 668 break;
e13e2b2c
JN
669 default:
670 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
671 edp_link_params->vswing);
672 break;
9f0e7ff4 673 }
9a57f5bb
SJ
674
675 if (bdb->version >= 173) {
676 uint8_t vswing;
677
9e458034
SJ
678 /* Don't read from VBT if module parameter has valid value*/
679 if (i915.edp_vswing) {
06411f08 680 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
9e458034
SJ
681 } else {
682 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 683 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 684 }
9a57f5bb 685 }
500a8cc4
ZW
686}
687
bfd7ebda 688static void
dcb58a40 689parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 690{
e8ef3b4c
JN
691 const struct bdb_psr *psr;
692 const struct psr_table *psr_table;
3e845c7a 693 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
694
695 psr = find_section(bdb, BDB_PSR);
696 if (!psr) {
697 DRM_DEBUG_KMS("No PSR BDB found.\n");
698 return;
699 }
700
701 psr_table = &psr->psr_table[panel_type];
702
703 dev_priv->vbt.psr.full_link = psr_table->full_link;
704 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
705
706 /* Allowed VBT values goes from 0 to 15 */
707 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
708 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
709
710 switch (psr_table->lines_to_wait) {
711 case 0:
712 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
713 break;
714 case 1:
715 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
716 break;
717 case 2:
718 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
719 break;
720 case 3:
721 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
722 break;
723 default:
724 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
725 psr_table->lines_to_wait);
726 break;
727 }
728
729 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
730 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
731}
732
d17c5443 733static void
0f8689f5
JN
734parse_mipi_config(struct drm_i915_private *dev_priv,
735 const struct bdb_header *bdb)
d17c5443 736{
e8ef3b4c 737 const struct bdb_mipi_config *start;
e8ef3b4c
JN
738 const struct mipi_config *config;
739 const struct mipi_pps_data *pps;
3e845c7a 740 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 741
3e6bd011 742 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 743 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
744 return;
745
d3b542fc
SK
746 /* Initialize this to undefined indicating no generic MIPI support */
747 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
748
749 /* Block #40 is already parsed and panel_fixed_mode is
750 * stored in dev_priv->lfp_lvds_vbt_mode
751 * resuse this when needed
752 */
d17c5443 753
d3b542fc
SK
754 /* Parse #52 for panel index used from panel_type already
755 * parsed
756 */
757 start = find_section(bdb, BDB_MIPI_CONFIG);
758 if (!start) {
759 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
760 return;
761 }
762
d3b542fc
SK
763 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
764 panel_type);
765
766 /*
767 * get hold of the correct configuration block and pps data as per
768 * the panel_type as index
769 */
770 config = &start->config[panel_type];
771 pps = &start->pps[panel_type];
772
773 /* store as of now full data. Trim when we realise all is not needed */
774 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
775 if (!dev_priv->vbt.dsi.config)
776 return;
777
778 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
779 if (!dev_priv->vbt.dsi.pps) {
780 kfree(dev_priv->vbt.dsi.config);
781 return;
782 }
783
9f7c5b17
D
784 /*
785 * These fields are introduced from the VBT version 197 onwards,
786 * so making sure that these bits are set zero in the previous
787 * versions.
788 */
789 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
790 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
791 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
792 }
793
d3b542fc 794 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 795 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
796}
797
5db72099
JN
798/* Find the sequence block and size for the given panel. */
799static const u8 *
800find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 801 u16 panel_id, u32 *seq_size)
5db72099
JN
802{
803 u32 total = get_blocksize(sequence);
804 const u8 *data = &sequence->data[0];
805 u8 current_id;
2a33d934
JN
806 u32 current_size;
807 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
808 int index = 0;
809 int i;
810
2a33d934
JN
811 /* skip new block size */
812 if (sequence->version >= 3)
813 data += 4;
814
815 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
816 if (index + header_size > total) {
817 DRM_ERROR("Invalid sequence block (header)\n");
818 return NULL;
819 }
820
5db72099 821 current_id = *(data + index);
2a33d934
JN
822 if (sequence->version >= 3)
823 current_size = *((const u32 *)(data + index + 1));
824 else
825 current_size = *((const u16 *)(data + index + 1));
5db72099 826
2a33d934 827 index += header_size;
5db72099
JN
828
829 if (index + current_size > total) {
830 DRM_ERROR("Invalid sequence block\n");
831 return NULL;
832 }
833
834 if (current_id == panel_id) {
835 *seq_size = current_size;
836 return data + index;
837 }
838
839 index += current_size;
840 }
841
842 DRM_ERROR("Sequence block detected but no valid configuration\n");
843
844 return NULL;
845}
846
8d3ed2f3
JN
847static int goto_next_sequence(const u8 *data, int index, int total)
848{
849 u16 len;
850
851 /* Skip Sequence Byte. */
852 for (index = index + 1; index < total; index += len) {
853 u8 operation_byte = *(data + index);
854 index++;
855
856 switch (operation_byte) {
857 case MIPI_SEQ_ELEM_END:
858 return index;
859 case MIPI_SEQ_ELEM_SEND_PKT:
860 if (index + 4 > total)
861 return 0;
862
863 len = *((const u16 *)(data + index + 2)) + 4;
864 break;
865 case MIPI_SEQ_ELEM_DELAY:
866 len = 4;
867 break;
868 case MIPI_SEQ_ELEM_GPIO:
869 len = 2;
870 break;
f4d64936
JN
871 case MIPI_SEQ_ELEM_I2C:
872 if (index + 7 > total)
873 return 0;
874 len = *(data + index + 6) + 7;
875 break;
8d3ed2f3
JN
876 default:
877 DRM_ERROR("Unknown operation byte\n");
878 return 0;
879 }
880 }
881
882 return 0;
883}
884
2a33d934
JN
885static int goto_next_sequence_v3(const u8 *data, int index, int total)
886{
887 int seq_end;
888 u16 len;
6765bd6d 889 u32 size_of_sequence;
2a33d934
JN
890
891 /*
892 * Could skip sequence based on Size of Sequence alone, but also do some
893 * checking on the structure.
894 */
895 if (total < 5) {
896 DRM_ERROR("Too small sequence size\n");
897 return 0;
898 }
899
6765bd6d
JN
900 /* Skip Sequence Byte. */
901 index++;
902
903 /*
904 * Size of Sequence. Excludes the Sequence Byte and the size itself,
905 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
906 * byte.
907 */
908 size_of_sequence = *((const uint32_t *)(data + index));
909 index += 4;
910
911 seq_end = index + size_of_sequence;
2a33d934
JN
912 if (seq_end > total) {
913 DRM_ERROR("Invalid sequence size\n");
914 return 0;
915 }
916
6765bd6d 917 for (; index < total; index += len) {
2a33d934
JN
918 u8 operation_byte = *(data + index);
919 index++;
920
921 if (operation_byte == MIPI_SEQ_ELEM_END) {
922 if (index != seq_end) {
923 DRM_ERROR("Invalid element structure\n");
924 return 0;
925 }
926 return index;
927 }
928
929 len = *(data + index);
930 index++;
931
932 /*
933 * FIXME: Would be nice to check elements like for v1/v2 in
934 * goto_next_sequence() above.
935 */
936 switch (operation_byte) {
937 case MIPI_SEQ_ELEM_SEND_PKT:
938 case MIPI_SEQ_ELEM_DELAY:
939 case MIPI_SEQ_ELEM_GPIO:
940 case MIPI_SEQ_ELEM_I2C:
941 case MIPI_SEQ_ELEM_SPI:
942 case MIPI_SEQ_ELEM_PMIC:
943 break;
944 default:
945 DRM_ERROR("Unknown operation byte %u\n",
946 operation_byte);
947 break;
948 }
949 }
950
951 return 0;
952}
953
0f8689f5
JN
954static void
955parse_mipi_sequence(struct drm_i915_private *dev_priv,
956 const struct bdb_header *bdb)
957{
3e845c7a 958 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
959 const struct bdb_mipi_sequence *sequence;
960 const u8 *seq_data;
2a33d934 961 u32 seq_size;
0f8689f5 962 u8 *data;
8d3ed2f3 963 int index = 0;
0f8689f5
JN
964
965 /* Only our generic panel driver uses the sequence block. */
966 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
967 return;
d3b542fc 968
d3b542fc
SK
969 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
970 if (!sequence) {
971 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
972 return;
973 }
974
cd67d226 975 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
976 if (sequence->version >= 4) {
977 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
978 sequence->version);
cd67d226
JN
979 return;
980 }
981
2a33d934 982 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 983
5db72099
JN
984 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
985 if (!seq_data)
d3b542fc 986 return;
d3b542fc 987
8d3ed2f3
JN
988 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
989 if (!data)
d3b542fc
SK
990 return;
991
8d3ed2f3
JN
992 /* Parse the sequences, store pointers to each sequence. */
993 for (;;) {
994 u8 seq_id = *(data + index);
995 if (seq_id == MIPI_SEQ_END)
996 break;
d3b542fc 997
8d3ed2f3
JN
998 if (seq_id >= MIPI_SEQ_MAX) {
999 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
1000 goto err;
1001 }
1002
4b4f497e
JN
1003 /* Log about presence of sequences we won't run. */
1004 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1005 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
1006
8d3ed2f3 1007 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 1008
2a33d934
JN
1009 if (sequence->version >= 3)
1010 index = goto_next_sequence_v3(data, index, seq_size);
1011 else
1012 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
1013 if (!index) {
1014 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
1015 goto err;
1016 }
d3b542fc
SK
1017 }
1018
8d3ed2f3
JN
1019 dev_priv->vbt.dsi.data = data;
1020 dev_priv->vbt.dsi.size = seq_size;
1021 dev_priv->vbt.dsi.seq_version = sequence->version;
1022
1023 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 1024 return;
d3b542fc 1025
8d3ed2f3
JN
1026err:
1027 kfree(data);
ed3b6679 1028 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
1029}
1030
75067dde
AK
1031static u8 translate_iboost(u8 val)
1032{
1033 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1034
1035 if (val >= ARRAY_SIZE(mapping)) {
1036 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1037 return 0;
1038 }
1039 return mapping[val];
1040}
1041
9454fa87
VS
1042static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1043 enum port port)
1044{
1045 const struct ddi_vbt_port_info *info =
1046 &dev_priv->vbt.ddi_port_info[port];
1047 enum port p;
1048
1049 if (!info->alternate_ddc_pin)
1050 return;
1051
1052 for_each_port_masked(p, (1 << port) - 1) {
1053 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1054
1055 if (info->alternate_ddc_pin != i->alternate_ddc_pin)
1056 continue;
1057
1058 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1059 "disabling port %c DVI/HDMI support\n",
1060 port_name(p), i->alternate_ddc_pin,
1061 port_name(port), port_name(p));
1062
1063 /*
1064 * If we have multiple ports supposedly sharing the
1065 * pin, then dvi/hdmi couldn't exist on the shared
1066 * port. Otherwise they share the same ddc bin and
1067 * system couldn't communicate with them separately.
1068 *
1069 * Due to parsing the ports in alphabetical order,
1070 * a higher port will always clobber a lower one.
1071 */
1072 i->supports_dvi = false;
1073 i->supports_hdmi = false;
1074 i->alternate_ddc_pin = 0;
1075 }
1076}
1077
1078static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1079 enum port port)
1080{
1081 const struct ddi_vbt_port_info *info =
1082 &dev_priv->vbt.ddi_port_info[port];
1083 enum port p;
1084
1085 if (!info->alternate_aux_channel)
1086 return;
1087
1088 for_each_port_masked(p, (1 << port) - 1) {
1089 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1090
1091 if (info->alternate_aux_channel != i->alternate_aux_channel)
1092 continue;
1093
1094 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1095 "disabling port %c DP support\n",
1096 port_name(p), i->alternate_aux_channel,
1097 port_name(port), port_name(p));
1098
1099 /*
1100 * If we have multiple ports supposedlt sharing the
1101 * aux channel, then DP couldn't exist on the shared
1102 * port. Otherwise they share the same aux channel
1103 * and system couldn't communicate with them separately.
1104 *
1105 * Due to parsing the ports in alphabetical order,
1106 * a higher port will always clobber a lower one.
1107 */
1108 i->supports_dp = false;
1109 i->alternate_aux_channel = 0;
1110 }
1111}
1112
6acab15a 1113static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1114 const struct bdb_header *bdb)
6acab15a
PZ
1115{
1116 union child_device_config *it, *child = NULL;
1117 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1118 uint8_t hdmi_level_shift;
1119 int i, j;
554d6af5 1120 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1121 uint8_t aux_channel, ddc_pin;
6acab15a 1122 /* Each DDI port can have more than one value on the "DVO Port" field,
b5273d72
JN
1123 * so look for all the possible values for each port.
1124 */
2800e4c2
RV
1125 int dvo_ports[][3] = {
1126 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1127 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1128 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1129 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1130 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1131 };
1132
b5273d72
JN
1133 /*
1134 * Find the first child device to reference the port, report if more
1135 * than one found.
1136 */
6acab15a
PZ
1137 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1138 it = dev_priv->vbt.child_dev + i;
1139
2800e4c2 1140 for (j = 0; j < 3; j++) {
6acab15a
PZ
1141 if (dvo_ports[port][j] == -1)
1142 break;
1143
1144 if (it->common.dvo_port == dvo_ports[port][j]) {
1145 if (child) {
b5273d72 1146 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
6acab15a 1147 port_name(port));
b5273d72
JN
1148 } else {
1149 child = it;
6acab15a 1150 }
6acab15a
PZ
1151 }
1152 }
1153 }
1154 if (!child)
1155 return;
1156
7a17995a 1157 aux_channel = child->common.aux_channel;
11c1b657 1158 ddc_pin = child->common.ddc_pin;
6bf19e7c 1159
78eb06c3
VS
1160 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1161 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1162 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1163 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1164 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1165
311a2094
PZ
1166 info->supports_dvi = is_dvi;
1167 info->supports_hdmi = is_hdmi;
1168 info->supports_dp = is_dp;
a98d9c1d 1169 info->supports_edp = is_edp;
311a2094 1170
554d6af5
PZ
1171 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1172 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1173
1174 if (is_edp && is_dvi)
1175 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1176 port_name(port));
1177 if (is_crt && port != PORT_E)
1178 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1179 if (is_crt && (is_dvi || is_dp))
1180 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1181 port_name(port));
1182 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1183 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1184 if (!is_dvi && !is_dp && !is_crt)
1185 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1186 port_name(port));
1187 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1188 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1189
1190 if (is_dvi) {
9454fa87
VS
1191 info->alternate_ddc_pin = ddc_pin;
1192
75be7756
RV
1193 /*
1194 * All VBTs that we got so far for B Stepping has this
1195 * information wrong for Port D. So, let's just ignore for now.
1196 */
1197 if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
1198 port == PORT_D) {
1199 info->alternate_ddc_pin = 0;
1200 }
1201
9454fa87 1202 sanitize_ddc_pin(dev_priv, port);
6bf19e7c
PZ
1203 }
1204
1205 if (is_dp) {
9454fa87
VS
1206 info->alternate_aux_channel = aux_channel;
1207
1208 sanitize_aux_ch(dev_priv, port);
6bf19e7c
PZ
1209 }
1210
6acab15a
PZ
1211 if (bdb->version >= 158) {
1212 /* The VBT HDMI level shift values match the table we have. */
d58107f9 1213 hdmi_level_shift = child->common.hdmi_level_shifter_value;
ce4dd49e
DL
1214 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1215 port_name(port),
1216 hdmi_level_shift);
1217 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1218 }
75067dde
AK
1219
1220 /* Parse the I_boost config for SKL and above */
4e27bd50 1221 if (bdb->version >= 196 && child->common.iboost) {
75067dde
AK
1222 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1223 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1224 port_name(port), info->dp_boost_level);
1225 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1226 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1227 port_name(port), info->hdmi_boost_level);
1228 }
6acab15a
PZ
1229}
1230
1231static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1232 const struct bdb_header *bdb)
6acab15a 1233{
6acab15a
PZ
1234 enum port port;
1235
98f3a1dc 1236 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1237 return;
1238
1239 if (!dev_priv->vbt.child_dev_num)
1240 return;
1241
1242 if (bdb->version < 155)
1243 return;
1244
1245 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1246 parse_ddi_port(dev_priv, port, bdb);
1247}
1248
6363ee6f
ZY
1249static void
1250parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1251 const struct bdb_header *bdb)
6363ee6f 1252{
e8ef3b4c
JN
1253 const struct bdb_general_definitions *p_defs;
1254 const union child_device_config *p_child;
1255 union child_device_config *child_dev_ptr;
6363ee6f 1256 int i, child_device_num, count;
e2d6cf7f
DW
1257 u8 expected_size;
1258 u16 block_size;
6363ee6f
ZY
1259
1260 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1261 if (!p_defs) {
44834a67 1262 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1263 return;
1264 }
7244f309
VS
1265 if (bdb->version < 106) {
1266 expected_size = 22;
fa05178c 1267 } else if (bdb->version < 111) {
52b69c84
VS
1268 expected_size = 27;
1269 } else if (bdb->version < 195) {
1270 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1271 expected_size = sizeof(struct old_child_dev_config);
1272 } else if (bdb->version == 195) {
1273 expected_size = 37;
1274 } else if (bdb->version <= 197) {
1275 expected_size = 38;
1276 } else {
1277 expected_size = 38;
1278 BUILD_BUG_ON(sizeof(*p_child) < 38);
1279 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1280 bdb->version, expected_size);
1281 }
1282
e2d6cf7f
DW
1283 /* Flag an error for unexpected size, but continue anyway. */
1284 if (p_defs->child_dev_size != expected_size)
1285 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1286 p_defs->child_dev_size, expected_size, bdb->version);
1287
52b69c84
VS
1288 /* The legacy sized child device config is the minimum we need. */
1289 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1290 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1291 p_defs->child_dev_size);
1292 return;
1293 }
1294
6363ee6f
ZY
1295 /* get the block size of general definitions */
1296 block_size = get_blocksize(p_defs);
1297 /* get the number of child device */
1298 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1299 p_defs->child_dev_size;
6363ee6f
ZY
1300 count = 0;
1301 /* get the number of child device that is present */
1302 for (i = 0; i < child_device_num; i++) {
90e4f159 1303 p_child = child_device_ptr(p_defs, i);
768f69c9 1304 if (!p_child->common.device_type) {
6363ee6f
ZY
1305 /* skip the device block if device type is invalid */
1306 continue;
1307 }
1308 count++;
1309 }
1310 if (!count) {
0206e353 1311 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1312 return;
1313 }
41aa3448
RV
1314 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1315 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1316 DRM_DEBUG_KMS("No memory space for child device\n");
1317 return;
1318 }
1319
41aa3448 1320 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1321 count = 0;
1322 for (i = 0; i < child_device_num; i++) {
90e4f159 1323 p_child = child_device_ptr(p_defs, i);
768f69c9 1324 if (!p_child->common.device_type) {
6363ee6f
ZY
1325 /* skip the device block if device type is invalid */
1326 continue;
1327 }
3e6bd011 1328
41aa3448 1329 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1330 count++;
e2d6cf7f
DW
1331
1332 /*
1333 * Copy as much as we know (sizeof) and is available
1334 * (child_dev_size) of the child device. Accessing the data must
1335 * depend on VBT version.
1336 */
1337 memcpy(child_dev_ptr, p_child,
1338 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
4e27bd50
SS
1339
1340 /*
1341 * copied full block, now init values when they are not
1342 * available in current version
1343 */
1344 if (bdb->version < 196) {
1345 /* Set default values for bits added from v196 */
1346 child_dev_ptr->common.iboost = 0;
1347 child_dev_ptr->common.hpd_invert = 0;
1348 }
1349
1350 if (bdb->version < 192)
1351 child_dev_ptr->common.lspcon = 0;
6363ee6f
ZY
1352 }
1353 return;
1354}
44834a67 1355
bb1d1329 1356/* Common defaults which may be overridden by VBT. */
6a04002b
SQ
1357static void
1358init_vbt_defaults(struct drm_i915_private *dev_priv)
1359{
6acab15a 1360 enum port port;
9a4114ff 1361
988c7015 1362 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1363
56c4b63a
JN
1364 /* Default to having backlight */
1365 dev_priv->vbt.backlight.present = true;
1366
6a04002b 1367 /* LFP panel data */
41aa3448
RV
1368 dev_priv->vbt.lvds_dither = 1;
1369 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1370
1371 /* SDVO panel data */
41aa3448 1372 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1373
1374 /* general features */
41aa3448
RV
1375 dev_priv->vbt.int_tv_support = 1;
1376 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1377
1378 /* Default to using SSC */
41aa3448 1379 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1380 /*
1381 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1382 * clock for LVDS.
1383 */
98f3a1dc
JN
1384 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1385 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1386 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1387
1388 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1389 struct ddi_vbt_port_info *info =
1390 &dev_priv->vbt.ddi_port_info[port];
1391
ce4dd49e 1392 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
bb1d1329
JN
1393 }
1394}
1395
1396/* Defaults to initialize only if there is no VBT. */
1397static void
1398init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1399{
1400 enum port port;
1401
1402 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1403 struct ddi_vbt_port_info *info =
1404 &dev_priv->vbt.ddi_port_info[port];
311a2094
PZ
1405
1406 info->supports_dvi = (port != PORT_A && port != PORT_E);
1407 info->supports_hdmi = info->supports_dvi;
1408 info->supports_dp = (port != PORT_E);
6acab15a 1409 }
6a04002b
SQ
1410}
1411
caf37fa4
JN
1412static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1413{
1414 const void *_vbt = vbt;
1415
1416 return _vbt + vbt->bdb_offset;
1417}
1418
f0067a31
JN
1419/**
1420 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1421 * @buf: pointer to a buffer to validate
1422 * @size: size of the buffer
1423 *
1424 * Returns true on valid VBT.
1425 */
1426bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1427{
f0067a31 1428 const struct vbt_header *vbt = buf;
dcb58a40 1429 const struct bdb_header *bdb;
3dd4e846 1430
caf37fa4 1431 if (!vbt)
f0067a31 1432 return false;
caf37fa4 1433
f0067a31 1434 if (sizeof(struct vbt_header) > size) {
3dd4e846 1435 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1436 return false;
3dd4e846
CW
1437 }
1438
1439 if (memcmp(vbt->signature, "$VBT", 4)) {
1440 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1441 return false;
3dd4e846
CW
1442 }
1443
e8f9ae9b
CW
1444 if (range_overflows_t(size_t,
1445 vbt->bdb_offset,
1446 sizeof(struct bdb_header),
1447 size)) {
3dd4e846 1448 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1449 return false;
3dd4e846
CW
1450 }
1451
caf37fa4 1452 bdb = get_bdb_header(vbt);
e8f9ae9b 1453 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3dd4e846 1454 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1455 return false;
3dd4e846
CW
1456 }
1457
caf37fa4 1458 return vbt;
3dd4e846
CW
1459}
1460
caf37fa4 1461static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1462{
b34a991a
JN
1463 size_t i;
1464
1465 /* Scour memory looking for the VBT signature. */
1466 for (i = 0; i + 4 < size; i++) {
f0067a31 1467 void *vbt;
115719fc 1468
f0067a31
JN
1469 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1470 continue;
1471
1472 /*
1473 * This is the one place where we explicitly discard the address
1474 * space (__iomem) of the BIOS/VBT.
1475 */
1476 vbt = (void __force *) bios + i;
1477 if (intel_bios_is_valid_vbt(vbt, size - i))
1478 return vbt;
1479
1480 break;
b34a991a
JN
1481 }
1482
f0067a31 1483 return NULL;
b34a991a
JN
1484}
1485
79e53945 1486/**
8b8e1a89 1487 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1488 * @dev_priv: i915 device instance
79e53945 1489 *
66578857
JN
1490 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
1491 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
1492 * initialize some defaults if the VBT is not present at all.
79e53945 1493 */
66578857 1494void intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1495{
91c8a326 1496 struct pci_dev *pdev = dev_priv->drm.pdev;
f0067a31 1497 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1498 const struct bdb_header *bdb;
44834a67
CW
1499 u8 __iomem *bios = NULL;
1500
66578857
JN
1501 if (HAS_PCH_NOP(dev_priv)) {
1502 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
1503 return;
1504 }
ab5c608b 1505
6a04002b 1506 init_vbt_defaults(dev_priv);
f899fc64 1507
66578857 1508 /* If the OpRegion does not have VBT, look in PCI ROM. */
f0067a31 1509 if (!vbt) {
b34a991a 1510 size_t size;
79e53945 1511
44834a67
CW
1512 bios = pci_map_rom(pdev, &size);
1513 if (!bios)
66578857 1514 goto out;
44834a67 1515
caf37fa4 1516 vbt = find_vbt(bios, size);
66578857
JN
1517 if (!vbt)
1518 goto out;
e2051c44
JN
1519
1520 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1521 }
79e53945 1522
caf37fa4
JN
1523 bdb = get_bdb_header(vbt);
1524
3556dd40
JN
1525 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1526 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1527
79e53945
JB
1528 /* Grab useful general definitions */
1529 parse_general_features(dev_priv, bdb);
db545019 1530 parse_general_definitions(dev_priv, bdb);
88631706 1531 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1532 parse_lfp_backlight(dev_priv, bdb);
88631706 1533 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1534 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1535 parse_device_mapping(dev_priv, bdb);
32f9d658 1536 parse_driver_features(dev_priv, bdb);
500a8cc4 1537 parse_edp(dev_priv, bdb);
bfd7ebda 1538 parse_psr(dev_priv, bdb);
0f8689f5
JN
1539 parse_mipi_config(dev_priv, bdb);
1540 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1541 parse_ddi_ports(dev_priv, bdb);
32f9d658 1542
66578857 1543out:
bb1d1329 1544 if (!vbt) {
66578857 1545 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
bb1d1329
JN
1546 init_vbt_missing_defaults(dev_priv);
1547 }
66578857 1548
44834a67
CW
1549 if (bios)
1550 pci_unmap_rom(pdev, bios);
79e53945 1551}
3bdd14d5
JN
1552
1553/**
1554 * intel_bios_is_tv_present - is integrated TV present in VBT
1555 * @dev_priv: i915 device instance
1556 *
1557 * Return true if TV is present. If no child devices were parsed from VBT,
1558 * assume TV is present.
1559 */
1560bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1561{
1562 union child_device_config *p_child;
1563 int i;
1564
1565 if (!dev_priv->vbt.int_tv_support)
1566 return false;
1567
1568 if (!dev_priv->vbt.child_dev_num)
1569 return true;
1570
1571 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1572 p_child = dev_priv->vbt.child_dev + i;
1573 /*
1574 * If the device type is not TV, continue.
1575 */
1576 switch (p_child->old.device_type) {
1577 case DEVICE_TYPE_INT_TV:
1578 case DEVICE_TYPE_TV:
1579 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1580 break;
1581 default:
1582 continue;
1583 }
1584 /* Only when the addin_offset is non-zero, it is regarded
1585 * as present.
1586 */
1587 if (p_child->old.addin_offset)
1588 return true;
1589 }
1590
1591 return false;
1592}
5a69d13d
JN
1593
1594/**
1595 * intel_bios_is_lvds_present - is LVDS present in VBT
1596 * @dev_priv: i915 device instance
1597 * @i2c_pin: i2c pin for LVDS if present
1598 *
1599 * Return true if LVDS is present. If no child devices were parsed from VBT,
1600 * assume LVDS is present.
1601 */
1602bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1603{
1604 int i;
1605
1606 if (!dev_priv->vbt.child_dev_num)
1607 return true;
1608
1609 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1610 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1611 struct old_child_dev_config *child = &uchild->old;
1612
1613 /* If the device type is not LFP, continue.
1614 * We have to check both the new identifiers as well as the
1615 * old for compatibility with some BIOSes.
1616 */
1617 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1618 child->device_type != DEVICE_TYPE_LFP)
1619 continue;
1620
1621 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1622 *i2c_pin = child->i2c_pin;
1623
1624 /* However, we cannot trust the BIOS writers to populate
1625 * the VBT correctly. Since LVDS requires additional
1626 * information from AIM blocks, a non-zero addin offset is
1627 * a good indicator that the LVDS is actually present.
1628 */
1629 if (child->addin_offset)
1630 return true;
1631
1632 /* But even then some BIOS writers perform some black magic
1633 * and instantiate the device without reference to any
1634 * additional data. Trust that if the VBT was written into
1635 * the OpRegion then they have validated the LVDS's existence.
1636 */
1637 if (dev_priv->opregion.vbt)
1638 return true;
1639 }
1640
1641 return false;
1642}
951d9efe 1643
22f35042
VS
1644/**
1645 * intel_bios_is_port_present - is the specified digital port present
1646 * @dev_priv: i915 device instance
1647 * @port: port to check
1648 *
1649 * Return true if the device in %port is present.
1650 */
1651bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1652{
1653 static const struct {
1654 u16 dp, hdmi;
1655 } port_mapping[] = {
1656 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1657 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1658 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1659 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1660 };
1661 int i;
1662
1663 /* FIXME maybe deal with port A as well? */
1664 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1665 return false;
1666
1667 if (!dev_priv->vbt.child_dev_num)
1668 return false;
1669
1670 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1671 const union child_device_config *p_child =
1672 &dev_priv->vbt.child_dev[i];
1673 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1674 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1675 (p_child->common.device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1676 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
1677 return true;
1678 }
1679
1680 return false;
1681}
1682
951d9efe
JN
1683/**
1684 * intel_bios_is_port_edp - is the device in given port eDP
1685 * @dev_priv: i915 device instance
1686 * @port: port to check
1687 *
1688 * Return true if the device in %port is eDP.
1689 */
1690bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1691{
1692 union child_device_config *p_child;
1693 static const short port_mapping[] = {
1694 [PORT_B] = DVO_PORT_DPB,
1695 [PORT_C] = DVO_PORT_DPC,
1696 [PORT_D] = DVO_PORT_DPD,
1697 [PORT_E] = DVO_PORT_DPE,
1698 };
1699 int i;
1700
a98d9c1d
ID
1701 if (HAS_DDI(dev_priv))
1702 return dev_priv->vbt.ddi_port_info[port].supports_edp;
1703
951d9efe
JN
1704 if (!dev_priv->vbt.child_dev_num)
1705 return false;
1706
1707 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1708 p_child = dev_priv->vbt.child_dev + i;
1709
1710 if (p_child->common.dvo_port == port_mapping[port] &&
1711 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1712 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1713 return true;
1714 }
1715
1716 return false;
1717}
7137aec1 1718
7a17995a
VS
1719static bool child_dev_is_dp_dual_mode(const union child_device_config *p_child,
1720 enum port port)
d6199256
VS
1721{
1722 static const struct {
1723 u16 dp, hdmi;
1724 } port_mapping[] = {
1725 /*
1726 * Buggy VBTs may declare DP ports as having
1727 * HDMI type dvo_port :( So let's check both.
1728 */
1729 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1730 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1731 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1732 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1733 };
d6199256
VS
1734
1735 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1736 return false;
1737
7a17995a
VS
1738 if ((p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
1739 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
d6199256
VS
1740 return false;
1741
7a17995a
VS
1742 if (p_child->common.dvo_port == port_mapping[port].dp)
1743 return true;
1744
1745 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
1746 if (p_child->common.dvo_port == port_mapping[port].hdmi &&
1747 p_child->common.aux_channel != 0)
1748 return true;
1749
1750 return false;
1751}
1752
1753bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
1754 enum port port)
1755{
1756 int i;
1757
d6199256
VS
1758 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1759 const union child_device_config *p_child =
1760 &dev_priv->vbt.child_dev[i];
1761
7a17995a 1762 if (child_dev_is_dp_dual_mode(p_child, port))
d6199256
VS
1763 return true;
1764 }
1765
1766 return false;
1767}
1768
7137aec1
JN
1769/**
1770 * intel_bios_is_dsi_present - is DSI present in VBT
1771 * @dev_priv: i915 device instance
1772 * @port: port for DSI if present
1773 *
1774 * Return true if DSI is present, and return the port in %port.
1775 */
1776bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1777 enum port *port)
1778{
1779 union child_device_config *p_child;
1780 u8 dvo_port;
1781 int i;
1782
1783 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1784 p_child = dev_priv->vbt.child_dev + i;
1785
1786 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1787 continue;
1788
1789 dvo_port = p_child->common.dvo_port;
1790
1791 switch (dvo_port) {
1792 case DVO_PORT_MIPIA:
1793 case DVO_PORT_MIPIC:
7caaef33
JN
1794 if (port)
1795 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1796 return true;
1797 case DVO_PORT_MIPIB:
1798 case DVO_PORT_MIPID:
1799 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1800 port_name(dvo_port - DVO_PORT_MIPIA));
1801 break;
1802 }
1803 }
1804
1805 return false;
1806}
d252bf68
SS
1807
1808/**
1809 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1810 * @dev_priv: i915 device instance
1811 * @port: port to check
1812 *
1813 * Return true if HPD should be inverted for %port.
1814 */
1815bool
1816intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1817 enum port port)
1818{
1819 int i;
1820
cc3f90f0 1821 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
d252bf68
SS
1822 return false;
1823
1824 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1825 if (!dev_priv->vbt.child_dev[i].common.hpd_invert)
1826 continue;
1827
1828 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1829 case DVO_PORT_DPA:
1830 case DVO_PORT_HDMIA:
1831 if (port == PORT_A)
1832 return true;
1833 break;
1834 case DVO_PORT_DPB:
1835 case DVO_PORT_HDMIB:
1836 if (port == PORT_B)
1837 return true;
1838 break;
1839 case DVO_PORT_DPC:
1840 case DVO_PORT_HDMIC:
1841 if (port == PORT_C)
1842 return true;
1843 break;
1844 default:
1845 break;
1846 }
1847 }
1848
1849 return false;
1850}
6389dd83
SS
1851
1852/**
1853 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
1854 * @dev_priv: i915 device instance
1855 * @port: port to check
1856 *
1857 * Return true if LSPCON is present on this port
1858 */
1859bool
1860intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
1861 enum port port)
1862{
1863 int i;
1864
1865 if (!HAS_LSPCON(dev_priv))
1866 return false;
1867
1868 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1869 if (!dev_priv->vbt.child_dev[i].common.lspcon)
1870 continue;
1871
1872 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1873 case DVO_PORT_DPA:
1874 case DVO_PORT_HDMIA:
1875 if (port == PORT_A)
1876 return true;
1877 break;
1878 case DVO_PORT_DPB:
1879 case DVO_PORT_HDMIB:
1880 if (port == PORT_B)
1881 return true;
1882 break;
1883 case DVO_PORT_DPC:
1884 case DVO_PORT_HDMIC:
1885 if (port == PORT_C)
1886 return true;
1887 break;
1888 case DVO_PORT_DPD:
1889 case DVO_PORT_HDMID:
1890 if (port == PORT_D)
1891 return true;
1892 break;
1893 default:
1894 break;
1895 }
1896 }
1897
1898 return false;
1899}