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79e53945 JB |
1 | /* |
2 | * Copyright © 2006-2007 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
21 | * DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | */ | |
26 | ||
8ca4013d | 27 | #include <linux/dmi.h> |
79e53945 | 28 | #include <linux/i2c.h> |
5a0e3ad6 | 29 | #include <linux/slab.h> |
79e53945 JB |
30 | #include "drmP.h" |
31 | #include "drm.h" | |
32 | #include "drm_crtc.h" | |
33 | #include "drm_crtc_helper.h" | |
f5afcd3d | 34 | #include "drm_edid.h" |
79e53945 JB |
35 | #include "intel_drv.h" |
36 | #include "i915_drm.h" | |
37 | #include "i915_drv.h" | |
38 | ||
e7dbb2f2 KP |
39 | /* Here's the desired hotplug mode */ |
40 | #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ | |
41 | ADPA_CRT_HOTPLUG_WARMUP_10MS | \ | |
42 | ADPA_CRT_HOTPLUG_SAMPLE_4S | \ | |
43 | ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ | |
44 | ADPA_CRT_HOTPLUG_VOLREF_325MV | \ | |
45 | ADPA_CRT_HOTPLUG_ENABLE) | |
46 | ||
c9a1c4cd CW |
47 | struct intel_crt { |
48 | struct intel_encoder base; | |
e7dbb2f2 | 49 | bool force_hotplug_required; |
c9a1c4cd CW |
50 | }; |
51 | ||
52 | static struct intel_crt *intel_attached_crt(struct drm_connector *connector) | |
53 | { | |
54 | return container_of(intel_attached_encoder(connector), | |
55 | struct intel_crt, base); | |
56 | } | |
57 | ||
df0323c4 | 58 | static void pch_crt_dpms(struct drm_encoder *encoder, int mode) |
79e53945 JB |
59 | { |
60 | struct drm_device *dev = encoder->dev; | |
61 | struct drm_i915_private *dev_priv = dev->dev_private; | |
df0323c4 | 62 | u32 temp; |
79e53945 | 63 | |
df0323c4 JB |
64 | temp = I915_READ(PCH_ADPA); |
65 | temp &= ~ADPA_DAC_ENABLE; | |
66 | ||
67 | switch (mode) { | |
68 | case DRM_MODE_DPMS_ON: | |
69 | temp |= ADPA_DAC_ENABLE; | |
70 | break; | |
71 | case DRM_MODE_DPMS_STANDBY: | |
72 | case DRM_MODE_DPMS_SUSPEND: | |
73 | case DRM_MODE_DPMS_OFF: | |
74 | /* Just leave port enable cleared */ | |
75 | break; | |
76 | } | |
77 | ||
78 | I915_WRITE(PCH_ADPA, temp); | |
79 | } | |
2c07245f | 80 | |
df0323c4 JB |
81 | static void gmch_crt_dpms(struct drm_encoder *encoder, int mode) |
82 | { | |
83 | struct drm_device *dev = encoder->dev; | |
84 | struct drm_i915_private *dev_priv = dev->dev_private; | |
85 | u32 temp; | |
86 | ||
87 | temp = I915_READ(ADPA); | |
79e53945 | 88 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); |
febc7694 | 89 | temp &= ~ADPA_DAC_ENABLE; |
79e53945 | 90 | |
bd9e8413 JB |
91 | if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON) |
92 | mode = DRM_MODE_DPMS_OFF; | |
93 | ||
0206e353 | 94 | switch (mode) { |
79e53945 JB |
95 | case DRM_MODE_DPMS_ON: |
96 | temp |= ADPA_DAC_ENABLE; | |
97 | break; | |
98 | case DRM_MODE_DPMS_STANDBY: | |
99 | temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; | |
100 | break; | |
101 | case DRM_MODE_DPMS_SUSPEND: | |
102 | temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; | |
103 | break; | |
104 | case DRM_MODE_DPMS_OFF: | |
105 | temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; | |
106 | break; | |
107 | } | |
108 | ||
df0323c4 | 109 | I915_WRITE(ADPA, temp); |
79e53945 JB |
110 | } |
111 | ||
112 | static int intel_crt_mode_valid(struct drm_connector *connector, | |
113 | struct drm_display_mode *mode) | |
114 | { | |
6bcdcd9e ZY |
115 | struct drm_device *dev = connector->dev; |
116 | ||
117 | int max_clock = 0; | |
79e53945 JB |
118 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
119 | return MODE_NO_DBLESCAN; | |
120 | ||
6bcdcd9e ZY |
121 | if (mode->clock < 25000) |
122 | return MODE_CLOCK_LOW; | |
123 | ||
a6c45cf0 | 124 | if (IS_GEN2(dev)) |
6bcdcd9e ZY |
125 | max_clock = 350000; |
126 | else | |
127 | max_clock = 400000; | |
128 | if (mode->clock > max_clock) | |
129 | return MODE_CLOCK_HIGH; | |
79e53945 JB |
130 | |
131 | return MODE_OK; | |
132 | } | |
133 | ||
134 | static bool intel_crt_mode_fixup(struct drm_encoder *encoder, | |
135 | struct drm_display_mode *mode, | |
136 | struct drm_display_mode *adjusted_mode) | |
137 | { | |
138 | return true; | |
139 | } | |
140 | ||
141 | static void intel_crt_mode_set(struct drm_encoder *encoder, | |
142 | struct drm_display_mode *mode, | |
143 | struct drm_display_mode *adjusted_mode) | |
144 | { | |
145 | ||
146 | struct drm_device *dev = encoder->dev; | |
147 | struct drm_crtc *crtc = encoder->crtc; | |
148 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
149 | struct drm_i915_private *dev_priv = dev->dev_private; | |
150 | int dpll_md_reg; | |
151 | u32 adpa, dpll_md; | |
2c07245f | 152 | u32 adpa_reg; |
79e53945 | 153 | |
9db4a9c7 | 154 | dpll_md_reg = DPLL_MD(intel_crtc->pipe); |
79e53945 | 155 | |
bad720ff | 156 | if (HAS_PCH_SPLIT(dev)) |
2c07245f ZW |
157 | adpa_reg = PCH_ADPA; |
158 | else | |
159 | adpa_reg = ADPA; | |
160 | ||
79e53945 JB |
161 | /* |
162 | * Disable separate mode multiplier used when cloning SDVO to CRT | |
163 | * XXX this needs to be adjusted when we really are cloning | |
164 | */ | |
a6c45cf0 | 165 | if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { |
79e53945 JB |
166 | dpll_md = I915_READ(dpll_md_reg); |
167 | I915_WRITE(dpll_md_reg, | |
168 | dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); | |
169 | } | |
170 | ||
e7dbb2f2 | 171 | adpa = ADPA_HOTPLUG_BITS; |
79e53945 JB |
172 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
173 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; | |
174 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | |
175 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; | |
176 | ||
75770564 JB |
177 | /* For CPT allow 3 pipe config, for others just use A or B */ |
178 | if (HAS_PCH_CPT(dev)) | |
179 | adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); | |
180 | else if (intel_crtc->pipe == 0) | |
181 | adpa |= ADPA_PIPE_A_SELECT; | |
182 | else | |
183 | adpa |= ADPA_PIPE_B_SELECT; | |
79e53945 | 184 | |
9db4a9c7 JB |
185 | if (!HAS_PCH_SPLIT(dev)) |
186 | I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); | |
187 | ||
2c07245f ZW |
188 | I915_WRITE(adpa_reg, adpa); |
189 | } | |
190 | ||
f2b115e6 | 191 | static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) |
2c07245f ZW |
192 | { |
193 | struct drm_device *dev = connector->dev; | |
e7dbb2f2 | 194 | struct intel_crt *crt = intel_attached_crt(connector); |
2c07245f | 195 | struct drm_i915_private *dev_priv = dev->dev_private; |
e7dbb2f2 | 196 | u32 adpa; |
2c07245f ZW |
197 | bool ret; |
198 | ||
e7dbb2f2 KP |
199 | /* The first time through, trigger an explicit detection cycle */ |
200 | if (crt->force_hotplug_required) { | |
201 | bool turn_off_dac = HAS_PCH_SPLIT(dev); | |
202 | u32 save_adpa; | |
67941da2 | 203 | |
e7dbb2f2 KP |
204 | crt->force_hotplug_required = 0; |
205 | ||
206 | save_adpa = adpa = I915_READ(PCH_ADPA); | |
207 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); | |
208 | ||
209 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; | |
210 | if (turn_off_dac) | |
211 | adpa &= ~ADPA_DAC_ENABLE; | |
212 | ||
213 | I915_WRITE(PCH_ADPA, adpa); | |
214 | ||
215 | if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | |
216 | 1000)) | |
217 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | |
218 | ||
219 | if (turn_off_dac) { | |
220 | I915_WRITE(PCH_ADPA, save_adpa); | |
221 | POSTING_READ(PCH_ADPA); | |
222 | } | |
a4a6b901 ZW |
223 | } |
224 | ||
2c07245f ZW |
225 | /* Check the status to see if both blue and green are on now */ |
226 | adpa = I915_READ(PCH_ADPA); | |
e7dbb2f2 | 227 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) |
2c07245f ZW |
228 | ret = true; |
229 | else | |
230 | ret = false; | |
e7dbb2f2 | 231 | DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); |
2c07245f | 232 | |
2c07245f | 233 | return ret; |
79e53945 JB |
234 | } |
235 | ||
7d2c24e8 JB |
236 | static bool valleyview_crt_detect_hotplug(struct drm_connector *connector) |
237 | { | |
238 | struct drm_device *dev = connector->dev; | |
239 | struct drm_i915_private *dev_priv = dev->dev_private; | |
240 | u32 adpa; | |
241 | bool ret; | |
242 | u32 save_adpa; | |
243 | ||
244 | save_adpa = adpa = I915_READ(ADPA); | |
245 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); | |
246 | ||
247 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; | |
248 | ||
249 | I915_WRITE(ADPA, adpa); | |
250 | ||
251 | if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | |
252 | 1000)) { | |
253 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | |
254 | I915_WRITE(ADPA, save_adpa); | |
255 | } | |
256 | ||
257 | /* Check the status to see if both blue and green are on now */ | |
258 | adpa = I915_READ(ADPA); | |
259 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) | |
260 | ret = true; | |
261 | else | |
262 | ret = false; | |
263 | ||
264 | DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret); | |
265 | ||
266 | /* FIXME: debug force function and remove */ | |
267 | ret = true; | |
268 | ||
269 | return ret; | |
270 | } | |
271 | ||
79e53945 JB |
272 | /** |
273 | * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. | |
274 | * | |
275 | * Not for i915G/i915GM | |
276 | * | |
277 | * \return true if CRT is connected. | |
278 | * \return false if CRT is disconnected. | |
279 | */ | |
280 | static bool intel_crt_detect_hotplug(struct drm_connector *connector) | |
281 | { | |
282 | struct drm_device *dev = connector->dev; | |
283 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7a772c49 AJ |
284 | u32 hotplug_en, orig, stat; |
285 | bool ret = false; | |
771cb081 | 286 | int i, tries = 0; |
2c07245f | 287 | |
bad720ff | 288 | if (HAS_PCH_SPLIT(dev)) |
f2b115e6 | 289 | return intel_ironlake_crt_detect_hotplug(connector); |
2c07245f | 290 | |
7d2c24e8 JB |
291 | if (IS_VALLEYVIEW(dev)) |
292 | return valleyview_crt_detect_hotplug(connector); | |
293 | ||
771cb081 ZY |
294 | /* |
295 | * On 4 series desktop, CRT detect sequence need to be done twice | |
296 | * to get a reliable result. | |
297 | */ | |
79e53945 | 298 | |
771cb081 ZY |
299 | if (IS_G4X(dev) && !IS_GM45(dev)) |
300 | tries = 2; | |
301 | else | |
302 | tries = 1; | |
7a772c49 | 303 | hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); |
771cb081 ZY |
304 | hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; |
305 | ||
771cb081 | 306 | for (i = 0; i < tries ; i++) { |
771cb081 ZY |
307 | /* turn on the FORCE_DETECT */ |
308 | I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); | |
771cb081 | 309 | /* wait for FORCE_DETECT to go off */ |
913d8d11 CW |
310 | if (wait_for((I915_READ(PORT_HOTPLUG_EN) & |
311 | CRT_HOTPLUG_FORCE_DETECT) == 0, | |
481b6af3 | 312 | 1000)) |
79077319 | 313 | DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); |
771cb081 | 314 | } |
79e53945 | 315 | |
7a772c49 AJ |
316 | stat = I915_READ(PORT_HOTPLUG_STAT); |
317 | if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) | |
318 | ret = true; | |
319 | ||
320 | /* clear the interrupt we just generated, if any */ | |
321 | I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); | |
79e53945 | 322 | |
7a772c49 AJ |
323 | /* and put the bits back */ |
324 | I915_WRITE(PORT_HOTPLUG_EN, orig); | |
325 | ||
326 | return ret; | |
79e53945 JB |
327 | } |
328 | ||
f5afcd3d | 329 | static bool intel_crt_detect_ddc(struct drm_connector *connector) |
79e53945 | 330 | { |
f5afcd3d | 331 | struct intel_crt *crt = intel_attached_crt(connector); |
c9a1c4cd | 332 | struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; |
79e53945 JB |
333 | |
334 | /* CRT should always be at 0, but check anyway */ | |
c9a1c4cd | 335 | if (crt->base.type != INTEL_OUTPUT_ANALOG) |
79e53945 JB |
336 | return false; |
337 | ||
c9a1c4cd | 338 | if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { |
f5afcd3d DM |
339 | struct edid *edid; |
340 | bool is_digital = false; | |
3bd7d909 | 341 | struct i2c_adapter *i2c; |
f5afcd3d | 342 | |
3bd7d909 DK |
343 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); |
344 | edid = drm_get_edid(connector, i2c); | |
f5afcd3d DM |
345 | /* |
346 | * This may be a DVI-I connector with a shared DDC | |
347 | * link between analog and digital outputs, so we | |
348 | * have to check the EDID input spec of the attached device. | |
d3bcb757 CW |
349 | * |
350 | * On the other hand, what should we do if it is a broken EDID? | |
f5afcd3d DM |
351 | */ |
352 | if (edid != NULL) { | |
353 | is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; | |
354 | connector->display_info.raw_edid = NULL; | |
355 | kfree(edid); | |
356 | } | |
357 | ||
358 | if (!is_digital) { | |
359 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); | |
360 | return true; | |
d3bcb757 CW |
361 | } else { |
362 | DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); | |
f5afcd3d | 363 | } |
6ec3d0c0 CW |
364 | } |
365 | ||
366 | return false; | |
79e53945 JB |
367 | } |
368 | ||
e4a5d54f | 369 | static enum drm_connector_status |
7173188d | 370 | intel_crt_load_detect(struct intel_crt *crt) |
e4a5d54f | 371 | { |
7173188d | 372 | struct drm_device *dev = crt->base.base.dev; |
e4a5d54f | 373 | struct drm_i915_private *dev_priv = dev->dev_private; |
7173188d | 374 | uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; |
e4a5d54f ML |
375 | uint32_t save_bclrpat; |
376 | uint32_t save_vtotal; | |
377 | uint32_t vtotal, vactive; | |
378 | uint32_t vsample; | |
379 | uint32_t vblank, vblank_start, vblank_end; | |
380 | uint32_t dsl; | |
381 | uint32_t bclrpat_reg; | |
382 | uint32_t vtotal_reg; | |
383 | uint32_t vblank_reg; | |
384 | uint32_t vsync_reg; | |
385 | uint32_t pipeconf_reg; | |
386 | uint32_t pipe_dsl_reg; | |
387 | uint8_t st00; | |
388 | enum drm_connector_status status; | |
389 | ||
6ec3d0c0 CW |
390 | DRM_DEBUG_KMS("starting load-detect on CRT\n"); |
391 | ||
9db4a9c7 JB |
392 | bclrpat_reg = BCLRPAT(pipe); |
393 | vtotal_reg = VTOTAL(pipe); | |
394 | vblank_reg = VBLANK(pipe); | |
395 | vsync_reg = VSYNC(pipe); | |
396 | pipeconf_reg = PIPECONF(pipe); | |
397 | pipe_dsl_reg = PIPEDSL(pipe); | |
e4a5d54f ML |
398 | |
399 | save_bclrpat = I915_READ(bclrpat_reg); | |
400 | save_vtotal = I915_READ(vtotal_reg); | |
401 | vblank = I915_READ(vblank_reg); | |
402 | ||
403 | vtotal = ((save_vtotal >> 16) & 0xfff) + 1; | |
404 | vactive = (save_vtotal & 0x7ff) + 1; | |
405 | ||
406 | vblank_start = (vblank & 0xfff) + 1; | |
407 | vblank_end = ((vblank >> 16) & 0xfff) + 1; | |
408 | ||
409 | /* Set the border color to purple. */ | |
410 | I915_WRITE(bclrpat_reg, 0x500050); | |
411 | ||
a6c45cf0 | 412 | if (!IS_GEN2(dev)) { |
e4a5d54f ML |
413 | uint32_t pipeconf = I915_READ(pipeconf_reg); |
414 | I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); | |
19c55da1 | 415 | POSTING_READ(pipeconf_reg); |
e4a5d54f ML |
416 | /* Wait for next Vblank to substitue |
417 | * border color for Color info */ | |
9d0498a2 | 418 | intel_wait_for_vblank(dev, pipe); |
e4a5d54f ML |
419 | st00 = I915_READ8(VGA_MSR_WRITE); |
420 | status = ((st00 & (1 << 4)) != 0) ? | |
421 | connector_status_connected : | |
422 | connector_status_disconnected; | |
423 | ||
424 | I915_WRITE(pipeconf_reg, pipeconf); | |
425 | } else { | |
426 | bool restore_vblank = false; | |
427 | int count, detect; | |
428 | ||
429 | /* | |
430 | * If there isn't any border, add some. | |
431 | * Yes, this will flicker | |
432 | */ | |
433 | if (vblank_start <= vactive && vblank_end >= vtotal) { | |
434 | uint32_t vsync = I915_READ(vsync_reg); | |
435 | uint32_t vsync_start = (vsync & 0xffff) + 1; | |
436 | ||
437 | vblank_start = vsync_start; | |
438 | I915_WRITE(vblank_reg, | |
439 | (vblank_start - 1) | | |
440 | ((vblank_end - 1) << 16)); | |
441 | restore_vblank = true; | |
442 | } | |
443 | /* sample in the vertical border, selecting the larger one */ | |
444 | if (vblank_start - vactive >= vtotal - vblank_end) | |
445 | vsample = (vblank_start + vactive) >> 1; | |
446 | else | |
447 | vsample = (vtotal + vblank_end) >> 1; | |
448 | ||
449 | /* | |
450 | * Wait for the border to be displayed | |
451 | */ | |
452 | while (I915_READ(pipe_dsl_reg) >= vactive) | |
453 | ; | |
454 | while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) | |
455 | ; | |
456 | /* | |
457 | * Watch ST00 for an entire scanline | |
458 | */ | |
459 | detect = 0; | |
460 | count = 0; | |
461 | do { | |
462 | count++; | |
463 | /* Read the ST00 VGA status register */ | |
464 | st00 = I915_READ8(VGA_MSR_WRITE); | |
465 | if (st00 & (1 << 4)) | |
466 | detect++; | |
467 | } while ((I915_READ(pipe_dsl_reg) == dsl)); | |
468 | ||
469 | /* restore vblank if necessary */ | |
470 | if (restore_vblank) | |
471 | I915_WRITE(vblank_reg, vblank); | |
472 | /* | |
473 | * If more than 3/4 of the scanline detected a monitor, | |
474 | * then it is assumed to be present. This works even on i830, | |
475 | * where there isn't any way to force the border color across | |
476 | * the screen | |
477 | */ | |
478 | status = detect * 4 > count * 3 ? | |
479 | connector_status_connected : | |
480 | connector_status_disconnected; | |
481 | } | |
482 | ||
483 | /* Restore previous settings */ | |
484 | I915_WRITE(bclrpat_reg, save_bclrpat); | |
485 | ||
486 | return status; | |
487 | } | |
488 | ||
7b334fcb | 489 | static enum drm_connector_status |
930a9e28 | 490 | intel_crt_detect(struct drm_connector *connector, bool force) |
79e53945 JB |
491 | { |
492 | struct drm_device *dev = connector->dev; | |
c9a1c4cd | 493 | struct intel_crt *crt = intel_attached_crt(connector); |
e4a5d54f | 494 | enum drm_connector_status status; |
e95c8438 | 495 | struct intel_load_detect_pipe tmp; |
79e53945 | 496 | |
a6c45cf0 | 497 | if (I915_HAS_HOTPLUG(dev)) { |
aaa37730 DV |
498 | /* We can not rely on the HPD pin always being correctly wired |
499 | * up, for example many KVM do not pass it through, and so | |
500 | * only trust an assertion that the monitor is connected. | |
501 | */ | |
6ec3d0c0 CW |
502 | if (intel_crt_detect_hotplug(connector)) { |
503 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); | |
79e53945 | 504 | return connector_status_connected; |
aaa37730 | 505 | } else |
e7dbb2f2 | 506 | DRM_DEBUG_KMS("CRT not detected via hotplug\n"); |
79e53945 JB |
507 | } |
508 | ||
f5afcd3d | 509 | if (intel_crt_detect_ddc(connector)) |
79e53945 JB |
510 | return connector_status_connected; |
511 | ||
aaa37730 DV |
512 | /* Load detection is broken on HPD capable machines. Whoever wants a |
513 | * broken monitor (without edid) to work behind a broken kvm (that fails | |
514 | * to have the right resistors for HP detection) needs to fix this up. | |
515 | * For now just bail out. */ | |
516 | if (I915_HAS_HOTPLUG(dev)) | |
517 | return connector_status_disconnected; | |
518 | ||
930a9e28 | 519 | if (!force) |
7b334fcb CW |
520 | return connector->status; |
521 | ||
e4a5d54f | 522 | /* for pre-945g platforms use load detect */ |
e95c8438 DV |
523 | if (intel_get_load_detect_pipe(&crt->base, connector, NULL, |
524 | &tmp)) { | |
525 | if (intel_crt_detect_ddc(connector)) | |
526 | status = connector_status_connected; | |
527 | else | |
528 | status = intel_crt_load_detect(crt); | |
529 | intel_release_load_detect_pipe(&crt->base, connector, | |
530 | &tmp); | |
531 | } else | |
532 | status = connector_status_unknown; | |
e4a5d54f ML |
533 | |
534 | return status; | |
79e53945 JB |
535 | } |
536 | ||
537 | static void intel_crt_destroy(struct drm_connector *connector) | |
538 | { | |
79e53945 JB |
539 | drm_sysfs_connector_remove(connector); |
540 | drm_connector_cleanup(connector); | |
541 | kfree(connector); | |
542 | } | |
543 | ||
544 | static int intel_crt_get_modes(struct drm_connector *connector) | |
545 | { | |
8e4d36b9 | 546 | struct drm_device *dev = connector->dev; |
f899fc64 | 547 | struct drm_i915_private *dev_priv = dev->dev_private; |
890f3359 | 548 | int ret; |
3bd7d909 | 549 | struct i2c_adapter *i2c; |
8e4d36b9 | 550 | |
3bd7d909 DK |
551 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); |
552 | ret = intel_ddc_get_modes(connector, i2c); | |
8e4d36b9 | 553 | if (ret || !IS_G4X(dev)) |
f899fc64 | 554 | return ret; |
8e4d36b9 | 555 | |
8e4d36b9 | 556 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ |
3bd7d909 DK |
557 | i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); |
558 | return intel_ddc_get_modes(connector, i2c); | |
79e53945 JB |
559 | } |
560 | ||
561 | static int intel_crt_set_property(struct drm_connector *connector, | |
562 | struct drm_property *property, | |
563 | uint64_t value) | |
564 | { | |
79e53945 JB |
565 | return 0; |
566 | } | |
567 | ||
f3269058 CW |
568 | static void intel_crt_reset(struct drm_connector *connector) |
569 | { | |
570 | struct drm_device *dev = connector->dev; | |
571 | struct intel_crt *crt = intel_attached_crt(connector); | |
572 | ||
573 | if (HAS_PCH_SPLIT(dev)) | |
574 | crt->force_hotplug_required = 1; | |
575 | } | |
576 | ||
79e53945 JB |
577 | /* |
578 | * Routines for controlling stuff on the analog port | |
579 | */ | |
580 | ||
df0323c4 JB |
581 | static const struct drm_encoder_helper_funcs pch_encoder_funcs = { |
582 | .mode_fixup = intel_crt_mode_fixup, | |
583 | .prepare = intel_encoder_prepare, | |
584 | .commit = intel_encoder_commit, | |
585 | .mode_set = intel_crt_mode_set, | |
586 | .dpms = pch_crt_dpms, | |
587 | }; | |
588 | ||
589 | static const struct drm_encoder_helper_funcs gmch_encoder_funcs = { | |
79e53945 JB |
590 | .mode_fixup = intel_crt_mode_fixup, |
591 | .prepare = intel_encoder_prepare, | |
592 | .commit = intel_encoder_commit, | |
593 | .mode_set = intel_crt_mode_set, | |
df0323c4 | 594 | .dpms = gmch_crt_dpms, |
79e53945 JB |
595 | }; |
596 | ||
597 | static const struct drm_connector_funcs intel_crt_connector_funcs = { | |
f3269058 | 598 | .reset = intel_crt_reset, |
c9fb15f6 | 599 | .dpms = drm_helper_connector_dpms, |
79e53945 JB |
600 | .detect = intel_crt_detect, |
601 | .fill_modes = drm_helper_probe_single_connector_modes, | |
602 | .destroy = intel_crt_destroy, | |
603 | .set_property = intel_crt_set_property, | |
604 | }; | |
605 | ||
606 | static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { | |
607 | .mode_valid = intel_crt_mode_valid, | |
608 | .get_modes = intel_crt_get_modes, | |
df0e9248 | 609 | .best_encoder = intel_best_encoder, |
79e53945 JB |
610 | }; |
611 | ||
79e53945 | 612 | static const struct drm_encoder_funcs intel_crt_enc_funcs = { |
ea5b213a | 613 | .destroy = intel_encoder_destroy, |
79e53945 JB |
614 | }; |
615 | ||
8ca4013d DL |
616 | static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id) |
617 | { | |
bc0daf48 | 618 | DRM_INFO("Skipping CRT initialization for %s\n", id->ident); |
8ca4013d DL |
619 | return 1; |
620 | } | |
621 | ||
622 | static const struct dmi_system_id intel_no_crt[] = { | |
623 | { | |
624 | .callback = intel_no_crt_dmi_callback, | |
625 | .ident = "ACER ZGB", | |
626 | .matches = { | |
627 | DMI_MATCH(DMI_SYS_VENDOR, "ACER"), | |
628 | DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), | |
629 | }, | |
630 | }, | |
631 | { } | |
632 | }; | |
633 | ||
79e53945 JB |
634 | void intel_crt_init(struct drm_device *dev) |
635 | { | |
636 | struct drm_connector *connector; | |
c9a1c4cd | 637 | struct intel_crt *crt; |
454c1ca8 | 638 | struct intel_connector *intel_connector; |
db545019 | 639 | struct drm_i915_private *dev_priv = dev->dev_private; |
df0323c4 | 640 | const struct drm_encoder_helper_funcs *encoder_helper_funcs; |
79e53945 | 641 | |
8ca4013d DL |
642 | /* Skip machines without VGA that falsely report hotplug events */ |
643 | if (dmi_check_system(intel_no_crt)) | |
644 | return; | |
645 | ||
c9a1c4cd CW |
646 | crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); |
647 | if (!crt) | |
79e53945 JB |
648 | return; |
649 | ||
454c1ca8 ZW |
650 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
651 | if (!intel_connector) { | |
c9a1c4cd | 652 | kfree(crt); |
454c1ca8 ZW |
653 | return; |
654 | } | |
655 | ||
656 | connector = &intel_connector->base; | |
657 | drm_connector_init(dev, &intel_connector->base, | |
79e53945 JB |
658 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); |
659 | ||
c9a1c4cd | 660 | drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, |
79e53945 JB |
661 | DRM_MODE_ENCODER_DAC); |
662 | ||
c9a1c4cd | 663 | intel_connector_attach_encoder(intel_connector, &crt->base); |
79e53945 | 664 | |
c9a1c4cd CW |
665 | crt->base.type = INTEL_OUTPUT_ANALOG; |
666 | crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | | |
667 | 1 << INTEL_ANALOG_CLONE_BIT | | |
668 | 1 << INTEL_SDVO_LVDS_CLONE_BIT); | |
59c859d6 ED |
669 | if (IS_HASWELL(dev)) |
670 | crt->base.crtc_mask = (1 << 0); | |
671 | else | |
672 | crt->base.crtc_mask = (1 << 0) | (1 << 1); | |
673 | ||
dbb02575 DV |
674 | if (IS_GEN2(dev)) |
675 | connector->interlace_allowed = 0; | |
676 | else | |
677 | connector->interlace_allowed = 1; | |
79e53945 JB |
678 | connector->doublescan_allowed = 0; |
679 | ||
df0323c4 JB |
680 | if (HAS_PCH_SPLIT(dev)) |
681 | encoder_helper_funcs = &pch_encoder_funcs; | |
682 | else | |
683 | encoder_helper_funcs = &gmch_encoder_funcs; | |
684 | ||
685 | drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs); | |
79e53945 JB |
686 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
687 | ||
688 | drm_sysfs_connector_add(connector); | |
b01f2c3a | 689 | |
eb1f8e4f DA |
690 | if (I915_HAS_HOTPLUG(dev)) |
691 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
692 | else | |
693 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
694 | ||
e7dbb2f2 KP |
695 | /* |
696 | * Configure the automatic hotplug detection stuff | |
697 | */ | |
698 | crt->force_hotplug_required = 0; | |
699 | if (HAS_PCH_SPLIT(dev)) { | |
700 | u32 adpa; | |
701 | ||
702 | adpa = I915_READ(PCH_ADPA); | |
703 | adpa &= ~ADPA_CRT_HOTPLUG_MASK; | |
704 | adpa |= ADPA_HOTPLUG_BITS; | |
705 | I915_WRITE(PCH_ADPA, adpa); | |
706 | POSTING_READ(PCH_ADPA); | |
707 | ||
708 | DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); | |
709 | crt->force_hotplug_required = 1; | |
710 | } | |
711 | ||
b01f2c3a | 712 | dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; |
79e53945 | 713 | } |