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1 | /* |
2 | * Copyright © 2015 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
21 | * IN THE SOFTWARE. | |
22 | * | |
23 | */ | |
24 | ||
25 | #include "intel_drv.h" | |
26 | ||
27 | static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) | |
28 | { | |
29 | uint8_t reg_val = 0; | |
30 | ||
31 | if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, | |
32 | ®_val) < 0) { | |
33 | DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", | |
34 | DP_EDP_DISPLAY_CONTROL_REGISTER); | |
35 | return; | |
36 | } | |
37 | if (enable) | |
38 | reg_val |= DP_EDP_BACKLIGHT_ENABLE; | |
39 | else | |
40 | reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE); | |
41 | ||
42 | if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, | |
43 | reg_val) != 1) { | |
44 | DRM_DEBUG_KMS("Failed to %s aux backlight\n", | |
45 | enable ? "enable" : "disable"); | |
46 | } | |
47 | } | |
48 | ||
49 | /* | |
50 | * Read the current backlight value from DPCD register(s) based | |
51 | * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported | |
52 | */ | |
53 | static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector) | |
54 | { | |
55 | struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); | |
56 | uint8_t read_val[2] = { 0x0 }; | |
57 | uint16_t level = 0; | |
58 | ||
59 | if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, | |
60 | &read_val, sizeof(read_val)) < 0) { | |
61 | DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", | |
62 | DP_EDP_BACKLIGHT_BRIGHTNESS_MSB); | |
63 | return 0; | |
64 | } | |
65 | level = read_val[0]; | |
66 | if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) | |
67 | level = (read_val[0] << 8 | read_val[1]); | |
68 | ||
69 | return level; | |
70 | } | |
71 | ||
72 | /* | |
73 | * Sends the current backlight level over the aux channel, checking if its using | |
74 | * 8-bit or 16 bit value (MSB and LSB) | |
75 | */ | |
76 | static void | |
77 | intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level) | |
78 | { | |
79 | struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); | |
80 | uint8_t vals[2] = { 0x0 }; | |
81 | ||
82 | vals[0] = level; | |
83 | ||
84 | /* Write the MSB and/or LSB */ | |
85 | if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { | |
86 | vals[0] = (level & 0xFF00) >> 8; | |
87 | vals[1] = (level & 0xFF); | |
88 | } | |
89 | if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, | |
90 | vals, sizeof(vals)) < 0) { | |
91 | DRM_DEBUG_KMS("Failed to write aux backlight level\n"); | |
92 | return; | |
93 | } | |
94 | } | |
95 | ||
96 | static void intel_dp_aux_enable_backlight(struct intel_connector *connector) | |
97 | { | |
98 | struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); | |
99 | uint8_t dpcd_buf = 0; | |
73ab484c | 100 | uint8_t edp_backlight_mode = 0; |
e7156c83 YA |
101 | |
102 | set_aux_backlight_enable(intel_dp, true); | |
103 | ||
73ab484c PV |
104 | if (drm_dp_dpcd_readb(&intel_dp->aux, |
105 | DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) { | |
106 | DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", | |
107 | DP_EDP_BACKLIGHT_MODE_SET_REGISTER); | |
108 | return; | |
109 | } | |
110 | ||
111 | edp_backlight_mode = dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK; | |
112 | ||
113 | switch (edp_backlight_mode) { | |
114 | case DP_EDP_BACKLIGHT_CONTROL_MODE_PWM: | |
115 | case DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET: | |
116 | case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT: | |
117 | dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK; | |
118 | dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD; | |
119 | if (drm_dp_dpcd_writeb(&intel_dp->aux, | |
120 | DP_EDP_BACKLIGHT_MODE_SET_REGISTER, dpcd_buf) < 0) { | |
121 | DRM_DEBUG_KMS("Failed to write aux backlight mode\n"); | |
122 | } | |
123 | break; | |
124 | ||
125 | /* Do nothing when it is already DPCD mode */ | |
126 | case DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD: | |
127 | default: | |
128 | break; | |
129 | } | |
e7156c83 YA |
130 | } |
131 | ||
132 | static void intel_dp_aux_disable_backlight(struct intel_connector *connector) | |
133 | { | |
134 | set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false); | |
135 | } | |
136 | ||
137 | static int intel_dp_aux_setup_backlight(struct intel_connector *connector, | |
138 | enum pipe pipe) | |
139 | { | |
140 | struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); | |
141 | struct intel_panel *panel = &connector->panel; | |
142 | ||
143 | intel_dp_aux_enable_backlight(connector); | |
144 | ||
145 | if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) | |
146 | panel->backlight.max = 0xFFFF; | |
147 | else | |
148 | panel->backlight.max = 0xFF; | |
149 | ||
150 | panel->backlight.min = 0; | |
151 | panel->backlight.level = intel_dp_aux_get_backlight(connector); | |
152 | ||
153 | panel->backlight.enabled = panel->backlight.level != 0; | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
158 | static bool | |
159 | intel_dp_aux_display_control_capable(struct intel_connector *connector) | |
160 | { | |
161 | struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); | |
162 | ||
163 | /* Check the eDP Display control capabilities registers to determine if | |
164 | * the panel can support backlight control over the aux channel | |
165 | */ | |
166 | if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && | |
167 | (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && | |
a644ca9b | 168 | (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) && |
e7156c83 YA |
169 | !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) || |
170 | (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) { | |
171 | DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); | |
172 | return true; | |
173 | } | |
174 | return false; | |
175 | } | |
176 | ||
177 | int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) | |
178 | { | |
179 | struct intel_panel *panel = &intel_connector->panel; | |
180 | ||
181 | if (!i915.enable_dpcd_backlight) | |
182 | return -ENODEV; | |
183 | ||
184 | if (!intel_dp_aux_display_control_capable(intel_connector)) | |
185 | return -ENODEV; | |
186 | ||
187 | panel->backlight.setup = intel_dp_aux_setup_backlight; | |
188 | panel->backlight.enable = intel_dp_aux_enable_backlight; | |
189 | panel->backlight.disable = intel_dp_aux_disable_backlight; | |
190 | panel->backlight.set = intel_dp_aux_set_backlight; | |
191 | panel->backlight.get = intel_dp_aux_get_backlight; | |
192 | ||
193 | return 0; | |
194 | } |