[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / i915 / intel_hdmi.c

/*
 * Copyright 2006 Dave Airlie <airlied@linux.ie>
 * Copyright © 2006-2009 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *	Jesse Barnes <jesse.barnes@intel.com>
 */

#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_edid.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"

struct intel_hdmi {
	struct intel_encoder base;
	u32 sdvox_reg;
	int ddc_bus;
	bool has_hdmi_sink;
	bool has_audio;
};

static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
{
	return container_of(encoder, struct intel_hdmi, base.base);
}

static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
{
	return container_of(intel_attached_encoder(connector),
			    struct intel_hdmi, base);
}

static void intel_hdmi_mode_set(struct drm_encoder *encoder,
				struct drm_display_mode *mode,
				struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_crtc *crtc = encoder->crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
	u32 sdvox;

	sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		sdvox |= SDVO_HSYNC_ACTIVE_HIGH;

	/* Required on CPT */
	if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
		sdvox |= HDMI_MODE_SELECT;

	if (intel_hdmi->has_audio)
		sdvox |= SDVO_AUDIO_ENABLE;

	if (intel_crtc->pipe == 1) {
		if (HAS_PCH_CPT(dev))
			sdvox |= PORT_TRANS_B_SEL_CPT;
		else
			sdvox |= SDVO_PIPE_B_SELECT;
	}

	I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
	POSTING_READ(intel_hdmi->sdvox_reg);
}

static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
	u32 temp;

	temp = I915_READ(intel_hdmi->sdvox_reg);

	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	 * we do this anyway which shows more stable in testing.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
		POSTING_READ(intel_hdmi->sdvox_reg);
	}

	if (mode != DRM_MODE_DPMS_ON) {
		temp &= ~SDVO_ENABLE;
	} else {
		temp |= SDVO_ENABLE;
	}

	I915_WRITE(intel_hdmi->sdvox_reg, temp);
	POSTING_READ(intel_hdmi->sdvox_reg);

	/* HW workaround, need to write this twice for issue that may result
	 * in first write getting masked.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(intel_hdmi->sdvox_reg, temp);
		POSTING_READ(intel_hdmi->sdvox_reg);
	}
}

static int intel_hdmi_mode_valid(struct drm_connector *connector,
				 struct drm_display_mode *mode)
{
	if (mode->clock > 165000)
		return MODE_CLOCK_HIGH;
	if (mode->clock < 20000)
		return MODE_CLOCK_HIGH;

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	return MODE_OK;
}

static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
				  struct drm_display_mode *mode,
				  struct drm_display_mode *adjusted_mode)
{
	return true;
}

static enum drm_connector_status
intel_hdmi_detect(struct drm_connector *connector, bool force)
{
	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
	struct drm_i915_private *dev_priv = connector->dev->dev_private;
	struct edid *edid;
	enum drm_connector_status status = connector_status_disconnected;

	intel_hdmi->has_hdmi_sink = false;
	intel_hdmi->has_audio = false;
	edid = drm_get_edid(connector,
			    &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);

	if (edid) {
		if (edid->input & DRM_EDID_INPUT_DIGITAL) {
			status = connector_status_connected;
			intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
			intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
		}
		connector->display_info.raw_edid = NULL;
		kfree(edid);
	}

	return status;
}

static int intel_hdmi_get_modes(struct drm_connector *connector)
{
	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
	struct drm_i915_private *dev_priv = connector->dev->dev_private;

	/* We should parse the EDID data and find out if it's an HDMI sink so
	 * we can send audio to it.
	 */

	return intel_ddc_get_modes(connector,
				   &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
}

static void intel_hdmi_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	.dpms = intel_hdmi_dpms,
	.mode_fixup = intel_hdmi_mode_fixup,
	.prepare = intel_encoder_prepare,
	.mode_set = intel_hdmi_mode_set,
	.commit = intel_encoder_commit,
};

static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.detect = intel_hdmi_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = intel_hdmi_destroy,
};

static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	.get_modes = intel_hdmi_get_modes,
	.mode_valid = intel_hdmi_mode_valid,
	.best_encoder = intel_best_encoder,
};

static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
	.destroy = intel_encoder_destroy,
};

void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_connector *connector;
	struct intel_encoder *intel_encoder;
	struct intel_connector *intel_connector;
	struct intel_hdmi *intel_hdmi;

	intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
	if (!intel_hdmi)
		return;

	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(intel_hdmi);
		return;
	}

	intel_encoder = &intel_hdmi->base;
	drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
			 DRM_MODE_ENCODER_TMDS);

	connector = &intel_connector->base;
	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
			   DRM_MODE_CONNECTOR_HDMIA);
	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);

	intel_encoder->type = INTEL_OUTPUT_HDMI;

	connector->polled = DRM_CONNECTOR_POLL_HPD;
	connector->interlace_allowed = 0;
	connector->doublescan_allowed = 0;
	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

	/* Set up the DDC bus. */
	if (sdvox_reg == SDVOB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == SDVOC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMID) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
		intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
		dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
	}

	intel_hdmi->sdvox_reg = sdvox_reg;

	drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);

	intel_connector_attach_encoder(intel_connector, intel_encoder);
	drm_sysfs_connector_add(connector);

	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	 * 0xd.  Failure to do so will result in spurious interrupts being
	 * generated on the port when a cable is not attached.
	 */
	if (IS_G4X(dev) && !IS_GM45(dev)) {
		u32 temp = I915_READ(PEG_BAND_GAP_DATA);
		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
	}
}
Commit	Line	Data
7d57382e EA	1	/*
	2	* Copyright 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright © 2006-2009 Intel Corporation
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	* Jesse Barnes <jesse.barnes@intel.com>
	27	*/
	28
	29	#include <linux/i2c.h>
5a0e3ad6	30	#include <linux/slab.h>
7d57382e EA	31	#include <linux/delay.h>
	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "drm_crtc.h"
aa93d632	35	#include "drm_edid.h"
7d57382e EA	36	#include "intel_drv.h"
	37	#include "i915_drm.h"
	38	#include "i915_drv.h"
	39
ea5b213a CW	40	struct intel_hdmi {
ea5b213a CW	41	struct intel_encoder base;
7d57382e	42	u32 sdvox_reg;
f899fc64	43	int ddc_bus;
9dff6af8	44	bool has_hdmi_sink;
2e3d6006	45	bool has_audio;
7d57382e EA	46	};
7d57382e EA	47
ea5b213a CW	48	static struct intel_hdmi enc_to_intel_hdmi(struct drm_encoder encoder)
ea5b213a CW	49	{
4ef69c7a	50	return container_of(encoder, struct intel_hdmi, base.base);
ea5b213a CW	51	}
ea5b213a CW	52
df0e9248 CW	53	static struct intel_hdmi intel_attached_hdmi(struct drm_connector connector)
	54	{
	55	return container_of(intel_attached_encoder(connector),
	56	struct intel_hdmi, base);
	57	}
	58
7d57382e EA	59	static void intel_hdmi_mode_set(struct drm_encoder *encoder,
	60	struct drm_display_mode *mode,
	61	struct drm_display_mode *adjusted_mode)
	62	{
	63	struct drm_device *dev = encoder->dev;
	64	struct drm_i915_private *dev_priv = dev->dev_private;
	65	struct drm_crtc *crtc = encoder->crtc;
	66	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
ea5b213a	67	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
7d57382e EA	68	u32 sdvox;
7d57382e EA	69
b599c0bc AJ	70	sdvox = SDVO_ENCODING_HDMI \| SDVO_BORDER_ENABLE;
	71	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	72	sdvox \|= SDVO_VSYNC_ACTIVE_HIGH;
	73	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	74	sdvox \|= SDVO_HSYNC_ACTIVE_HIGH;
7d57382e	75
2e3d6006 ZW	76	/* Required on CPT */
	77	if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
	78	sdvox \|= HDMI_MODE_SELECT;
	79
	80	if (intel_hdmi->has_audio)
7d57382e EA	81	sdvox \|= SDVO_AUDIO_ENABLE;
7d57382e EA	82
0f229062 ZW	83	if (intel_crtc->pipe == 1) {
	84	if (HAS_PCH_CPT(dev))
	85	sdvox \|= PORT_TRANS_B_SEL_CPT;
	86	else
	87	sdvox \|= SDVO_PIPE_B_SELECT;
	88	}
7d57382e	89
ea5b213a CW	90	I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
ea5b213a CW	91	POSTING_READ(intel_hdmi->sdvox_reg);
7d57382e EA	92	}
	93
	94	static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
	95	{
	96	struct drm_device *dev = encoder->dev;
	97	struct drm_i915_private *dev_priv = dev->dev_private;
ea5b213a	98	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
7d57382e EA	99	u32 temp;
7d57382e EA	100
ea5b213a	101	temp = I915_READ(intel_hdmi->sdvox_reg);
d8a2d0e0 ZW	102
	103	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	104	* we do this anyway which shows more stable in testing.
	105	*/
c619eed4	106	if (HAS_PCH_SPLIT(dev)) {
ea5b213a CW	107	I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
ea5b213a CW	108	POSTING_READ(intel_hdmi->sdvox_reg);
d8a2d0e0 ZW	109	}
	110
	111	if (mode != DRM_MODE_DPMS_ON) {
	112	temp &= ~SDVO_ENABLE;
7d57382e	113	} else {
d8a2d0e0	114	temp \|= SDVO_ENABLE;
7d57382e	115	}
d8a2d0e0	116
ea5b213a CW	117	I915_WRITE(intel_hdmi->sdvox_reg, temp);
ea5b213a CW	118	POSTING_READ(intel_hdmi->sdvox_reg);
d8a2d0e0 ZW	119
	120	/* HW workaround, need to write this twice for issue that may result
	121	* in first write getting masked.
	122	*/
c619eed4	123	if (HAS_PCH_SPLIT(dev)) {
ea5b213a CW	124	I915_WRITE(intel_hdmi->sdvox_reg, temp);
ea5b213a CW	125	POSTING_READ(intel_hdmi->sdvox_reg);
d8a2d0e0	126	}
7d57382e EA	127	}
7d57382e EA	128
7d57382e EA	129	static int intel_hdmi_mode_valid(struct drm_connector *connector,
	130	struct drm_display_mode *mode)
	131	{
	132	if (mode->clock > 165000)
	133	return MODE_CLOCK_HIGH;
	134	if (mode->clock < 20000)
	135	return MODE_CLOCK_HIGH;
	136
	137	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	138	return MODE_NO_DBLESCAN;
	139
	140	return MODE_OK;
	141	}
	142
	143	static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
	144	struct drm_display_mode *mode,
	145	struct drm_display_mode *adjusted_mode)
	146	{
	147	return true;
	148	}
	149
aa93d632	150	static enum drm_connector_status
930a9e28	151	intel_hdmi_detect(struct drm_connector *connector, bool force)
9dff6af8	152	{
df0e9248	153	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
f899fc64 CW	154	struct drm_i915_private *dev_priv = connector->dev->dev_private;
f899fc64 CW	155	struct edid *edid;
aa93d632	156	enum drm_connector_status status = connector_status_disconnected;
9dff6af8	157
ea5b213a	158	intel_hdmi->has_hdmi_sink = false;
2e3d6006	159	intel_hdmi->has_audio = false;
f899fc64 CW	160	edid = drm_get_edid(connector,
f899fc64 CW	161	&dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
2ded9e27	162
aa93d632	163	if (edid) {
be9f1c4f	164	if (edid->input & DRM_EDID_INPUT_DIGITAL) {
aa93d632	165	status = connector_status_connected;
ea5b213a	166	intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
2e3d6006	167	intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
aa93d632	168	}
674e2d08	169	connector->display_info.raw_edid = NULL;
aa93d632	170	kfree(edid);
9dff6af8	171	}
30ad48b7	172
2ded9e27	173	return status;
7d57382e EA	174	}
	175
	176	static int intel_hdmi_get_modes(struct drm_connector *connector)
	177	{
df0e9248	178	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
f899fc64	179	struct drm_i915_private *dev_priv = connector->dev->dev_private;
7d57382e EA	180
	181	/* We should parse the EDID data and find out if it's an HDMI sink so
	182	* we can send audio to it.
	183	*/
	184
f899fc64 CW	185	return intel_ddc_get_modes(connector,
f899fc64 CW	186	&dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
7d57382e EA	187	}
	188
	189	static void intel_hdmi_destroy(struct drm_connector *connector)
	190	{
7d57382e EA	191	drm_sysfs_connector_remove(connector);
7d57382e EA	192	drm_connector_cleanup(connector);
674e2d08	193	kfree(connector);
7d57382e EA	194	}
	195
	196	static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	197	.dpms = intel_hdmi_dpms,
	198	.mode_fixup = intel_hdmi_mode_fixup,
	199	.prepare = intel_encoder_prepare,
	200	.mode_set = intel_hdmi_mode_set,
	201	.commit = intel_encoder_commit,
	202	};
	203
	204	static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
c9fb15f6	205	.dpms = drm_helper_connector_dpms,
7d57382e EA	206	.detect = intel_hdmi_detect,
	207	.fill_modes = drm_helper_probe_single_connector_modes,
	208	.destroy = intel_hdmi_destroy,
	209	};
	210
	211	static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	212	.get_modes = intel_hdmi_get_modes,
	213	.mode_valid = intel_hdmi_mode_valid,
df0e9248	214	.best_encoder = intel_best_encoder,
7d57382e EA	215	};
7d57382e EA	216
7d57382e	217	static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
ea5b213a	218	.destroy = intel_encoder_destroy,
7d57382e EA	219	};
7d57382e EA	220
7d57382e EA	221	void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
	222	{
	223	struct drm_i915_private *dev_priv = dev->dev_private;
	224	struct drm_connector *connector;
21d40d37	225	struct intel_encoder *intel_encoder;
674e2d08	226	struct intel_connector *intel_connector;
ea5b213a	227	struct intel_hdmi *intel_hdmi;
7d57382e	228
ea5b213a CW	229	intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
ea5b213a CW	230	if (!intel_hdmi)
7d57382e	231	return;
674e2d08 ZW	232
	233	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	234	if (!intel_connector) {
ea5b213a	235	kfree(intel_hdmi);
674e2d08 ZW	236	return;
	237	}
	238
ea5b213a	239	intel_encoder = &intel_hdmi->base;
373a3cf7 CW	240	drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
	241	DRM_MODE_ENCODER_TMDS);
	242
674e2d08	243	connector = &intel_connector->base;
7d57382e	244	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
8d91104a	245	DRM_MODE_CONNECTOR_HDMIA);
7d57382e EA	246	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
7d57382e EA	247
21d40d37	248	intel_encoder->type = INTEL_OUTPUT_HDMI;
7d57382e	249
eb1f8e4f	250	connector->polled = DRM_CONNECTOR_POLL_HPD;
7d57382e EA	251	connector->interlace_allowed = 0;
7d57382e EA	252	connector->doublescan_allowed = 0;
21d40d37	253	intel_encoder->crtc_mask = (1 << 0) \| (1 << 1);
7d57382e EA	254
7d57382e EA	255	/* Set up the DDC bus. */
f8aed700	256	if (sdvox_reg == SDVOB) {
21d40d37	257	intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
f899fc64	258	intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
b01f2c3a	259	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	260	} else if (sdvox_reg == SDVOC) {
21d40d37	261	intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
f899fc64	262	intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
b01f2c3a	263	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	264	} else if (sdvox_reg == HDMIB) {
21d40d37	265	intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
f899fc64	266	intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
b01f2c3a	267	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	268	} else if (sdvox_reg == HDMIC) {
21d40d37	269	intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
f899fc64	270	intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
b01f2c3a	271	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	272	} else if (sdvox_reg == HDMID) {
21d40d37	273	intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
f899fc64	274	intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
b01f2c3a	275	dev_priv->hotplug_supported_mask \|= HDMID_HOTPLUG_INT_STATUS;
f8aed700	276	}
7d57382e	277
ea5b213a	278	intel_hdmi->sdvox_reg = sdvox_reg;
7d57382e	279
4ef69c7a	280	drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
7d57382e	281
df0e9248	282	intel_connector_attach_encoder(intel_connector, intel_encoder);
7d57382e EA	283	drm_sysfs_connector_add(connector);
	284
	285	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	286	* 0xd. Failure to do so will result in spurious interrupts being
	287	* generated on the port when a cable is not attached.
	288	*/
	289	if (IS_G4X(dev) && !IS_GM45(dev)) {
	290	u32 temp = I915_READ(PEG_BAND_GAP_DATA);
	291	I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) \| 0xd);
	292	}
7d57382e	293	}