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7d57382e EA |
1 | /* |
2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> | |
3 | * Copyright © 2006-2009 Intel Corporation | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Jesse Barnes <jesse.barnes@intel.com> | |
27 | */ | |
28 | ||
29 | #include <linux/i2c.h> | |
5a0e3ad6 | 30 | #include <linux/slab.h> |
7d57382e EA |
31 | #include <linux/delay.h> |
32 | #include "drmP.h" | |
33 | #include "drm.h" | |
34 | #include "drm_crtc.h" | |
aa93d632 | 35 | #include "drm_edid.h" |
7d57382e EA |
36 | #include "intel_drv.h" |
37 | #include "i915_drm.h" | |
38 | #include "i915_drv.h" | |
39 | ||
ea5b213a CW |
40 | struct intel_hdmi { |
41 | struct intel_encoder base; | |
7d57382e | 42 | u32 sdvox_reg; |
f899fc64 | 43 | int ddc_bus; |
9dff6af8 | 44 | bool has_hdmi_sink; |
2e3d6006 | 45 | bool has_audio; |
55b7d6e8 CW |
46 | int force_audio; |
47 | struct drm_property *force_audio_property; | |
7d57382e EA |
48 | }; |
49 | ||
ea5b213a CW |
50 | static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) |
51 | { | |
4ef69c7a | 52 | return container_of(encoder, struct intel_hdmi, base.base); |
ea5b213a CW |
53 | } |
54 | ||
df0e9248 CW |
55 | static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector) |
56 | { | |
57 | return container_of(intel_attached_encoder(connector), | |
58 | struct intel_hdmi, base); | |
59 | } | |
60 | ||
7d57382e EA |
61 | static void intel_hdmi_mode_set(struct drm_encoder *encoder, |
62 | struct drm_display_mode *mode, | |
63 | struct drm_display_mode *adjusted_mode) | |
64 | { | |
65 | struct drm_device *dev = encoder->dev; | |
66 | struct drm_i915_private *dev_priv = dev->dev_private; | |
67 | struct drm_crtc *crtc = encoder->crtc; | |
68 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
ea5b213a | 69 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
7d57382e EA |
70 | u32 sdvox; |
71 | ||
b599c0bc AJ |
72 | sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE; |
73 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | |
74 | sdvox |= SDVO_VSYNC_ACTIVE_HIGH; | |
75 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | |
76 | sdvox |= SDVO_HSYNC_ACTIVE_HIGH; | |
7d57382e | 77 | |
2e3d6006 ZW |
78 | /* Required on CPT */ |
79 | if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev)) | |
80 | sdvox |= HDMI_MODE_SELECT; | |
81 | ||
82 | if (intel_hdmi->has_audio) | |
7d57382e EA |
83 | sdvox |= SDVO_AUDIO_ENABLE; |
84 | ||
0f229062 ZW |
85 | if (intel_crtc->pipe == 1) { |
86 | if (HAS_PCH_CPT(dev)) | |
87 | sdvox |= PORT_TRANS_B_SEL_CPT; | |
88 | else | |
89 | sdvox |= SDVO_PIPE_B_SELECT; | |
90 | } | |
7d57382e | 91 | |
ea5b213a CW |
92 | I915_WRITE(intel_hdmi->sdvox_reg, sdvox); |
93 | POSTING_READ(intel_hdmi->sdvox_reg); | |
7d57382e EA |
94 | } |
95 | ||
96 | static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) | |
97 | { | |
98 | struct drm_device *dev = encoder->dev; | |
99 | struct drm_i915_private *dev_priv = dev->dev_private; | |
ea5b213a | 100 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
7d57382e EA |
101 | u32 temp; |
102 | ||
ea5b213a | 103 | temp = I915_READ(intel_hdmi->sdvox_reg); |
d8a2d0e0 ZW |
104 | |
105 | /* HW workaround, need to toggle enable bit off and on for 12bpc, but | |
106 | * we do this anyway which shows more stable in testing. | |
107 | */ | |
c619eed4 | 108 | if (HAS_PCH_SPLIT(dev)) { |
ea5b213a CW |
109 | I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE); |
110 | POSTING_READ(intel_hdmi->sdvox_reg); | |
d8a2d0e0 ZW |
111 | } |
112 | ||
113 | if (mode != DRM_MODE_DPMS_ON) { | |
114 | temp &= ~SDVO_ENABLE; | |
7d57382e | 115 | } else { |
d8a2d0e0 | 116 | temp |= SDVO_ENABLE; |
7d57382e | 117 | } |
d8a2d0e0 | 118 | |
ea5b213a CW |
119 | I915_WRITE(intel_hdmi->sdvox_reg, temp); |
120 | POSTING_READ(intel_hdmi->sdvox_reg); | |
d8a2d0e0 ZW |
121 | |
122 | /* HW workaround, need to write this twice for issue that may result | |
123 | * in first write getting masked. | |
124 | */ | |
c619eed4 | 125 | if (HAS_PCH_SPLIT(dev)) { |
ea5b213a CW |
126 | I915_WRITE(intel_hdmi->sdvox_reg, temp); |
127 | POSTING_READ(intel_hdmi->sdvox_reg); | |
d8a2d0e0 | 128 | } |
7d57382e EA |
129 | } |
130 | ||
7d57382e EA |
131 | static int intel_hdmi_mode_valid(struct drm_connector *connector, |
132 | struct drm_display_mode *mode) | |
133 | { | |
134 | if (mode->clock > 165000) | |
135 | return MODE_CLOCK_HIGH; | |
136 | if (mode->clock < 20000) | |
137 | return MODE_CLOCK_HIGH; | |
138 | ||
139 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
140 | return MODE_NO_DBLESCAN; | |
141 | ||
142 | return MODE_OK; | |
143 | } | |
144 | ||
145 | static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, | |
146 | struct drm_display_mode *mode, | |
147 | struct drm_display_mode *adjusted_mode) | |
148 | { | |
149 | return true; | |
150 | } | |
151 | ||
aa93d632 | 152 | static enum drm_connector_status |
930a9e28 | 153 | intel_hdmi_detect(struct drm_connector *connector, bool force) |
9dff6af8 | 154 | { |
df0e9248 | 155 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
f899fc64 CW |
156 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
157 | struct edid *edid; | |
aa93d632 | 158 | enum drm_connector_status status = connector_status_disconnected; |
9dff6af8 | 159 | |
ea5b213a | 160 | intel_hdmi->has_hdmi_sink = false; |
2e3d6006 | 161 | intel_hdmi->has_audio = false; |
f899fc64 CW |
162 | edid = drm_get_edid(connector, |
163 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); | |
2ded9e27 | 164 | |
aa93d632 | 165 | if (edid) { |
be9f1c4f | 166 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
aa93d632 | 167 | status = connector_status_connected; |
ea5b213a | 168 | intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid); |
2e3d6006 | 169 | intel_hdmi->has_audio = drm_detect_monitor_audio(edid); |
aa93d632 | 170 | } |
674e2d08 | 171 | connector->display_info.raw_edid = NULL; |
aa93d632 | 172 | kfree(edid); |
9dff6af8 | 173 | } |
30ad48b7 | 174 | |
55b7d6e8 CW |
175 | if (status == connector_status_connected) { |
176 | if (intel_hdmi->force_audio) | |
177 | intel_hdmi->has_audio = intel_hdmi->force_audio > 0; | |
178 | } | |
179 | ||
2ded9e27 | 180 | return status; |
7d57382e EA |
181 | } |
182 | ||
183 | static int intel_hdmi_get_modes(struct drm_connector *connector) | |
184 | { | |
df0e9248 | 185 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
f899fc64 | 186 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
7d57382e EA |
187 | |
188 | /* We should parse the EDID data and find out if it's an HDMI sink so | |
189 | * we can send audio to it. | |
190 | */ | |
191 | ||
f899fc64 CW |
192 | return intel_ddc_get_modes(connector, |
193 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); | |
7d57382e EA |
194 | } |
195 | ||
55b7d6e8 CW |
196 | static int |
197 | intel_hdmi_set_property(struct drm_connector *connector, | |
198 | struct drm_property *property, | |
199 | uint64_t val) | |
200 | { | |
201 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); | |
202 | int ret; | |
203 | ||
204 | ret = drm_connector_property_set_value(connector, property, val); | |
205 | if (ret) | |
206 | return ret; | |
207 | ||
208 | if (property == intel_hdmi->force_audio_property) { | |
209 | if (val == intel_hdmi->force_audio) | |
210 | return 0; | |
211 | ||
212 | intel_hdmi->force_audio = val; | |
213 | ||
214 | if (val > 0 && intel_hdmi->has_audio) | |
215 | return 0; | |
216 | if (val < 0 && !intel_hdmi->has_audio) | |
217 | return 0; | |
218 | ||
219 | intel_hdmi->has_audio = val > 0; | |
220 | goto done; | |
221 | } | |
222 | ||
223 | return -EINVAL; | |
224 | ||
225 | done: | |
226 | if (intel_hdmi->base.base.crtc) { | |
227 | struct drm_crtc *crtc = intel_hdmi->base.base.crtc; | |
228 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
229 | crtc->x, crtc->y, | |
230 | crtc->fb); | |
231 | } | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
7d57382e EA |
236 | static void intel_hdmi_destroy(struct drm_connector *connector) |
237 | { | |
7d57382e EA |
238 | drm_sysfs_connector_remove(connector); |
239 | drm_connector_cleanup(connector); | |
674e2d08 | 240 | kfree(connector); |
7d57382e EA |
241 | } |
242 | ||
243 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { | |
244 | .dpms = intel_hdmi_dpms, | |
245 | .mode_fixup = intel_hdmi_mode_fixup, | |
246 | .prepare = intel_encoder_prepare, | |
247 | .mode_set = intel_hdmi_mode_set, | |
248 | .commit = intel_encoder_commit, | |
249 | }; | |
250 | ||
251 | static const struct drm_connector_funcs intel_hdmi_connector_funcs = { | |
c9fb15f6 | 252 | .dpms = drm_helper_connector_dpms, |
7d57382e EA |
253 | .detect = intel_hdmi_detect, |
254 | .fill_modes = drm_helper_probe_single_connector_modes, | |
55b7d6e8 | 255 | .set_property = intel_hdmi_set_property, |
7d57382e EA |
256 | .destroy = intel_hdmi_destroy, |
257 | }; | |
258 | ||
259 | static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = { | |
260 | .get_modes = intel_hdmi_get_modes, | |
261 | .mode_valid = intel_hdmi_mode_valid, | |
df0e9248 | 262 | .best_encoder = intel_best_encoder, |
7d57382e EA |
263 | }; |
264 | ||
7d57382e | 265 | static const struct drm_encoder_funcs intel_hdmi_enc_funcs = { |
ea5b213a | 266 | .destroy = intel_encoder_destroy, |
7d57382e EA |
267 | }; |
268 | ||
55b7d6e8 CW |
269 | static void |
270 | intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector) | |
271 | { | |
272 | struct drm_device *dev = connector->dev; | |
273 | ||
274 | intel_hdmi->force_audio_property = | |
275 | drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); | |
276 | if (intel_hdmi->force_audio_property) { | |
277 | intel_hdmi->force_audio_property->values[0] = -1; | |
278 | intel_hdmi->force_audio_property->values[1] = 1; | |
279 | drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0); | |
280 | } | |
281 | } | |
282 | ||
7d57382e EA |
283 | void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) |
284 | { | |
285 | struct drm_i915_private *dev_priv = dev->dev_private; | |
286 | struct drm_connector *connector; | |
21d40d37 | 287 | struct intel_encoder *intel_encoder; |
674e2d08 | 288 | struct intel_connector *intel_connector; |
ea5b213a | 289 | struct intel_hdmi *intel_hdmi; |
7d57382e | 290 | |
ea5b213a CW |
291 | intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL); |
292 | if (!intel_hdmi) | |
7d57382e | 293 | return; |
674e2d08 ZW |
294 | |
295 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); | |
296 | if (!intel_connector) { | |
ea5b213a | 297 | kfree(intel_hdmi); |
674e2d08 ZW |
298 | return; |
299 | } | |
300 | ||
ea5b213a | 301 | intel_encoder = &intel_hdmi->base; |
373a3cf7 CW |
302 | drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs, |
303 | DRM_MODE_ENCODER_TMDS); | |
304 | ||
674e2d08 | 305 | connector = &intel_connector->base; |
7d57382e | 306 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
8d91104a | 307 | DRM_MODE_CONNECTOR_HDMIA); |
7d57382e EA |
308 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); |
309 | ||
21d40d37 | 310 | intel_encoder->type = INTEL_OUTPUT_HDMI; |
7d57382e | 311 | |
eb1f8e4f | 312 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
7d57382e EA |
313 | connector->interlace_allowed = 0; |
314 | connector->doublescan_allowed = 0; | |
21d40d37 | 315 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
7d57382e EA |
316 | |
317 | /* Set up the DDC bus. */ | |
f8aed700 | 318 | if (sdvox_reg == SDVOB) { |
21d40d37 | 319 | intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); |
f899fc64 | 320 | intel_hdmi->ddc_bus = GMBUS_PORT_DPB; |
b01f2c3a | 321 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
f8aed700 | 322 | } else if (sdvox_reg == SDVOC) { |
21d40d37 | 323 | intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); |
f899fc64 | 324 | intel_hdmi->ddc_bus = GMBUS_PORT_DPC; |
b01f2c3a | 325 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
f8aed700 | 326 | } else if (sdvox_reg == HDMIB) { |
21d40d37 | 327 | intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); |
f899fc64 | 328 | intel_hdmi->ddc_bus = GMBUS_PORT_DPB; |
b01f2c3a | 329 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
f8aed700 | 330 | } else if (sdvox_reg == HDMIC) { |
21d40d37 | 331 | intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); |
f899fc64 | 332 | intel_hdmi->ddc_bus = GMBUS_PORT_DPC; |
b01f2c3a | 333 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
f8aed700 | 334 | } else if (sdvox_reg == HDMID) { |
21d40d37 | 335 | intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); |
f899fc64 | 336 | intel_hdmi->ddc_bus = GMBUS_PORT_DPD; |
b01f2c3a | 337 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; |
f8aed700 | 338 | } |
7d57382e | 339 | |
ea5b213a | 340 | intel_hdmi->sdvox_reg = sdvox_reg; |
7d57382e | 341 | |
4ef69c7a | 342 | drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs); |
7d57382e | 343 | |
55b7d6e8 CW |
344 | intel_hdmi_add_properties(intel_hdmi, connector); |
345 | ||
df0e9248 | 346 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
7d57382e EA |
347 | drm_sysfs_connector_add(connector); |
348 | ||
349 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written | |
350 | * 0xd. Failure to do so will result in spurious interrupts being | |
351 | * generated on the port when a cable is not attached. | |
352 | */ | |
353 | if (IS_G4X(dev) && !IS_GM45(dev)) { | |
354 | u32 temp = I915_READ(PEG_BAND_GAP_DATA); | |
355 | I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); | |
356 | } | |
7d57382e | 357 | } |