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1d8e1c75 CW |
1 | /* |
2 | * Copyright © 2006-2010 Intel Corporation | |
3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Dave Airlie <airlied@linux.ie> | |
27 | * Jesse Barnes <jesse.barnes@intel.com> | |
28 | * Chris Wilson <chris@chris-wilson.co.uk> | |
29 | */ | |
30 | ||
a70491cc JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
7bd90909 | 33 | #include <linux/moduleparam.h> |
1d8e1c75 CW |
34 | #include "intel_drv.h" |
35 | ||
36 | void | |
4c6df4b4 | 37 | intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
1d8e1c75 CW |
38 | struct drm_display_mode *adjusted_mode) |
39 | { | |
4c6df4b4 | 40 | drm_mode_copy(adjusted_mode, fixed_mode); |
a52690e4 ID |
41 | |
42 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
1d8e1c75 CW |
43 | } |
44 | ||
525997e0 JN |
45 | /** |
46 | * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID | |
47 | * @dev: drm device | |
48 | * @fixed_mode : panel native mode | |
49 | * @connector: LVDS/eDP connector | |
50 | * | |
51 | * Return downclock_avail | |
52 | * Find the reduced downclock for LVDS/eDP in EDID. | |
53 | */ | |
54 | struct drm_display_mode * | |
55 | intel_find_panel_downclock(struct drm_device *dev, | |
56 | struct drm_display_mode *fixed_mode, | |
57 | struct drm_connector *connector) | |
58 | { | |
59 | struct drm_display_mode *scan, *tmp_mode; | |
60 | int temp_downclock; | |
61 | ||
62 | temp_downclock = fixed_mode->clock; | |
63 | tmp_mode = NULL; | |
64 | ||
65 | list_for_each_entry(scan, &connector->probed_modes, head) { | |
66 | /* | |
67 | * If one mode has the same resolution with the fixed_panel | |
68 | * mode while they have the different refresh rate, it means | |
69 | * that the reduced downclock is found. In such | |
70 | * case we can set the different FPx0/1 to dynamically select | |
71 | * between low and high frequency. | |
72 | */ | |
73 | if (scan->hdisplay == fixed_mode->hdisplay && | |
74 | scan->hsync_start == fixed_mode->hsync_start && | |
75 | scan->hsync_end == fixed_mode->hsync_end && | |
76 | scan->htotal == fixed_mode->htotal && | |
77 | scan->vdisplay == fixed_mode->vdisplay && | |
78 | scan->vsync_start == fixed_mode->vsync_start && | |
79 | scan->vsync_end == fixed_mode->vsync_end && | |
80 | scan->vtotal == fixed_mode->vtotal) { | |
81 | if (scan->clock < temp_downclock) { | |
82 | /* | |
83 | * The downclock is already found. But we | |
84 | * expect to find the lower downclock. | |
85 | */ | |
86 | temp_downclock = scan->clock; | |
87 | tmp_mode = scan; | |
88 | } | |
89 | } | |
90 | } | |
91 | ||
92 | if (temp_downclock < fixed_mode->clock) | |
93 | return drm_mode_duplicate(dev, tmp_mode); | |
94 | else | |
95 | return NULL; | |
96 | } | |
97 | ||
1d8e1c75 CW |
98 | /* adjusted_mode has been preset to be the panel's fixed mode */ |
99 | void | |
b074cec8 JB |
100 | intel_pch_panel_fitting(struct intel_crtc *intel_crtc, |
101 | struct intel_crtc_config *pipe_config, | |
102 | int fitting_mode) | |
1d8e1c75 | 103 | { |
37327abd | 104 | struct drm_display_mode *adjusted_mode; |
1d8e1c75 CW |
105 | int x, y, width, height; |
106 | ||
b074cec8 JB |
107 | adjusted_mode = &pipe_config->adjusted_mode; |
108 | ||
1d8e1c75 CW |
109 | x = y = width = height = 0; |
110 | ||
111 | /* Native modes don't need fitting */ | |
37327abd VS |
112 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
113 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
1d8e1c75 CW |
114 | goto done; |
115 | ||
116 | switch (fitting_mode) { | |
117 | case DRM_MODE_SCALE_CENTER: | |
37327abd VS |
118 | width = pipe_config->pipe_src_w; |
119 | height = pipe_config->pipe_src_h; | |
1d8e1c75 CW |
120 | x = (adjusted_mode->hdisplay - width + 1)/2; |
121 | y = (adjusted_mode->vdisplay - height + 1)/2; | |
122 | break; | |
123 | ||
124 | case DRM_MODE_SCALE_ASPECT: | |
125 | /* Scale but preserve the aspect ratio */ | |
126 | { | |
9084e7d2 DV |
127 | u32 scaled_width = adjusted_mode->hdisplay |
128 | * pipe_config->pipe_src_h; | |
129 | u32 scaled_height = pipe_config->pipe_src_w | |
130 | * adjusted_mode->vdisplay; | |
1d8e1c75 | 131 | if (scaled_width > scaled_height) { /* pillar */ |
37327abd | 132 | width = scaled_height / pipe_config->pipe_src_h; |
302983e9 | 133 | if (width & 1) |
0206e353 | 134 | width++; |
1d8e1c75 CW |
135 | x = (adjusted_mode->hdisplay - width + 1) / 2; |
136 | y = 0; | |
137 | height = adjusted_mode->vdisplay; | |
138 | } else if (scaled_width < scaled_height) { /* letter */ | |
37327abd | 139 | height = scaled_width / pipe_config->pipe_src_w; |
302983e9 AJ |
140 | if (height & 1) |
141 | height++; | |
1d8e1c75 CW |
142 | y = (adjusted_mode->vdisplay - height + 1) / 2; |
143 | x = 0; | |
144 | width = adjusted_mode->hdisplay; | |
145 | } else { | |
146 | x = y = 0; | |
147 | width = adjusted_mode->hdisplay; | |
148 | height = adjusted_mode->vdisplay; | |
149 | } | |
150 | } | |
151 | break; | |
152 | ||
1d8e1c75 CW |
153 | case DRM_MODE_SCALE_FULLSCREEN: |
154 | x = y = 0; | |
155 | width = adjusted_mode->hdisplay; | |
156 | height = adjusted_mode->vdisplay; | |
157 | break; | |
ab3e67f4 JB |
158 | |
159 | default: | |
160 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
161 | return; | |
1d8e1c75 CW |
162 | } |
163 | ||
164 | done: | |
b074cec8 JB |
165 | pipe_config->pch_pfit.pos = (x << 16) | y; |
166 | pipe_config->pch_pfit.size = (width << 16) | height; | |
fd4daa9c | 167 | pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; |
1d8e1c75 | 168 | } |
a9573556 | 169 | |
2dd24552 JB |
170 | static void |
171 | centre_horizontally(struct drm_display_mode *mode, | |
172 | int width) | |
173 | { | |
174 | u32 border, sync_pos, blank_width, sync_width; | |
175 | ||
176 | /* keep the hsync and hblank widths constant */ | |
177 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; | |
178 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; | |
179 | sync_pos = (blank_width - sync_width + 1) / 2; | |
180 | ||
181 | border = (mode->hdisplay - width + 1) / 2; | |
182 | border += border & 1; /* make the border even */ | |
183 | ||
184 | mode->crtc_hdisplay = width; | |
185 | mode->crtc_hblank_start = width + border; | |
186 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; | |
187 | ||
188 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; | |
189 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; | |
190 | } | |
191 | ||
192 | static void | |
193 | centre_vertically(struct drm_display_mode *mode, | |
194 | int height) | |
195 | { | |
196 | u32 border, sync_pos, blank_width, sync_width; | |
197 | ||
198 | /* keep the vsync and vblank widths constant */ | |
199 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; | |
200 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; | |
201 | sync_pos = (blank_width - sync_width + 1) / 2; | |
202 | ||
203 | border = (mode->vdisplay - height + 1) / 2; | |
204 | ||
205 | mode->crtc_vdisplay = height; | |
206 | mode->crtc_vblank_start = height + border; | |
207 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; | |
208 | ||
209 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; | |
210 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; | |
211 | } | |
212 | ||
213 | static inline u32 panel_fitter_scaling(u32 source, u32 target) | |
214 | { | |
215 | /* | |
216 | * Floating point operation is not supported. So the FACTOR | |
217 | * is defined, which can avoid the floating point computation | |
218 | * when calculating the panel ratio. | |
219 | */ | |
220 | #define ACCURACY 12 | |
221 | #define FACTOR (1 << ACCURACY) | |
222 | u32 ratio = source * FACTOR / target; | |
223 | return (FACTOR * ratio + FACTOR/2) / FACTOR; | |
224 | } | |
225 | ||
9084e7d2 DV |
226 | static void i965_scale_aspect(struct intel_crtc_config *pipe_config, |
227 | u32 *pfit_control) | |
228 | { | |
229 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
230 | u32 scaled_width = adjusted_mode->hdisplay * | |
231 | pipe_config->pipe_src_h; | |
232 | u32 scaled_height = pipe_config->pipe_src_w * | |
233 | adjusted_mode->vdisplay; | |
234 | ||
235 | /* 965+ is easy, it does everything in hw */ | |
236 | if (scaled_width > scaled_height) | |
237 | *pfit_control |= PFIT_ENABLE | | |
238 | PFIT_SCALING_PILLAR; | |
239 | else if (scaled_width < scaled_height) | |
240 | *pfit_control |= PFIT_ENABLE | | |
241 | PFIT_SCALING_LETTER; | |
242 | else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w) | |
243 | *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; | |
244 | } | |
245 | ||
246 | static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config, | |
247 | u32 *pfit_control, u32 *pfit_pgm_ratios, | |
248 | u32 *border) | |
249 | { | |
250 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
251 | u32 scaled_width = adjusted_mode->hdisplay * | |
252 | pipe_config->pipe_src_h; | |
253 | u32 scaled_height = pipe_config->pipe_src_w * | |
254 | adjusted_mode->vdisplay; | |
255 | u32 bits; | |
256 | ||
257 | /* | |
258 | * For earlier chips we have to calculate the scaling | |
259 | * ratio by hand and program it into the | |
260 | * PFIT_PGM_RATIO register | |
261 | */ | |
262 | if (scaled_width > scaled_height) { /* pillar */ | |
263 | centre_horizontally(adjusted_mode, | |
264 | scaled_height / | |
265 | pipe_config->pipe_src_h); | |
266 | ||
267 | *border = LVDS_BORDER_ENABLE; | |
268 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) { | |
269 | bits = panel_fitter_scaling(pipe_config->pipe_src_h, | |
270 | adjusted_mode->vdisplay); | |
271 | ||
272 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
273 | bits << PFIT_VERT_SCALE_SHIFT); | |
274 | *pfit_control |= (PFIT_ENABLE | | |
275 | VERT_INTERP_BILINEAR | | |
276 | HORIZ_INTERP_BILINEAR); | |
277 | } | |
278 | } else if (scaled_width < scaled_height) { /* letter */ | |
279 | centre_vertically(adjusted_mode, | |
280 | scaled_width / | |
281 | pipe_config->pipe_src_w); | |
282 | ||
283 | *border = LVDS_BORDER_ENABLE; | |
284 | if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
285 | bits = panel_fitter_scaling(pipe_config->pipe_src_w, | |
286 | adjusted_mode->hdisplay); | |
287 | ||
288 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
289 | bits << PFIT_VERT_SCALE_SHIFT); | |
290 | *pfit_control |= (PFIT_ENABLE | | |
291 | VERT_INTERP_BILINEAR | | |
292 | HORIZ_INTERP_BILINEAR); | |
293 | } | |
294 | } else { | |
295 | /* Aspects match, Let hw scale both directions */ | |
296 | *pfit_control |= (PFIT_ENABLE | | |
297 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | |
298 | VERT_INTERP_BILINEAR | | |
299 | HORIZ_INTERP_BILINEAR); | |
300 | } | |
301 | } | |
302 | ||
2dd24552 JB |
303 | void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, |
304 | struct intel_crtc_config *pipe_config, | |
305 | int fitting_mode) | |
306 | { | |
307 | struct drm_device *dev = intel_crtc->base.dev; | |
2dd24552 | 308 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
37327abd | 309 | struct drm_display_mode *adjusted_mode; |
2dd24552 | 310 | |
2dd24552 JB |
311 | adjusted_mode = &pipe_config->adjusted_mode; |
312 | ||
313 | /* Native modes don't need fitting */ | |
37327abd VS |
314 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
315 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
2dd24552 JB |
316 | goto out; |
317 | ||
318 | switch (fitting_mode) { | |
319 | case DRM_MODE_SCALE_CENTER: | |
320 | /* | |
321 | * For centered modes, we have to calculate border widths & | |
322 | * heights and modify the values programmed into the CRTC. | |
323 | */ | |
37327abd VS |
324 | centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); |
325 | centre_vertically(adjusted_mode, pipe_config->pipe_src_h); | |
2dd24552 JB |
326 | border = LVDS_BORDER_ENABLE; |
327 | break; | |
328 | case DRM_MODE_SCALE_ASPECT: | |
329 | /* Scale but preserve the aspect ratio */ | |
9084e7d2 DV |
330 | if (INTEL_INFO(dev)->gen >= 4) |
331 | i965_scale_aspect(pipe_config, &pfit_control); | |
332 | else | |
333 | i9xx_scale_aspect(pipe_config, &pfit_control, | |
334 | &pfit_pgm_ratios, &border); | |
2dd24552 | 335 | break; |
2dd24552 JB |
336 | case DRM_MODE_SCALE_FULLSCREEN: |
337 | /* | |
338 | * Full scaling, even if it changes the aspect ratio. | |
339 | * Fortunately this is all done for us in hw. | |
340 | */ | |
37327abd VS |
341 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay || |
342 | pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
2dd24552 JB |
343 | pfit_control |= PFIT_ENABLE; |
344 | if (INTEL_INFO(dev)->gen >= 4) | |
345 | pfit_control |= PFIT_SCALING_AUTO; | |
346 | else | |
347 | pfit_control |= (VERT_AUTO_SCALE | | |
348 | VERT_INTERP_BILINEAR | | |
349 | HORIZ_AUTO_SCALE | | |
350 | HORIZ_INTERP_BILINEAR); | |
351 | } | |
352 | break; | |
ab3e67f4 JB |
353 | default: |
354 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
355 | return; | |
2dd24552 JB |
356 | } |
357 | ||
358 | /* 965+ wants fuzzy fitting */ | |
359 | /* FIXME: handle multiple panels by failing gracefully */ | |
360 | if (INTEL_INFO(dev)->gen >= 4) | |
361 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | |
362 | PFIT_FILTER_FUZZY); | |
363 | ||
364 | out: | |
365 | if ((pfit_control & PFIT_ENABLE) == 0) { | |
366 | pfit_control = 0; | |
367 | pfit_pgm_ratios = 0; | |
368 | } | |
369 | ||
6b89cdde DV |
370 | /* Make sure pre-965 set dither correctly for 18bpp panels. */ |
371 | if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) | |
372 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
373 | ||
2deefda5 DV |
374 | pipe_config->gmch_pfit.control = pfit_control; |
375 | pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; | |
68fc8742 | 376 | pipe_config->gmch_pfit.lvds_border_bits = border; |
2dd24552 JB |
377 | } |
378 | ||
525997e0 JN |
379 | enum drm_connector_status |
380 | intel_panel_detect(struct drm_device *dev) | |
381 | { | |
382 | struct drm_i915_private *dev_priv = dev->dev_private; | |
383 | ||
384 | /* Assume that the BIOS does not lie through the OpRegion... */ | |
385 | if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) { | |
386 | return ioread32(dev_priv->opregion.lid_state) & 0x1 ? | |
387 | connector_status_connected : | |
388 | connector_status_disconnected; | |
389 | } | |
390 | ||
391 | switch (i915.panel_ignore_lid) { | |
392 | case -2: | |
393 | return connector_status_connected; | |
394 | case -1: | |
395 | return connector_status_disconnected; | |
396 | default: | |
397 | return connector_status_unknown; | |
398 | } | |
399 | } | |
400 | ||
6dda730e JN |
401 | /** |
402 | * scale - scale values from one range to another | |
403 | * | |
404 | * @source_val: value in range [@source_min..@source_max] | |
405 | * | |
406 | * Return @source_val in range [@source_min..@source_max] scaled to range | |
407 | * [@target_min..@target_max]. | |
408 | */ | |
409 | static uint32_t scale(uint32_t source_val, | |
410 | uint32_t source_min, uint32_t source_max, | |
411 | uint32_t target_min, uint32_t target_max) | |
412 | { | |
413 | uint64_t target_val; | |
414 | ||
415 | WARN_ON(source_min > source_max); | |
416 | WARN_ON(target_min > target_max); | |
417 | ||
418 | /* defensive */ | |
419 | source_val = clamp(source_val, source_min, source_max); | |
420 | ||
421 | /* avoid overflows */ | |
673e7bbd AE |
422 | target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) * |
423 | (target_max - target_min), source_max - source_min); | |
6dda730e JN |
424 | target_val += target_min; |
425 | ||
426 | return target_val; | |
427 | } | |
428 | ||
429 | /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ | |
430 | static inline u32 scale_user_to_hw(struct intel_connector *connector, | |
431 | u32 user_level, u32 user_max) | |
432 | { | |
433 | struct intel_panel *panel = &connector->panel; | |
434 | ||
435 | return scale(user_level, 0, user_max, | |
436 | panel->backlight.min, panel->backlight.max); | |
437 | } | |
438 | ||
439 | /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result | |
440 | * to [hw_min..hw_max]. */ | |
441 | static inline u32 clamp_user_to_hw(struct intel_connector *connector, | |
442 | u32 user_level, u32 user_max) | |
443 | { | |
444 | struct intel_panel *panel = &connector->panel; | |
445 | u32 hw_level; | |
446 | ||
447 | hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); | |
448 | hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); | |
449 | ||
450 | return hw_level; | |
451 | } | |
452 | ||
453 | /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ | |
454 | static inline u32 scale_hw_to_user(struct intel_connector *connector, | |
455 | u32 hw_level, u32 user_max) | |
456 | { | |
457 | struct intel_panel *panel = &connector->panel; | |
458 | ||
459 | return scale(hw_level, panel->backlight.min, panel->backlight.max, | |
460 | 0, user_max); | |
461 | } | |
462 | ||
7bd688cd JN |
463 | static u32 intel_panel_compute_brightness(struct intel_connector *connector, |
464 | u32 val) | |
7bd90909 | 465 | { |
7bd688cd | 466 | struct drm_device *dev = connector->base.dev; |
4dca20ef | 467 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 JN |
468 | struct intel_panel *panel = &connector->panel; |
469 | ||
470 | WARN_ON(panel->backlight.max == 0); | |
4dca20ef | 471 | |
d330a953 | 472 | if (i915.invert_brightness < 0) |
4dca20ef CE |
473 | return val; |
474 | ||
d330a953 | 475 | if (i915.invert_brightness > 0 || |
d6540632 | 476 | dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
f91c15e0 | 477 | return panel->backlight.max - val; |
d6540632 | 478 | } |
7bd90909 CE |
479 | |
480 | return val; | |
481 | } | |
482 | ||
96ab4c70 | 483 | static u32 bdw_get_backlight(struct intel_connector *connector) |
0b0b053a | 484 | { |
96ab4c70 | 485 | struct drm_device *dev = connector->base.dev; |
bfd7590d | 486 | struct drm_i915_private *dev_priv = dev->dev_private; |
0b0b053a | 487 | |
96ab4c70 DV |
488 | return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; |
489 | } | |
07bf139b | 490 | |
7bd688cd | 491 | static u32 pch_get_backlight(struct intel_connector *connector) |
a9573556 | 492 | { |
7bd688cd | 493 | struct drm_device *dev = connector->base.dev; |
a9573556 | 494 | struct drm_i915_private *dev_priv = dev->dev_private; |
8ba2d185 | 495 | |
7bd688cd JN |
496 | return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
497 | } | |
a9573556 | 498 | |
7bd688cd JN |
499 | static u32 i9xx_get_backlight(struct intel_connector *connector) |
500 | { | |
501 | struct drm_device *dev = connector->base.dev; | |
502 | struct drm_i915_private *dev_priv = dev->dev_private; | |
636baebf | 503 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 504 | u32 val; |
07bf139b | 505 | |
7bd688cd JN |
506 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
507 | if (INTEL_INFO(dev)->gen < 4) | |
508 | val >>= 1; | |
ba3820ad | 509 | |
636baebf | 510 | if (panel->backlight.combination_mode) { |
7bd688cd | 511 | u8 lbpc; |
ba3820ad | 512 | |
7bd688cd JN |
513 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); |
514 | val *= lbpc; | |
a9573556 CW |
515 | } |
516 | ||
7bd688cd JN |
517 | return val; |
518 | } | |
519 | ||
520 | static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) | |
521 | { | |
522 | struct drm_i915_private *dev_priv = dev->dev_private; | |
523 | ||
23ec0a88 VS |
524 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
525 | return 0; | |
526 | ||
7bd688cd JN |
527 | return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; |
528 | } | |
529 | ||
530 | static u32 vlv_get_backlight(struct intel_connector *connector) | |
531 | { | |
532 | struct drm_device *dev = connector->base.dev; | |
533 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
534 | ||
535 | return _vlv_get_backlight(dev, pipe); | |
536 | } | |
537 | ||
538 | static u32 intel_panel_get_backlight(struct intel_connector *connector) | |
539 | { | |
540 | struct drm_device *dev = connector->base.dev; | |
541 | struct drm_i915_private *dev_priv = dev->dev_private; | |
2d72f6c7 VS |
542 | struct intel_panel *panel = &connector->panel; |
543 | u32 val = 0; | |
7bd688cd | 544 | |
07f11d49 | 545 | mutex_lock(&dev_priv->backlight_lock); |
7bd688cd | 546 | |
2d72f6c7 VS |
547 | if (panel->backlight.enabled) { |
548 | val = dev_priv->display.get_backlight(connector); | |
549 | val = intel_panel_compute_brightness(connector, val); | |
550 | } | |
8ba2d185 | 551 | |
07f11d49 | 552 | mutex_unlock(&dev_priv->backlight_lock); |
8ba2d185 | 553 | |
a9573556 CW |
554 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
555 | return val; | |
556 | } | |
557 | ||
96ab4c70 | 558 | static void bdw_set_backlight(struct intel_connector *connector, u32 level) |
f8e10062 | 559 | { |
96ab4c70 | 560 | struct drm_device *dev = connector->base.dev; |
f8e10062 BW |
561 | struct drm_i915_private *dev_priv = dev->dev_private; |
562 | u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
563 | I915_WRITE(BLC_PWM_PCH_CTL2, val | level); | |
564 | } | |
565 | ||
7bd688cd | 566 | static void pch_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 567 | { |
7bd688cd | 568 | struct drm_device *dev = connector->base.dev; |
a9573556 | 569 | struct drm_i915_private *dev_priv = dev->dev_private; |
7bd688cd JN |
570 | u32 tmp; |
571 | ||
572 | tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
573 | I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); | |
a9573556 CW |
574 | } |
575 | ||
7bd688cd | 576 | static void i9xx_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 577 | { |
7bd688cd | 578 | struct drm_device *dev = connector->base.dev; |
a9573556 | 579 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 | 580 | struct intel_panel *panel = &connector->panel; |
b329b328 | 581 | u32 tmp, mask; |
ba3820ad | 582 | |
f91c15e0 JN |
583 | WARN_ON(panel->backlight.max == 0); |
584 | ||
636baebf | 585 | if (panel->backlight.combination_mode) { |
ba3820ad TI |
586 | u8 lbpc; |
587 | ||
f91c15e0 | 588 | lbpc = level * 0xfe / panel->backlight.max + 1; |
ba3820ad TI |
589 | level /= lbpc; |
590 | pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); | |
591 | } | |
592 | ||
b329b328 JN |
593 | if (IS_GEN4(dev)) { |
594 | mask = BACKLIGHT_DUTY_CYCLE_MASK; | |
595 | } else { | |
a9573556 | 596 | level <<= 1; |
b329b328 JN |
597 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
598 | } | |
7bd688cd | 599 | |
b329b328 | 600 | tmp = I915_READ(BLC_PWM_CTL) & ~mask; |
7bd688cd JN |
601 | I915_WRITE(BLC_PWM_CTL, tmp | level); |
602 | } | |
603 | ||
604 | static void vlv_set_backlight(struct intel_connector *connector, u32 level) | |
605 | { | |
606 | struct drm_device *dev = connector->base.dev; | |
607 | struct drm_i915_private *dev_priv = dev->dev_private; | |
608 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
609 | u32 tmp; | |
610 | ||
23ec0a88 VS |
611 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
612 | return; | |
613 | ||
7bd688cd JN |
614 | tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
615 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); | |
616 | } | |
617 | ||
618 | static void | |
619 | intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) | |
620 | { | |
621 | struct drm_device *dev = connector->base.dev; | |
622 | struct drm_i915_private *dev_priv = dev->dev_private; | |
623 | ||
624 | DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); | |
625 | ||
626 | level = intel_panel_compute_brightness(connector, level); | |
627 | dev_priv->display.set_backlight(connector, level); | |
a9573556 | 628 | } |
47356eb6 | 629 | |
6dda730e JN |
630 | /* set backlight brightness to level in range [0..max], scaling wrt hw min */ |
631 | static void intel_panel_set_backlight(struct intel_connector *connector, | |
632 | u32 user_level, u32 user_max) | |
47356eb6 | 633 | { |
752aa88a | 634 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 635 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 636 | struct intel_panel *panel = &connector->panel; |
752aa88a | 637 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
6dda730e | 638 | u32 hw_level; |
8ba2d185 | 639 | |
dc5a4363 | 640 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
752aa88a JB |
641 | return; |
642 | ||
07f11d49 | 643 | mutex_lock(&dev_priv->backlight_lock); |
d6540632 | 644 | |
f91c15e0 | 645 | WARN_ON(panel->backlight.max == 0); |
d6540632 | 646 | |
6dda730e JN |
647 | hw_level = scale_user_to_hw(connector, user_level, user_max); |
648 | panel->backlight.level = hw_level; | |
649 | ||
650 | if (panel->backlight.enabled) | |
651 | intel_panel_actually_set_backlight(connector, hw_level); | |
652 | ||
07f11d49 | 653 | mutex_unlock(&dev_priv->backlight_lock); |
6dda730e JN |
654 | } |
655 | ||
656 | /* set backlight brightness to level in range [0..max], assuming hw min is | |
657 | * respected. | |
658 | */ | |
659 | void intel_panel_set_backlight_acpi(struct intel_connector *connector, | |
660 | u32 user_level, u32 user_max) | |
661 | { | |
662 | struct drm_device *dev = connector->base.dev; | |
663 | struct drm_i915_private *dev_priv = dev->dev_private; | |
664 | struct intel_panel *panel = &connector->panel; | |
665 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
666 | u32 hw_level; | |
6dda730e JN |
667 | |
668 | if (!panel->backlight.present || pipe == INVALID_PIPE) | |
669 | return; | |
670 | ||
07f11d49 | 671 | mutex_lock(&dev_priv->backlight_lock); |
6dda730e JN |
672 | |
673 | WARN_ON(panel->backlight.max == 0); | |
674 | ||
675 | hw_level = clamp_user_to_hw(connector, user_level, user_max); | |
676 | panel->backlight.level = hw_level; | |
47356eb6 | 677 | |
58c68779 | 678 | if (panel->backlight.device) |
6dda730e JN |
679 | panel->backlight.device->props.brightness = |
680 | scale_hw_to_user(connector, | |
681 | panel->backlight.level, | |
682 | panel->backlight.device->props.max_brightness); | |
b6b3ba5b | 683 | |
58c68779 | 684 | if (panel->backlight.enabled) |
6dda730e | 685 | intel_panel_actually_set_backlight(connector, hw_level); |
f91c15e0 | 686 | |
07f11d49 | 687 | mutex_unlock(&dev_priv->backlight_lock); |
f52c619a TI |
688 | } |
689 | ||
7bd688cd JN |
690 | static void pch_disable_backlight(struct intel_connector *connector) |
691 | { | |
692 | struct drm_device *dev = connector->base.dev; | |
693 | struct drm_i915_private *dev_priv = dev->dev_private; | |
694 | u32 tmp; | |
695 | ||
3bd712e5 JN |
696 | intel_panel_actually_set_backlight(connector, 0); |
697 | ||
7bd688cd JN |
698 | tmp = I915_READ(BLC_PWM_CPU_CTL2); |
699 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
700 | ||
701 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
702 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
703 | } | |
704 | ||
3bd712e5 JN |
705 | static void i9xx_disable_backlight(struct intel_connector *connector) |
706 | { | |
707 | intel_panel_actually_set_backlight(connector, 0); | |
708 | } | |
709 | ||
7bd688cd JN |
710 | static void i965_disable_backlight(struct intel_connector *connector) |
711 | { | |
712 | struct drm_device *dev = connector->base.dev; | |
713 | struct drm_i915_private *dev_priv = dev->dev_private; | |
714 | u32 tmp; | |
715 | ||
3bd712e5 JN |
716 | intel_panel_actually_set_backlight(connector, 0); |
717 | ||
7bd688cd JN |
718 | tmp = I915_READ(BLC_PWM_CTL2); |
719 | I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); | |
720 | } | |
721 | ||
722 | static void vlv_disable_backlight(struct intel_connector *connector) | |
723 | { | |
724 | struct drm_device *dev = connector->base.dev; | |
725 | struct drm_i915_private *dev_priv = dev->dev_private; | |
726 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
727 | u32 tmp; | |
728 | ||
23ec0a88 VS |
729 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
730 | return; | |
731 | ||
3bd712e5 JN |
732 | intel_panel_actually_set_backlight(connector, 0); |
733 | ||
7bd688cd JN |
734 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
735 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); | |
736 | } | |
737 | ||
752aa88a | 738 | void intel_panel_disable_backlight(struct intel_connector *connector) |
f52c619a | 739 | { |
752aa88a | 740 | struct drm_device *dev = connector->base.dev; |
f52c619a | 741 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 742 | struct intel_panel *panel = &connector->panel; |
752aa88a | 743 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 | 744 | |
dc5a4363 | 745 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
752aa88a JB |
746 | return; |
747 | ||
3f577573 JN |
748 | /* |
749 | * Do not disable backlight on the vgaswitcheroo path. When switching | |
750 | * away from i915, the other client may depend on i915 to handle the | |
751 | * backlight. This will leave the backlight on unnecessarily when | |
752 | * another client is not activated. | |
753 | */ | |
754 | if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { | |
755 | DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); | |
756 | return; | |
757 | } | |
758 | ||
07f11d49 | 759 | mutex_lock(&dev_priv->backlight_lock); |
47356eb6 | 760 | |
ab656bb9 JN |
761 | if (panel->backlight.device) |
762 | panel->backlight.device->props.power = FB_BLANK_POWERDOWN; | |
58c68779 | 763 | panel->backlight.enabled = false; |
3bd712e5 | 764 | dev_priv->display.disable_backlight(connector); |
24ded204 | 765 | |
07f11d49 | 766 | mutex_unlock(&dev_priv->backlight_lock); |
7bd688cd | 767 | } |
24ded204 | 768 | |
96ab4c70 DV |
769 | static void bdw_enable_backlight(struct intel_connector *connector) |
770 | { | |
771 | struct drm_device *dev = connector->base.dev; | |
772 | struct drm_i915_private *dev_priv = dev->dev_private; | |
773 | struct intel_panel *panel = &connector->panel; | |
774 | u32 pch_ctl1, pch_ctl2; | |
775 | ||
776 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
777 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
778 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
779 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
780 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
781 | } | |
24ded204 | 782 | |
96ab4c70 DV |
783 | pch_ctl2 = panel->backlight.max << 16; |
784 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
a4f32fc3 | 785 | |
96ab4c70 DV |
786 | pch_ctl1 = 0; |
787 | if (panel->backlight.active_low_pwm) | |
788 | pch_ctl1 |= BLM_PCH_POLARITY; | |
8ba2d185 | 789 | |
e6b2627c JN |
790 | /* After LPT, override is the default. */ |
791 | if (HAS_PCH_LPT(dev_priv)) | |
792 | pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; | |
96ab4c70 DV |
793 | |
794 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
795 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
796 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
797 | ||
798 | /* This won't stick until the above enable. */ | |
799 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
47356eb6 CW |
800 | } |
801 | ||
7bd688cd JN |
802 | static void pch_enable_backlight(struct intel_connector *connector) |
803 | { | |
804 | struct drm_device *dev = connector->base.dev; | |
805 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 806 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
807 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
808 | enum transcoder cpu_transcoder = | |
809 | intel_pipe_to_cpu_transcoder(dev_priv, pipe); | |
b35684b8 | 810 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
7bd688cd | 811 | |
b35684b8 JN |
812 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
813 | if (cpu_ctl2 & BLM_PWM_ENABLE) { | |
813008cd | 814 | DRM_DEBUG_KMS("cpu backlight already enabled\n"); |
b35684b8 JN |
815 | cpu_ctl2 &= ~BLM_PWM_ENABLE; |
816 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
817 | } | |
7bd688cd | 818 | |
b35684b8 JN |
819 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
820 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
821 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
822 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
823 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
824 | } | |
7bd688cd JN |
825 | |
826 | if (cpu_transcoder == TRANSCODER_EDP) | |
b35684b8 | 827 | cpu_ctl2 = BLM_TRANSCODER_EDP; |
7bd688cd | 828 | else |
b35684b8 JN |
829 | cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
830 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
7bd688cd | 831 | POSTING_READ(BLC_PWM_CPU_CTL2); |
b35684b8 | 832 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); |
3bd712e5 | 833 | |
b35684b8 | 834 | /* This won't stick until the above enable. */ |
3bd712e5 | 835 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
b35684b8 JN |
836 | |
837 | pch_ctl2 = panel->backlight.max << 16; | |
838 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
839 | ||
b35684b8 JN |
840 | pch_ctl1 = 0; |
841 | if (panel->backlight.active_low_pwm) | |
842 | pch_ctl1 |= BLM_PCH_POLARITY; | |
96ab4c70 | 843 | |
b35684b8 JN |
844 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); |
845 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
846 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
3bd712e5 JN |
847 | } |
848 | ||
849 | static void i9xx_enable_backlight(struct intel_connector *connector) | |
850 | { | |
b35684b8 JN |
851 | struct drm_device *dev = connector->base.dev; |
852 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 853 | struct intel_panel *panel = &connector->panel; |
b35684b8 JN |
854 | u32 ctl, freq; |
855 | ||
856 | ctl = I915_READ(BLC_PWM_CTL); | |
857 | if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { | |
813008cd | 858 | DRM_DEBUG_KMS("backlight already enabled\n"); |
b35684b8 JN |
859 | I915_WRITE(BLC_PWM_CTL, 0); |
860 | } | |
3bd712e5 | 861 | |
b35684b8 JN |
862 | freq = panel->backlight.max; |
863 | if (panel->backlight.combination_mode) | |
864 | freq /= 0xff; | |
865 | ||
866 | ctl = freq << 17; | |
b6ab66aa | 867 | if (panel->backlight.combination_mode) |
b35684b8 JN |
868 | ctl |= BLM_LEGACY_MODE; |
869 | if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) | |
870 | ctl |= BLM_POLARITY_PNV; | |
871 | ||
872 | I915_WRITE(BLC_PWM_CTL, ctl); | |
873 | POSTING_READ(BLC_PWM_CTL); | |
874 | ||
875 | /* XXX: combine this into above write? */ | |
3bd712e5 | 876 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
7bd688cd | 877 | } |
8ba2d185 | 878 | |
7bd688cd JN |
879 | static void i965_enable_backlight(struct intel_connector *connector) |
880 | { | |
881 | struct drm_device *dev = connector->base.dev; | |
882 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 883 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 884 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 885 | u32 ctl, ctl2, freq; |
7bd688cd | 886 | |
b35684b8 JN |
887 | ctl2 = I915_READ(BLC_PWM_CTL2); |
888 | if (ctl2 & BLM_PWM_ENABLE) { | |
813008cd | 889 | DRM_DEBUG_KMS("backlight already enabled\n"); |
b35684b8 JN |
890 | ctl2 &= ~BLM_PWM_ENABLE; |
891 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
892 | } | |
7bd688cd | 893 | |
b35684b8 JN |
894 | freq = panel->backlight.max; |
895 | if (panel->backlight.combination_mode) | |
896 | freq /= 0xff; | |
7bd688cd | 897 | |
b35684b8 JN |
898 | ctl = freq << 16; |
899 | I915_WRITE(BLC_PWM_CTL, ctl); | |
3bd712e5 | 900 | |
b35684b8 JN |
901 | ctl2 = BLM_PIPE(pipe); |
902 | if (panel->backlight.combination_mode) | |
903 | ctl2 |= BLM_COMBINATION_MODE; | |
904 | if (panel->backlight.active_low_pwm) | |
905 | ctl2 |= BLM_POLARITY_I965; | |
906 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
907 | POSTING_READ(BLC_PWM_CTL2); | |
908 | I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); | |
2e7eeeb5 JN |
909 | |
910 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd JN |
911 | } |
912 | ||
913 | static void vlv_enable_backlight(struct intel_connector *connector) | |
914 | { | |
915 | struct drm_device *dev = connector->base.dev; | |
916 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 917 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 918 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 919 | u32 ctl, ctl2; |
7bd688cd | 920 | |
23ec0a88 VS |
921 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
922 | return; | |
923 | ||
b35684b8 JN |
924 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
925 | if (ctl2 & BLM_PWM_ENABLE) { | |
813008cd | 926 | DRM_DEBUG_KMS("backlight already enabled\n"); |
b35684b8 JN |
927 | ctl2 &= ~BLM_PWM_ENABLE; |
928 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
929 | } | |
7bd688cd | 930 | |
b35684b8 JN |
931 | ctl = panel->backlight.max << 16; |
932 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); | |
7bd688cd | 933 | |
b35684b8 JN |
934 | /* XXX: combine this into above write? */ |
935 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd | 936 | |
b35684b8 JN |
937 | ctl2 = 0; |
938 | if (panel->backlight.active_low_pwm) | |
939 | ctl2 |= BLM_POLARITY_I965; | |
940 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
7bd688cd | 941 | POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); |
b35684b8 | 942 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); |
47356eb6 CW |
943 | } |
944 | ||
752aa88a | 945 | void intel_panel_enable_backlight(struct intel_connector *connector) |
47356eb6 | 946 | { |
752aa88a | 947 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 948 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 949 | struct intel_panel *panel = &connector->panel; |
752aa88a | 950 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 | 951 | |
dc5a4363 | 952 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
752aa88a JB |
953 | return; |
954 | ||
6f2bcceb | 955 | DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); |
540b5d02 | 956 | |
07f11d49 | 957 | mutex_lock(&dev_priv->backlight_lock); |
47356eb6 | 958 | |
f91c15e0 JN |
959 | WARN_ON(panel->backlight.max == 0); |
960 | ||
58c68779 | 961 | if (panel->backlight.level == 0) { |
f91c15e0 | 962 | panel->backlight.level = panel->backlight.max; |
58c68779 JN |
963 | if (panel->backlight.device) |
964 | panel->backlight.device->props.brightness = | |
6dda730e JN |
965 | scale_hw_to_user(connector, |
966 | panel->backlight.level, | |
967 | panel->backlight.device->props.max_brightness); | |
b6b3ba5b | 968 | } |
47356eb6 | 969 | |
3bd712e5 | 970 | dev_priv->display.enable_backlight(connector); |
58c68779 | 971 | panel->backlight.enabled = true; |
ab656bb9 JN |
972 | if (panel->backlight.device) |
973 | panel->backlight.device->props.power = FB_BLANK_UNBLANK; | |
8ba2d185 | 974 | |
07f11d49 | 975 | mutex_unlock(&dev_priv->backlight_lock); |
47356eb6 CW |
976 | } |
977 | ||
912e8b12 | 978 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
db31af1d | 979 | static int intel_backlight_device_update_status(struct backlight_device *bd) |
aaa6fd2a | 980 | { |
752aa88a | 981 | struct intel_connector *connector = bl_get_data(bd); |
ab656bb9 | 982 | struct intel_panel *panel = &connector->panel; |
752aa88a JB |
983 | struct drm_device *dev = connector->base.dev; |
984 | ||
51fd371b | 985 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
540b5d02 CW |
986 | DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
987 | bd->props.brightness, bd->props.max_brightness); | |
752aa88a | 988 | intel_panel_set_backlight(connector, bd->props.brightness, |
d6540632 | 989 | bd->props.max_brightness); |
ab656bb9 JN |
990 | |
991 | /* | |
992 | * Allow flipping bl_power as a sub-state of enabled. Sadly the | |
993 | * backlight class device does not make it easy to to differentiate | |
994 | * between callbacks for brightness and bl_power, so our backlight_power | |
995 | * callback needs to take this into account. | |
996 | */ | |
997 | if (panel->backlight.enabled) { | |
998 | if (panel->backlight_power) { | |
e6755fb7 JN |
999 | bool enable = bd->props.power == FB_BLANK_UNBLANK && |
1000 | bd->props.brightness != 0; | |
ab656bb9 JN |
1001 | panel->backlight_power(connector, enable); |
1002 | } | |
1003 | } else { | |
1004 | bd->props.power = FB_BLANK_POWERDOWN; | |
1005 | } | |
1006 | ||
51fd371b | 1007 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
aaa6fd2a MG |
1008 | return 0; |
1009 | } | |
1010 | ||
db31af1d | 1011 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
aaa6fd2a | 1012 | { |
752aa88a JB |
1013 | struct intel_connector *connector = bl_get_data(bd); |
1014 | struct drm_device *dev = connector->base.dev; | |
c8c8fb33 | 1015 | struct drm_i915_private *dev_priv = dev->dev_private; |
6dda730e | 1016 | u32 hw_level; |
7bd688cd | 1017 | int ret; |
752aa88a | 1018 | |
c8c8fb33 | 1019 | intel_runtime_pm_get(dev_priv); |
51fd371b | 1020 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
6dda730e JN |
1021 | |
1022 | hw_level = intel_panel_get_backlight(connector); | |
1023 | ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); | |
1024 | ||
51fd371b | 1025 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
c8c8fb33 | 1026 | intel_runtime_pm_put(dev_priv); |
752aa88a | 1027 | |
7bd688cd | 1028 | return ret; |
aaa6fd2a MG |
1029 | } |
1030 | ||
db31af1d JN |
1031 | static const struct backlight_ops intel_backlight_device_ops = { |
1032 | .update_status = intel_backlight_device_update_status, | |
1033 | .get_brightness = intel_backlight_device_get_brightness, | |
aaa6fd2a MG |
1034 | }; |
1035 | ||
db31af1d | 1036 | static int intel_backlight_device_register(struct intel_connector *connector) |
aaa6fd2a | 1037 | { |
58c68779 | 1038 | struct intel_panel *panel = &connector->panel; |
aaa6fd2a | 1039 | struct backlight_properties props; |
aaa6fd2a | 1040 | |
58c68779 | 1041 | if (WARN_ON(panel->backlight.device)) |
dc652f90 JN |
1042 | return -ENODEV; |
1043 | ||
0962c3c9 VS |
1044 | if (!panel->backlight.present) |
1045 | return 0; | |
1046 | ||
6dda730e | 1047 | WARN_ON(panel->backlight.max == 0); |
7bd688cd | 1048 | |
af437cfd | 1049 | memset(&props, 0, sizeof(props)); |
aaa6fd2a | 1050 | props.type = BACKLIGHT_RAW; |
6dda730e JN |
1051 | |
1052 | /* | |
1053 | * Note: Everything should work even if the backlight device max | |
1054 | * presented to the userspace is arbitrarily chosen. | |
1055 | */ | |
7bd688cd | 1056 | props.max_brightness = panel->backlight.max; |
6dda730e JN |
1057 | props.brightness = scale_hw_to_user(connector, |
1058 | panel->backlight.level, | |
1059 | props.max_brightness); | |
58c68779 | 1060 | |
ab656bb9 JN |
1061 | if (panel->backlight.enabled) |
1062 | props.power = FB_BLANK_UNBLANK; | |
1063 | else | |
1064 | props.power = FB_BLANK_POWERDOWN; | |
1065 | ||
58c68779 JN |
1066 | /* |
1067 | * Note: using the same name independent of the connector prevents | |
1068 | * registration of multiple backlight devices in the driver. | |
1069 | */ | |
1070 | panel->backlight.device = | |
aaa6fd2a | 1071 | backlight_device_register("intel_backlight", |
db31af1d JN |
1072 | connector->base.kdev, |
1073 | connector, | |
1074 | &intel_backlight_device_ops, &props); | |
aaa6fd2a | 1075 | |
58c68779 | 1076 | if (IS_ERR(panel->backlight.device)) { |
aaa6fd2a | 1077 | DRM_ERROR("Failed to register backlight: %ld\n", |
58c68779 JN |
1078 | PTR_ERR(panel->backlight.device)); |
1079 | panel->backlight.device = NULL; | |
aaa6fd2a MG |
1080 | return -ENODEV; |
1081 | } | |
0962c3c9 VS |
1082 | |
1083 | DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", | |
1084 | connector->base.name); | |
1085 | ||
aaa6fd2a MG |
1086 | return 0; |
1087 | } | |
1088 | ||
db31af1d | 1089 | static void intel_backlight_device_unregister(struct intel_connector *connector) |
aaa6fd2a | 1090 | { |
58c68779 JN |
1091 | struct intel_panel *panel = &connector->panel; |
1092 | ||
1093 | if (panel->backlight.device) { | |
1094 | backlight_device_unregister(panel->backlight.device); | |
1095 | panel->backlight.device = NULL; | |
dc652f90 | 1096 | } |
aaa6fd2a | 1097 | } |
db31af1d JN |
1098 | #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
1099 | static int intel_backlight_device_register(struct intel_connector *connector) | |
1100 | { | |
1101 | return 0; | |
1102 | } | |
1103 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
1104 | { | |
1105 | } | |
1106 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
1107 | ||
f91c15e0 JN |
1108 | /* |
1109 | * Note: The setup hooks can't assume pipe is set! | |
1110 | * | |
1111 | * XXX: Query mode clock or hardware clock and program PWM modulation frequency | |
1112 | * appropriately when it's 0. Use VBT and/or sane defaults. | |
1113 | */ | |
6dda730e JN |
1114 | static u32 get_backlight_min_vbt(struct intel_connector *connector) |
1115 | { | |
1116 | struct drm_device *dev = connector->base.dev; | |
1117 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1118 | struct intel_panel *panel = &connector->panel; | |
1119 | ||
1120 | WARN_ON(panel->backlight.max == 0); | |
1121 | ||
1122 | /* vbt value is a coefficient in range [0..255] */ | |
1123 | return scale(dev_priv->vbt.backlight.min_brightness, 0, 255, | |
1124 | 0, panel->backlight.max); | |
1125 | } | |
1126 | ||
6517d273 | 1127 | static int bdw_setup_backlight(struct intel_connector *connector, enum pipe unused) |
aaa6fd2a | 1128 | { |
96ab4c70 | 1129 | struct drm_device *dev = connector->base.dev; |
aaa6fd2a | 1130 | struct drm_i915_private *dev_priv = dev->dev_private; |
96ab4c70 DV |
1131 | struct intel_panel *panel = &connector->panel; |
1132 | u32 pch_ctl1, pch_ctl2, val; | |
1133 | ||
1134 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
1135 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
1136 | ||
1137 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
1138 | panel->backlight.max = pch_ctl2 >> 16; | |
1139 | if (!panel->backlight.max) | |
1140 | return -ENODEV; | |
1141 | ||
6dda730e JN |
1142 | panel->backlight.min = get_backlight_min_vbt(connector); |
1143 | ||
96ab4c70 DV |
1144 | val = bdw_get_backlight(connector); |
1145 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1146 | ||
1147 | panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) && | |
1148 | panel->backlight.level != 0; | |
1149 | ||
1150 | return 0; | |
1151 | } | |
1152 | ||
6517d273 | 1153 | static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) |
7bd688cd | 1154 | { |
636baebf JN |
1155 | struct drm_device *dev = connector->base.dev; |
1156 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1157 | struct intel_panel *panel = &connector->panel; |
636baebf | 1158 | u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
7bd688cd | 1159 | |
636baebf JN |
1160 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
1161 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
1162 | ||
1163 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
1164 | panel->backlight.max = pch_ctl2 >> 16; | |
7bd688cd JN |
1165 | if (!panel->backlight.max) |
1166 | return -ENODEV; | |
1167 | ||
6dda730e JN |
1168 | panel->backlight.min = get_backlight_min_vbt(connector); |
1169 | ||
7bd688cd JN |
1170 | val = pch_get_backlight(connector); |
1171 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1172 | ||
636baebf JN |
1173 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
1174 | panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && | |
1175 | (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0; | |
1176 | ||
7bd688cd JN |
1177 | return 0; |
1178 | } | |
1179 | ||
6517d273 | 1180 | static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) |
7bd688cd | 1181 | { |
636baebf JN |
1182 | struct drm_device *dev = connector->base.dev; |
1183 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1184 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
1185 | u32 ctl, val; |
1186 | ||
1187 | ctl = I915_READ(BLC_PWM_CTL); | |
1188 | ||
b6ab66aa | 1189 | if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev)) |
636baebf JN |
1190 | panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; |
1191 | ||
1192 | if (IS_PINEVIEW(dev)) | |
1193 | panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; | |
1194 | ||
1195 | panel->backlight.max = ctl >> 17; | |
1196 | if (panel->backlight.combination_mode) | |
1197 | panel->backlight.max *= 0xff; | |
7bd688cd | 1198 | |
7bd688cd JN |
1199 | if (!panel->backlight.max) |
1200 | return -ENODEV; | |
1201 | ||
6dda730e JN |
1202 | panel->backlight.min = get_backlight_min_vbt(connector); |
1203 | ||
7bd688cd JN |
1204 | val = i9xx_get_backlight(connector); |
1205 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1206 | ||
636baebf JN |
1207 | panel->backlight.enabled = panel->backlight.level != 0; |
1208 | ||
7bd688cd JN |
1209 | return 0; |
1210 | } | |
1211 | ||
6517d273 | 1212 | static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) |
7bd688cd | 1213 | { |
636baebf JN |
1214 | struct drm_device *dev = connector->base.dev; |
1215 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1216 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
1217 | u32 ctl, ctl2, val; |
1218 | ||
1219 | ctl2 = I915_READ(BLC_PWM_CTL2); | |
1220 | panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; | |
1221 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
1222 | ||
1223 | ctl = I915_READ(BLC_PWM_CTL); | |
1224 | panel->backlight.max = ctl >> 16; | |
1225 | if (panel->backlight.combination_mode) | |
1226 | panel->backlight.max *= 0xff; | |
7bd688cd | 1227 | |
7bd688cd JN |
1228 | if (!panel->backlight.max) |
1229 | return -ENODEV; | |
1230 | ||
6dda730e JN |
1231 | panel->backlight.min = get_backlight_min_vbt(connector); |
1232 | ||
7bd688cd JN |
1233 | val = i9xx_get_backlight(connector); |
1234 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1235 | ||
636baebf JN |
1236 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
1237 | panel->backlight.level != 0; | |
1238 | ||
7bd688cd JN |
1239 | return 0; |
1240 | } | |
1241 | ||
6517d273 | 1242 | static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
7bd688cd JN |
1243 | { |
1244 | struct drm_device *dev = connector->base.dev; | |
1245 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1246 | struct intel_panel *panel = &connector->panel; | |
6517d273 | 1247 | enum pipe p; |
636baebf | 1248 | u32 ctl, ctl2, val; |
7bd688cd | 1249 | |
6517d273 VS |
1250 | for_each_pipe(dev_priv, p) { |
1251 | u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(p)); | |
7bd688cd JN |
1252 | |
1253 | /* Skip if the modulation freq is already set */ | |
1254 | if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK) | |
1255 | continue; | |
1256 | ||
1257 | cur_val &= BACKLIGHT_DUTY_CYCLE_MASK; | |
6517d273 | 1258 | I915_WRITE(VLV_BLC_PWM_CTL(p), (0xf42 << 16) | |
7bd688cd JN |
1259 | cur_val); |
1260 | } | |
1261 | ||
6517d273 VS |
1262 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
1263 | return -ENODEV; | |
1264 | ||
1265 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
636baebf JN |
1266 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
1267 | ||
6517d273 | 1268 | ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); |
636baebf | 1269 | panel->backlight.max = ctl >> 16; |
7bd688cd JN |
1270 | if (!panel->backlight.max) |
1271 | return -ENODEV; | |
1272 | ||
6dda730e JN |
1273 | panel->backlight.min = get_backlight_min_vbt(connector); |
1274 | ||
6517d273 | 1275 | val = _vlv_get_backlight(dev, pipe); |
7bd688cd JN |
1276 | panel->backlight.level = intel_panel_compute_brightness(connector, val); |
1277 | ||
636baebf JN |
1278 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
1279 | panel->backlight.level != 0; | |
1280 | ||
7bd688cd JN |
1281 | return 0; |
1282 | } | |
1283 | ||
6517d273 | 1284 | int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) |
aaa6fd2a | 1285 | { |
db31af1d | 1286 | struct drm_device *dev = connector->dev; |
7bd688cd | 1287 | struct drm_i915_private *dev_priv = dev->dev_private; |
db31af1d | 1288 | struct intel_connector *intel_connector = to_intel_connector(connector); |
58c68779 | 1289 | struct intel_panel *panel = &intel_connector->panel; |
7bd688cd | 1290 | int ret; |
db31af1d | 1291 | |
c675949e | 1292 | if (!dev_priv->vbt.backlight.present) { |
9c72cc6f SD |
1293 | if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { |
1294 | DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); | |
1295 | } else { | |
1296 | DRM_DEBUG_KMS("no backlight present per VBT\n"); | |
1297 | return 0; | |
1298 | } | |
c675949e JN |
1299 | } |
1300 | ||
7bd688cd | 1301 | /* set level and max in panel struct */ |
07f11d49 | 1302 | mutex_lock(&dev_priv->backlight_lock); |
6517d273 | 1303 | ret = dev_priv->display.setup_backlight(intel_connector, pipe); |
07f11d49 | 1304 | mutex_unlock(&dev_priv->backlight_lock); |
7bd688cd JN |
1305 | |
1306 | if (ret) { | |
1307 | DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", | |
c23cc417 | 1308 | connector->name); |
7bd688cd JN |
1309 | return ret; |
1310 | } | |
db31af1d | 1311 | |
c91c9f32 JN |
1312 | panel->backlight.present = true; |
1313 | ||
0962c3c9 VS |
1314 | DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", |
1315 | connector->name, | |
c445b3b1 | 1316 | panel->backlight.enabled ? "enabled" : "disabled", |
0962c3c9 | 1317 | panel->backlight.level, panel->backlight.max); |
c445b3b1 | 1318 | |
aaa6fd2a MG |
1319 | return 0; |
1320 | } | |
1321 | ||
db31af1d | 1322 | void intel_panel_destroy_backlight(struct drm_connector *connector) |
aaa6fd2a | 1323 | { |
db31af1d | 1324 | struct intel_connector *intel_connector = to_intel_connector(connector); |
c91c9f32 | 1325 | struct intel_panel *panel = &intel_connector->panel; |
db31af1d | 1326 | |
c91c9f32 | 1327 | panel->backlight.present = false; |
aaa6fd2a | 1328 | } |
1d508706 | 1329 | |
7bd688cd JN |
1330 | /* Set up chip specific backlight functions */ |
1331 | void intel_panel_init_backlight_funcs(struct drm_device *dev) | |
1332 | { | |
1333 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1334 | ||
7879a7eb | 1335 | if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9)) { |
96ab4c70 DV |
1336 | dev_priv->display.setup_backlight = bdw_setup_backlight; |
1337 | dev_priv->display.enable_backlight = bdw_enable_backlight; | |
1338 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1339 | dev_priv->display.set_backlight = bdw_set_backlight; | |
1340 | dev_priv->display.get_backlight = bdw_get_backlight; | |
1341 | } else if (HAS_PCH_SPLIT(dev)) { | |
7bd688cd JN |
1342 | dev_priv->display.setup_backlight = pch_setup_backlight; |
1343 | dev_priv->display.enable_backlight = pch_enable_backlight; | |
1344 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1345 | dev_priv->display.set_backlight = pch_set_backlight; | |
1346 | dev_priv->display.get_backlight = pch_get_backlight; | |
7bd688cd JN |
1347 | } else if (IS_VALLEYVIEW(dev)) { |
1348 | dev_priv->display.setup_backlight = vlv_setup_backlight; | |
1349 | dev_priv->display.enable_backlight = vlv_enable_backlight; | |
1350 | dev_priv->display.disable_backlight = vlv_disable_backlight; | |
1351 | dev_priv->display.set_backlight = vlv_set_backlight; | |
1352 | dev_priv->display.get_backlight = vlv_get_backlight; | |
7bd688cd JN |
1353 | } else if (IS_GEN4(dev)) { |
1354 | dev_priv->display.setup_backlight = i965_setup_backlight; | |
1355 | dev_priv->display.enable_backlight = i965_enable_backlight; | |
1356 | dev_priv->display.disable_backlight = i965_disable_backlight; | |
1357 | dev_priv->display.set_backlight = i9xx_set_backlight; | |
1358 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1359 | } else { |
1360 | dev_priv->display.setup_backlight = i9xx_setup_backlight; | |
3bd712e5 JN |
1361 | dev_priv->display.enable_backlight = i9xx_enable_backlight; |
1362 | dev_priv->display.disable_backlight = i9xx_disable_backlight; | |
7bd688cd JN |
1363 | dev_priv->display.set_backlight = i9xx_set_backlight; |
1364 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1365 | } |
1366 | } | |
1367 | ||
dd06f90e | 1368 | int intel_panel_init(struct intel_panel *panel, |
4b6ed685 VK |
1369 | struct drm_display_mode *fixed_mode, |
1370 | struct drm_display_mode *downclock_mode) | |
1d508706 | 1371 | { |
dd06f90e | 1372 | panel->fixed_mode = fixed_mode; |
4b6ed685 | 1373 | panel->downclock_mode = downclock_mode; |
dd06f90e | 1374 | |
1d508706 JN |
1375 | return 0; |
1376 | } | |
1377 | ||
1378 | void intel_panel_fini(struct intel_panel *panel) | |
1379 | { | |
dd06f90e JN |
1380 | struct intel_connector *intel_connector = |
1381 | container_of(panel, struct intel_connector, panel); | |
1382 | ||
1383 | if (panel->fixed_mode) | |
1384 | drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); | |
ec9ed197 VK |
1385 | |
1386 | if (panel->downclock_mode) | |
1387 | drm_mode_destroy(intel_connector->base.dev, | |
1388 | panel->downclock_mode); | |
1d508706 | 1389 | } |
0962c3c9 VS |
1390 | |
1391 | void intel_backlight_register(struct drm_device *dev) | |
1392 | { | |
1393 | struct intel_connector *connector; | |
1394 | ||
1395 | list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) | |
1396 | intel_backlight_device_register(connector); | |
1397 | } | |
1398 | ||
1399 | void intel_backlight_unregister(struct drm_device *dev) | |
1400 | { | |
1401 | struct intel_connector *connector; | |
1402 | ||
1403 | list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) | |
1404 | intel_backlight_device_unregister(connector); | |
1405 | } |