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1d8e1c75 CW |
1 | /* |
2 | * Copyright © 2006-2010 Intel Corporation | |
3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Dave Airlie <airlied@linux.ie> | |
27 | * Jesse Barnes <jesse.barnes@intel.com> | |
28 | * Chris Wilson <chris@chris-wilson.co.uk> | |
29 | */ | |
30 | ||
a70491cc JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
7bd90909 | 33 | #include <linux/moduleparam.h> |
1d8e1c75 CW |
34 | #include "intel_drv.h" |
35 | ||
36 | void | |
4c6df4b4 | 37 | intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
1d8e1c75 CW |
38 | struct drm_display_mode *adjusted_mode) |
39 | { | |
4c6df4b4 | 40 | drm_mode_copy(adjusted_mode, fixed_mode); |
a52690e4 ID |
41 | |
42 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
1d8e1c75 CW |
43 | } |
44 | ||
45 | /* adjusted_mode has been preset to be the panel's fixed mode */ | |
46 | void | |
b074cec8 JB |
47 | intel_pch_panel_fitting(struct intel_crtc *intel_crtc, |
48 | struct intel_crtc_config *pipe_config, | |
49 | int fitting_mode) | |
1d8e1c75 | 50 | { |
37327abd | 51 | struct drm_display_mode *adjusted_mode; |
1d8e1c75 CW |
52 | int x, y, width, height; |
53 | ||
b074cec8 JB |
54 | adjusted_mode = &pipe_config->adjusted_mode; |
55 | ||
1d8e1c75 CW |
56 | x = y = width = height = 0; |
57 | ||
58 | /* Native modes don't need fitting */ | |
37327abd VS |
59 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
60 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
1d8e1c75 CW |
61 | goto done; |
62 | ||
63 | switch (fitting_mode) { | |
64 | case DRM_MODE_SCALE_CENTER: | |
37327abd VS |
65 | width = pipe_config->pipe_src_w; |
66 | height = pipe_config->pipe_src_h; | |
1d8e1c75 CW |
67 | x = (adjusted_mode->hdisplay - width + 1)/2; |
68 | y = (adjusted_mode->vdisplay - height + 1)/2; | |
69 | break; | |
70 | ||
71 | case DRM_MODE_SCALE_ASPECT: | |
72 | /* Scale but preserve the aspect ratio */ | |
73 | { | |
9084e7d2 DV |
74 | u32 scaled_width = adjusted_mode->hdisplay |
75 | * pipe_config->pipe_src_h; | |
76 | u32 scaled_height = pipe_config->pipe_src_w | |
77 | * adjusted_mode->vdisplay; | |
1d8e1c75 | 78 | if (scaled_width > scaled_height) { /* pillar */ |
37327abd | 79 | width = scaled_height / pipe_config->pipe_src_h; |
302983e9 | 80 | if (width & 1) |
0206e353 | 81 | width++; |
1d8e1c75 CW |
82 | x = (adjusted_mode->hdisplay - width + 1) / 2; |
83 | y = 0; | |
84 | height = adjusted_mode->vdisplay; | |
85 | } else if (scaled_width < scaled_height) { /* letter */ | |
37327abd | 86 | height = scaled_width / pipe_config->pipe_src_w; |
302983e9 AJ |
87 | if (height & 1) |
88 | height++; | |
1d8e1c75 CW |
89 | y = (adjusted_mode->vdisplay - height + 1) / 2; |
90 | x = 0; | |
91 | width = adjusted_mode->hdisplay; | |
92 | } else { | |
93 | x = y = 0; | |
94 | width = adjusted_mode->hdisplay; | |
95 | height = adjusted_mode->vdisplay; | |
96 | } | |
97 | } | |
98 | break; | |
99 | ||
1d8e1c75 CW |
100 | case DRM_MODE_SCALE_FULLSCREEN: |
101 | x = y = 0; | |
102 | width = adjusted_mode->hdisplay; | |
103 | height = adjusted_mode->vdisplay; | |
104 | break; | |
ab3e67f4 JB |
105 | |
106 | default: | |
107 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
108 | return; | |
1d8e1c75 CW |
109 | } |
110 | ||
111 | done: | |
b074cec8 JB |
112 | pipe_config->pch_pfit.pos = (x << 16) | y; |
113 | pipe_config->pch_pfit.size = (width << 16) | height; | |
fd4daa9c | 114 | pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; |
1d8e1c75 | 115 | } |
a9573556 | 116 | |
2dd24552 JB |
117 | static void |
118 | centre_horizontally(struct drm_display_mode *mode, | |
119 | int width) | |
120 | { | |
121 | u32 border, sync_pos, blank_width, sync_width; | |
122 | ||
123 | /* keep the hsync and hblank widths constant */ | |
124 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; | |
125 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; | |
126 | sync_pos = (blank_width - sync_width + 1) / 2; | |
127 | ||
128 | border = (mode->hdisplay - width + 1) / 2; | |
129 | border += border & 1; /* make the border even */ | |
130 | ||
131 | mode->crtc_hdisplay = width; | |
132 | mode->crtc_hblank_start = width + border; | |
133 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; | |
134 | ||
135 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; | |
136 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; | |
137 | } | |
138 | ||
139 | static void | |
140 | centre_vertically(struct drm_display_mode *mode, | |
141 | int height) | |
142 | { | |
143 | u32 border, sync_pos, blank_width, sync_width; | |
144 | ||
145 | /* keep the vsync and vblank widths constant */ | |
146 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; | |
147 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; | |
148 | sync_pos = (blank_width - sync_width + 1) / 2; | |
149 | ||
150 | border = (mode->vdisplay - height + 1) / 2; | |
151 | ||
152 | mode->crtc_vdisplay = height; | |
153 | mode->crtc_vblank_start = height + border; | |
154 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; | |
155 | ||
156 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; | |
157 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; | |
158 | } | |
159 | ||
160 | static inline u32 panel_fitter_scaling(u32 source, u32 target) | |
161 | { | |
162 | /* | |
163 | * Floating point operation is not supported. So the FACTOR | |
164 | * is defined, which can avoid the floating point computation | |
165 | * when calculating the panel ratio. | |
166 | */ | |
167 | #define ACCURACY 12 | |
168 | #define FACTOR (1 << ACCURACY) | |
169 | u32 ratio = source * FACTOR / target; | |
170 | return (FACTOR * ratio + FACTOR/2) / FACTOR; | |
171 | } | |
172 | ||
9084e7d2 DV |
173 | static void i965_scale_aspect(struct intel_crtc_config *pipe_config, |
174 | u32 *pfit_control) | |
175 | { | |
176 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
177 | u32 scaled_width = adjusted_mode->hdisplay * | |
178 | pipe_config->pipe_src_h; | |
179 | u32 scaled_height = pipe_config->pipe_src_w * | |
180 | adjusted_mode->vdisplay; | |
181 | ||
182 | /* 965+ is easy, it does everything in hw */ | |
183 | if (scaled_width > scaled_height) | |
184 | *pfit_control |= PFIT_ENABLE | | |
185 | PFIT_SCALING_PILLAR; | |
186 | else if (scaled_width < scaled_height) | |
187 | *pfit_control |= PFIT_ENABLE | | |
188 | PFIT_SCALING_LETTER; | |
189 | else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w) | |
190 | *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; | |
191 | } | |
192 | ||
193 | static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config, | |
194 | u32 *pfit_control, u32 *pfit_pgm_ratios, | |
195 | u32 *border) | |
196 | { | |
197 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
198 | u32 scaled_width = adjusted_mode->hdisplay * | |
199 | pipe_config->pipe_src_h; | |
200 | u32 scaled_height = pipe_config->pipe_src_w * | |
201 | adjusted_mode->vdisplay; | |
202 | u32 bits; | |
203 | ||
204 | /* | |
205 | * For earlier chips we have to calculate the scaling | |
206 | * ratio by hand and program it into the | |
207 | * PFIT_PGM_RATIO register | |
208 | */ | |
209 | if (scaled_width > scaled_height) { /* pillar */ | |
210 | centre_horizontally(adjusted_mode, | |
211 | scaled_height / | |
212 | pipe_config->pipe_src_h); | |
213 | ||
214 | *border = LVDS_BORDER_ENABLE; | |
215 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) { | |
216 | bits = panel_fitter_scaling(pipe_config->pipe_src_h, | |
217 | adjusted_mode->vdisplay); | |
218 | ||
219 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
220 | bits << PFIT_VERT_SCALE_SHIFT); | |
221 | *pfit_control |= (PFIT_ENABLE | | |
222 | VERT_INTERP_BILINEAR | | |
223 | HORIZ_INTERP_BILINEAR); | |
224 | } | |
225 | } else if (scaled_width < scaled_height) { /* letter */ | |
226 | centre_vertically(adjusted_mode, | |
227 | scaled_width / | |
228 | pipe_config->pipe_src_w); | |
229 | ||
230 | *border = LVDS_BORDER_ENABLE; | |
231 | if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
232 | bits = panel_fitter_scaling(pipe_config->pipe_src_w, | |
233 | adjusted_mode->hdisplay); | |
234 | ||
235 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
236 | bits << PFIT_VERT_SCALE_SHIFT); | |
237 | *pfit_control |= (PFIT_ENABLE | | |
238 | VERT_INTERP_BILINEAR | | |
239 | HORIZ_INTERP_BILINEAR); | |
240 | } | |
241 | } else { | |
242 | /* Aspects match, Let hw scale both directions */ | |
243 | *pfit_control |= (PFIT_ENABLE | | |
244 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | |
245 | VERT_INTERP_BILINEAR | | |
246 | HORIZ_INTERP_BILINEAR); | |
247 | } | |
248 | } | |
249 | ||
2dd24552 JB |
250 | void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, |
251 | struct intel_crtc_config *pipe_config, | |
252 | int fitting_mode) | |
253 | { | |
254 | struct drm_device *dev = intel_crtc->base.dev; | |
2dd24552 | 255 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
37327abd | 256 | struct drm_display_mode *adjusted_mode; |
2dd24552 | 257 | |
2dd24552 JB |
258 | adjusted_mode = &pipe_config->adjusted_mode; |
259 | ||
260 | /* Native modes don't need fitting */ | |
37327abd VS |
261 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
262 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
2dd24552 JB |
263 | goto out; |
264 | ||
265 | switch (fitting_mode) { | |
266 | case DRM_MODE_SCALE_CENTER: | |
267 | /* | |
268 | * For centered modes, we have to calculate border widths & | |
269 | * heights and modify the values programmed into the CRTC. | |
270 | */ | |
37327abd VS |
271 | centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); |
272 | centre_vertically(adjusted_mode, pipe_config->pipe_src_h); | |
2dd24552 JB |
273 | border = LVDS_BORDER_ENABLE; |
274 | break; | |
275 | case DRM_MODE_SCALE_ASPECT: | |
276 | /* Scale but preserve the aspect ratio */ | |
9084e7d2 DV |
277 | if (INTEL_INFO(dev)->gen >= 4) |
278 | i965_scale_aspect(pipe_config, &pfit_control); | |
279 | else | |
280 | i9xx_scale_aspect(pipe_config, &pfit_control, | |
281 | &pfit_pgm_ratios, &border); | |
2dd24552 | 282 | break; |
2dd24552 JB |
283 | case DRM_MODE_SCALE_FULLSCREEN: |
284 | /* | |
285 | * Full scaling, even if it changes the aspect ratio. | |
286 | * Fortunately this is all done for us in hw. | |
287 | */ | |
37327abd VS |
288 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay || |
289 | pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
2dd24552 JB |
290 | pfit_control |= PFIT_ENABLE; |
291 | if (INTEL_INFO(dev)->gen >= 4) | |
292 | pfit_control |= PFIT_SCALING_AUTO; | |
293 | else | |
294 | pfit_control |= (VERT_AUTO_SCALE | | |
295 | VERT_INTERP_BILINEAR | | |
296 | HORIZ_AUTO_SCALE | | |
297 | HORIZ_INTERP_BILINEAR); | |
298 | } | |
299 | break; | |
ab3e67f4 JB |
300 | default: |
301 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
302 | return; | |
2dd24552 JB |
303 | } |
304 | ||
305 | /* 965+ wants fuzzy fitting */ | |
306 | /* FIXME: handle multiple panels by failing gracefully */ | |
307 | if (INTEL_INFO(dev)->gen >= 4) | |
308 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | |
309 | PFIT_FILTER_FUZZY); | |
310 | ||
311 | out: | |
312 | if ((pfit_control & PFIT_ENABLE) == 0) { | |
313 | pfit_control = 0; | |
314 | pfit_pgm_ratios = 0; | |
315 | } | |
316 | ||
317 | /* Make sure pre-965 set dither correctly for 18bpp panels. */ | |
318 | if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) | |
319 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
320 | ||
2deefda5 DV |
321 | pipe_config->gmch_pfit.control = pfit_control; |
322 | pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; | |
68fc8742 | 323 | pipe_config->gmch_pfit.lvds_border_bits = border; |
2dd24552 JB |
324 | } |
325 | ||
4dca20ef CE |
326 | static int i915_panel_invert_brightness; |
327 | MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness " | |
328 | "(-1 force normal, 0 machine defaults, 1 force inversion), please " | |
7bd90909 CE |
329 | "report PCI device ID, subsystem vendor and subsystem device ID " |
330 | "to dri-devel@lists.freedesktop.org, if your machine needs it. " | |
331 | "It will then be included in an upcoming module version."); | |
4dca20ef | 332 | module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600); |
7bd688cd JN |
333 | static u32 intel_panel_compute_brightness(struct intel_connector *connector, |
334 | u32 val) | |
7bd90909 | 335 | { |
7bd688cd | 336 | struct drm_device *dev = connector->base.dev; |
4dca20ef | 337 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 JN |
338 | struct intel_panel *panel = &connector->panel; |
339 | ||
340 | WARN_ON(panel->backlight.max == 0); | |
4dca20ef CE |
341 | |
342 | if (i915_panel_invert_brightness < 0) | |
343 | return val; | |
344 | ||
345 | if (i915_panel_invert_brightness > 0 || | |
d6540632 | 346 | dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
f91c15e0 | 347 | return panel->backlight.max - val; |
d6540632 | 348 | } |
7bd90909 CE |
349 | |
350 | return val; | |
351 | } | |
352 | ||
96ab4c70 | 353 | static u32 bdw_get_backlight(struct intel_connector *connector) |
0b0b053a | 354 | { |
96ab4c70 | 355 | struct drm_device *dev = connector->base.dev; |
bfd7590d | 356 | struct drm_i915_private *dev_priv = dev->dev_private; |
0b0b053a | 357 | |
96ab4c70 DV |
358 | return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; |
359 | } | |
07bf139b | 360 | |
7bd688cd | 361 | static u32 pch_get_backlight(struct intel_connector *connector) |
a9573556 | 362 | { |
7bd688cd | 363 | struct drm_device *dev = connector->base.dev; |
a9573556 | 364 | struct drm_i915_private *dev_priv = dev->dev_private; |
8ba2d185 | 365 | |
7bd688cd JN |
366 | return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
367 | } | |
a9573556 | 368 | |
7bd688cd JN |
369 | static u32 i9xx_get_backlight(struct intel_connector *connector) |
370 | { | |
371 | struct drm_device *dev = connector->base.dev; | |
372 | struct drm_i915_private *dev_priv = dev->dev_private; | |
636baebf | 373 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 374 | u32 val; |
07bf139b | 375 | |
7bd688cd JN |
376 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
377 | if (INTEL_INFO(dev)->gen < 4) | |
378 | val >>= 1; | |
ba3820ad | 379 | |
636baebf | 380 | if (panel->backlight.combination_mode) { |
7bd688cd | 381 | u8 lbpc; |
ba3820ad | 382 | |
7bd688cd JN |
383 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); |
384 | val *= lbpc; | |
a9573556 CW |
385 | } |
386 | ||
7bd688cd JN |
387 | return val; |
388 | } | |
389 | ||
390 | static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) | |
391 | { | |
392 | struct drm_i915_private *dev_priv = dev->dev_private; | |
393 | ||
394 | return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; | |
395 | } | |
396 | ||
397 | static u32 vlv_get_backlight(struct intel_connector *connector) | |
398 | { | |
399 | struct drm_device *dev = connector->base.dev; | |
400 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
401 | ||
402 | return _vlv_get_backlight(dev, pipe); | |
403 | } | |
404 | ||
405 | static u32 intel_panel_get_backlight(struct intel_connector *connector) | |
406 | { | |
407 | struct drm_device *dev = connector->base.dev; | |
408 | struct drm_i915_private *dev_priv = dev->dev_private; | |
409 | u32 val; | |
410 | unsigned long flags; | |
411 | ||
412 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); | |
413 | ||
414 | val = dev_priv->display.get_backlight(connector); | |
415 | val = intel_panel_compute_brightness(connector, val); | |
8ba2d185 | 416 | |
58c68779 | 417 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
8ba2d185 | 418 | |
a9573556 CW |
419 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
420 | return val; | |
421 | } | |
422 | ||
96ab4c70 | 423 | static void bdw_set_backlight(struct intel_connector *connector, u32 level) |
f8e10062 | 424 | { |
96ab4c70 | 425 | struct drm_device *dev = connector->base.dev; |
f8e10062 BW |
426 | struct drm_i915_private *dev_priv = dev->dev_private; |
427 | u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
428 | I915_WRITE(BLC_PWM_PCH_CTL2, val | level); | |
429 | } | |
430 | ||
7bd688cd | 431 | static void pch_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 432 | { |
7bd688cd | 433 | struct drm_device *dev = connector->base.dev; |
a9573556 | 434 | struct drm_i915_private *dev_priv = dev->dev_private; |
7bd688cd JN |
435 | u32 tmp; |
436 | ||
437 | tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
438 | I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); | |
a9573556 CW |
439 | } |
440 | ||
7bd688cd | 441 | static void i9xx_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 442 | { |
7bd688cd | 443 | struct drm_device *dev = connector->base.dev; |
a9573556 | 444 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 | 445 | struct intel_panel *panel = &connector->panel; |
b329b328 | 446 | u32 tmp, mask; |
ba3820ad | 447 | |
f91c15e0 JN |
448 | WARN_ON(panel->backlight.max == 0); |
449 | ||
636baebf | 450 | if (panel->backlight.combination_mode) { |
ba3820ad TI |
451 | u8 lbpc; |
452 | ||
f91c15e0 | 453 | lbpc = level * 0xfe / panel->backlight.max + 1; |
ba3820ad TI |
454 | level /= lbpc; |
455 | pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); | |
456 | } | |
457 | ||
b329b328 JN |
458 | if (IS_GEN4(dev)) { |
459 | mask = BACKLIGHT_DUTY_CYCLE_MASK; | |
460 | } else { | |
a9573556 | 461 | level <<= 1; |
b329b328 JN |
462 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
463 | } | |
7bd688cd | 464 | |
b329b328 | 465 | tmp = I915_READ(BLC_PWM_CTL) & ~mask; |
7bd688cd JN |
466 | I915_WRITE(BLC_PWM_CTL, tmp | level); |
467 | } | |
468 | ||
469 | static void vlv_set_backlight(struct intel_connector *connector, u32 level) | |
470 | { | |
471 | struct drm_device *dev = connector->base.dev; | |
472 | struct drm_i915_private *dev_priv = dev->dev_private; | |
473 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
474 | u32 tmp; | |
475 | ||
476 | tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
477 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); | |
478 | } | |
479 | ||
480 | static void | |
481 | intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) | |
482 | { | |
483 | struct drm_device *dev = connector->base.dev; | |
484 | struct drm_i915_private *dev_priv = dev->dev_private; | |
485 | ||
486 | DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); | |
487 | ||
488 | level = intel_panel_compute_brightness(connector, level); | |
489 | dev_priv->display.set_backlight(connector, level); | |
a9573556 | 490 | } |
47356eb6 | 491 | |
d6540632 | 492 | /* set backlight brightness to level in range [0..max] */ |
752aa88a JB |
493 | void intel_panel_set_backlight(struct intel_connector *connector, u32 level, |
494 | u32 max) | |
47356eb6 | 495 | { |
752aa88a | 496 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 497 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 498 | struct intel_panel *panel = &connector->panel; |
752aa88a | 499 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
d6540632 | 500 | u32 freq; |
8ba2d185 JN |
501 | unsigned long flags; |
502 | ||
dc5a4363 | 503 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
752aa88a JB |
504 | return; |
505 | ||
58c68779 | 506 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
d6540632 | 507 | |
f91c15e0 | 508 | WARN_ON(panel->backlight.max == 0); |
d6540632 | 509 | |
f91c15e0 JN |
510 | /* scale to hardware max, but be careful to not overflow */ |
511 | freq = panel->backlight.max; | |
22505b82 AL |
512 | if (freq < max) |
513 | level = level * freq / max; | |
514 | else | |
515 | level = freq / max * level; | |
47356eb6 | 516 | |
58c68779 JN |
517 | panel->backlight.level = level; |
518 | if (panel->backlight.device) | |
519 | panel->backlight.device->props.brightness = level; | |
b6b3ba5b | 520 | |
58c68779 | 521 | if (panel->backlight.enabled) |
7bd688cd | 522 | intel_panel_actually_set_backlight(connector, level); |
f91c15e0 | 523 | |
58c68779 | 524 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
f52c619a TI |
525 | } |
526 | ||
7bd688cd JN |
527 | static void pch_disable_backlight(struct intel_connector *connector) |
528 | { | |
529 | struct drm_device *dev = connector->base.dev; | |
530 | struct drm_i915_private *dev_priv = dev->dev_private; | |
531 | u32 tmp; | |
532 | ||
3bd712e5 JN |
533 | intel_panel_actually_set_backlight(connector, 0); |
534 | ||
7bd688cd JN |
535 | tmp = I915_READ(BLC_PWM_CPU_CTL2); |
536 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
537 | ||
538 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
539 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
540 | } | |
541 | ||
3bd712e5 JN |
542 | static void i9xx_disable_backlight(struct intel_connector *connector) |
543 | { | |
544 | intel_panel_actually_set_backlight(connector, 0); | |
545 | } | |
546 | ||
7bd688cd JN |
547 | static void i965_disable_backlight(struct intel_connector *connector) |
548 | { | |
549 | struct drm_device *dev = connector->base.dev; | |
550 | struct drm_i915_private *dev_priv = dev->dev_private; | |
551 | u32 tmp; | |
552 | ||
3bd712e5 JN |
553 | intel_panel_actually_set_backlight(connector, 0); |
554 | ||
7bd688cd JN |
555 | tmp = I915_READ(BLC_PWM_CTL2); |
556 | I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); | |
557 | } | |
558 | ||
559 | static void vlv_disable_backlight(struct intel_connector *connector) | |
560 | { | |
561 | struct drm_device *dev = connector->base.dev; | |
562 | struct drm_i915_private *dev_priv = dev->dev_private; | |
563 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
564 | u32 tmp; | |
565 | ||
3bd712e5 JN |
566 | intel_panel_actually_set_backlight(connector, 0); |
567 | ||
7bd688cd JN |
568 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
569 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); | |
570 | } | |
571 | ||
752aa88a | 572 | void intel_panel_disable_backlight(struct intel_connector *connector) |
f52c619a | 573 | { |
752aa88a | 574 | struct drm_device *dev = connector->base.dev; |
f52c619a | 575 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 576 | struct intel_panel *panel = &connector->panel; |
752aa88a | 577 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 JN |
578 | unsigned long flags; |
579 | ||
dc5a4363 | 580 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
752aa88a JB |
581 | return; |
582 | ||
3f577573 JN |
583 | /* |
584 | * Do not disable backlight on the vgaswitcheroo path. When switching | |
585 | * away from i915, the other client may depend on i915 to handle the | |
586 | * backlight. This will leave the backlight on unnecessarily when | |
587 | * another client is not activated. | |
588 | */ | |
589 | if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { | |
590 | DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); | |
591 | return; | |
592 | } | |
593 | ||
58c68779 | 594 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
47356eb6 | 595 | |
58c68779 | 596 | panel->backlight.enabled = false; |
3bd712e5 | 597 | dev_priv->display.disable_backlight(connector); |
24ded204 | 598 | |
7bd688cd JN |
599 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
600 | } | |
24ded204 | 601 | |
96ab4c70 DV |
602 | static void bdw_enable_backlight(struct intel_connector *connector) |
603 | { | |
604 | struct drm_device *dev = connector->base.dev; | |
605 | struct drm_i915_private *dev_priv = dev->dev_private; | |
606 | struct intel_panel *panel = &connector->panel; | |
607 | u32 pch_ctl1, pch_ctl2; | |
608 | ||
609 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
610 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
611 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
612 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
613 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
614 | } | |
24ded204 | 615 | |
96ab4c70 DV |
616 | pch_ctl2 = panel->backlight.max << 16; |
617 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
a4f32fc3 | 618 | |
96ab4c70 DV |
619 | pch_ctl1 = 0; |
620 | if (panel->backlight.active_low_pwm) | |
621 | pch_ctl1 |= BLM_PCH_POLARITY; | |
8ba2d185 | 622 | |
96ab4c70 DV |
623 | /* BDW always uses the pch pwm controls. */ |
624 | pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; | |
625 | ||
626 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
627 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
628 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
629 | ||
630 | /* This won't stick until the above enable. */ | |
631 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
47356eb6 CW |
632 | } |
633 | ||
7bd688cd JN |
634 | static void pch_enable_backlight(struct intel_connector *connector) |
635 | { | |
636 | struct drm_device *dev = connector->base.dev; | |
637 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 638 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
639 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
640 | enum transcoder cpu_transcoder = | |
641 | intel_pipe_to_cpu_transcoder(dev_priv, pipe); | |
b35684b8 | 642 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
7bd688cd | 643 | |
b35684b8 JN |
644 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
645 | if (cpu_ctl2 & BLM_PWM_ENABLE) { | |
646 | WARN(1, "cpu backlight already enabled\n"); | |
647 | cpu_ctl2 &= ~BLM_PWM_ENABLE; | |
648 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
649 | } | |
7bd688cd | 650 | |
b35684b8 JN |
651 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
652 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
653 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
654 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
655 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
656 | } | |
7bd688cd JN |
657 | |
658 | if (cpu_transcoder == TRANSCODER_EDP) | |
b35684b8 | 659 | cpu_ctl2 = BLM_TRANSCODER_EDP; |
7bd688cd | 660 | else |
b35684b8 JN |
661 | cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
662 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
7bd688cd | 663 | POSTING_READ(BLC_PWM_CPU_CTL2); |
b35684b8 | 664 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); |
3bd712e5 | 665 | |
b35684b8 | 666 | /* This won't stick until the above enable. */ |
3bd712e5 | 667 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
b35684b8 JN |
668 | |
669 | pch_ctl2 = panel->backlight.max << 16; | |
670 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
671 | ||
b35684b8 JN |
672 | pch_ctl1 = 0; |
673 | if (panel->backlight.active_low_pwm) | |
674 | pch_ctl1 |= BLM_PCH_POLARITY; | |
96ab4c70 | 675 | |
b35684b8 JN |
676 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); |
677 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
678 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
3bd712e5 JN |
679 | } |
680 | ||
681 | static void i9xx_enable_backlight(struct intel_connector *connector) | |
682 | { | |
b35684b8 JN |
683 | struct drm_device *dev = connector->base.dev; |
684 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 685 | struct intel_panel *panel = &connector->panel; |
b35684b8 JN |
686 | u32 ctl, freq; |
687 | ||
688 | ctl = I915_READ(BLC_PWM_CTL); | |
689 | if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { | |
690 | WARN(1, "backlight already enabled\n"); | |
691 | I915_WRITE(BLC_PWM_CTL, 0); | |
692 | } | |
3bd712e5 | 693 | |
b35684b8 JN |
694 | freq = panel->backlight.max; |
695 | if (panel->backlight.combination_mode) | |
696 | freq /= 0xff; | |
697 | ||
698 | ctl = freq << 17; | |
699 | if (IS_GEN2(dev) && panel->backlight.combination_mode) | |
700 | ctl |= BLM_LEGACY_MODE; | |
701 | if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) | |
702 | ctl |= BLM_POLARITY_PNV; | |
703 | ||
704 | I915_WRITE(BLC_PWM_CTL, ctl); | |
705 | POSTING_READ(BLC_PWM_CTL); | |
706 | ||
707 | /* XXX: combine this into above write? */ | |
3bd712e5 | 708 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
7bd688cd | 709 | } |
8ba2d185 | 710 | |
7bd688cd JN |
711 | static void i965_enable_backlight(struct intel_connector *connector) |
712 | { | |
713 | struct drm_device *dev = connector->base.dev; | |
714 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 715 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 716 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 717 | u32 ctl, ctl2, freq; |
7bd688cd | 718 | |
b35684b8 JN |
719 | ctl2 = I915_READ(BLC_PWM_CTL2); |
720 | if (ctl2 & BLM_PWM_ENABLE) { | |
721 | WARN(1, "backlight already enabled\n"); | |
722 | ctl2 &= ~BLM_PWM_ENABLE; | |
723 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
724 | } | |
7bd688cd | 725 | |
b35684b8 JN |
726 | freq = panel->backlight.max; |
727 | if (panel->backlight.combination_mode) | |
728 | freq /= 0xff; | |
7bd688cd | 729 | |
b35684b8 JN |
730 | ctl = freq << 16; |
731 | I915_WRITE(BLC_PWM_CTL, ctl); | |
3bd712e5 | 732 | |
b35684b8 | 733 | /* XXX: combine this into above write? */ |
3bd712e5 | 734 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
b35684b8 JN |
735 | |
736 | ctl2 = BLM_PIPE(pipe); | |
737 | if (panel->backlight.combination_mode) | |
738 | ctl2 |= BLM_COMBINATION_MODE; | |
739 | if (panel->backlight.active_low_pwm) | |
740 | ctl2 |= BLM_POLARITY_I965; | |
741 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
742 | POSTING_READ(BLC_PWM_CTL2); | |
743 | I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); | |
7bd688cd JN |
744 | } |
745 | ||
746 | static void vlv_enable_backlight(struct intel_connector *connector) | |
747 | { | |
748 | struct drm_device *dev = connector->base.dev; | |
749 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 750 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 751 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 752 | u32 ctl, ctl2; |
7bd688cd | 753 | |
b35684b8 JN |
754 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
755 | if (ctl2 & BLM_PWM_ENABLE) { | |
756 | WARN(1, "backlight already enabled\n"); | |
757 | ctl2 &= ~BLM_PWM_ENABLE; | |
758 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
759 | } | |
7bd688cd | 760 | |
b35684b8 JN |
761 | ctl = panel->backlight.max << 16; |
762 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); | |
7bd688cd | 763 | |
b35684b8 JN |
764 | /* XXX: combine this into above write? */ |
765 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd | 766 | |
b35684b8 JN |
767 | ctl2 = 0; |
768 | if (panel->backlight.active_low_pwm) | |
769 | ctl2 |= BLM_POLARITY_I965; | |
770 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
7bd688cd | 771 | POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); |
b35684b8 | 772 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); |
47356eb6 CW |
773 | } |
774 | ||
752aa88a | 775 | void intel_panel_enable_backlight(struct intel_connector *connector) |
47356eb6 | 776 | { |
752aa88a | 777 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 778 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 779 | struct intel_panel *panel = &connector->panel; |
752aa88a | 780 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 JN |
781 | unsigned long flags; |
782 | ||
dc5a4363 | 783 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
752aa88a JB |
784 | return; |
785 | ||
6f2bcceb | 786 | DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); |
540b5d02 | 787 | |
58c68779 | 788 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
47356eb6 | 789 | |
f91c15e0 JN |
790 | WARN_ON(panel->backlight.max == 0); |
791 | ||
58c68779 | 792 | if (panel->backlight.level == 0) { |
f91c15e0 | 793 | panel->backlight.level = panel->backlight.max; |
58c68779 JN |
794 | if (panel->backlight.device) |
795 | panel->backlight.device->props.brightness = | |
796 | panel->backlight.level; | |
b6b3ba5b | 797 | } |
47356eb6 | 798 | |
3bd712e5 | 799 | dev_priv->display.enable_backlight(connector); |
58c68779 | 800 | panel->backlight.enabled = true; |
8ba2d185 | 801 | |
58c68779 | 802 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
47356eb6 CW |
803 | } |
804 | ||
fe16d949 CW |
805 | enum drm_connector_status |
806 | intel_panel_detect(struct drm_device *dev) | |
807 | { | |
808 | struct drm_i915_private *dev_priv = dev->dev_private; | |
809 | ||
810 | /* Assume that the BIOS does not lie through the OpRegion... */ | |
a726915c | 811 | if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) { |
fe16d949 CW |
812 | return ioread32(dev_priv->opregion.lid_state) & 0x1 ? |
813 | connector_status_connected : | |
814 | connector_status_disconnected; | |
a726915c | 815 | } |
fe16d949 | 816 | |
a726915c DV |
817 | switch (i915_panel_ignore_lid) { |
818 | case -2: | |
819 | return connector_status_connected; | |
820 | case -1: | |
821 | return connector_status_disconnected; | |
822 | default: | |
823 | return connector_status_unknown; | |
824 | } | |
fe16d949 | 825 | } |
aaa6fd2a | 826 | |
912e8b12 | 827 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
db31af1d | 828 | static int intel_backlight_device_update_status(struct backlight_device *bd) |
aaa6fd2a | 829 | { |
752aa88a JB |
830 | struct intel_connector *connector = bl_get_data(bd); |
831 | struct drm_device *dev = connector->base.dev; | |
832 | ||
833 | mutex_lock(&dev->mode_config.mutex); | |
540b5d02 CW |
834 | DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
835 | bd->props.brightness, bd->props.max_brightness); | |
752aa88a | 836 | intel_panel_set_backlight(connector, bd->props.brightness, |
d6540632 | 837 | bd->props.max_brightness); |
752aa88a | 838 | mutex_unlock(&dev->mode_config.mutex); |
aaa6fd2a MG |
839 | return 0; |
840 | } | |
841 | ||
db31af1d | 842 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
aaa6fd2a | 843 | { |
752aa88a JB |
844 | struct intel_connector *connector = bl_get_data(bd); |
845 | struct drm_device *dev = connector->base.dev; | |
c8c8fb33 | 846 | struct drm_i915_private *dev_priv = dev->dev_private; |
7bd688cd | 847 | int ret; |
752aa88a | 848 | |
c8c8fb33 | 849 | intel_runtime_pm_get(dev_priv); |
752aa88a | 850 | mutex_lock(&dev->mode_config.mutex); |
7bd688cd | 851 | ret = intel_panel_get_backlight(connector); |
752aa88a | 852 | mutex_unlock(&dev->mode_config.mutex); |
c8c8fb33 | 853 | intel_runtime_pm_put(dev_priv); |
752aa88a | 854 | |
7bd688cd | 855 | return ret; |
aaa6fd2a MG |
856 | } |
857 | ||
db31af1d JN |
858 | static const struct backlight_ops intel_backlight_device_ops = { |
859 | .update_status = intel_backlight_device_update_status, | |
860 | .get_brightness = intel_backlight_device_get_brightness, | |
aaa6fd2a MG |
861 | }; |
862 | ||
db31af1d | 863 | static int intel_backlight_device_register(struct intel_connector *connector) |
aaa6fd2a | 864 | { |
58c68779 | 865 | struct intel_panel *panel = &connector->panel; |
aaa6fd2a | 866 | struct backlight_properties props; |
aaa6fd2a | 867 | |
58c68779 | 868 | if (WARN_ON(panel->backlight.device)) |
dc652f90 JN |
869 | return -ENODEV; |
870 | ||
7bd688cd JN |
871 | BUG_ON(panel->backlight.max == 0); |
872 | ||
af437cfd | 873 | memset(&props, 0, sizeof(props)); |
aaa6fd2a | 874 | props.type = BACKLIGHT_RAW; |
58c68779 | 875 | props.brightness = panel->backlight.level; |
7bd688cd | 876 | props.max_brightness = panel->backlight.max; |
58c68779 JN |
877 | |
878 | /* | |
879 | * Note: using the same name independent of the connector prevents | |
880 | * registration of multiple backlight devices in the driver. | |
881 | */ | |
882 | panel->backlight.device = | |
aaa6fd2a | 883 | backlight_device_register("intel_backlight", |
db31af1d JN |
884 | connector->base.kdev, |
885 | connector, | |
886 | &intel_backlight_device_ops, &props); | |
aaa6fd2a | 887 | |
58c68779 | 888 | if (IS_ERR(panel->backlight.device)) { |
aaa6fd2a | 889 | DRM_ERROR("Failed to register backlight: %ld\n", |
58c68779 JN |
890 | PTR_ERR(panel->backlight.device)); |
891 | panel->backlight.device = NULL; | |
aaa6fd2a MG |
892 | return -ENODEV; |
893 | } | |
aaa6fd2a MG |
894 | return 0; |
895 | } | |
896 | ||
db31af1d | 897 | static void intel_backlight_device_unregister(struct intel_connector *connector) |
aaa6fd2a | 898 | { |
58c68779 JN |
899 | struct intel_panel *panel = &connector->panel; |
900 | ||
901 | if (panel->backlight.device) { | |
902 | backlight_device_unregister(panel->backlight.device); | |
903 | panel->backlight.device = NULL; | |
dc652f90 | 904 | } |
aaa6fd2a | 905 | } |
db31af1d JN |
906 | #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
907 | static int intel_backlight_device_register(struct intel_connector *connector) | |
908 | { | |
909 | return 0; | |
910 | } | |
911 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
912 | { | |
913 | } | |
914 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
915 | ||
f91c15e0 JN |
916 | /* |
917 | * Note: The setup hooks can't assume pipe is set! | |
918 | * | |
919 | * XXX: Query mode clock or hardware clock and program PWM modulation frequency | |
920 | * appropriately when it's 0. Use VBT and/or sane defaults. | |
921 | */ | |
96ab4c70 | 922 | static int bdw_setup_backlight(struct intel_connector *connector) |
aaa6fd2a | 923 | { |
96ab4c70 | 924 | struct drm_device *dev = connector->base.dev; |
aaa6fd2a | 925 | struct drm_i915_private *dev_priv = dev->dev_private; |
96ab4c70 DV |
926 | struct intel_panel *panel = &connector->panel; |
927 | u32 pch_ctl1, pch_ctl2, val; | |
928 | ||
929 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
930 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
931 | ||
932 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
933 | panel->backlight.max = pch_ctl2 >> 16; | |
934 | if (!panel->backlight.max) | |
935 | return -ENODEV; | |
936 | ||
937 | val = bdw_get_backlight(connector); | |
938 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
939 | ||
940 | panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) && | |
941 | panel->backlight.level != 0; | |
942 | ||
943 | return 0; | |
944 | } | |
945 | ||
7bd688cd JN |
946 | static int pch_setup_backlight(struct intel_connector *connector) |
947 | { | |
636baebf JN |
948 | struct drm_device *dev = connector->base.dev; |
949 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 950 | struct intel_panel *panel = &connector->panel; |
636baebf | 951 | u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
7bd688cd | 952 | |
636baebf JN |
953 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
954 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
955 | ||
956 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
957 | panel->backlight.max = pch_ctl2 >> 16; | |
7bd688cd JN |
958 | if (!panel->backlight.max) |
959 | return -ENODEV; | |
960 | ||
961 | val = pch_get_backlight(connector); | |
962 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
963 | ||
636baebf JN |
964 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
965 | panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && | |
966 | (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0; | |
967 | ||
7bd688cd JN |
968 | return 0; |
969 | } | |
970 | ||
971 | static int i9xx_setup_backlight(struct intel_connector *connector) | |
972 | { | |
636baebf JN |
973 | struct drm_device *dev = connector->base.dev; |
974 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 975 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
976 | u32 ctl, val; |
977 | ||
978 | ctl = I915_READ(BLC_PWM_CTL); | |
979 | ||
980 | if (IS_GEN2(dev)) | |
981 | panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; | |
982 | ||
983 | if (IS_PINEVIEW(dev)) | |
984 | panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; | |
985 | ||
986 | panel->backlight.max = ctl >> 17; | |
987 | if (panel->backlight.combination_mode) | |
988 | panel->backlight.max *= 0xff; | |
7bd688cd | 989 | |
7bd688cd JN |
990 | if (!panel->backlight.max) |
991 | return -ENODEV; | |
992 | ||
993 | val = i9xx_get_backlight(connector); | |
994 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
995 | ||
636baebf JN |
996 | panel->backlight.enabled = panel->backlight.level != 0; |
997 | ||
7bd688cd JN |
998 | return 0; |
999 | } | |
1000 | ||
1001 | static int i965_setup_backlight(struct intel_connector *connector) | |
1002 | { | |
636baebf JN |
1003 | struct drm_device *dev = connector->base.dev; |
1004 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1005 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
1006 | u32 ctl, ctl2, val; |
1007 | ||
1008 | ctl2 = I915_READ(BLC_PWM_CTL2); | |
1009 | panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; | |
1010 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
1011 | ||
1012 | ctl = I915_READ(BLC_PWM_CTL); | |
1013 | panel->backlight.max = ctl >> 16; | |
1014 | if (panel->backlight.combination_mode) | |
1015 | panel->backlight.max *= 0xff; | |
7bd688cd | 1016 | |
7bd688cd JN |
1017 | if (!panel->backlight.max) |
1018 | return -ENODEV; | |
1019 | ||
1020 | val = i9xx_get_backlight(connector); | |
1021 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1022 | ||
636baebf JN |
1023 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
1024 | panel->backlight.level != 0; | |
1025 | ||
7bd688cd JN |
1026 | return 0; |
1027 | } | |
1028 | ||
1029 | static int vlv_setup_backlight(struct intel_connector *connector) | |
1030 | { | |
1031 | struct drm_device *dev = connector->base.dev; | |
1032 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1033 | struct intel_panel *panel = &connector->panel; | |
1034 | enum pipe pipe; | |
636baebf | 1035 | u32 ctl, ctl2, val; |
7bd688cd JN |
1036 | |
1037 | for_each_pipe(pipe) { | |
1038 | u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe)); | |
1039 | ||
1040 | /* Skip if the modulation freq is already set */ | |
1041 | if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK) | |
1042 | continue; | |
1043 | ||
1044 | cur_val &= BACKLIGHT_DUTY_CYCLE_MASK; | |
1045 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) | | |
1046 | cur_val); | |
1047 | } | |
1048 | ||
636baebf JN |
1049 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A)); |
1050 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
1051 | ||
1052 | ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A)); | |
1053 | panel->backlight.max = ctl >> 16; | |
7bd688cd JN |
1054 | if (!panel->backlight.max) |
1055 | return -ENODEV; | |
1056 | ||
1057 | val = _vlv_get_backlight(dev, PIPE_A); | |
1058 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1059 | ||
636baebf JN |
1060 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
1061 | panel->backlight.level != 0; | |
1062 | ||
7bd688cd JN |
1063 | return 0; |
1064 | } | |
1065 | ||
0657b6b1 | 1066 | int intel_panel_setup_backlight(struct drm_connector *connector) |
aaa6fd2a | 1067 | { |
db31af1d | 1068 | struct drm_device *dev = connector->dev; |
7bd688cd | 1069 | struct drm_i915_private *dev_priv = dev->dev_private; |
db31af1d | 1070 | struct intel_connector *intel_connector = to_intel_connector(connector); |
58c68779 | 1071 | struct intel_panel *panel = &intel_connector->panel; |
7bd688cd JN |
1072 | unsigned long flags; |
1073 | int ret; | |
db31af1d | 1074 | |
7bd688cd JN |
1075 | /* set level and max in panel struct */ |
1076 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); | |
1077 | ret = dev_priv->display.setup_backlight(intel_connector); | |
1078 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); | |
1079 | ||
1080 | if (ret) { | |
1081 | DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", | |
1082 | drm_get_connector_name(connector)); | |
1083 | return ret; | |
1084 | } | |
db31af1d | 1085 | |
db31af1d JN |
1086 | intel_backlight_device_register(intel_connector); |
1087 | ||
c91c9f32 JN |
1088 | panel->backlight.present = true; |
1089 | ||
c445b3b1 JN |
1090 | DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, " |
1091 | "sysfs interface %sregistered\n", | |
1092 | panel->backlight.enabled ? "enabled" : "disabled", | |
1093 | panel->backlight.level, panel->backlight.max, | |
1094 | panel->backlight.device ? "" : "not "); | |
1095 | ||
aaa6fd2a MG |
1096 | return 0; |
1097 | } | |
1098 | ||
db31af1d | 1099 | void intel_panel_destroy_backlight(struct drm_connector *connector) |
aaa6fd2a | 1100 | { |
db31af1d | 1101 | struct intel_connector *intel_connector = to_intel_connector(connector); |
c91c9f32 | 1102 | struct intel_panel *panel = &intel_connector->panel; |
db31af1d | 1103 | |
c91c9f32 | 1104 | panel->backlight.present = false; |
db31af1d | 1105 | intel_backlight_device_unregister(intel_connector); |
aaa6fd2a | 1106 | } |
1d508706 | 1107 | |
ec9ed197 VK |
1108 | /** |
1109 | * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID | |
1110 | * @dev: drm device | |
1111 | * @fixed_mode : panel native mode | |
1112 | * @connector: LVDS/eDP connector | |
1113 | * | |
1114 | * Return downclock_avail | |
1115 | * Find the reduced downclock for LVDS/eDP in EDID. | |
1116 | */ | |
1117 | struct drm_display_mode * | |
1118 | intel_find_panel_downclock(struct drm_device *dev, | |
1119 | struct drm_display_mode *fixed_mode, | |
1120 | struct drm_connector *connector) | |
1121 | { | |
1122 | struct drm_display_mode *scan, *tmp_mode; | |
1123 | int temp_downclock; | |
1124 | ||
1125 | temp_downclock = fixed_mode->clock; | |
1126 | tmp_mode = NULL; | |
1127 | ||
1128 | list_for_each_entry(scan, &connector->probed_modes, head) { | |
1129 | /* | |
1130 | * If one mode has the same resolution with the fixed_panel | |
1131 | * mode while they have the different refresh rate, it means | |
1132 | * that the reduced downclock is found. In such | |
1133 | * case we can set the different FPx0/1 to dynamically select | |
1134 | * between low and high frequency. | |
1135 | */ | |
1136 | if (scan->hdisplay == fixed_mode->hdisplay && | |
1137 | scan->hsync_start == fixed_mode->hsync_start && | |
1138 | scan->hsync_end == fixed_mode->hsync_end && | |
1139 | scan->htotal == fixed_mode->htotal && | |
1140 | scan->vdisplay == fixed_mode->vdisplay && | |
1141 | scan->vsync_start == fixed_mode->vsync_start && | |
1142 | scan->vsync_end == fixed_mode->vsync_end && | |
1143 | scan->vtotal == fixed_mode->vtotal) { | |
1144 | if (scan->clock < temp_downclock) { | |
1145 | /* | |
1146 | * The downclock is already found. But we | |
1147 | * expect to find the lower downclock. | |
1148 | */ | |
1149 | temp_downclock = scan->clock; | |
1150 | tmp_mode = scan; | |
1151 | } | |
1152 | } | |
1153 | } | |
1154 | ||
1155 | if (temp_downclock < fixed_mode->clock) | |
1156 | return drm_mode_duplicate(dev, tmp_mode); | |
1157 | else | |
1158 | return NULL; | |
1159 | } | |
1160 | ||
7bd688cd JN |
1161 | /* Set up chip specific backlight functions */ |
1162 | void intel_panel_init_backlight_funcs(struct drm_device *dev) | |
1163 | { | |
1164 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1165 | ||
96ab4c70 DV |
1166 | if (IS_BROADWELL(dev)) { |
1167 | dev_priv->display.setup_backlight = bdw_setup_backlight; | |
1168 | dev_priv->display.enable_backlight = bdw_enable_backlight; | |
1169 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1170 | dev_priv->display.set_backlight = bdw_set_backlight; | |
1171 | dev_priv->display.get_backlight = bdw_get_backlight; | |
1172 | } else if (HAS_PCH_SPLIT(dev)) { | |
7bd688cd JN |
1173 | dev_priv->display.setup_backlight = pch_setup_backlight; |
1174 | dev_priv->display.enable_backlight = pch_enable_backlight; | |
1175 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1176 | dev_priv->display.set_backlight = pch_set_backlight; | |
1177 | dev_priv->display.get_backlight = pch_get_backlight; | |
7bd688cd JN |
1178 | } else if (IS_VALLEYVIEW(dev)) { |
1179 | dev_priv->display.setup_backlight = vlv_setup_backlight; | |
1180 | dev_priv->display.enable_backlight = vlv_enable_backlight; | |
1181 | dev_priv->display.disable_backlight = vlv_disable_backlight; | |
1182 | dev_priv->display.set_backlight = vlv_set_backlight; | |
1183 | dev_priv->display.get_backlight = vlv_get_backlight; | |
7bd688cd JN |
1184 | } else if (IS_GEN4(dev)) { |
1185 | dev_priv->display.setup_backlight = i965_setup_backlight; | |
1186 | dev_priv->display.enable_backlight = i965_enable_backlight; | |
1187 | dev_priv->display.disable_backlight = i965_disable_backlight; | |
1188 | dev_priv->display.set_backlight = i9xx_set_backlight; | |
1189 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1190 | } else { |
1191 | dev_priv->display.setup_backlight = i9xx_setup_backlight; | |
3bd712e5 JN |
1192 | dev_priv->display.enable_backlight = i9xx_enable_backlight; |
1193 | dev_priv->display.disable_backlight = i9xx_disable_backlight; | |
7bd688cd JN |
1194 | dev_priv->display.set_backlight = i9xx_set_backlight; |
1195 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1196 | } |
1197 | } | |
1198 | ||
dd06f90e JN |
1199 | int intel_panel_init(struct intel_panel *panel, |
1200 | struct drm_display_mode *fixed_mode) | |
1d508706 | 1201 | { |
dd06f90e JN |
1202 | panel->fixed_mode = fixed_mode; |
1203 | ||
1d508706 JN |
1204 | return 0; |
1205 | } | |
1206 | ||
1207 | void intel_panel_fini(struct intel_panel *panel) | |
1208 | { | |
dd06f90e JN |
1209 | struct intel_connector *intel_connector = |
1210 | container_of(panel, struct intel_connector, panel); | |
1211 | ||
1212 | if (panel->fixed_mode) | |
1213 | drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); | |
ec9ed197 VK |
1214 | |
1215 | if (panel->downclock_mode) | |
1216 | drm_mode_destroy(intel_connector->base.dev, | |
1217 | panel->downclock_mode); | |
1d508706 | 1218 | } |