]> git.proxmox.com Git - mirror_ubuntu-focal-kernel.git/blame - drivers/gpu/drm/i915/intel_panel.c
drm/i915: gather backlight information at setup
[mirror_ubuntu-focal-kernel.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
7bd90909 33#include <linux/moduleparam.h>
1d8e1c75
CW
34#include "intel_drv.h"
35
ba3820ad
TI
36#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
1d8e1c75 38void
4c6df4b4 39intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW
40 struct drm_display_mode *adjusted_mode)
41{
4c6df4b4 42 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID
43
44 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW
45}
46
47/* adjusted_mode has been preset to be the panel's fixed mode */
48void
b074cec8
JB
49intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
50 struct intel_crtc_config *pipe_config,
51 int fitting_mode)
1d8e1c75 52{
37327abd 53 struct drm_display_mode *adjusted_mode;
1d8e1c75
CW
54 int x, y, width, height;
55
b074cec8
JB
56 adjusted_mode = &pipe_config->adjusted_mode;
57
1d8e1c75
CW
58 x = y = width = height = 0;
59
60 /* Native modes don't need fitting */
37327abd
VS
61 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
62 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW
63 goto done;
64
65 switch (fitting_mode) {
66 case DRM_MODE_SCALE_CENTER:
37327abd
VS
67 width = pipe_config->pipe_src_w;
68 height = pipe_config->pipe_src_h;
1d8e1c75
CW
69 x = (adjusted_mode->hdisplay - width + 1)/2;
70 y = (adjusted_mode->vdisplay - height + 1)/2;
71 break;
72
73 case DRM_MODE_SCALE_ASPECT:
74 /* Scale but preserve the aspect ratio */
75 {
9084e7d2
DV
76 u32 scaled_width = adjusted_mode->hdisplay
77 * pipe_config->pipe_src_h;
78 u32 scaled_height = pipe_config->pipe_src_w
79 * adjusted_mode->vdisplay;
1d8e1c75 80 if (scaled_width > scaled_height) { /* pillar */
37327abd 81 width = scaled_height / pipe_config->pipe_src_h;
302983e9 82 if (width & 1)
0206e353 83 width++;
1d8e1c75
CW
84 x = (adjusted_mode->hdisplay - width + 1) / 2;
85 y = 0;
86 height = adjusted_mode->vdisplay;
87 } else if (scaled_width < scaled_height) { /* letter */
37327abd 88 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ
89 if (height & 1)
90 height++;
1d8e1c75
CW
91 y = (adjusted_mode->vdisplay - height + 1) / 2;
92 x = 0;
93 width = adjusted_mode->hdisplay;
94 } else {
95 x = y = 0;
96 width = adjusted_mode->hdisplay;
97 height = adjusted_mode->vdisplay;
98 }
99 }
100 break;
101
1d8e1c75
CW
102 case DRM_MODE_SCALE_FULLSCREEN:
103 x = y = 0;
104 width = adjusted_mode->hdisplay;
105 height = adjusted_mode->vdisplay;
106 break;
ab3e67f4
JB
107
108 default:
109 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
110 return;
1d8e1c75
CW
111 }
112
113done:
b074cec8
JB
114 pipe_config->pch_pfit.pos = (x << 16) | y;
115 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 116 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 117}
a9573556 118
2dd24552
JB
119static void
120centre_horizontally(struct drm_display_mode *mode,
121 int width)
122{
123 u32 border, sync_pos, blank_width, sync_width;
124
125 /* keep the hsync and hblank widths constant */
126 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
127 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
128 sync_pos = (blank_width - sync_width + 1) / 2;
129
130 border = (mode->hdisplay - width + 1) / 2;
131 border += border & 1; /* make the border even */
132
133 mode->crtc_hdisplay = width;
134 mode->crtc_hblank_start = width + border;
135 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
136
137 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
138 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
139}
140
141static void
142centre_vertically(struct drm_display_mode *mode,
143 int height)
144{
145 u32 border, sync_pos, blank_width, sync_width;
146
147 /* keep the vsync and vblank widths constant */
148 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
149 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
150 sync_pos = (blank_width - sync_width + 1) / 2;
151
152 border = (mode->vdisplay - height + 1) / 2;
153
154 mode->crtc_vdisplay = height;
155 mode->crtc_vblank_start = height + border;
156 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
157
158 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
159 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
160}
161
162static inline u32 panel_fitter_scaling(u32 source, u32 target)
163{
164 /*
165 * Floating point operation is not supported. So the FACTOR
166 * is defined, which can avoid the floating point computation
167 * when calculating the panel ratio.
168 */
169#define ACCURACY 12
170#define FACTOR (1 << ACCURACY)
171 u32 ratio = source * FACTOR / target;
172 return (FACTOR * ratio + FACTOR/2) / FACTOR;
173}
174
9084e7d2
DV
175static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
176 u32 *pfit_control)
177{
178 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
179 u32 scaled_width = adjusted_mode->hdisplay *
180 pipe_config->pipe_src_h;
181 u32 scaled_height = pipe_config->pipe_src_w *
182 adjusted_mode->vdisplay;
183
184 /* 965+ is easy, it does everything in hw */
185 if (scaled_width > scaled_height)
186 *pfit_control |= PFIT_ENABLE |
187 PFIT_SCALING_PILLAR;
188 else if (scaled_width < scaled_height)
189 *pfit_control |= PFIT_ENABLE |
190 PFIT_SCALING_LETTER;
191 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
192 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
193}
194
195static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
196 u32 *pfit_control, u32 *pfit_pgm_ratios,
197 u32 *border)
198{
199 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
200 u32 scaled_width = adjusted_mode->hdisplay *
201 pipe_config->pipe_src_h;
202 u32 scaled_height = pipe_config->pipe_src_w *
203 adjusted_mode->vdisplay;
204 u32 bits;
205
206 /*
207 * For earlier chips we have to calculate the scaling
208 * ratio by hand and program it into the
209 * PFIT_PGM_RATIO register
210 */
211 if (scaled_width > scaled_height) { /* pillar */
212 centre_horizontally(adjusted_mode,
213 scaled_height /
214 pipe_config->pipe_src_h);
215
216 *border = LVDS_BORDER_ENABLE;
217 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
218 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
219 adjusted_mode->vdisplay);
220
221 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
222 bits << PFIT_VERT_SCALE_SHIFT);
223 *pfit_control |= (PFIT_ENABLE |
224 VERT_INTERP_BILINEAR |
225 HORIZ_INTERP_BILINEAR);
226 }
227 } else if (scaled_width < scaled_height) { /* letter */
228 centre_vertically(adjusted_mode,
229 scaled_width /
230 pipe_config->pipe_src_w);
231
232 *border = LVDS_BORDER_ENABLE;
233 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
234 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
235 adjusted_mode->hdisplay);
236
237 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
238 bits << PFIT_VERT_SCALE_SHIFT);
239 *pfit_control |= (PFIT_ENABLE |
240 VERT_INTERP_BILINEAR |
241 HORIZ_INTERP_BILINEAR);
242 }
243 } else {
244 /* Aspects match, Let hw scale both directions */
245 *pfit_control |= (PFIT_ENABLE |
246 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
247 VERT_INTERP_BILINEAR |
248 HORIZ_INTERP_BILINEAR);
249 }
250}
251
2dd24552
JB
252void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
253 struct intel_crtc_config *pipe_config,
254 int fitting_mode)
255{
256 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 257 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
37327abd 258 struct drm_display_mode *adjusted_mode;
2dd24552 259
2dd24552
JB
260 adjusted_mode = &pipe_config->adjusted_mode;
261
262 /* Native modes don't need fitting */
37327abd
VS
263 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
264 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
2dd24552
JB
265 goto out;
266
267 switch (fitting_mode) {
268 case DRM_MODE_SCALE_CENTER:
269 /*
270 * For centered modes, we have to calculate border widths &
271 * heights and modify the values programmed into the CRTC.
272 */
37327abd
VS
273 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
274 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB
275 border = LVDS_BORDER_ENABLE;
276 break;
277 case DRM_MODE_SCALE_ASPECT:
278 /* Scale but preserve the aspect ratio */
9084e7d2
DV
279 if (INTEL_INFO(dev)->gen >= 4)
280 i965_scale_aspect(pipe_config, &pfit_control);
281 else
282 i9xx_scale_aspect(pipe_config, &pfit_control,
283 &pfit_pgm_ratios, &border);
2dd24552 284 break;
2dd24552
JB
285 case DRM_MODE_SCALE_FULLSCREEN:
286 /*
287 * Full scaling, even if it changes the aspect ratio.
288 * Fortunately this is all done for us in hw.
289 */
37327abd
VS
290 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
291 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
2dd24552
JB
292 pfit_control |= PFIT_ENABLE;
293 if (INTEL_INFO(dev)->gen >= 4)
294 pfit_control |= PFIT_SCALING_AUTO;
295 else
296 pfit_control |= (VERT_AUTO_SCALE |
297 VERT_INTERP_BILINEAR |
298 HORIZ_AUTO_SCALE |
299 HORIZ_INTERP_BILINEAR);
300 }
301 break;
ab3e67f4
JB
302 default:
303 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
304 return;
2dd24552
JB
305 }
306
307 /* 965+ wants fuzzy fitting */
308 /* FIXME: handle multiple panels by failing gracefully */
309 if (INTEL_INFO(dev)->gen >= 4)
310 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
311 PFIT_FILTER_FUZZY);
312
313out:
314 if ((pfit_control & PFIT_ENABLE) == 0) {
315 pfit_control = 0;
316 pfit_pgm_ratios = 0;
317 }
318
319 /* Make sure pre-965 set dither correctly for 18bpp panels. */
320 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
321 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
322
2deefda5
DV
323 pipe_config->gmch_pfit.control = pfit_control;
324 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 325 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB
326}
327
ba3820ad
TI
328static int is_backlight_combination_mode(struct drm_device *dev)
329{
330 struct drm_i915_private *dev_priv = dev->dev_private;
331
d9c638d5 332 if (IS_GEN4(dev))
ba3820ad
TI
333 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
334
335 if (IS_GEN2(dev))
336 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
337
338 return 0;
339}
340
7bd688cd 341static u32 pch_get_max_backlight(struct intel_connector *connector)
0b0b053a 342{
7bd688cd 343 struct drm_device *dev = connector->base.dev;
bfd7590d 344 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a
CW
345 u32 val;
346
7bd688cd
JN
347 val = I915_READ(BLC_PWM_PCH_CTL2);
348 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
349 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
350 } else if (val == 0) {
351 val = dev_priv->regfile.saveBLC_PWM_CTL2;
352 I915_WRITE(BLC_PWM_PCH_CTL2, val);
353 }
8ba2d185 354
7bd688cd 355 val >>= 16;
0b0b053a 356
7bd688cd
JN
357 return val;
358}
07bf139b 359
7bd688cd
JN
360static u32 i9xx_get_max_backlight(struct intel_connector *connector)
361{
362 struct drm_device *dev = connector->base.dev;
363 struct drm_i915_private *dev_priv = dev->dev_private;
364 u32 val;
365
366 val = I915_READ(BLC_PWM_CTL);
367 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
368 dev_priv->regfile.saveBLC_PWM_CTL = val;
369 } else if (val == 0) {
370 val = dev_priv->regfile.saveBLC_PWM_CTL;
371 I915_WRITE(BLC_PWM_CTL, val);
0b0b053a
CW
372 }
373
7bd688cd
JN
374 val >>= 17;
375
376 if (is_backlight_combination_mode(dev))
377 val *= 0xff;
378
0b0b053a
CW
379 return val;
380}
381
7bd688cd 382static u32 i965_get_max_backlight(struct intel_connector *connector)
a9573556 383{
7bd688cd
JN
384 struct drm_device *dev = connector->base.dev;
385 struct drm_i915_private *dev_priv = dev->dev_private;
386 u32 val;
387
388 val = I915_READ(BLC_PWM_CTL);
389 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
390 dev_priv->regfile.saveBLC_PWM_CTL = val;
391 dev_priv->regfile.saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
392 } else if (val == 0) {
393 val = dev_priv->regfile.saveBLC_PWM_CTL;
394 I915_WRITE(BLC_PWM_CTL, val);
395 I915_WRITE(BLC_PWM_CTL2, dev_priv->regfile.saveBLC_PWM_CTL2);
396 }
a9573556 397
7bd688cd 398 val >>= 16;
0b0b053a 399
7bd688cd
JN
400 if (is_backlight_combination_mode(dev))
401 val *= 0xff;
402
403 return val;
404}
405
406static u32 _vlv_get_max_backlight(struct drm_device *dev, enum pipe pipe)
407{
408 struct drm_i915_private *dev_priv = dev->dev_private;
409 u32 val;
ba3820ad 410
7bd688cd
JN
411 val = I915_READ(VLV_BLC_PWM_CTL(pipe));
412 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
413 dev_priv->regfile.saveBLC_PWM_CTL = val;
414 dev_priv->regfile.saveBLC_PWM_CTL2 =
415 I915_READ(VLV_BLC_PWM_CTL2(pipe));
416 } else if (val == 0) {
417 val = dev_priv->regfile.saveBLC_PWM_CTL;
418 I915_WRITE(VLV_BLC_PWM_CTL(pipe), val);
419 I915_WRITE(VLV_BLC_PWM_CTL2(pipe),
420 dev_priv->regfile.saveBLC_PWM_CTL2);
a9573556
CW
421 }
422
7bd688cd
JN
423 if (!val)
424 val = 0x0f42ffff;
425
426 val >>= 16;
427
428 return val;
429}
430
431static u32 vlv_get_max_backlight(struct intel_connector *connector)
432{
433 struct drm_device *dev = connector->base.dev;
434 enum pipe pipe = intel_get_pipe_from_connector(connector);
435
436 return _vlv_get_max_backlight(dev, pipe);
437}
438
7bd688cd
JN
439static u32 intel_panel_get_max_backlight(struct intel_connector *connector)
440{
441 struct drm_device *dev = connector->base.dev;
442 struct drm_i915_private *dev_priv = dev->dev_private;
443 u32 max;
444
445 WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight_lock));
446
447 max = dev_priv->display.get_max_backlight(connector);
448
a9573556 449 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
d6540632 450
a9573556
CW
451 return max;
452}
453
4dca20ef
CE
454static int i915_panel_invert_brightness;
455MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
456 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
7bd90909
CE
457 "report PCI device ID, subsystem vendor and subsystem device ID "
458 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
459 "It will then be included in an upcoming module version.");
4dca20ef 460module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
7bd688cd
JN
461static u32 intel_panel_compute_brightness(struct intel_connector *connector,
462 u32 val)
7bd90909 463{
7bd688cd 464 struct drm_device *dev = connector->base.dev;
4dca20ef 465 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN
466 struct intel_panel *panel = &connector->panel;
467
468 WARN_ON(panel->backlight.max == 0);
4dca20ef
CE
469
470 if (i915_panel_invert_brightness < 0)
471 return val;
472
473 if (i915_panel_invert_brightness > 0 ||
d6540632 474 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 475 return panel->backlight.max - val;
d6540632 476 }
7bd90909
CE
477
478 return val;
479}
480
7bd688cd 481static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 482{
7bd688cd 483 struct drm_device *dev = connector->base.dev;
a9573556 484 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 485
7bd688cd
JN
486 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
487}
a9573556 488
7bd688cd
JN
489static u32 i9xx_get_backlight(struct intel_connector *connector)
490{
491 struct drm_device *dev = connector->base.dev;
492 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 493 struct intel_panel *panel = &connector->panel;
7bd688cd 494 u32 val;
07bf139b 495
7bd688cd
JN
496 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
497 if (INTEL_INFO(dev)->gen < 4)
498 val >>= 1;
ba3820ad 499
636baebf 500 if (panel->backlight.combination_mode) {
7bd688cd 501 u8 lbpc;
ba3820ad 502
7bd688cd
JN
503 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
504 val *= lbpc;
a9573556
CW
505 }
506
7bd688cd
JN
507 return val;
508}
509
510static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
511{
512 struct drm_i915_private *dev_priv = dev->dev_private;
513
514 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
515}
516
517static u32 vlv_get_backlight(struct intel_connector *connector)
518{
519 struct drm_device *dev = connector->base.dev;
520 enum pipe pipe = intel_get_pipe_from_connector(connector);
521
522 return _vlv_get_backlight(dev, pipe);
523}
524
525static u32 intel_panel_get_backlight(struct intel_connector *connector)
526{
527 struct drm_device *dev = connector->base.dev;
528 struct drm_i915_private *dev_priv = dev->dev_private;
529 u32 val;
530 unsigned long flags;
531
532 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
533
534 val = dev_priv->display.get_backlight(connector);
535 val = intel_panel_compute_brightness(connector, val);
8ba2d185 536
58c68779 537 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
8ba2d185 538
a9573556
CW
539 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
540 return val;
541}
542
7bd688cd 543static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 544{
7bd688cd 545 struct drm_device *dev = connector->base.dev;
a9573556 546 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN
547 u32 tmp;
548
549 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
550 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW
551}
552
7bd688cd 553static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 554{
7bd688cd 555 struct drm_device *dev = connector->base.dev;
a9573556 556 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 557 struct intel_panel *panel = &connector->panel;
b329b328 558 u32 tmp, mask;
ba3820ad 559
f91c15e0
JN
560 WARN_ON(panel->backlight.max == 0);
561
636baebf 562 if (panel->backlight.combination_mode) {
ba3820ad
TI
563 u8 lbpc;
564
f91c15e0 565 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI
566 level /= lbpc;
567 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
568 }
569
b329b328
JN
570 if (IS_GEN4(dev)) {
571 mask = BACKLIGHT_DUTY_CYCLE_MASK;
572 } else {
a9573556 573 level <<= 1;
b329b328
JN
574 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
575 }
7bd688cd 576
b329b328 577 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN
578 I915_WRITE(BLC_PWM_CTL, tmp | level);
579}
580
581static void vlv_set_backlight(struct intel_connector *connector, u32 level)
582{
583 struct drm_device *dev = connector->base.dev;
584 struct drm_i915_private *dev_priv = dev->dev_private;
585 enum pipe pipe = intel_get_pipe_from_connector(connector);
586 u32 tmp;
587
588 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
589 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
590}
591
592static void
593intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
594{
595 struct drm_device *dev = connector->base.dev;
596 struct drm_i915_private *dev_priv = dev->dev_private;
597
598 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
599
600 level = intel_panel_compute_brightness(connector, level);
601 dev_priv->display.set_backlight(connector, level);
a9573556 602}
47356eb6 603
d6540632 604/* set backlight brightness to level in range [0..max] */
752aa88a
JB
605void intel_panel_set_backlight(struct intel_connector *connector, u32 level,
606 u32 max)
47356eb6 607{
752aa88a 608 struct drm_device *dev = connector->base.dev;
47356eb6 609 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 610 struct intel_panel *panel = &connector->panel;
752aa88a 611 enum pipe pipe = intel_get_pipe_from_connector(connector);
d6540632 612 u32 freq;
8ba2d185
JN
613 unsigned long flags;
614
752aa88a
JB
615 if (pipe == INVALID_PIPE)
616 return;
617
58c68779 618 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
d6540632 619
f91c15e0 620 WARN_ON(panel->backlight.max == 0);
d6540632 621
f91c15e0
JN
622 /* scale to hardware max, but be careful to not overflow */
623 freq = panel->backlight.max;
22505b82
AL
624 if (freq < max)
625 level = level * freq / max;
626 else
627 level = freq / max * level;
47356eb6 628
58c68779
JN
629 panel->backlight.level = level;
630 if (panel->backlight.device)
631 panel->backlight.device->props.brightness = level;
b6b3ba5b 632
58c68779 633 if (panel->backlight.enabled)
7bd688cd 634 intel_panel_actually_set_backlight(connector, level);
f91c15e0 635
58c68779 636 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
f52c619a
TI
637}
638
7bd688cd
JN
639static void pch_disable_backlight(struct intel_connector *connector)
640{
641 struct drm_device *dev = connector->base.dev;
642 struct drm_i915_private *dev_priv = dev->dev_private;
643 u32 tmp;
644
3bd712e5
JN
645 intel_panel_actually_set_backlight(connector, 0);
646
7bd688cd
JN
647 tmp = I915_READ(BLC_PWM_CPU_CTL2);
648 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
649
650 tmp = I915_READ(BLC_PWM_PCH_CTL1);
651 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
652}
653
3bd712e5
JN
654static void i9xx_disable_backlight(struct intel_connector *connector)
655{
656 intel_panel_actually_set_backlight(connector, 0);
657}
658
7bd688cd
JN
659static void i965_disable_backlight(struct intel_connector *connector)
660{
661 struct drm_device *dev = connector->base.dev;
662 struct drm_i915_private *dev_priv = dev->dev_private;
663 u32 tmp;
664
3bd712e5
JN
665 intel_panel_actually_set_backlight(connector, 0);
666
7bd688cd
JN
667 tmp = I915_READ(BLC_PWM_CTL2);
668 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
669}
670
671static void vlv_disable_backlight(struct intel_connector *connector)
672{
673 struct drm_device *dev = connector->base.dev;
674 struct drm_i915_private *dev_priv = dev->dev_private;
675 enum pipe pipe = intel_get_pipe_from_connector(connector);
676 u32 tmp;
677
3bd712e5
JN
678 intel_panel_actually_set_backlight(connector, 0);
679
7bd688cd
JN
680 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
681 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
682}
683
752aa88a 684void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 685{
752aa88a 686 struct drm_device *dev = connector->base.dev;
f52c619a 687 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 688 struct intel_panel *panel = &connector->panel;
752aa88a 689 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185
JN
690 unsigned long flags;
691
752aa88a
JB
692 if (pipe == INVALID_PIPE)
693 return;
694
3f577573
JN
695 /*
696 * Do not disable backlight on the vgaswitcheroo path. When switching
697 * away from i915, the other client may depend on i915 to handle the
698 * backlight. This will leave the backlight on unnecessarily when
699 * another client is not activated.
700 */
701 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
702 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
703 return;
704 }
705
58c68779 706 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
47356eb6 707
58c68779 708 panel->backlight.enabled = false;
3bd712e5 709 dev_priv->display.disable_backlight(connector);
24ded204 710
7bd688cd
JN
711 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
712}
24ded204 713
7bd688cd
JN
714static void pch_enable_backlight(struct intel_connector *connector)
715{
716 struct drm_device *dev = connector->base.dev;
717 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 718 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
719 enum pipe pipe = intel_get_pipe_from_connector(connector);
720 enum transcoder cpu_transcoder =
721 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
722 u32 tmp;
a4f32fc3 723
7bd688cd
JN
724 tmp = I915_READ(BLC_PWM_CPU_CTL2);
725
726 /* Note that this can also get called through dpms changes. And
727 * we don't track the backlight dpms state, hence check whether
728 * we have to do anything first. */
729 if (tmp & BLM_PWM_ENABLE)
730 return;
731
732 if (INTEL_INFO(dev)->num_pipes == 3)
733 tmp &= ~BLM_PIPE_SELECT_IVB;
734 else
735 tmp &= ~BLM_PIPE_SELECT;
736
737 if (cpu_transcoder == TRANSCODER_EDP)
738 tmp |= BLM_TRANSCODER_EDP;
739 else
740 tmp |= BLM_PIPE(cpu_transcoder);
741 tmp &= ~BLM_PWM_ENABLE;
742
743 I915_WRITE(BLC_PWM_CPU_CTL2, tmp);
744 POSTING_READ(BLC_PWM_CPU_CTL2);
745 I915_WRITE(BLC_PWM_CPU_CTL2, tmp | BLM_PWM_ENABLE);
746
747 if (!(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
748 tmp = I915_READ(BLC_PWM_PCH_CTL1);
749 tmp |= BLM_PCH_PWM_ENABLE;
750 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
751 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
24ded204 752 }
3bd712e5
JN
753
754 /*
755 * Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
756 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
757 * registers are set.
758 */
759 intel_panel_actually_set_backlight(connector, panel->backlight.level);
760}
761
762static void i9xx_enable_backlight(struct intel_connector *connector)
763{
764 struct intel_panel *panel = &connector->panel;
765
766 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 767}
8ba2d185 768
7bd688cd
JN
769static void i965_enable_backlight(struct intel_connector *connector)
770{
771 struct drm_device *dev = connector->base.dev;
772 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 773 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
774 enum pipe pipe = intel_get_pipe_from_connector(connector);
775 u32 tmp;
776
777 tmp = I915_READ(BLC_PWM_CTL2);
778
779 /* Note that this can also get called through dpms changes. And
780 * we don't track the backlight dpms state, hence check whether
781 * we have to do anything first. */
782 if (tmp & BLM_PWM_ENABLE)
783 return;
784
785 tmp &= ~BLM_PIPE_SELECT;
786 tmp |= BLM_PIPE(pipe);
787 tmp &= ~BLM_PWM_ENABLE;
788
789 I915_WRITE(BLC_PWM_CTL2, tmp);
790 POSTING_READ(BLC_PWM_CTL2);
791 I915_WRITE(BLC_PWM_CTL2, tmp | BLM_PWM_ENABLE);
3bd712e5
JN
792
793 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN
794}
795
796static void vlv_enable_backlight(struct intel_connector *connector)
797{
798 struct drm_device *dev = connector->base.dev;
799 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 800 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
801 enum pipe pipe = intel_get_pipe_from_connector(connector);
802 u32 tmp;
803
804 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
805
806 /* Note that this can also get called through dpms changes. And
807 * we don't track the backlight dpms state, hence check whether
808 * we have to do anything first. */
809 if (tmp & BLM_PWM_ENABLE)
810 return;
811
7bd688cd
JN
812 tmp &= ~BLM_PWM_ENABLE;
813
814 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp);
815 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
816 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp | BLM_PWM_ENABLE);
3bd712e5
JN
817
818 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW
819}
820
752aa88a 821void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 822{
752aa88a 823 struct drm_device *dev = connector->base.dev;
47356eb6 824 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 825 struct intel_panel *panel = &connector->panel;
752aa88a 826 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185
JN
827 unsigned long flags;
828
752aa88a
JB
829 if (pipe == INVALID_PIPE)
830 return;
831
6f2bcceb 832 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 833
58c68779 834 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
47356eb6 835
f91c15e0
JN
836 /* XXX: transitional, call to make sure freq is set */
837 intel_panel_get_max_backlight(connector);
838
839 WARN_ON(panel->backlight.max == 0);
840
58c68779 841 if (panel->backlight.level == 0) {
f91c15e0 842 panel->backlight.level = panel->backlight.max;
58c68779
JN
843 if (panel->backlight.device)
844 panel->backlight.device->props.brightness =
845 panel->backlight.level;
b6b3ba5b 846 }
47356eb6 847
3bd712e5 848 dev_priv->display.enable_backlight(connector);
58c68779 849 panel->backlight.enabled = true;
8ba2d185 850
58c68779 851 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
47356eb6
CW
852}
853
fe16d949
CW
854enum drm_connector_status
855intel_panel_detect(struct drm_device *dev)
856{
857 struct drm_i915_private *dev_priv = dev->dev_private;
858
859 /* Assume that the BIOS does not lie through the OpRegion... */
a726915c 860 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
fe16d949
CW
861 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
862 connector_status_connected :
863 connector_status_disconnected;
a726915c 864 }
fe16d949 865
a726915c
DV
866 switch (i915_panel_ignore_lid) {
867 case -2:
868 return connector_status_connected;
869 case -1:
870 return connector_status_disconnected;
871 default:
872 return connector_status_unknown;
873 }
fe16d949 874}
aaa6fd2a 875
912e8b12 876#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 877static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 878{
752aa88a
JB
879 struct intel_connector *connector = bl_get_data(bd);
880 struct drm_device *dev = connector->base.dev;
881
882 mutex_lock(&dev->mode_config.mutex);
540b5d02
CW
883 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
884 bd->props.brightness, bd->props.max_brightness);
752aa88a 885 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 886 bd->props.max_brightness);
752aa88a 887 mutex_unlock(&dev->mode_config.mutex);
aaa6fd2a
MG
888 return 0;
889}
890
db31af1d 891static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 892{
752aa88a
JB
893 struct intel_connector *connector = bl_get_data(bd);
894 struct drm_device *dev = connector->base.dev;
7bd688cd 895 int ret;
752aa88a
JB
896
897 mutex_lock(&dev->mode_config.mutex);
7bd688cd 898 ret = intel_panel_get_backlight(connector);
752aa88a 899 mutex_unlock(&dev->mode_config.mutex);
752aa88a 900
7bd688cd 901 return ret;
aaa6fd2a
MG
902}
903
db31af1d
JN
904static const struct backlight_ops intel_backlight_device_ops = {
905 .update_status = intel_backlight_device_update_status,
906 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG
907};
908
db31af1d 909static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 910{
58c68779 911 struct intel_panel *panel = &connector->panel;
aaa6fd2a 912 struct backlight_properties props;
aaa6fd2a 913
58c68779 914 if (WARN_ON(panel->backlight.device))
dc652f90
JN
915 return -ENODEV;
916
7bd688cd
JN
917 BUG_ON(panel->backlight.max == 0);
918
af437cfd 919 memset(&props, 0, sizeof(props));
aaa6fd2a 920 props.type = BACKLIGHT_RAW;
58c68779 921 props.brightness = panel->backlight.level;
7bd688cd 922 props.max_brightness = panel->backlight.max;
58c68779
JN
923
924 /*
925 * Note: using the same name independent of the connector prevents
926 * registration of multiple backlight devices in the driver.
927 */
928 panel->backlight.device =
aaa6fd2a 929 backlight_device_register("intel_backlight",
db31af1d
JN
930 connector->base.kdev,
931 connector,
932 &intel_backlight_device_ops, &props);
aaa6fd2a 933
58c68779 934 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 935 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN
936 PTR_ERR(panel->backlight.device));
937 panel->backlight.device = NULL;
aaa6fd2a
MG
938 return -ENODEV;
939 }
aaa6fd2a
MG
940 return 0;
941}
942
db31af1d 943static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 944{
58c68779
JN
945 struct intel_panel *panel = &connector->panel;
946
947 if (panel->backlight.device) {
948 backlight_device_unregister(panel->backlight.device);
949 panel->backlight.device = NULL;
dc652f90 950 }
aaa6fd2a 951}
db31af1d
JN
952#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
953static int intel_backlight_device_register(struct intel_connector *connector)
954{
955 return 0;
956}
957static void intel_backlight_device_unregister(struct intel_connector *connector)
958{
959}
960#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
961
f91c15e0
JN
962/*
963 * Note: The setup hooks can't assume pipe is set!
964 *
965 * XXX: Query mode clock or hardware clock and program PWM modulation frequency
966 * appropriately when it's 0. Use VBT and/or sane defaults.
967 */
7bd688cd
JN
968static int pch_setup_backlight(struct intel_connector *connector)
969{
636baebf
JN
970 struct drm_device *dev = connector->base.dev;
971 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 972 struct intel_panel *panel = &connector->panel;
636baebf 973 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 974
636baebf
JN
975 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
976 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
977
978 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
979 panel->backlight.max = pch_ctl2 >> 16;
7bd688cd
JN
980 if (!panel->backlight.max)
981 return -ENODEV;
982
983 val = pch_get_backlight(connector);
984 panel->backlight.level = intel_panel_compute_brightness(connector, val);
985
636baebf
JN
986 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
987 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
988 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
989
7bd688cd
JN
990 return 0;
991}
992
993static int i9xx_setup_backlight(struct intel_connector *connector)
994{
636baebf
JN
995 struct drm_device *dev = connector->base.dev;
996 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 997 struct intel_panel *panel = &connector->panel;
636baebf
JN
998 u32 ctl, val;
999
1000 ctl = I915_READ(BLC_PWM_CTL);
1001
1002 if (IS_GEN2(dev))
1003 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1004
1005 if (IS_PINEVIEW(dev))
1006 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1007
1008 panel->backlight.max = ctl >> 17;
1009 if (panel->backlight.combination_mode)
1010 panel->backlight.max *= 0xff;
7bd688cd 1011
7bd688cd
JN
1012 if (!panel->backlight.max)
1013 return -ENODEV;
1014
1015 val = i9xx_get_backlight(connector);
1016 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1017
636baebf
JN
1018 panel->backlight.enabled = panel->backlight.level != 0;
1019
7bd688cd
JN
1020 return 0;
1021}
1022
1023static int i965_setup_backlight(struct intel_connector *connector)
1024{
636baebf
JN
1025 struct drm_device *dev = connector->base.dev;
1026 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1027 struct intel_panel *panel = &connector->panel;
636baebf
JN
1028 u32 ctl, ctl2, val;
1029
1030 ctl2 = I915_READ(BLC_PWM_CTL2);
1031 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1032 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1033
1034 ctl = I915_READ(BLC_PWM_CTL);
1035 panel->backlight.max = ctl >> 16;
1036 if (panel->backlight.combination_mode)
1037 panel->backlight.max *= 0xff;
7bd688cd 1038
7bd688cd
JN
1039 if (!panel->backlight.max)
1040 return -ENODEV;
1041
1042 val = i9xx_get_backlight(connector);
1043 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1044
636baebf
JN
1045 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1046 panel->backlight.level != 0;
1047
7bd688cd
JN
1048 return 0;
1049}
1050
1051static int vlv_setup_backlight(struct intel_connector *connector)
1052{
1053 struct drm_device *dev = connector->base.dev;
1054 struct drm_i915_private *dev_priv = dev->dev_private;
1055 struct intel_panel *panel = &connector->panel;
1056 enum pipe pipe;
636baebf 1057 u32 ctl, ctl2, val;
7bd688cd
JN
1058
1059 for_each_pipe(pipe) {
1060 u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
1061
1062 /* Skip if the modulation freq is already set */
1063 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
1064 continue;
1065
1066 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
1067 I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
1068 cur_val);
1069 }
1070
636baebf
JN
1071 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
1072 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1073
1074 ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
1075 panel->backlight.max = ctl >> 16;
7bd688cd
JN
1076 if (!panel->backlight.max)
1077 return -ENODEV;
1078
1079 val = _vlv_get_backlight(dev, PIPE_A);
1080 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1081
636baebf
JN
1082 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1083 panel->backlight.level != 0;
1084
7bd688cd
JN
1085 return 0;
1086}
1087
0657b6b1 1088int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a 1089{
db31af1d 1090 struct drm_device *dev = connector->dev;
7bd688cd 1091 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1092 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1093 struct intel_panel *panel = &intel_connector->panel;
7bd688cd
JN
1094 unsigned long flags;
1095 int ret;
db31af1d 1096
7bd688cd
JN
1097 /* set level and max in panel struct */
1098 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
1099 ret = dev_priv->display.setup_backlight(intel_connector);
1100 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
1101
1102 if (ret) {
1103 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1104 drm_get_connector_name(connector));
1105 return ret;
1106 }
db31af1d 1107
db31af1d
JN
1108 intel_backlight_device_register(intel_connector);
1109
c91c9f32
JN
1110 panel->backlight.present = true;
1111
c445b3b1
JN
1112 DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
1113 "sysfs interface %sregistered\n",
1114 panel->backlight.enabled ? "enabled" : "disabled",
1115 panel->backlight.level, panel->backlight.max,
1116 panel->backlight.device ? "" : "not ");
1117
aaa6fd2a
MG
1118 return 0;
1119}
1120
db31af1d 1121void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1122{
db31af1d 1123 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1124 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1125
c91c9f32 1126 panel->backlight.present = false;
db31af1d 1127 intel_backlight_device_unregister(intel_connector);
aaa6fd2a 1128}
1d508706 1129
7bd688cd
JN
1130/* Set up chip specific backlight functions */
1131void intel_panel_init_backlight_funcs(struct drm_device *dev)
1132{
1133 struct drm_i915_private *dev_priv = dev->dev_private;
1134
1135 if (HAS_PCH_SPLIT(dev)) {
1136 dev_priv->display.setup_backlight = pch_setup_backlight;
1137 dev_priv->display.enable_backlight = pch_enable_backlight;
1138 dev_priv->display.disable_backlight = pch_disable_backlight;
1139 dev_priv->display.set_backlight = pch_set_backlight;
1140 dev_priv->display.get_backlight = pch_get_backlight;
1141 dev_priv->display.get_max_backlight = pch_get_max_backlight;
1142 } else if (IS_VALLEYVIEW(dev)) {
1143 dev_priv->display.setup_backlight = vlv_setup_backlight;
1144 dev_priv->display.enable_backlight = vlv_enable_backlight;
1145 dev_priv->display.disable_backlight = vlv_disable_backlight;
1146 dev_priv->display.set_backlight = vlv_set_backlight;
1147 dev_priv->display.get_backlight = vlv_get_backlight;
1148 dev_priv->display.get_max_backlight = vlv_get_max_backlight;
1149 } else if (IS_GEN4(dev)) {
1150 dev_priv->display.setup_backlight = i965_setup_backlight;
1151 dev_priv->display.enable_backlight = i965_enable_backlight;
1152 dev_priv->display.disable_backlight = i965_disable_backlight;
1153 dev_priv->display.set_backlight = i9xx_set_backlight;
1154 dev_priv->display.get_backlight = i9xx_get_backlight;
1155 dev_priv->display.get_max_backlight = i965_get_max_backlight;
1156 } else {
1157 dev_priv->display.setup_backlight = i9xx_setup_backlight;
3bd712e5
JN
1158 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1159 dev_priv->display.disable_backlight = i9xx_disable_backlight;
7bd688cd
JN
1160 dev_priv->display.set_backlight = i9xx_set_backlight;
1161 dev_priv->display.get_backlight = i9xx_get_backlight;
1162 dev_priv->display.get_max_backlight = i9xx_get_max_backlight;
1163 }
1164}
1165
dd06f90e
JN
1166int intel_panel_init(struct intel_panel *panel,
1167 struct drm_display_mode *fixed_mode)
1d508706 1168{
dd06f90e
JN
1169 panel->fixed_mode = fixed_mode;
1170
1d508706
JN
1171 return 0;
1172}
1173
1174void intel_panel_fini(struct intel_panel *panel)
1175{
dd06f90e
JN
1176 struct intel_connector *intel_connector =
1177 container_of(panel, struct intel_connector, panel);
1178
1179 if (panel->fixed_mode)
1180 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1d508706 1181}