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1d8e1c75 CW |
1 | /* |
2 | * Copyright © 2006-2010 Intel Corporation | |
3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Dave Airlie <airlied@linux.ie> | |
27 | * Jesse Barnes <jesse.barnes@intel.com> | |
28 | * Chris Wilson <chris@chris-wilson.co.uk> | |
29 | */ | |
30 | ||
a70491cc JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
7bd90909 | 33 | #include <linux/moduleparam.h> |
1d8e1c75 CW |
34 | #include "intel_drv.h" |
35 | ||
36 | void | |
4c6df4b4 | 37 | intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
1d8e1c75 CW |
38 | struct drm_display_mode *adjusted_mode) |
39 | { | |
4c6df4b4 | 40 | drm_mode_copy(adjusted_mode, fixed_mode); |
a52690e4 ID |
41 | |
42 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
1d8e1c75 CW |
43 | } |
44 | ||
525997e0 JN |
45 | /** |
46 | * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID | |
47 | * @dev: drm device | |
48 | * @fixed_mode : panel native mode | |
49 | * @connector: LVDS/eDP connector | |
50 | * | |
51 | * Return downclock_avail | |
52 | * Find the reduced downclock for LVDS/eDP in EDID. | |
53 | */ | |
54 | struct drm_display_mode * | |
55 | intel_find_panel_downclock(struct drm_device *dev, | |
56 | struct drm_display_mode *fixed_mode, | |
57 | struct drm_connector *connector) | |
58 | { | |
59 | struct drm_display_mode *scan, *tmp_mode; | |
60 | int temp_downclock; | |
61 | ||
62 | temp_downclock = fixed_mode->clock; | |
63 | tmp_mode = NULL; | |
64 | ||
65 | list_for_each_entry(scan, &connector->probed_modes, head) { | |
66 | /* | |
67 | * If one mode has the same resolution with the fixed_panel | |
68 | * mode while they have the different refresh rate, it means | |
69 | * that the reduced downclock is found. In such | |
70 | * case we can set the different FPx0/1 to dynamically select | |
71 | * between low and high frequency. | |
72 | */ | |
73 | if (scan->hdisplay == fixed_mode->hdisplay && | |
74 | scan->hsync_start == fixed_mode->hsync_start && | |
75 | scan->hsync_end == fixed_mode->hsync_end && | |
76 | scan->htotal == fixed_mode->htotal && | |
77 | scan->vdisplay == fixed_mode->vdisplay && | |
78 | scan->vsync_start == fixed_mode->vsync_start && | |
79 | scan->vsync_end == fixed_mode->vsync_end && | |
80 | scan->vtotal == fixed_mode->vtotal) { | |
81 | if (scan->clock < temp_downclock) { | |
82 | /* | |
83 | * The downclock is already found. But we | |
84 | * expect to find the lower downclock. | |
85 | */ | |
86 | temp_downclock = scan->clock; | |
87 | tmp_mode = scan; | |
88 | } | |
89 | } | |
90 | } | |
91 | ||
92 | if (temp_downclock < fixed_mode->clock) | |
93 | return drm_mode_duplicate(dev, tmp_mode); | |
94 | else | |
95 | return NULL; | |
96 | } | |
97 | ||
1d8e1c75 CW |
98 | /* adjusted_mode has been preset to be the panel's fixed mode */ |
99 | void | |
b074cec8 JB |
100 | intel_pch_panel_fitting(struct intel_crtc *intel_crtc, |
101 | struct intel_crtc_config *pipe_config, | |
102 | int fitting_mode) | |
1d8e1c75 | 103 | { |
37327abd | 104 | struct drm_display_mode *adjusted_mode; |
1d8e1c75 CW |
105 | int x, y, width, height; |
106 | ||
b074cec8 JB |
107 | adjusted_mode = &pipe_config->adjusted_mode; |
108 | ||
1d8e1c75 CW |
109 | x = y = width = height = 0; |
110 | ||
111 | /* Native modes don't need fitting */ | |
37327abd VS |
112 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
113 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
1d8e1c75 CW |
114 | goto done; |
115 | ||
116 | switch (fitting_mode) { | |
117 | case DRM_MODE_SCALE_CENTER: | |
37327abd VS |
118 | width = pipe_config->pipe_src_w; |
119 | height = pipe_config->pipe_src_h; | |
1d8e1c75 CW |
120 | x = (adjusted_mode->hdisplay - width + 1)/2; |
121 | y = (adjusted_mode->vdisplay - height + 1)/2; | |
122 | break; | |
123 | ||
124 | case DRM_MODE_SCALE_ASPECT: | |
125 | /* Scale but preserve the aspect ratio */ | |
126 | { | |
9084e7d2 DV |
127 | u32 scaled_width = adjusted_mode->hdisplay |
128 | * pipe_config->pipe_src_h; | |
129 | u32 scaled_height = pipe_config->pipe_src_w | |
130 | * adjusted_mode->vdisplay; | |
1d8e1c75 | 131 | if (scaled_width > scaled_height) { /* pillar */ |
37327abd | 132 | width = scaled_height / pipe_config->pipe_src_h; |
302983e9 | 133 | if (width & 1) |
0206e353 | 134 | width++; |
1d8e1c75 CW |
135 | x = (adjusted_mode->hdisplay - width + 1) / 2; |
136 | y = 0; | |
137 | height = adjusted_mode->vdisplay; | |
138 | } else if (scaled_width < scaled_height) { /* letter */ | |
37327abd | 139 | height = scaled_width / pipe_config->pipe_src_w; |
302983e9 AJ |
140 | if (height & 1) |
141 | height++; | |
1d8e1c75 CW |
142 | y = (adjusted_mode->vdisplay - height + 1) / 2; |
143 | x = 0; | |
144 | width = adjusted_mode->hdisplay; | |
145 | } else { | |
146 | x = y = 0; | |
147 | width = adjusted_mode->hdisplay; | |
148 | height = adjusted_mode->vdisplay; | |
149 | } | |
150 | } | |
151 | break; | |
152 | ||
1d8e1c75 CW |
153 | case DRM_MODE_SCALE_FULLSCREEN: |
154 | x = y = 0; | |
155 | width = adjusted_mode->hdisplay; | |
156 | height = adjusted_mode->vdisplay; | |
157 | break; | |
ab3e67f4 JB |
158 | |
159 | default: | |
160 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
161 | return; | |
1d8e1c75 CW |
162 | } |
163 | ||
164 | done: | |
b074cec8 JB |
165 | pipe_config->pch_pfit.pos = (x << 16) | y; |
166 | pipe_config->pch_pfit.size = (width << 16) | height; | |
fd4daa9c | 167 | pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; |
1d8e1c75 | 168 | } |
a9573556 | 169 | |
2dd24552 JB |
170 | static void |
171 | centre_horizontally(struct drm_display_mode *mode, | |
172 | int width) | |
173 | { | |
174 | u32 border, sync_pos, blank_width, sync_width; | |
175 | ||
176 | /* keep the hsync and hblank widths constant */ | |
177 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; | |
178 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; | |
179 | sync_pos = (blank_width - sync_width + 1) / 2; | |
180 | ||
181 | border = (mode->hdisplay - width + 1) / 2; | |
182 | border += border & 1; /* make the border even */ | |
183 | ||
184 | mode->crtc_hdisplay = width; | |
185 | mode->crtc_hblank_start = width + border; | |
186 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; | |
187 | ||
188 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; | |
189 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; | |
190 | } | |
191 | ||
192 | static void | |
193 | centre_vertically(struct drm_display_mode *mode, | |
194 | int height) | |
195 | { | |
196 | u32 border, sync_pos, blank_width, sync_width; | |
197 | ||
198 | /* keep the vsync and vblank widths constant */ | |
199 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; | |
200 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; | |
201 | sync_pos = (blank_width - sync_width + 1) / 2; | |
202 | ||
203 | border = (mode->vdisplay - height + 1) / 2; | |
204 | ||
205 | mode->crtc_vdisplay = height; | |
206 | mode->crtc_vblank_start = height + border; | |
207 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; | |
208 | ||
209 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; | |
210 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; | |
211 | } | |
212 | ||
213 | static inline u32 panel_fitter_scaling(u32 source, u32 target) | |
214 | { | |
215 | /* | |
216 | * Floating point operation is not supported. So the FACTOR | |
217 | * is defined, which can avoid the floating point computation | |
218 | * when calculating the panel ratio. | |
219 | */ | |
220 | #define ACCURACY 12 | |
221 | #define FACTOR (1 << ACCURACY) | |
222 | u32 ratio = source * FACTOR / target; | |
223 | return (FACTOR * ratio + FACTOR/2) / FACTOR; | |
224 | } | |
225 | ||
9084e7d2 DV |
226 | static void i965_scale_aspect(struct intel_crtc_config *pipe_config, |
227 | u32 *pfit_control) | |
228 | { | |
229 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
230 | u32 scaled_width = adjusted_mode->hdisplay * | |
231 | pipe_config->pipe_src_h; | |
232 | u32 scaled_height = pipe_config->pipe_src_w * | |
233 | adjusted_mode->vdisplay; | |
234 | ||
235 | /* 965+ is easy, it does everything in hw */ | |
236 | if (scaled_width > scaled_height) | |
237 | *pfit_control |= PFIT_ENABLE | | |
238 | PFIT_SCALING_PILLAR; | |
239 | else if (scaled_width < scaled_height) | |
240 | *pfit_control |= PFIT_ENABLE | | |
241 | PFIT_SCALING_LETTER; | |
242 | else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w) | |
243 | *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; | |
244 | } | |
245 | ||
246 | static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config, | |
247 | u32 *pfit_control, u32 *pfit_pgm_ratios, | |
248 | u32 *border) | |
249 | { | |
250 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
251 | u32 scaled_width = adjusted_mode->hdisplay * | |
252 | pipe_config->pipe_src_h; | |
253 | u32 scaled_height = pipe_config->pipe_src_w * | |
254 | adjusted_mode->vdisplay; | |
255 | u32 bits; | |
256 | ||
257 | /* | |
258 | * For earlier chips we have to calculate the scaling | |
259 | * ratio by hand and program it into the | |
260 | * PFIT_PGM_RATIO register | |
261 | */ | |
262 | if (scaled_width > scaled_height) { /* pillar */ | |
263 | centre_horizontally(adjusted_mode, | |
264 | scaled_height / | |
265 | pipe_config->pipe_src_h); | |
266 | ||
267 | *border = LVDS_BORDER_ENABLE; | |
268 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) { | |
269 | bits = panel_fitter_scaling(pipe_config->pipe_src_h, | |
270 | adjusted_mode->vdisplay); | |
271 | ||
272 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
273 | bits << PFIT_VERT_SCALE_SHIFT); | |
274 | *pfit_control |= (PFIT_ENABLE | | |
275 | VERT_INTERP_BILINEAR | | |
276 | HORIZ_INTERP_BILINEAR); | |
277 | } | |
278 | } else if (scaled_width < scaled_height) { /* letter */ | |
279 | centre_vertically(adjusted_mode, | |
280 | scaled_width / | |
281 | pipe_config->pipe_src_w); | |
282 | ||
283 | *border = LVDS_BORDER_ENABLE; | |
284 | if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
285 | bits = panel_fitter_scaling(pipe_config->pipe_src_w, | |
286 | adjusted_mode->hdisplay); | |
287 | ||
288 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
289 | bits << PFIT_VERT_SCALE_SHIFT); | |
290 | *pfit_control |= (PFIT_ENABLE | | |
291 | VERT_INTERP_BILINEAR | | |
292 | HORIZ_INTERP_BILINEAR); | |
293 | } | |
294 | } else { | |
295 | /* Aspects match, Let hw scale both directions */ | |
296 | *pfit_control |= (PFIT_ENABLE | | |
297 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | |
298 | VERT_INTERP_BILINEAR | | |
299 | HORIZ_INTERP_BILINEAR); | |
300 | } | |
301 | } | |
302 | ||
2dd24552 JB |
303 | void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, |
304 | struct intel_crtc_config *pipe_config, | |
305 | int fitting_mode) | |
306 | { | |
307 | struct drm_device *dev = intel_crtc->base.dev; | |
2dd24552 | 308 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
37327abd | 309 | struct drm_display_mode *adjusted_mode; |
2dd24552 | 310 | |
2dd24552 JB |
311 | adjusted_mode = &pipe_config->adjusted_mode; |
312 | ||
313 | /* Native modes don't need fitting */ | |
37327abd VS |
314 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
315 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
2dd24552 JB |
316 | goto out; |
317 | ||
318 | switch (fitting_mode) { | |
319 | case DRM_MODE_SCALE_CENTER: | |
320 | /* | |
321 | * For centered modes, we have to calculate border widths & | |
322 | * heights and modify the values programmed into the CRTC. | |
323 | */ | |
37327abd VS |
324 | centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); |
325 | centre_vertically(adjusted_mode, pipe_config->pipe_src_h); | |
2dd24552 JB |
326 | border = LVDS_BORDER_ENABLE; |
327 | break; | |
328 | case DRM_MODE_SCALE_ASPECT: | |
329 | /* Scale but preserve the aspect ratio */ | |
9084e7d2 DV |
330 | if (INTEL_INFO(dev)->gen >= 4) |
331 | i965_scale_aspect(pipe_config, &pfit_control); | |
332 | else | |
333 | i9xx_scale_aspect(pipe_config, &pfit_control, | |
334 | &pfit_pgm_ratios, &border); | |
2dd24552 | 335 | break; |
2dd24552 JB |
336 | case DRM_MODE_SCALE_FULLSCREEN: |
337 | /* | |
338 | * Full scaling, even if it changes the aspect ratio. | |
339 | * Fortunately this is all done for us in hw. | |
340 | */ | |
37327abd VS |
341 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay || |
342 | pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
2dd24552 JB |
343 | pfit_control |= PFIT_ENABLE; |
344 | if (INTEL_INFO(dev)->gen >= 4) | |
345 | pfit_control |= PFIT_SCALING_AUTO; | |
346 | else | |
347 | pfit_control |= (VERT_AUTO_SCALE | | |
348 | VERT_INTERP_BILINEAR | | |
349 | HORIZ_AUTO_SCALE | | |
350 | HORIZ_INTERP_BILINEAR); | |
351 | } | |
352 | break; | |
ab3e67f4 JB |
353 | default: |
354 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
355 | return; | |
2dd24552 JB |
356 | } |
357 | ||
358 | /* 965+ wants fuzzy fitting */ | |
359 | /* FIXME: handle multiple panels by failing gracefully */ | |
360 | if (INTEL_INFO(dev)->gen >= 4) | |
361 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | |
362 | PFIT_FILTER_FUZZY); | |
363 | ||
364 | out: | |
365 | if ((pfit_control & PFIT_ENABLE) == 0) { | |
366 | pfit_control = 0; | |
367 | pfit_pgm_ratios = 0; | |
368 | } | |
369 | ||
6b89cdde DV |
370 | /* Make sure pre-965 set dither correctly for 18bpp panels. */ |
371 | if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) | |
372 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
373 | ||
2deefda5 DV |
374 | pipe_config->gmch_pfit.control = pfit_control; |
375 | pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; | |
68fc8742 | 376 | pipe_config->gmch_pfit.lvds_border_bits = border; |
2dd24552 JB |
377 | } |
378 | ||
525997e0 JN |
379 | enum drm_connector_status |
380 | intel_panel_detect(struct drm_device *dev) | |
381 | { | |
382 | struct drm_i915_private *dev_priv = dev->dev_private; | |
383 | ||
384 | /* Assume that the BIOS does not lie through the OpRegion... */ | |
385 | if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) { | |
386 | return ioread32(dev_priv->opregion.lid_state) & 0x1 ? | |
387 | connector_status_connected : | |
388 | connector_status_disconnected; | |
389 | } | |
390 | ||
391 | switch (i915.panel_ignore_lid) { | |
392 | case -2: | |
393 | return connector_status_connected; | |
394 | case -1: | |
395 | return connector_status_disconnected; | |
396 | default: | |
397 | return connector_status_unknown; | |
398 | } | |
399 | } | |
400 | ||
6dda730e JN |
401 | /** |
402 | * scale - scale values from one range to another | |
403 | * | |
404 | * @source_val: value in range [@source_min..@source_max] | |
405 | * | |
406 | * Return @source_val in range [@source_min..@source_max] scaled to range | |
407 | * [@target_min..@target_max]. | |
408 | */ | |
409 | static uint32_t scale(uint32_t source_val, | |
410 | uint32_t source_min, uint32_t source_max, | |
411 | uint32_t target_min, uint32_t target_max) | |
412 | { | |
413 | uint64_t target_val; | |
414 | ||
415 | WARN_ON(source_min > source_max); | |
416 | WARN_ON(target_min > target_max); | |
417 | ||
418 | /* defensive */ | |
419 | source_val = clamp(source_val, source_min, source_max); | |
420 | ||
421 | /* avoid overflows */ | |
673e7bbd AE |
422 | target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) * |
423 | (target_max - target_min), source_max - source_min); | |
6dda730e JN |
424 | target_val += target_min; |
425 | ||
426 | return target_val; | |
427 | } | |
428 | ||
429 | /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ | |
430 | static inline u32 scale_user_to_hw(struct intel_connector *connector, | |
431 | u32 user_level, u32 user_max) | |
432 | { | |
433 | struct intel_panel *panel = &connector->panel; | |
434 | ||
435 | return scale(user_level, 0, user_max, | |
436 | panel->backlight.min, panel->backlight.max); | |
437 | } | |
438 | ||
439 | /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result | |
440 | * to [hw_min..hw_max]. */ | |
441 | static inline u32 clamp_user_to_hw(struct intel_connector *connector, | |
442 | u32 user_level, u32 user_max) | |
443 | { | |
444 | struct intel_panel *panel = &connector->panel; | |
445 | u32 hw_level; | |
446 | ||
447 | hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); | |
448 | hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); | |
449 | ||
450 | return hw_level; | |
451 | } | |
452 | ||
453 | /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ | |
454 | static inline u32 scale_hw_to_user(struct intel_connector *connector, | |
455 | u32 hw_level, u32 user_max) | |
456 | { | |
457 | struct intel_panel *panel = &connector->panel; | |
458 | ||
459 | return scale(hw_level, panel->backlight.min, panel->backlight.max, | |
460 | 0, user_max); | |
461 | } | |
462 | ||
7bd688cd JN |
463 | static u32 intel_panel_compute_brightness(struct intel_connector *connector, |
464 | u32 val) | |
7bd90909 | 465 | { |
7bd688cd | 466 | struct drm_device *dev = connector->base.dev; |
4dca20ef | 467 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 JN |
468 | struct intel_panel *panel = &connector->panel; |
469 | ||
470 | WARN_ON(panel->backlight.max == 0); | |
4dca20ef | 471 | |
d330a953 | 472 | if (i915.invert_brightness < 0) |
4dca20ef CE |
473 | return val; |
474 | ||
d330a953 | 475 | if (i915.invert_brightness > 0 || |
d6540632 | 476 | dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
f91c15e0 | 477 | return panel->backlight.max - val; |
d6540632 | 478 | } |
7bd90909 CE |
479 | |
480 | return val; | |
481 | } | |
482 | ||
96ab4c70 | 483 | static u32 bdw_get_backlight(struct intel_connector *connector) |
0b0b053a | 484 | { |
96ab4c70 | 485 | struct drm_device *dev = connector->base.dev; |
bfd7590d | 486 | struct drm_i915_private *dev_priv = dev->dev_private; |
0b0b053a | 487 | |
96ab4c70 DV |
488 | return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; |
489 | } | |
07bf139b | 490 | |
7bd688cd | 491 | static u32 pch_get_backlight(struct intel_connector *connector) |
a9573556 | 492 | { |
7bd688cd | 493 | struct drm_device *dev = connector->base.dev; |
a9573556 | 494 | struct drm_i915_private *dev_priv = dev->dev_private; |
8ba2d185 | 495 | |
7bd688cd JN |
496 | return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
497 | } | |
a9573556 | 498 | |
7bd688cd JN |
499 | static u32 i9xx_get_backlight(struct intel_connector *connector) |
500 | { | |
501 | struct drm_device *dev = connector->base.dev; | |
502 | struct drm_i915_private *dev_priv = dev->dev_private; | |
636baebf | 503 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 504 | u32 val; |
07bf139b | 505 | |
7bd688cd JN |
506 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
507 | if (INTEL_INFO(dev)->gen < 4) | |
508 | val >>= 1; | |
ba3820ad | 509 | |
636baebf | 510 | if (panel->backlight.combination_mode) { |
7bd688cd | 511 | u8 lbpc; |
ba3820ad | 512 | |
7bd688cd JN |
513 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); |
514 | val *= lbpc; | |
a9573556 CW |
515 | } |
516 | ||
7bd688cd JN |
517 | return val; |
518 | } | |
519 | ||
520 | static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) | |
521 | { | |
522 | struct drm_i915_private *dev_priv = dev->dev_private; | |
523 | ||
23ec0a88 VS |
524 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
525 | return 0; | |
526 | ||
7bd688cd JN |
527 | return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; |
528 | } | |
529 | ||
530 | static u32 vlv_get_backlight(struct intel_connector *connector) | |
531 | { | |
532 | struct drm_device *dev = connector->base.dev; | |
533 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
534 | ||
535 | return _vlv_get_backlight(dev, pipe); | |
536 | } | |
537 | ||
538 | static u32 intel_panel_get_backlight(struct intel_connector *connector) | |
539 | { | |
540 | struct drm_device *dev = connector->base.dev; | |
541 | struct drm_i915_private *dev_priv = dev->dev_private; | |
2d72f6c7 VS |
542 | struct intel_panel *panel = &connector->panel; |
543 | u32 val = 0; | |
7bd688cd | 544 | |
07f11d49 | 545 | mutex_lock(&dev_priv->backlight_lock); |
7bd688cd | 546 | |
2d72f6c7 VS |
547 | if (panel->backlight.enabled) { |
548 | val = dev_priv->display.get_backlight(connector); | |
549 | val = intel_panel_compute_brightness(connector, val); | |
550 | } | |
8ba2d185 | 551 | |
07f11d49 | 552 | mutex_unlock(&dev_priv->backlight_lock); |
8ba2d185 | 553 | |
a9573556 CW |
554 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
555 | return val; | |
556 | } | |
557 | ||
96ab4c70 | 558 | static void bdw_set_backlight(struct intel_connector *connector, u32 level) |
f8e10062 | 559 | { |
96ab4c70 | 560 | struct drm_device *dev = connector->base.dev; |
f8e10062 BW |
561 | struct drm_i915_private *dev_priv = dev->dev_private; |
562 | u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
563 | I915_WRITE(BLC_PWM_PCH_CTL2, val | level); | |
564 | } | |
565 | ||
7bd688cd | 566 | static void pch_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 567 | { |
7bd688cd | 568 | struct drm_device *dev = connector->base.dev; |
a9573556 | 569 | struct drm_i915_private *dev_priv = dev->dev_private; |
7bd688cd JN |
570 | u32 tmp; |
571 | ||
572 | tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
573 | I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); | |
a9573556 CW |
574 | } |
575 | ||
7bd688cd | 576 | static void i9xx_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 577 | { |
7bd688cd | 578 | struct drm_device *dev = connector->base.dev; |
a9573556 | 579 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 | 580 | struct intel_panel *panel = &connector->panel; |
b329b328 | 581 | u32 tmp, mask; |
ba3820ad | 582 | |
f91c15e0 JN |
583 | WARN_ON(panel->backlight.max == 0); |
584 | ||
636baebf | 585 | if (panel->backlight.combination_mode) { |
ba3820ad TI |
586 | u8 lbpc; |
587 | ||
f91c15e0 | 588 | lbpc = level * 0xfe / panel->backlight.max + 1; |
ba3820ad TI |
589 | level /= lbpc; |
590 | pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); | |
591 | } | |
592 | ||
b329b328 JN |
593 | if (IS_GEN4(dev)) { |
594 | mask = BACKLIGHT_DUTY_CYCLE_MASK; | |
595 | } else { | |
a9573556 | 596 | level <<= 1; |
b329b328 JN |
597 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
598 | } | |
7bd688cd | 599 | |
b329b328 | 600 | tmp = I915_READ(BLC_PWM_CTL) & ~mask; |
7bd688cd JN |
601 | I915_WRITE(BLC_PWM_CTL, tmp | level); |
602 | } | |
603 | ||
604 | static void vlv_set_backlight(struct intel_connector *connector, u32 level) | |
605 | { | |
606 | struct drm_device *dev = connector->base.dev; | |
607 | struct drm_i915_private *dev_priv = dev->dev_private; | |
608 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
609 | u32 tmp; | |
610 | ||
23ec0a88 VS |
611 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
612 | return; | |
613 | ||
7bd688cd JN |
614 | tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
615 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); | |
616 | } | |
617 | ||
618 | static void | |
619 | intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) | |
620 | { | |
621 | struct drm_device *dev = connector->base.dev; | |
622 | struct drm_i915_private *dev_priv = dev->dev_private; | |
623 | ||
624 | DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); | |
625 | ||
626 | level = intel_panel_compute_brightness(connector, level); | |
627 | dev_priv->display.set_backlight(connector, level); | |
a9573556 | 628 | } |
47356eb6 | 629 | |
6dda730e JN |
630 | /* set backlight brightness to level in range [0..max], scaling wrt hw min */ |
631 | static void intel_panel_set_backlight(struct intel_connector *connector, | |
632 | u32 user_level, u32 user_max) | |
47356eb6 | 633 | { |
752aa88a | 634 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 635 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 636 | struct intel_panel *panel = &connector->panel; |
6dda730e | 637 | u32 hw_level; |
8ba2d185 | 638 | |
260d8f98 | 639 | if (!panel->backlight.present) |
752aa88a JB |
640 | return; |
641 | ||
07f11d49 | 642 | mutex_lock(&dev_priv->backlight_lock); |
d6540632 | 643 | |
f91c15e0 | 644 | WARN_ON(panel->backlight.max == 0); |
d6540632 | 645 | |
6dda730e JN |
646 | hw_level = scale_user_to_hw(connector, user_level, user_max); |
647 | panel->backlight.level = hw_level; | |
648 | ||
649 | if (panel->backlight.enabled) | |
650 | intel_panel_actually_set_backlight(connector, hw_level); | |
651 | ||
07f11d49 | 652 | mutex_unlock(&dev_priv->backlight_lock); |
6dda730e JN |
653 | } |
654 | ||
655 | /* set backlight brightness to level in range [0..max], assuming hw min is | |
656 | * respected. | |
657 | */ | |
658 | void intel_panel_set_backlight_acpi(struct intel_connector *connector, | |
659 | u32 user_level, u32 user_max) | |
660 | { | |
661 | struct drm_device *dev = connector->base.dev; | |
662 | struct drm_i915_private *dev_priv = dev->dev_private; | |
663 | struct intel_panel *panel = &connector->panel; | |
664 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
665 | u32 hw_level; | |
6dda730e | 666 | |
260d8f98 VS |
667 | /* |
668 | * INVALID_PIPE may occur during driver init because | |
669 | * connection_mutex isn't held across the entire backlight | |
670 | * setup + modeset readout, and the BIOS can issue the | |
671 | * requests at any time. | |
672 | */ | |
6dda730e JN |
673 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
674 | return; | |
675 | ||
07f11d49 | 676 | mutex_lock(&dev_priv->backlight_lock); |
6dda730e JN |
677 | |
678 | WARN_ON(panel->backlight.max == 0); | |
679 | ||
680 | hw_level = clamp_user_to_hw(connector, user_level, user_max); | |
681 | panel->backlight.level = hw_level; | |
47356eb6 | 682 | |
58c68779 | 683 | if (panel->backlight.device) |
6dda730e JN |
684 | panel->backlight.device->props.brightness = |
685 | scale_hw_to_user(connector, | |
686 | panel->backlight.level, | |
687 | panel->backlight.device->props.max_brightness); | |
b6b3ba5b | 688 | |
58c68779 | 689 | if (panel->backlight.enabled) |
6dda730e | 690 | intel_panel_actually_set_backlight(connector, hw_level); |
f91c15e0 | 691 | |
07f11d49 | 692 | mutex_unlock(&dev_priv->backlight_lock); |
f52c619a TI |
693 | } |
694 | ||
7bd688cd JN |
695 | static void pch_disable_backlight(struct intel_connector *connector) |
696 | { | |
697 | struct drm_device *dev = connector->base.dev; | |
698 | struct drm_i915_private *dev_priv = dev->dev_private; | |
699 | u32 tmp; | |
700 | ||
3bd712e5 JN |
701 | intel_panel_actually_set_backlight(connector, 0); |
702 | ||
7bd688cd JN |
703 | tmp = I915_READ(BLC_PWM_CPU_CTL2); |
704 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
705 | ||
706 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
707 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
708 | } | |
709 | ||
3bd712e5 JN |
710 | static void i9xx_disable_backlight(struct intel_connector *connector) |
711 | { | |
712 | intel_panel_actually_set_backlight(connector, 0); | |
713 | } | |
714 | ||
7bd688cd JN |
715 | static void i965_disable_backlight(struct intel_connector *connector) |
716 | { | |
717 | struct drm_device *dev = connector->base.dev; | |
718 | struct drm_i915_private *dev_priv = dev->dev_private; | |
719 | u32 tmp; | |
720 | ||
3bd712e5 JN |
721 | intel_panel_actually_set_backlight(connector, 0); |
722 | ||
7bd688cd JN |
723 | tmp = I915_READ(BLC_PWM_CTL2); |
724 | I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); | |
725 | } | |
726 | ||
727 | static void vlv_disable_backlight(struct intel_connector *connector) | |
728 | { | |
729 | struct drm_device *dev = connector->base.dev; | |
730 | struct drm_i915_private *dev_priv = dev->dev_private; | |
731 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
732 | u32 tmp; | |
733 | ||
23ec0a88 VS |
734 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
735 | return; | |
736 | ||
3bd712e5 JN |
737 | intel_panel_actually_set_backlight(connector, 0); |
738 | ||
7bd688cd JN |
739 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
740 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); | |
741 | } | |
742 | ||
752aa88a | 743 | void intel_panel_disable_backlight(struct intel_connector *connector) |
f52c619a | 744 | { |
752aa88a | 745 | struct drm_device *dev = connector->base.dev; |
f52c619a | 746 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 747 | struct intel_panel *panel = &connector->panel; |
8ba2d185 | 748 | |
260d8f98 | 749 | if (!panel->backlight.present) |
752aa88a JB |
750 | return; |
751 | ||
3f577573 JN |
752 | /* |
753 | * Do not disable backlight on the vgaswitcheroo path. When switching | |
754 | * away from i915, the other client may depend on i915 to handle the | |
755 | * backlight. This will leave the backlight on unnecessarily when | |
756 | * another client is not activated. | |
757 | */ | |
758 | if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { | |
759 | DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); | |
760 | return; | |
761 | } | |
762 | ||
07f11d49 | 763 | mutex_lock(&dev_priv->backlight_lock); |
47356eb6 | 764 | |
ab656bb9 JN |
765 | if (panel->backlight.device) |
766 | panel->backlight.device->props.power = FB_BLANK_POWERDOWN; | |
58c68779 | 767 | panel->backlight.enabled = false; |
3bd712e5 | 768 | dev_priv->display.disable_backlight(connector); |
24ded204 | 769 | |
07f11d49 | 770 | mutex_unlock(&dev_priv->backlight_lock); |
7bd688cd | 771 | } |
24ded204 | 772 | |
96ab4c70 DV |
773 | static void bdw_enable_backlight(struct intel_connector *connector) |
774 | { | |
775 | struct drm_device *dev = connector->base.dev; | |
776 | struct drm_i915_private *dev_priv = dev->dev_private; | |
777 | struct intel_panel *panel = &connector->panel; | |
778 | u32 pch_ctl1, pch_ctl2; | |
779 | ||
780 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
781 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
782 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
783 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
784 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
785 | } | |
24ded204 | 786 | |
96ab4c70 DV |
787 | pch_ctl2 = panel->backlight.max << 16; |
788 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
a4f32fc3 | 789 | |
96ab4c70 DV |
790 | pch_ctl1 = 0; |
791 | if (panel->backlight.active_low_pwm) | |
792 | pch_ctl1 |= BLM_PCH_POLARITY; | |
8ba2d185 | 793 | |
e6b2627c JN |
794 | /* After LPT, override is the default. */ |
795 | if (HAS_PCH_LPT(dev_priv)) | |
796 | pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; | |
96ab4c70 DV |
797 | |
798 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
799 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
800 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
801 | ||
802 | /* This won't stick until the above enable. */ | |
803 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
47356eb6 CW |
804 | } |
805 | ||
7bd688cd JN |
806 | static void pch_enable_backlight(struct intel_connector *connector) |
807 | { | |
808 | struct drm_device *dev = connector->base.dev; | |
809 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 810 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
811 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
812 | enum transcoder cpu_transcoder = | |
813 | intel_pipe_to_cpu_transcoder(dev_priv, pipe); | |
b35684b8 | 814 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
7bd688cd | 815 | |
b35684b8 JN |
816 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
817 | if (cpu_ctl2 & BLM_PWM_ENABLE) { | |
813008cd | 818 | DRM_DEBUG_KMS("cpu backlight already enabled\n"); |
b35684b8 JN |
819 | cpu_ctl2 &= ~BLM_PWM_ENABLE; |
820 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
821 | } | |
7bd688cd | 822 | |
b35684b8 JN |
823 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
824 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
825 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
826 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
827 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
828 | } | |
7bd688cd JN |
829 | |
830 | if (cpu_transcoder == TRANSCODER_EDP) | |
b35684b8 | 831 | cpu_ctl2 = BLM_TRANSCODER_EDP; |
7bd688cd | 832 | else |
b35684b8 JN |
833 | cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
834 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
7bd688cd | 835 | POSTING_READ(BLC_PWM_CPU_CTL2); |
b35684b8 | 836 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); |
3bd712e5 | 837 | |
b35684b8 | 838 | /* This won't stick until the above enable. */ |
3bd712e5 | 839 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
b35684b8 JN |
840 | |
841 | pch_ctl2 = panel->backlight.max << 16; | |
842 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
843 | ||
b35684b8 JN |
844 | pch_ctl1 = 0; |
845 | if (panel->backlight.active_low_pwm) | |
846 | pch_ctl1 |= BLM_PCH_POLARITY; | |
96ab4c70 | 847 | |
b35684b8 JN |
848 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); |
849 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
850 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
3bd712e5 JN |
851 | } |
852 | ||
853 | static void i9xx_enable_backlight(struct intel_connector *connector) | |
854 | { | |
b35684b8 JN |
855 | struct drm_device *dev = connector->base.dev; |
856 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 857 | struct intel_panel *panel = &connector->panel; |
b35684b8 JN |
858 | u32 ctl, freq; |
859 | ||
860 | ctl = I915_READ(BLC_PWM_CTL); | |
861 | if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { | |
813008cd | 862 | DRM_DEBUG_KMS("backlight already enabled\n"); |
b35684b8 JN |
863 | I915_WRITE(BLC_PWM_CTL, 0); |
864 | } | |
3bd712e5 | 865 | |
b35684b8 JN |
866 | freq = panel->backlight.max; |
867 | if (panel->backlight.combination_mode) | |
868 | freq /= 0xff; | |
869 | ||
870 | ctl = freq << 17; | |
b6ab66aa | 871 | if (panel->backlight.combination_mode) |
b35684b8 JN |
872 | ctl |= BLM_LEGACY_MODE; |
873 | if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) | |
874 | ctl |= BLM_POLARITY_PNV; | |
875 | ||
876 | I915_WRITE(BLC_PWM_CTL, ctl); | |
877 | POSTING_READ(BLC_PWM_CTL); | |
878 | ||
879 | /* XXX: combine this into above write? */ | |
3bd712e5 | 880 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
7bd688cd | 881 | } |
8ba2d185 | 882 | |
7bd688cd JN |
883 | static void i965_enable_backlight(struct intel_connector *connector) |
884 | { | |
885 | struct drm_device *dev = connector->base.dev; | |
886 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 887 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 888 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 889 | u32 ctl, ctl2, freq; |
7bd688cd | 890 | |
b35684b8 JN |
891 | ctl2 = I915_READ(BLC_PWM_CTL2); |
892 | if (ctl2 & BLM_PWM_ENABLE) { | |
813008cd | 893 | DRM_DEBUG_KMS("backlight already enabled\n"); |
b35684b8 JN |
894 | ctl2 &= ~BLM_PWM_ENABLE; |
895 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
896 | } | |
7bd688cd | 897 | |
b35684b8 JN |
898 | freq = panel->backlight.max; |
899 | if (panel->backlight.combination_mode) | |
900 | freq /= 0xff; | |
7bd688cd | 901 | |
b35684b8 JN |
902 | ctl = freq << 16; |
903 | I915_WRITE(BLC_PWM_CTL, ctl); | |
3bd712e5 | 904 | |
b35684b8 JN |
905 | ctl2 = BLM_PIPE(pipe); |
906 | if (panel->backlight.combination_mode) | |
907 | ctl2 |= BLM_COMBINATION_MODE; | |
908 | if (panel->backlight.active_low_pwm) | |
909 | ctl2 |= BLM_POLARITY_I965; | |
910 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
911 | POSTING_READ(BLC_PWM_CTL2); | |
912 | I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); | |
2e7eeeb5 JN |
913 | |
914 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd JN |
915 | } |
916 | ||
917 | static void vlv_enable_backlight(struct intel_connector *connector) | |
918 | { | |
919 | struct drm_device *dev = connector->base.dev; | |
920 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 921 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 922 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 923 | u32 ctl, ctl2; |
7bd688cd | 924 | |
23ec0a88 VS |
925 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
926 | return; | |
927 | ||
b35684b8 JN |
928 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
929 | if (ctl2 & BLM_PWM_ENABLE) { | |
813008cd | 930 | DRM_DEBUG_KMS("backlight already enabled\n"); |
b35684b8 JN |
931 | ctl2 &= ~BLM_PWM_ENABLE; |
932 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
933 | } | |
7bd688cd | 934 | |
b35684b8 JN |
935 | ctl = panel->backlight.max << 16; |
936 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); | |
7bd688cd | 937 | |
b35684b8 JN |
938 | /* XXX: combine this into above write? */ |
939 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd | 940 | |
b35684b8 JN |
941 | ctl2 = 0; |
942 | if (panel->backlight.active_low_pwm) | |
943 | ctl2 |= BLM_POLARITY_I965; | |
944 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
7bd688cd | 945 | POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); |
b35684b8 | 946 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); |
47356eb6 CW |
947 | } |
948 | ||
752aa88a | 949 | void intel_panel_enable_backlight(struct intel_connector *connector) |
47356eb6 | 950 | { |
752aa88a | 951 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 952 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 953 | struct intel_panel *panel = &connector->panel; |
752aa88a | 954 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 | 955 | |
260d8f98 | 956 | if (!panel->backlight.present) |
752aa88a JB |
957 | return; |
958 | ||
6f2bcceb | 959 | DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); |
540b5d02 | 960 | |
07f11d49 | 961 | mutex_lock(&dev_priv->backlight_lock); |
47356eb6 | 962 | |
f91c15e0 JN |
963 | WARN_ON(panel->backlight.max == 0); |
964 | ||
58c68779 | 965 | if (panel->backlight.level == 0) { |
f91c15e0 | 966 | panel->backlight.level = panel->backlight.max; |
58c68779 JN |
967 | if (panel->backlight.device) |
968 | panel->backlight.device->props.brightness = | |
6dda730e JN |
969 | scale_hw_to_user(connector, |
970 | panel->backlight.level, | |
971 | panel->backlight.device->props.max_brightness); | |
b6b3ba5b | 972 | } |
47356eb6 | 973 | |
3bd712e5 | 974 | dev_priv->display.enable_backlight(connector); |
58c68779 | 975 | panel->backlight.enabled = true; |
ab656bb9 JN |
976 | if (panel->backlight.device) |
977 | panel->backlight.device->props.power = FB_BLANK_UNBLANK; | |
8ba2d185 | 978 | |
07f11d49 | 979 | mutex_unlock(&dev_priv->backlight_lock); |
47356eb6 CW |
980 | } |
981 | ||
912e8b12 | 982 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
db31af1d | 983 | static int intel_backlight_device_update_status(struct backlight_device *bd) |
aaa6fd2a | 984 | { |
752aa88a | 985 | struct intel_connector *connector = bl_get_data(bd); |
ab656bb9 | 986 | struct intel_panel *panel = &connector->panel; |
752aa88a JB |
987 | struct drm_device *dev = connector->base.dev; |
988 | ||
51fd371b | 989 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
540b5d02 CW |
990 | DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
991 | bd->props.brightness, bd->props.max_brightness); | |
752aa88a | 992 | intel_panel_set_backlight(connector, bd->props.brightness, |
d6540632 | 993 | bd->props.max_brightness); |
ab656bb9 JN |
994 | |
995 | /* | |
996 | * Allow flipping bl_power as a sub-state of enabled. Sadly the | |
997 | * backlight class device does not make it easy to to differentiate | |
998 | * between callbacks for brightness and bl_power, so our backlight_power | |
999 | * callback needs to take this into account. | |
1000 | */ | |
1001 | if (panel->backlight.enabled) { | |
1002 | if (panel->backlight_power) { | |
e6755fb7 JN |
1003 | bool enable = bd->props.power == FB_BLANK_UNBLANK && |
1004 | bd->props.brightness != 0; | |
ab656bb9 JN |
1005 | panel->backlight_power(connector, enable); |
1006 | } | |
1007 | } else { | |
1008 | bd->props.power = FB_BLANK_POWERDOWN; | |
1009 | } | |
1010 | ||
51fd371b | 1011 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
aaa6fd2a MG |
1012 | return 0; |
1013 | } | |
1014 | ||
db31af1d | 1015 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
aaa6fd2a | 1016 | { |
752aa88a JB |
1017 | struct intel_connector *connector = bl_get_data(bd); |
1018 | struct drm_device *dev = connector->base.dev; | |
c8c8fb33 | 1019 | struct drm_i915_private *dev_priv = dev->dev_private; |
6dda730e | 1020 | u32 hw_level; |
7bd688cd | 1021 | int ret; |
752aa88a | 1022 | |
c8c8fb33 | 1023 | intel_runtime_pm_get(dev_priv); |
51fd371b | 1024 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
6dda730e JN |
1025 | |
1026 | hw_level = intel_panel_get_backlight(connector); | |
1027 | ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); | |
1028 | ||
51fd371b | 1029 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
c8c8fb33 | 1030 | intel_runtime_pm_put(dev_priv); |
752aa88a | 1031 | |
7bd688cd | 1032 | return ret; |
aaa6fd2a MG |
1033 | } |
1034 | ||
db31af1d JN |
1035 | static const struct backlight_ops intel_backlight_device_ops = { |
1036 | .update_status = intel_backlight_device_update_status, | |
1037 | .get_brightness = intel_backlight_device_get_brightness, | |
aaa6fd2a MG |
1038 | }; |
1039 | ||
db31af1d | 1040 | static int intel_backlight_device_register(struct intel_connector *connector) |
aaa6fd2a | 1041 | { |
58c68779 | 1042 | struct intel_panel *panel = &connector->panel; |
aaa6fd2a | 1043 | struct backlight_properties props; |
aaa6fd2a | 1044 | |
58c68779 | 1045 | if (WARN_ON(panel->backlight.device)) |
dc652f90 JN |
1046 | return -ENODEV; |
1047 | ||
0962c3c9 VS |
1048 | if (!panel->backlight.present) |
1049 | return 0; | |
1050 | ||
6dda730e | 1051 | WARN_ON(panel->backlight.max == 0); |
7bd688cd | 1052 | |
af437cfd | 1053 | memset(&props, 0, sizeof(props)); |
aaa6fd2a | 1054 | props.type = BACKLIGHT_RAW; |
6dda730e JN |
1055 | |
1056 | /* | |
1057 | * Note: Everything should work even if the backlight device max | |
1058 | * presented to the userspace is arbitrarily chosen. | |
1059 | */ | |
7bd688cd | 1060 | props.max_brightness = panel->backlight.max; |
6dda730e JN |
1061 | props.brightness = scale_hw_to_user(connector, |
1062 | panel->backlight.level, | |
1063 | props.max_brightness); | |
58c68779 | 1064 | |
ab656bb9 JN |
1065 | if (panel->backlight.enabled) |
1066 | props.power = FB_BLANK_UNBLANK; | |
1067 | else | |
1068 | props.power = FB_BLANK_POWERDOWN; | |
1069 | ||
58c68779 JN |
1070 | /* |
1071 | * Note: using the same name independent of the connector prevents | |
1072 | * registration of multiple backlight devices in the driver. | |
1073 | */ | |
1074 | panel->backlight.device = | |
aaa6fd2a | 1075 | backlight_device_register("intel_backlight", |
db31af1d JN |
1076 | connector->base.kdev, |
1077 | connector, | |
1078 | &intel_backlight_device_ops, &props); | |
aaa6fd2a | 1079 | |
58c68779 | 1080 | if (IS_ERR(panel->backlight.device)) { |
aaa6fd2a | 1081 | DRM_ERROR("Failed to register backlight: %ld\n", |
58c68779 JN |
1082 | PTR_ERR(panel->backlight.device)); |
1083 | panel->backlight.device = NULL; | |
aaa6fd2a MG |
1084 | return -ENODEV; |
1085 | } | |
0962c3c9 VS |
1086 | |
1087 | DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", | |
1088 | connector->base.name); | |
1089 | ||
aaa6fd2a MG |
1090 | return 0; |
1091 | } | |
1092 | ||
db31af1d | 1093 | static void intel_backlight_device_unregister(struct intel_connector *connector) |
aaa6fd2a | 1094 | { |
58c68779 JN |
1095 | struct intel_panel *panel = &connector->panel; |
1096 | ||
1097 | if (panel->backlight.device) { | |
1098 | backlight_device_unregister(panel->backlight.device); | |
1099 | panel->backlight.device = NULL; | |
dc652f90 | 1100 | } |
aaa6fd2a | 1101 | } |
db31af1d JN |
1102 | #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
1103 | static int intel_backlight_device_register(struct intel_connector *connector) | |
1104 | { | |
1105 | return 0; | |
1106 | } | |
1107 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
1108 | { | |
1109 | } | |
1110 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
1111 | ||
f91c15e0 JN |
1112 | /* |
1113 | * Note: The setup hooks can't assume pipe is set! | |
1114 | * | |
1115 | * XXX: Query mode clock or hardware clock and program PWM modulation frequency | |
1116 | * appropriately when it's 0. Use VBT and/or sane defaults. | |
1117 | */ | |
6dda730e JN |
1118 | static u32 get_backlight_min_vbt(struct intel_connector *connector) |
1119 | { | |
1120 | struct drm_device *dev = connector->base.dev; | |
1121 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1122 | struct intel_panel *panel = &connector->panel; | |
e1c412e7 | 1123 | int min; |
6dda730e JN |
1124 | |
1125 | WARN_ON(panel->backlight.max == 0); | |
1126 | ||
e1c412e7 JN |
1127 | /* |
1128 | * XXX: If the vbt value is 255, it makes min equal to max, which leads | |
1129 | * to problems. There are such machines out there. Either our | |
1130 | * interpretation is wrong or the vbt has bogus data. Or both. Safeguard | |
1131 | * against this by letting the minimum be at most (arbitrarily chosen) | |
1132 | * 25% of the max. | |
1133 | */ | |
1134 | min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); | |
1135 | if (min != dev_priv->vbt.backlight.min_brightness) { | |
1136 | DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", | |
1137 | dev_priv->vbt.backlight.min_brightness, min); | |
1138 | } | |
1139 | ||
6dda730e | 1140 | /* vbt value is a coefficient in range [0..255] */ |
e1c412e7 | 1141 | return scale(min, 0, 255, 0, panel->backlight.max); |
6dda730e JN |
1142 | } |
1143 | ||
6517d273 | 1144 | static int bdw_setup_backlight(struct intel_connector *connector, enum pipe unused) |
aaa6fd2a | 1145 | { |
96ab4c70 | 1146 | struct drm_device *dev = connector->base.dev; |
aaa6fd2a | 1147 | struct drm_i915_private *dev_priv = dev->dev_private; |
96ab4c70 DV |
1148 | struct intel_panel *panel = &connector->panel; |
1149 | u32 pch_ctl1, pch_ctl2, val; | |
1150 | ||
1151 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
1152 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
1153 | ||
1154 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
1155 | panel->backlight.max = pch_ctl2 >> 16; | |
1156 | if (!panel->backlight.max) | |
1157 | return -ENODEV; | |
1158 | ||
6dda730e JN |
1159 | panel->backlight.min = get_backlight_min_vbt(connector); |
1160 | ||
96ab4c70 DV |
1161 | val = bdw_get_backlight(connector); |
1162 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1163 | ||
1164 | panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) && | |
1165 | panel->backlight.level != 0; | |
1166 | ||
1167 | return 0; | |
1168 | } | |
1169 | ||
6517d273 | 1170 | static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) |
7bd688cd | 1171 | { |
636baebf JN |
1172 | struct drm_device *dev = connector->base.dev; |
1173 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1174 | struct intel_panel *panel = &connector->panel; |
636baebf | 1175 | u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
7bd688cd | 1176 | |
636baebf JN |
1177 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
1178 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
1179 | ||
1180 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
1181 | panel->backlight.max = pch_ctl2 >> 16; | |
7bd688cd JN |
1182 | if (!panel->backlight.max) |
1183 | return -ENODEV; | |
1184 | ||
6dda730e JN |
1185 | panel->backlight.min = get_backlight_min_vbt(connector); |
1186 | ||
7bd688cd JN |
1187 | val = pch_get_backlight(connector); |
1188 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1189 | ||
636baebf JN |
1190 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
1191 | panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && | |
1192 | (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0; | |
1193 | ||
7bd688cd JN |
1194 | return 0; |
1195 | } | |
1196 | ||
6517d273 | 1197 | static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) |
7bd688cd | 1198 | { |
636baebf JN |
1199 | struct drm_device *dev = connector->base.dev; |
1200 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1201 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
1202 | u32 ctl, val; |
1203 | ||
1204 | ctl = I915_READ(BLC_PWM_CTL); | |
1205 | ||
b6ab66aa | 1206 | if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev)) |
636baebf JN |
1207 | panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; |
1208 | ||
1209 | if (IS_PINEVIEW(dev)) | |
1210 | panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; | |
1211 | ||
1212 | panel->backlight.max = ctl >> 17; | |
1213 | if (panel->backlight.combination_mode) | |
1214 | panel->backlight.max *= 0xff; | |
7bd688cd | 1215 | |
7bd688cd JN |
1216 | if (!panel->backlight.max) |
1217 | return -ENODEV; | |
1218 | ||
6dda730e JN |
1219 | panel->backlight.min = get_backlight_min_vbt(connector); |
1220 | ||
7bd688cd JN |
1221 | val = i9xx_get_backlight(connector); |
1222 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1223 | ||
636baebf JN |
1224 | panel->backlight.enabled = panel->backlight.level != 0; |
1225 | ||
7bd688cd JN |
1226 | return 0; |
1227 | } | |
1228 | ||
6517d273 | 1229 | static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) |
7bd688cd | 1230 | { |
636baebf JN |
1231 | struct drm_device *dev = connector->base.dev; |
1232 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 1233 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
1234 | u32 ctl, ctl2, val; |
1235 | ||
1236 | ctl2 = I915_READ(BLC_PWM_CTL2); | |
1237 | panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; | |
1238 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
1239 | ||
1240 | ctl = I915_READ(BLC_PWM_CTL); | |
1241 | panel->backlight.max = ctl >> 16; | |
1242 | if (panel->backlight.combination_mode) | |
1243 | panel->backlight.max *= 0xff; | |
7bd688cd | 1244 | |
7bd688cd JN |
1245 | if (!panel->backlight.max) |
1246 | return -ENODEV; | |
1247 | ||
6dda730e JN |
1248 | panel->backlight.min = get_backlight_min_vbt(connector); |
1249 | ||
7bd688cd JN |
1250 | val = i9xx_get_backlight(connector); |
1251 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1252 | ||
636baebf JN |
1253 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
1254 | panel->backlight.level != 0; | |
1255 | ||
7bd688cd JN |
1256 | return 0; |
1257 | } | |
1258 | ||
6517d273 | 1259 | static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) |
7bd688cd JN |
1260 | { |
1261 | struct drm_device *dev = connector->base.dev; | |
1262 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1263 | struct intel_panel *panel = &connector->panel; | |
6517d273 | 1264 | enum pipe p; |
636baebf | 1265 | u32 ctl, ctl2, val; |
7bd688cd | 1266 | |
6517d273 VS |
1267 | for_each_pipe(dev_priv, p) { |
1268 | u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(p)); | |
7bd688cd JN |
1269 | |
1270 | /* Skip if the modulation freq is already set */ | |
1271 | if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK) | |
1272 | continue; | |
1273 | ||
1274 | cur_val &= BACKLIGHT_DUTY_CYCLE_MASK; | |
6517d273 | 1275 | I915_WRITE(VLV_BLC_PWM_CTL(p), (0xf42 << 16) | |
7bd688cd JN |
1276 | cur_val); |
1277 | } | |
1278 | ||
6517d273 VS |
1279 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) |
1280 | return -ENODEV; | |
1281 | ||
1282 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
636baebf JN |
1283 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; |
1284 | ||
6517d273 | 1285 | ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); |
636baebf | 1286 | panel->backlight.max = ctl >> 16; |
7bd688cd JN |
1287 | if (!panel->backlight.max) |
1288 | return -ENODEV; | |
1289 | ||
6dda730e JN |
1290 | panel->backlight.min = get_backlight_min_vbt(connector); |
1291 | ||
6517d273 | 1292 | val = _vlv_get_backlight(dev, pipe); |
7bd688cd JN |
1293 | panel->backlight.level = intel_panel_compute_brightness(connector, val); |
1294 | ||
636baebf JN |
1295 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
1296 | panel->backlight.level != 0; | |
1297 | ||
7bd688cd JN |
1298 | return 0; |
1299 | } | |
1300 | ||
6517d273 | 1301 | int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) |
aaa6fd2a | 1302 | { |
db31af1d | 1303 | struct drm_device *dev = connector->dev; |
7bd688cd | 1304 | struct drm_i915_private *dev_priv = dev->dev_private; |
db31af1d | 1305 | struct intel_connector *intel_connector = to_intel_connector(connector); |
58c68779 | 1306 | struct intel_panel *panel = &intel_connector->panel; |
7bd688cd | 1307 | int ret; |
db31af1d | 1308 | |
c675949e | 1309 | if (!dev_priv->vbt.backlight.present) { |
9c72cc6f SD |
1310 | if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { |
1311 | DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); | |
1312 | } else { | |
1313 | DRM_DEBUG_KMS("no backlight present per VBT\n"); | |
1314 | return 0; | |
1315 | } | |
c675949e JN |
1316 | } |
1317 | ||
7bd688cd | 1318 | /* set level and max in panel struct */ |
07f11d49 | 1319 | mutex_lock(&dev_priv->backlight_lock); |
6517d273 | 1320 | ret = dev_priv->display.setup_backlight(intel_connector, pipe); |
07f11d49 | 1321 | mutex_unlock(&dev_priv->backlight_lock); |
7bd688cd JN |
1322 | |
1323 | if (ret) { | |
1324 | DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", | |
c23cc417 | 1325 | connector->name); |
7bd688cd JN |
1326 | return ret; |
1327 | } | |
db31af1d | 1328 | |
c91c9f32 JN |
1329 | panel->backlight.present = true; |
1330 | ||
0962c3c9 VS |
1331 | DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", |
1332 | connector->name, | |
c445b3b1 | 1333 | panel->backlight.enabled ? "enabled" : "disabled", |
0962c3c9 | 1334 | panel->backlight.level, panel->backlight.max); |
c445b3b1 | 1335 | |
aaa6fd2a MG |
1336 | return 0; |
1337 | } | |
1338 | ||
db31af1d | 1339 | void intel_panel_destroy_backlight(struct drm_connector *connector) |
aaa6fd2a | 1340 | { |
db31af1d | 1341 | struct intel_connector *intel_connector = to_intel_connector(connector); |
c91c9f32 | 1342 | struct intel_panel *panel = &intel_connector->panel; |
db31af1d | 1343 | |
c91c9f32 | 1344 | panel->backlight.present = false; |
aaa6fd2a | 1345 | } |
1d508706 | 1346 | |
7bd688cd JN |
1347 | /* Set up chip specific backlight functions */ |
1348 | void intel_panel_init_backlight_funcs(struct drm_device *dev) | |
1349 | { | |
1350 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1351 | ||
7879a7eb | 1352 | if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9)) { |
96ab4c70 DV |
1353 | dev_priv->display.setup_backlight = bdw_setup_backlight; |
1354 | dev_priv->display.enable_backlight = bdw_enable_backlight; | |
1355 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1356 | dev_priv->display.set_backlight = bdw_set_backlight; | |
1357 | dev_priv->display.get_backlight = bdw_get_backlight; | |
1358 | } else if (HAS_PCH_SPLIT(dev)) { | |
7bd688cd JN |
1359 | dev_priv->display.setup_backlight = pch_setup_backlight; |
1360 | dev_priv->display.enable_backlight = pch_enable_backlight; | |
1361 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1362 | dev_priv->display.set_backlight = pch_set_backlight; | |
1363 | dev_priv->display.get_backlight = pch_get_backlight; | |
7bd688cd JN |
1364 | } else if (IS_VALLEYVIEW(dev)) { |
1365 | dev_priv->display.setup_backlight = vlv_setup_backlight; | |
1366 | dev_priv->display.enable_backlight = vlv_enable_backlight; | |
1367 | dev_priv->display.disable_backlight = vlv_disable_backlight; | |
1368 | dev_priv->display.set_backlight = vlv_set_backlight; | |
1369 | dev_priv->display.get_backlight = vlv_get_backlight; | |
7bd688cd JN |
1370 | } else if (IS_GEN4(dev)) { |
1371 | dev_priv->display.setup_backlight = i965_setup_backlight; | |
1372 | dev_priv->display.enable_backlight = i965_enable_backlight; | |
1373 | dev_priv->display.disable_backlight = i965_disable_backlight; | |
1374 | dev_priv->display.set_backlight = i9xx_set_backlight; | |
1375 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1376 | } else { |
1377 | dev_priv->display.setup_backlight = i9xx_setup_backlight; | |
3bd712e5 JN |
1378 | dev_priv->display.enable_backlight = i9xx_enable_backlight; |
1379 | dev_priv->display.disable_backlight = i9xx_disable_backlight; | |
7bd688cd JN |
1380 | dev_priv->display.set_backlight = i9xx_set_backlight; |
1381 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1382 | } |
1383 | } | |
1384 | ||
dd06f90e | 1385 | int intel_panel_init(struct intel_panel *panel, |
4b6ed685 VK |
1386 | struct drm_display_mode *fixed_mode, |
1387 | struct drm_display_mode *downclock_mode) | |
1d508706 | 1388 | { |
dd06f90e | 1389 | panel->fixed_mode = fixed_mode; |
4b6ed685 | 1390 | panel->downclock_mode = downclock_mode; |
dd06f90e | 1391 | |
1d508706 JN |
1392 | return 0; |
1393 | } | |
1394 | ||
1395 | void intel_panel_fini(struct intel_panel *panel) | |
1396 | { | |
dd06f90e JN |
1397 | struct intel_connector *intel_connector = |
1398 | container_of(panel, struct intel_connector, panel); | |
1399 | ||
1400 | if (panel->fixed_mode) | |
1401 | drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); | |
ec9ed197 VK |
1402 | |
1403 | if (panel->downclock_mode) | |
1404 | drm_mode_destroy(intel_connector->base.dev, | |
1405 | panel->downclock_mode); | |
1d508706 | 1406 | } |
0962c3c9 VS |
1407 | |
1408 | void intel_backlight_register(struct drm_device *dev) | |
1409 | { | |
1410 | struct intel_connector *connector; | |
1411 | ||
1412 | list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) | |
1413 | intel_backlight_device_register(connector); | |
1414 | } | |
1415 | ||
1416 | void intel_backlight_unregister(struct drm_device *dev) | |
1417 | { | |
1418 | struct intel_connector *connector; | |
1419 | ||
1420 | list_for_each_entry(connector, &dev->mode_config.connector_list, base.head) | |
1421 | intel_backlight_device_unregister(connector); | |
1422 | } |