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drm/i915: preserve swizzle settings if necessary v4
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CommitLineData
1d8e1c75
CW
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
7bd90909 33#include <linux/moduleparam.h>
1d8e1c75
CW
34#include "intel_drv.h"
35
36void
4c6df4b4 37intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW
38 struct drm_display_mode *adjusted_mode)
39{
4c6df4b4 40 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID
41
42 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW
43}
44
525997e0
JN
45/**
46 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
47 * @dev: drm device
48 * @fixed_mode : panel native mode
49 * @connector: LVDS/eDP connector
50 *
51 * Return downclock_avail
52 * Find the reduced downclock for LVDS/eDP in EDID.
53 */
54struct drm_display_mode *
55intel_find_panel_downclock(struct drm_device *dev,
56 struct drm_display_mode *fixed_mode,
57 struct drm_connector *connector)
58{
59 struct drm_display_mode *scan, *tmp_mode;
60 int temp_downclock;
61
62 temp_downclock = fixed_mode->clock;
63 tmp_mode = NULL;
64
65 list_for_each_entry(scan, &connector->probed_modes, head) {
66 /*
67 * If one mode has the same resolution with the fixed_panel
68 * mode while they have the different refresh rate, it means
69 * that the reduced downclock is found. In such
70 * case we can set the different FPx0/1 to dynamically select
71 * between low and high frequency.
72 */
73 if (scan->hdisplay == fixed_mode->hdisplay &&
74 scan->hsync_start == fixed_mode->hsync_start &&
75 scan->hsync_end == fixed_mode->hsync_end &&
76 scan->htotal == fixed_mode->htotal &&
77 scan->vdisplay == fixed_mode->vdisplay &&
78 scan->vsync_start == fixed_mode->vsync_start &&
79 scan->vsync_end == fixed_mode->vsync_end &&
80 scan->vtotal == fixed_mode->vtotal) {
81 if (scan->clock < temp_downclock) {
82 /*
83 * The downclock is already found. But we
84 * expect to find the lower downclock.
85 */
86 temp_downclock = scan->clock;
87 tmp_mode = scan;
88 }
89 }
90 }
91
92 if (temp_downclock < fixed_mode->clock)
93 return drm_mode_duplicate(dev, tmp_mode);
94 else
95 return NULL;
96}
97
1d8e1c75
CW
98/* adjusted_mode has been preset to be the panel's fixed mode */
99void
b074cec8
JB
100intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
101 struct intel_crtc_config *pipe_config,
102 int fitting_mode)
1d8e1c75 103{
37327abd 104 struct drm_display_mode *adjusted_mode;
1d8e1c75
CW
105 int x, y, width, height;
106
b074cec8
JB
107 adjusted_mode = &pipe_config->adjusted_mode;
108
1d8e1c75
CW
109 x = y = width = height = 0;
110
111 /* Native modes don't need fitting */
37327abd
VS
112 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
1d8e1c75
CW
120 x = (adjusted_mode->hdisplay - width + 1)/2;
121 y = (adjusted_mode->vdisplay - height + 1)/2;
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
9084e7d2
DV
127 u32 scaled_width = adjusted_mode->hdisplay
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
130 * adjusted_mode->vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
1d8e1c75
CW
135 x = (adjusted_mode->hdisplay - width + 1) / 2;
136 y = 0;
137 height = adjusted_mode->vdisplay;
138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ
140 if (height & 1)
141 height++;
1d8e1c75
CW
142 y = (adjusted_mode->vdisplay - height + 1) / 2;
143 x = 0;
144 width = adjusted_mode->hdisplay;
145 } else {
146 x = y = 0;
147 width = adjusted_mode->hdisplay;
148 height = adjusted_mode->vdisplay;
149 }
150 }
151 break;
152
1d8e1c75
CW
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
155 width = adjusted_mode->hdisplay;
156 height = adjusted_mode->vdisplay;
157 break;
ab3e67f4
JB
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW
162 }
163
164done:
b074cec8
JB
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552
JB
170static void
171centre_horizontally(struct drm_display_mode *mode,
172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
178 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (mode->hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 mode->crtc_hdisplay = width;
185 mode->crtc_hblank_start = width + border;
186 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
187
188 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
189 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
190}
191
192static void
193centre_vertically(struct drm_display_mode *mode,
194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
199 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
200 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
203 border = (mode->vdisplay - height + 1) / 2;
204
205 mode->crtc_vdisplay = height;
206 mode->crtc_vblank_start = height + border;
207 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
208
209 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
210 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
9084e7d2
DV
226static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
227 u32 *pfit_control)
228{
229 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
230 u32 scaled_width = adjusted_mode->hdisplay *
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
233 adjusted_mode->vdisplay;
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
242 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
246static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
250 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
251 u32 scaled_width = adjusted_mode->hdisplay *
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
254 adjusted_mode->vdisplay;
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
268 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270 adjusted_mode->vdisplay);
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
284 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286 adjusted_mode->hdisplay);
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552
JB
303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304 struct intel_crtc_config *pipe_config,
305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
37327abd 309 struct drm_display_mode *adjusted_mode;
2dd24552 310
2dd24552
JB
311 adjusted_mode = &pipe_config->adjusted_mode;
312
313 /* Native modes don't need fitting */
37327abd
VS
314 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
315 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
2dd24552
JB
316 goto out;
317
318 switch (fitting_mode) {
319 case DRM_MODE_SCALE_CENTER:
320 /*
321 * For centered modes, we have to calculate border widths &
322 * heights and modify the values programmed into the CRTC.
323 */
37327abd
VS
324 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
325 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB
326 border = LVDS_BORDER_ENABLE;
327 break;
328 case DRM_MODE_SCALE_ASPECT:
329 /* Scale but preserve the aspect ratio */
9084e7d2
DV
330 if (INTEL_INFO(dev)->gen >= 4)
331 i965_scale_aspect(pipe_config, &pfit_control);
332 else
333 i9xx_scale_aspect(pipe_config, &pfit_control,
334 &pfit_pgm_ratios, &border);
2dd24552 335 break;
2dd24552
JB
336 case DRM_MODE_SCALE_FULLSCREEN:
337 /*
338 * Full scaling, even if it changes the aspect ratio.
339 * Fortunately this is all done for us in hw.
340 */
37327abd
VS
341 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
342 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
2dd24552
JB
343 pfit_control |= PFIT_ENABLE;
344 if (INTEL_INFO(dev)->gen >= 4)
345 pfit_control |= PFIT_SCALING_AUTO;
346 else
347 pfit_control |= (VERT_AUTO_SCALE |
348 VERT_INTERP_BILINEAR |
349 HORIZ_AUTO_SCALE |
350 HORIZ_INTERP_BILINEAR);
351 }
352 break;
ab3e67f4
JB
353 default:
354 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
355 return;
2dd24552
JB
356 }
357
358 /* 965+ wants fuzzy fitting */
359 /* FIXME: handle multiple panels by failing gracefully */
360 if (INTEL_INFO(dev)->gen >= 4)
361 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
362 PFIT_FILTER_FUZZY);
363
364out:
365 if ((pfit_control & PFIT_ENABLE) == 0) {
366 pfit_control = 0;
367 pfit_pgm_ratios = 0;
368 }
369
6b89cdde
DV
370 /* Make sure pre-965 set dither correctly for 18bpp panels. */
371 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
372 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
373
2deefda5
DV
374 pipe_config->gmch_pfit.control = pfit_control;
375 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 376 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB
377}
378
525997e0
JN
379enum drm_connector_status
380intel_panel_detect(struct drm_device *dev)
381{
382 struct drm_i915_private *dev_priv = dev->dev_private;
383
384 /* Assume that the BIOS does not lie through the OpRegion... */
385 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
386 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
387 connector_status_connected :
388 connector_status_disconnected;
389 }
390
391 switch (i915.panel_ignore_lid) {
392 case -2:
393 return connector_status_connected;
394 case -1:
395 return connector_status_disconnected;
396 default:
397 return connector_status_unknown;
398 }
399}
400
6dda730e
JN
401/**
402 * scale - scale values from one range to another
403 *
404 * @source_val: value in range [@source_min..@source_max]
405 *
406 * Return @source_val in range [@source_min..@source_max] scaled to range
407 * [@target_min..@target_max].
408 */
409static uint32_t scale(uint32_t source_val,
410 uint32_t source_min, uint32_t source_max,
411 uint32_t target_min, uint32_t target_max)
412{
413 uint64_t target_val;
414
415 WARN_ON(source_min > source_max);
416 WARN_ON(target_min > target_max);
417
418 /* defensive */
419 source_val = clamp(source_val, source_min, source_max);
420
421 /* avoid overflows */
673e7bbd
AE
422 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
423 (target_max - target_min), source_max - source_min);
6dda730e
JN
424 target_val += target_min;
425
426 return target_val;
427}
428
429/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
430static inline u32 scale_user_to_hw(struct intel_connector *connector,
431 u32 user_level, u32 user_max)
432{
433 struct intel_panel *panel = &connector->panel;
434
435 return scale(user_level, 0, user_max,
436 panel->backlight.min, panel->backlight.max);
437}
438
439/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
440 * to [hw_min..hw_max]. */
441static inline u32 clamp_user_to_hw(struct intel_connector *connector,
442 u32 user_level, u32 user_max)
443{
444 struct intel_panel *panel = &connector->panel;
445 u32 hw_level;
446
447 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
448 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
449
450 return hw_level;
451}
452
453/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
454static inline u32 scale_hw_to_user(struct intel_connector *connector,
455 u32 hw_level, u32 user_max)
456{
457 struct intel_panel *panel = &connector->panel;
458
459 return scale(hw_level, panel->backlight.min, panel->backlight.max,
460 0, user_max);
461}
462
7bd688cd
JN
463static u32 intel_panel_compute_brightness(struct intel_connector *connector,
464 u32 val)
7bd90909 465{
7bd688cd 466 struct drm_device *dev = connector->base.dev;
4dca20ef 467 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN
468 struct intel_panel *panel = &connector->panel;
469
470 WARN_ON(panel->backlight.max == 0);
4dca20ef 471
d330a953 472 if (i915.invert_brightness < 0)
4dca20ef
CE
473 return val;
474
d330a953 475 if (i915.invert_brightness > 0 ||
d6540632 476 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 477 return panel->backlight.max - val;
d6540632 478 }
7bd90909
CE
479
480 return val;
481}
482
96ab4c70 483static u32 bdw_get_backlight(struct intel_connector *connector)
0b0b053a 484{
96ab4c70 485 struct drm_device *dev = connector->base.dev;
bfd7590d 486 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 487
96ab4c70
DV
488 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
489}
07bf139b 490
7bd688cd 491static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 492{
7bd688cd 493 struct drm_device *dev = connector->base.dev;
a9573556 494 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 495
7bd688cd
JN
496 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
497}
a9573556 498
7bd688cd
JN
499static u32 i9xx_get_backlight(struct intel_connector *connector)
500{
501 struct drm_device *dev = connector->base.dev;
502 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 503 struct intel_panel *panel = &connector->panel;
7bd688cd 504 u32 val;
07bf139b 505
7bd688cd
JN
506 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
507 if (INTEL_INFO(dev)->gen < 4)
508 val >>= 1;
ba3820ad 509
636baebf 510 if (panel->backlight.combination_mode) {
7bd688cd 511 u8 lbpc;
ba3820ad 512
7bd688cd
JN
513 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
514 val *= lbpc;
a9573556
CW
515 }
516
7bd688cd
JN
517 return val;
518}
519
520static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
521{
522 struct drm_i915_private *dev_priv = dev->dev_private;
523
524 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
525}
526
527static u32 vlv_get_backlight(struct intel_connector *connector)
528{
529 struct drm_device *dev = connector->base.dev;
530 enum pipe pipe = intel_get_pipe_from_connector(connector);
531
532 return _vlv_get_backlight(dev, pipe);
533}
534
535static u32 intel_panel_get_backlight(struct intel_connector *connector)
536{
537 struct drm_device *dev = connector->base.dev;
538 struct drm_i915_private *dev_priv = dev->dev_private;
539 u32 val;
7bd688cd 540
07f11d49 541 mutex_lock(&dev_priv->backlight_lock);
7bd688cd
JN
542
543 val = dev_priv->display.get_backlight(connector);
544 val = intel_panel_compute_brightness(connector, val);
8ba2d185 545
07f11d49 546 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 547
a9573556
CW
548 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
549 return val;
550}
551
96ab4c70 552static void bdw_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 553{
96ab4c70 554 struct drm_device *dev = connector->base.dev;
f8e10062
BW
555 struct drm_i915_private *dev_priv = dev->dev_private;
556 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
557 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
558}
559
7bd688cd 560static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 561{
7bd688cd 562 struct drm_device *dev = connector->base.dev;
a9573556 563 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN
564 u32 tmp;
565
566 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
567 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW
568}
569
7bd688cd 570static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 571{
7bd688cd 572 struct drm_device *dev = connector->base.dev;
a9573556 573 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 574 struct intel_panel *panel = &connector->panel;
b329b328 575 u32 tmp, mask;
ba3820ad 576
f91c15e0
JN
577 WARN_ON(panel->backlight.max == 0);
578
636baebf 579 if (panel->backlight.combination_mode) {
ba3820ad
TI
580 u8 lbpc;
581
f91c15e0 582 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI
583 level /= lbpc;
584 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
585 }
586
b329b328
JN
587 if (IS_GEN4(dev)) {
588 mask = BACKLIGHT_DUTY_CYCLE_MASK;
589 } else {
a9573556 590 level <<= 1;
b329b328
JN
591 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
592 }
7bd688cd 593
b329b328 594 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN
595 I915_WRITE(BLC_PWM_CTL, tmp | level);
596}
597
598static void vlv_set_backlight(struct intel_connector *connector, u32 level)
599{
600 struct drm_device *dev = connector->base.dev;
601 struct drm_i915_private *dev_priv = dev->dev_private;
602 enum pipe pipe = intel_get_pipe_from_connector(connector);
603 u32 tmp;
604
605 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
606 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
607}
608
609static void
610intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
611{
612 struct drm_device *dev = connector->base.dev;
613 struct drm_i915_private *dev_priv = dev->dev_private;
614
615 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
616
617 level = intel_panel_compute_brightness(connector, level);
618 dev_priv->display.set_backlight(connector, level);
a9573556 619}
47356eb6 620
6dda730e
JN
621/* set backlight brightness to level in range [0..max], scaling wrt hw min */
622static void intel_panel_set_backlight(struct intel_connector *connector,
623 u32 user_level, u32 user_max)
47356eb6 624{
752aa88a 625 struct drm_device *dev = connector->base.dev;
47356eb6 626 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 627 struct intel_panel *panel = &connector->panel;
752aa88a 628 enum pipe pipe = intel_get_pipe_from_connector(connector);
6dda730e 629 u32 hw_level;
8ba2d185 630
dc5a4363 631 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
632 return;
633
07f11d49 634 mutex_lock(&dev_priv->backlight_lock);
d6540632 635
f91c15e0 636 WARN_ON(panel->backlight.max == 0);
d6540632 637
6dda730e
JN
638 hw_level = scale_user_to_hw(connector, user_level, user_max);
639 panel->backlight.level = hw_level;
640
641 if (panel->backlight.enabled)
642 intel_panel_actually_set_backlight(connector, hw_level);
643
07f11d49 644 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN
645}
646
647/* set backlight brightness to level in range [0..max], assuming hw min is
648 * respected.
649 */
650void intel_panel_set_backlight_acpi(struct intel_connector *connector,
651 u32 user_level, u32 user_max)
652{
653 struct drm_device *dev = connector->base.dev;
654 struct drm_i915_private *dev_priv = dev->dev_private;
655 struct intel_panel *panel = &connector->panel;
656 enum pipe pipe = intel_get_pipe_from_connector(connector);
657 u32 hw_level;
6dda730e
JN
658
659 if (!panel->backlight.present || pipe == INVALID_PIPE)
660 return;
661
07f11d49 662 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN
663
664 WARN_ON(panel->backlight.max == 0);
665
666 hw_level = clamp_user_to_hw(connector, user_level, user_max);
667 panel->backlight.level = hw_level;
47356eb6 668
58c68779 669 if (panel->backlight.device)
6dda730e
JN
670 panel->backlight.device->props.brightness =
671 scale_hw_to_user(connector,
672 panel->backlight.level,
673 panel->backlight.device->props.max_brightness);
b6b3ba5b 674
58c68779 675 if (panel->backlight.enabled)
6dda730e 676 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 677
07f11d49 678 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI
679}
680
7bd688cd
JN
681static void pch_disable_backlight(struct intel_connector *connector)
682{
683 struct drm_device *dev = connector->base.dev;
684 struct drm_i915_private *dev_priv = dev->dev_private;
685 u32 tmp;
686
3bd712e5
JN
687 intel_panel_actually_set_backlight(connector, 0);
688
7bd688cd
JN
689 tmp = I915_READ(BLC_PWM_CPU_CTL2);
690 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
691
692 tmp = I915_READ(BLC_PWM_PCH_CTL1);
693 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
694}
695
3bd712e5
JN
696static void i9xx_disable_backlight(struct intel_connector *connector)
697{
698 intel_panel_actually_set_backlight(connector, 0);
699}
700
7bd688cd
JN
701static void i965_disable_backlight(struct intel_connector *connector)
702{
703 struct drm_device *dev = connector->base.dev;
704 struct drm_i915_private *dev_priv = dev->dev_private;
705 u32 tmp;
706
3bd712e5
JN
707 intel_panel_actually_set_backlight(connector, 0);
708
7bd688cd
JN
709 tmp = I915_READ(BLC_PWM_CTL2);
710 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
711}
712
713static void vlv_disable_backlight(struct intel_connector *connector)
714{
715 struct drm_device *dev = connector->base.dev;
716 struct drm_i915_private *dev_priv = dev->dev_private;
717 enum pipe pipe = intel_get_pipe_from_connector(connector);
718 u32 tmp;
719
3bd712e5
JN
720 intel_panel_actually_set_backlight(connector, 0);
721
7bd688cd
JN
722 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
723 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
724}
725
752aa88a 726void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 727{
752aa88a 728 struct drm_device *dev = connector->base.dev;
f52c619a 729 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 730 struct intel_panel *panel = &connector->panel;
752aa88a 731 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 732
dc5a4363 733 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
734 return;
735
3f577573
JN
736 /*
737 * Do not disable backlight on the vgaswitcheroo path. When switching
738 * away from i915, the other client may depend on i915 to handle the
739 * backlight. This will leave the backlight on unnecessarily when
740 * another client is not activated.
741 */
742 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
743 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
744 return;
745 }
746
07f11d49 747 mutex_lock(&dev_priv->backlight_lock);
47356eb6 748
ab656bb9
JN
749 if (panel->backlight.device)
750 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 751 panel->backlight.enabled = false;
3bd712e5 752 dev_priv->display.disable_backlight(connector);
24ded204 753
07f11d49 754 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 755}
24ded204 756
96ab4c70
DV
757static void bdw_enable_backlight(struct intel_connector *connector)
758{
759 struct drm_device *dev = connector->base.dev;
760 struct drm_i915_private *dev_priv = dev->dev_private;
761 struct intel_panel *panel = &connector->panel;
762 u32 pch_ctl1, pch_ctl2;
763
764 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
765 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
766 DRM_DEBUG_KMS("pch backlight already enabled\n");
767 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
768 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
769 }
24ded204 770
96ab4c70
DV
771 pch_ctl2 = panel->backlight.max << 16;
772 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 773
96ab4c70
DV
774 pch_ctl1 = 0;
775 if (panel->backlight.active_low_pwm)
776 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 777
96ab4c70
DV
778 /* BDW always uses the pch pwm controls. */
779 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
780
781 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
782 POSTING_READ(BLC_PWM_PCH_CTL1);
783 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
784
785 /* This won't stick until the above enable. */
786 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW
787}
788
7bd688cd
JN
789static void pch_enable_backlight(struct intel_connector *connector)
790{
791 struct drm_device *dev = connector->base.dev;
792 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 793 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
794 enum pipe pipe = intel_get_pipe_from_connector(connector);
795 enum transcoder cpu_transcoder =
796 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 797 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 798
b35684b8
JN
799 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
800 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 801 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN
802 cpu_ctl2 &= ~BLM_PWM_ENABLE;
803 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
804 }
7bd688cd 805
b35684b8
JN
806 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
807 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
808 DRM_DEBUG_KMS("pch backlight already enabled\n");
809 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
810 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
811 }
7bd688cd
JN
812
813 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 814 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 815 else
b35684b8
JN
816 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
817 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 818 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 819 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 820
b35684b8 821 /* This won't stick until the above enable. */
3bd712e5 822 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN
823
824 pch_ctl2 = panel->backlight.max << 16;
825 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
826
b35684b8
JN
827 pch_ctl1 = 0;
828 if (panel->backlight.active_low_pwm)
829 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 830
b35684b8
JN
831 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
832 POSTING_READ(BLC_PWM_PCH_CTL1);
833 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN
834}
835
836static void i9xx_enable_backlight(struct intel_connector *connector)
837{
b35684b8
JN
838 struct drm_device *dev = connector->base.dev;
839 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 840 struct intel_panel *panel = &connector->panel;
b35684b8
JN
841 u32 ctl, freq;
842
843 ctl = I915_READ(BLC_PWM_CTL);
844 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 845 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
846 I915_WRITE(BLC_PWM_CTL, 0);
847 }
3bd712e5 848
b35684b8
JN
849 freq = panel->backlight.max;
850 if (panel->backlight.combination_mode)
851 freq /= 0xff;
852
853 ctl = freq << 17;
b6ab66aa 854 if (panel->backlight.combination_mode)
b35684b8
JN
855 ctl |= BLM_LEGACY_MODE;
856 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
857 ctl |= BLM_POLARITY_PNV;
858
859 I915_WRITE(BLC_PWM_CTL, ctl);
860 POSTING_READ(BLC_PWM_CTL);
861
862 /* XXX: combine this into above write? */
3bd712e5 863 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 864}
8ba2d185 865
7bd688cd
JN
866static void i965_enable_backlight(struct intel_connector *connector)
867{
868 struct drm_device *dev = connector->base.dev;
869 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 870 struct intel_panel *panel = &connector->panel;
7bd688cd 871 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 872 u32 ctl, ctl2, freq;
7bd688cd 873
b35684b8
JN
874 ctl2 = I915_READ(BLC_PWM_CTL2);
875 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 876 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
877 ctl2 &= ~BLM_PWM_ENABLE;
878 I915_WRITE(BLC_PWM_CTL2, ctl2);
879 }
7bd688cd 880
b35684b8
JN
881 freq = panel->backlight.max;
882 if (panel->backlight.combination_mode)
883 freq /= 0xff;
7bd688cd 884
b35684b8
JN
885 ctl = freq << 16;
886 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 887
b35684b8
JN
888 ctl2 = BLM_PIPE(pipe);
889 if (panel->backlight.combination_mode)
890 ctl2 |= BLM_COMBINATION_MODE;
891 if (panel->backlight.active_low_pwm)
892 ctl2 |= BLM_POLARITY_I965;
893 I915_WRITE(BLC_PWM_CTL2, ctl2);
894 POSTING_READ(BLC_PWM_CTL2);
895 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN
896
897 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN
898}
899
900static void vlv_enable_backlight(struct intel_connector *connector)
901{
902 struct drm_device *dev = connector->base.dev;
903 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 904 struct intel_panel *panel = &connector->panel;
7bd688cd 905 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 906 u32 ctl, ctl2;
7bd688cd 907
b35684b8
JN
908 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
909 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 910 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
911 ctl2 &= ~BLM_PWM_ENABLE;
912 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
913 }
7bd688cd 914
b35684b8
JN
915 ctl = panel->backlight.max << 16;
916 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 917
b35684b8
JN
918 /* XXX: combine this into above write? */
919 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 920
b35684b8
JN
921 ctl2 = 0;
922 if (panel->backlight.active_low_pwm)
923 ctl2 |= BLM_POLARITY_I965;
924 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 925 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 926 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW
927}
928
752aa88a 929void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 930{
752aa88a 931 struct drm_device *dev = connector->base.dev;
47356eb6 932 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 933 struct intel_panel *panel = &connector->panel;
752aa88a 934 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 935
dc5a4363 936 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
937 return;
938
6f2bcceb 939 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 940
07f11d49 941 mutex_lock(&dev_priv->backlight_lock);
47356eb6 942
f91c15e0
JN
943 WARN_ON(panel->backlight.max == 0);
944
58c68779 945 if (panel->backlight.level == 0) {
f91c15e0 946 panel->backlight.level = panel->backlight.max;
58c68779
JN
947 if (panel->backlight.device)
948 panel->backlight.device->props.brightness =
6dda730e
JN
949 scale_hw_to_user(connector,
950 panel->backlight.level,
951 panel->backlight.device->props.max_brightness);
b6b3ba5b 952 }
47356eb6 953
3bd712e5 954 dev_priv->display.enable_backlight(connector);
58c68779 955 panel->backlight.enabled = true;
ab656bb9
JN
956 if (panel->backlight.device)
957 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 958
07f11d49 959 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW
960}
961
912e8b12 962#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 963static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 964{
752aa88a 965 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 966 struct intel_panel *panel = &connector->panel;
752aa88a
JB
967 struct drm_device *dev = connector->base.dev;
968
51fd371b 969 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW
970 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
971 bd->props.brightness, bd->props.max_brightness);
752aa88a 972 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 973 bd->props.max_brightness);
ab656bb9
JN
974
975 /*
976 * Allow flipping bl_power as a sub-state of enabled. Sadly the
977 * backlight class device does not make it easy to to differentiate
978 * between callbacks for brightness and bl_power, so our backlight_power
979 * callback needs to take this into account.
980 */
981 if (panel->backlight.enabled) {
982 if (panel->backlight_power) {
e6755fb7
JN
983 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
984 bd->props.brightness != 0;
ab656bb9
JN
985 panel->backlight_power(connector, enable);
986 }
987 } else {
988 bd->props.power = FB_BLANK_POWERDOWN;
989 }
990
51fd371b 991 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG
992 return 0;
993}
994
db31af1d 995static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 996{
752aa88a
JB
997 struct intel_connector *connector = bl_get_data(bd);
998 struct drm_device *dev = connector->base.dev;
c8c8fb33 999 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1000 u32 hw_level;
7bd688cd 1001 int ret;
752aa88a 1002
c8c8fb33 1003 intel_runtime_pm_get(dev_priv);
51fd371b 1004 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN
1005
1006 hw_level = intel_panel_get_backlight(connector);
1007 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1008
51fd371b 1009 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1010 intel_runtime_pm_put(dev_priv);
752aa88a 1011
7bd688cd 1012 return ret;
aaa6fd2a
MG
1013}
1014
db31af1d
JN
1015static const struct backlight_ops intel_backlight_device_ops = {
1016 .update_status = intel_backlight_device_update_status,
1017 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG
1018};
1019
db31af1d 1020static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1021{
58c68779 1022 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1023 struct backlight_properties props;
aaa6fd2a 1024
58c68779 1025 if (WARN_ON(panel->backlight.device))
dc652f90
JN
1026 return -ENODEV;
1027
6dda730e 1028 WARN_ON(panel->backlight.max == 0);
7bd688cd 1029
af437cfd 1030 memset(&props, 0, sizeof(props));
aaa6fd2a 1031 props.type = BACKLIGHT_RAW;
6dda730e
JN
1032
1033 /*
1034 * Note: Everything should work even if the backlight device max
1035 * presented to the userspace is arbitrarily chosen.
1036 */
7bd688cd 1037 props.max_brightness = panel->backlight.max;
6dda730e
JN
1038 props.brightness = scale_hw_to_user(connector,
1039 panel->backlight.level,
1040 props.max_brightness);
58c68779 1041
ab656bb9
JN
1042 if (panel->backlight.enabled)
1043 props.power = FB_BLANK_UNBLANK;
1044 else
1045 props.power = FB_BLANK_POWERDOWN;
1046
58c68779
JN
1047 /*
1048 * Note: using the same name independent of the connector prevents
1049 * registration of multiple backlight devices in the driver.
1050 */
1051 panel->backlight.device =
aaa6fd2a 1052 backlight_device_register("intel_backlight",
db31af1d
JN
1053 connector->base.kdev,
1054 connector,
1055 &intel_backlight_device_ops, &props);
aaa6fd2a 1056
58c68779 1057 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1058 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN
1059 PTR_ERR(panel->backlight.device));
1060 panel->backlight.device = NULL;
aaa6fd2a
MG
1061 return -ENODEV;
1062 }
aaa6fd2a
MG
1063 return 0;
1064}
1065
db31af1d 1066static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1067{
58c68779
JN
1068 struct intel_panel *panel = &connector->panel;
1069
1070 if (panel->backlight.device) {
1071 backlight_device_unregister(panel->backlight.device);
1072 panel->backlight.device = NULL;
dc652f90 1073 }
aaa6fd2a 1074}
db31af1d
JN
1075#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1076static int intel_backlight_device_register(struct intel_connector *connector)
1077{
1078 return 0;
1079}
1080static void intel_backlight_device_unregister(struct intel_connector *connector)
1081{
1082}
1083#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1084
f91c15e0
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1085/*
1086 * Note: The setup hooks can't assume pipe is set!
1087 *
1088 * XXX: Query mode clock or hardware clock and program PWM modulation frequency
1089 * appropriately when it's 0. Use VBT and/or sane defaults.
1090 */
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1091static u32 get_backlight_min_vbt(struct intel_connector *connector)
1092{
1093 struct drm_device *dev = connector->base.dev;
1094 struct drm_i915_private *dev_priv = dev->dev_private;
1095 struct intel_panel *panel = &connector->panel;
1096
1097 WARN_ON(panel->backlight.max == 0);
1098
1099 /* vbt value is a coefficient in range [0..255] */
1100 return scale(dev_priv->vbt.backlight.min_brightness, 0, 255,
1101 0, panel->backlight.max);
1102}
1103
96ab4c70 1104static int bdw_setup_backlight(struct intel_connector *connector)
aaa6fd2a 1105{
96ab4c70 1106 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1107 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV
1108 struct intel_panel *panel = &connector->panel;
1109 u32 pch_ctl1, pch_ctl2, val;
1110
1111 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1112 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1113
1114 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1115 panel->backlight.max = pch_ctl2 >> 16;
1116 if (!panel->backlight.max)
1117 return -ENODEV;
1118
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1119 panel->backlight.min = get_backlight_min_vbt(connector);
1120
96ab4c70
DV
1121 val = bdw_get_backlight(connector);
1122 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1123
1124 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1125 panel->backlight.level != 0;
1126
1127 return 0;
1128}
1129
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1130static int pch_setup_backlight(struct intel_connector *connector)
1131{
636baebf
JN
1132 struct drm_device *dev = connector->base.dev;
1133 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1134 struct intel_panel *panel = &connector->panel;
636baebf 1135 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1136
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1137 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1138 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1139
1140 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1141 panel->backlight.max = pch_ctl2 >> 16;
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JN
1142 if (!panel->backlight.max)
1143 return -ENODEV;
1144
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1145 panel->backlight.min = get_backlight_min_vbt(connector);
1146
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1147 val = pch_get_backlight(connector);
1148 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1149
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1150 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1151 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1152 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1153
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JN
1154 return 0;
1155}
1156
1157static int i9xx_setup_backlight(struct intel_connector *connector)
1158{
636baebf
JN
1159 struct drm_device *dev = connector->base.dev;
1160 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1161 struct intel_panel *panel = &connector->panel;
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JN
1162 u32 ctl, val;
1163
1164 ctl = I915_READ(BLC_PWM_CTL);
1165
b6ab66aa 1166 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
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1167 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1168
1169 if (IS_PINEVIEW(dev))
1170 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1171
1172 panel->backlight.max = ctl >> 17;
1173 if (panel->backlight.combination_mode)
1174 panel->backlight.max *= 0xff;
7bd688cd 1175
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1176 if (!panel->backlight.max)
1177 return -ENODEV;
1178
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1179 panel->backlight.min = get_backlight_min_vbt(connector);
1180
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JN
1181 val = i9xx_get_backlight(connector);
1182 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1183
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JN
1184 panel->backlight.enabled = panel->backlight.level != 0;
1185
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JN
1186 return 0;
1187}
1188
1189static int i965_setup_backlight(struct intel_connector *connector)
1190{
636baebf
JN
1191 struct drm_device *dev = connector->base.dev;
1192 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1193 struct intel_panel *panel = &connector->panel;
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1194 u32 ctl, ctl2, val;
1195
1196 ctl2 = I915_READ(BLC_PWM_CTL2);
1197 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1198 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1199
1200 ctl = I915_READ(BLC_PWM_CTL);
1201 panel->backlight.max = ctl >> 16;
1202 if (panel->backlight.combination_mode)
1203 panel->backlight.max *= 0xff;
7bd688cd 1204
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JN
1205 if (!panel->backlight.max)
1206 return -ENODEV;
1207
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1208 panel->backlight.min = get_backlight_min_vbt(connector);
1209
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JN
1210 val = i9xx_get_backlight(connector);
1211 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1212
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1213 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1214 panel->backlight.level != 0;
1215
7bd688cd
JN
1216 return 0;
1217}
1218
1219static int vlv_setup_backlight(struct intel_connector *connector)
1220{
1221 struct drm_device *dev = connector->base.dev;
1222 struct drm_i915_private *dev_priv = dev->dev_private;
1223 struct intel_panel *panel = &connector->panel;
1224 enum pipe pipe;
636baebf 1225 u32 ctl, ctl2, val;
7bd688cd 1226
055e393f 1227 for_each_pipe(dev_priv, pipe) {
7bd688cd
JN
1228 u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
1229
1230 /* Skip if the modulation freq is already set */
1231 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
1232 continue;
1233
1234 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
1235 I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
1236 cur_val);
1237 }
1238
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JN
1239 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
1240 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1241
1242 ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
1243 panel->backlight.max = ctl >> 16;
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JN
1244 if (!panel->backlight.max)
1245 return -ENODEV;
1246
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1247 panel->backlight.min = get_backlight_min_vbt(connector);
1248
7bd688cd
JN
1249 val = _vlv_get_backlight(dev, PIPE_A);
1250 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1251
636baebf
JN
1252 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1253 panel->backlight.level != 0;
1254
7bd688cd
JN
1255 return 0;
1256}
1257
0657b6b1 1258int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a 1259{
db31af1d 1260 struct drm_device *dev = connector->dev;
7bd688cd 1261 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1262 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1263 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1264 int ret;
db31af1d 1265
c675949e 1266 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD
1267 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1268 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1269 } else {
1270 DRM_DEBUG_KMS("no backlight present per VBT\n");
1271 return 0;
1272 }
c675949e
JN
1273 }
1274
7bd688cd 1275 /* set level and max in panel struct */
07f11d49 1276 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 1277 ret = dev_priv->display.setup_backlight(intel_connector);
07f11d49 1278 mutex_unlock(&dev_priv->backlight_lock);
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JN
1279
1280 if (ret) {
1281 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1282 connector->name);
7bd688cd
JN
1283 return ret;
1284 }
db31af1d 1285
db31af1d
JN
1286 intel_backlight_device_register(intel_connector);
1287
c91c9f32
JN
1288 panel->backlight.present = true;
1289
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JN
1290 DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
1291 "sysfs interface %sregistered\n",
1292 panel->backlight.enabled ? "enabled" : "disabled",
1293 panel->backlight.level, panel->backlight.max,
1294 panel->backlight.device ? "" : "not ");
1295
aaa6fd2a
MG
1296 return 0;
1297}
1298
db31af1d 1299void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1300{
db31af1d 1301 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1302 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1303
c91c9f32 1304 panel->backlight.present = false;
db31af1d 1305 intel_backlight_device_unregister(intel_connector);
aaa6fd2a 1306}
1d508706 1307
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JN
1308/* Set up chip specific backlight functions */
1309void intel_panel_init_backlight_funcs(struct drm_device *dev)
1310{
1311 struct drm_i915_private *dev_priv = dev->dev_private;
1312
7879a7eb 1313 if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9)) {
96ab4c70
DV
1314 dev_priv->display.setup_backlight = bdw_setup_backlight;
1315 dev_priv->display.enable_backlight = bdw_enable_backlight;
1316 dev_priv->display.disable_backlight = pch_disable_backlight;
1317 dev_priv->display.set_backlight = bdw_set_backlight;
1318 dev_priv->display.get_backlight = bdw_get_backlight;
1319 } else if (HAS_PCH_SPLIT(dev)) {
7bd688cd
JN
1320 dev_priv->display.setup_backlight = pch_setup_backlight;
1321 dev_priv->display.enable_backlight = pch_enable_backlight;
1322 dev_priv->display.disable_backlight = pch_disable_backlight;
1323 dev_priv->display.set_backlight = pch_set_backlight;
1324 dev_priv->display.get_backlight = pch_get_backlight;
7bd688cd
JN
1325 } else if (IS_VALLEYVIEW(dev)) {
1326 dev_priv->display.setup_backlight = vlv_setup_backlight;
1327 dev_priv->display.enable_backlight = vlv_enable_backlight;
1328 dev_priv->display.disable_backlight = vlv_disable_backlight;
1329 dev_priv->display.set_backlight = vlv_set_backlight;
1330 dev_priv->display.get_backlight = vlv_get_backlight;
7bd688cd
JN
1331 } else if (IS_GEN4(dev)) {
1332 dev_priv->display.setup_backlight = i965_setup_backlight;
1333 dev_priv->display.enable_backlight = i965_enable_backlight;
1334 dev_priv->display.disable_backlight = i965_disable_backlight;
1335 dev_priv->display.set_backlight = i9xx_set_backlight;
1336 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN
1337 } else {
1338 dev_priv->display.setup_backlight = i9xx_setup_backlight;
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JN
1339 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1340 dev_priv->display.disable_backlight = i9xx_disable_backlight;
7bd688cd
JN
1341 dev_priv->display.set_backlight = i9xx_set_backlight;
1342 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN
1343 }
1344}
1345
dd06f90e 1346int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK
1347 struct drm_display_mode *fixed_mode,
1348 struct drm_display_mode *downclock_mode)
1d508706 1349{
dd06f90e 1350 panel->fixed_mode = fixed_mode;
4b6ed685 1351 panel->downclock_mode = downclock_mode;
dd06f90e 1352
1d508706
JN
1353 return 0;
1354}
1355
1356void intel_panel_fini(struct intel_panel *panel)
1357{
dd06f90e
JN
1358 struct intel_connector *intel_connector =
1359 container_of(panel, struct intel_connector, panel);
1360
1361 if (panel->fixed_mode)
1362 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK
1363
1364 if (panel->downclock_mode)
1365 drm_mode_destroy(intel_connector->base.dev,
1366 panel->downclock_mode);
1d508706 1367}