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drm/i915: Enable pixel replicated modes on BDW and HSW.
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CommitLineData
1d8e1c75
CW
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
7bd90909 33#include <linux/moduleparam.h>
1d8e1c75
CW
34#include "intel_drv.h"
35
36void
4c6df4b4 37intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW
38 struct drm_display_mode *adjusted_mode)
39{
4c6df4b4 40 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID
41
42 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW
43}
44
525997e0
JN
45/**
46 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
47 * @dev: drm device
48 * @fixed_mode : panel native mode
49 * @connector: LVDS/eDP connector
50 *
51 * Return downclock_avail
52 * Find the reduced downclock for LVDS/eDP in EDID.
53 */
54struct drm_display_mode *
55intel_find_panel_downclock(struct drm_device *dev,
56 struct drm_display_mode *fixed_mode,
57 struct drm_connector *connector)
58{
59 struct drm_display_mode *scan, *tmp_mode;
60 int temp_downclock;
61
62 temp_downclock = fixed_mode->clock;
63 tmp_mode = NULL;
64
65 list_for_each_entry(scan, &connector->probed_modes, head) {
66 /*
67 * If one mode has the same resolution with the fixed_panel
68 * mode while they have the different refresh rate, it means
69 * that the reduced downclock is found. In such
70 * case we can set the different FPx0/1 to dynamically select
71 * between low and high frequency.
72 */
73 if (scan->hdisplay == fixed_mode->hdisplay &&
74 scan->hsync_start == fixed_mode->hsync_start &&
75 scan->hsync_end == fixed_mode->hsync_end &&
76 scan->htotal == fixed_mode->htotal &&
77 scan->vdisplay == fixed_mode->vdisplay &&
78 scan->vsync_start == fixed_mode->vsync_start &&
79 scan->vsync_end == fixed_mode->vsync_end &&
80 scan->vtotal == fixed_mode->vtotal) {
81 if (scan->clock < temp_downclock) {
82 /*
83 * The downclock is already found. But we
84 * expect to find the lower downclock.
85 */
86 temp_downclock = scan->clock;
87 tmp_mode = scan;
88 }
89 }
90 }
91
92 if (temp_downclock < fixed_mode->clock)
93 return drm_mode_duplicate(dev, tmp_mode);
94 else
95 return NULL;
96}
97
1d8e1c75
CW
98/* adjusted_mode has been preset to be the panel's fixed mode */
99void
b074cec8
JB
100intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
101 struct intel_crtc_config *pipe_config,
102 int fitting_mode)
1d8e1c75 103{
37327abd 104 struct drm_display_mode *adjusted_mode;
1d8e1c75
CW
105 int x, y, width, height;
106
b074cec8
JB
107 adjusted_mode = &pipe_config->adjusted_mode;
108
1d8e1c75
CW
109 x = y = width = height = 0;
110
111 /* Native modes don't need fitting */
37327abd
VS
112 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
1d8e1c75
CW
120 x = (adjusted_mode->hdisplay - width + 1)/2;
121 y = (adjusted_mode->vdisplay - height + 1)/2;
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
9084e7d2
DV
127 u32 scaled_width = adjusted_mode->hdisplay
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
130 * adjusted_mode->vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
1d8e1c75
CW
135 x = (adjusted_mode->hdisplay - width + 1) / 2;
136 y = 0;
137 height = adjusted_mode->vdisplay;
138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ
140 if (height & 1)
141 height++;
1d8e1c75
CW
142 y = (adjusted_mode->vdisplay - height + 1) / 2;
143 x = 0;
144 width = adjusted_mode->hdisplay;
145 } else {
146 x = y = 0;
147 width = adjusted_mode->hdisplay;
148 height = adjusted_mode->vdisplay;
149 }
150 }
151 break;
152
1d8e1c75
CW
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
155 width = adjusted_mode->hdisplay;
156 height = adjusted_mode->vdisplay;
157 break;
ab3e67f4
JB
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW
162 }
163
164done:
b074cec8
JB
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552
JB
170static void
171centre_horizontally(struct drm_display_mode *mode,
172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
178 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (mode->hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 mode->crtc_hdisplay = width;
185 mode->crtc_hblank_start = width + border;
186 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
187
188 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
189 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
190}
191
192static void
193centre_vertically(struct drm_display_mode *mode,
194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
199 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
200 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
203 border = (mode->vdisplay - height + 1) / 2;
204
205 mode->crtc_vdisplay = height;
206 mode->crtc_vblank_start = height + border;
207 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
208
209 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
210 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
9084e7d2
DV
226static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
227 u32 *pfit_control)
228{
229 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
230 u32 scaled_width = adjusted_mode->hdisplay *
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
233 adjusted_mode->vdisplay;
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
242 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
246static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
250 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
251 u32 scaled_width = adjusted_mode->hdisplay *
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
254 adjusted_mode->vdisplay;
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
268 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270 adjusted_mode->vdisplay);
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
284 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286 adjusted_mode->hdisplay);
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552
JB
303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304 struct intel_crtc_config *pipe_config,
305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
37327abd 309 struct drm_display_mode *adjusted_mode;
2dd24552 310
2dd24552
JB
311 adjusted_mode = &pipe_config->adjusted_mode;
312
313 /* Native modes don't need fitting */
37327abd
VS
314 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
315 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
2dd24552
JB
316 goto out;
317
318 switch (fitting_mode) {
319 case DRM_MODE_SCALE_CENTER:
320 /*
321 * For centered modes, we have to calculate border widths &
322 * heights and modify the values programmed into the CRTC.
323 */
37327abd
VS
324 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
325 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB
326 border = LVDS_BORDER_ENABLE;
327 break;
328 case DRM_MODE_SCALE_ASPECT:
329 /* Scale but preserve the aspect ratio */
9084e7d2
DV
330 if (INTEL_INFO(dev)->gen >= 4)
331 i965_scale_aspect(pipe_config, &pfit_control);
332 else
333 i9xx_scale_aspect(pipe_config, &pfit_control,
334 &pfit_pgm_ratios, &border);
2dd24552 335 break;
2dd24552
JB
336 case DRM_MODE_SCALE_FULLSCREEN:
337 /*
338 * Full scaling, even if it changes the aspect ratio.
339 * Fortunately this is all done for us in hw.
340 */
37327abd
VS
341 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
342 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
2dd24552
JB
343 pfit_control |= PFIT_ENABLE;
344 if (INTEL_INFO(dev)->gen >= 4)
345 pfit_control |= PFIT_SCALING_AUTO;
346 else
347 pfit_control |= (VERT_AUTO_SCALE |
348 VERT_INTERP_BILINEAR |
349 HORIZ_AUTO_SCALE |
350 HORIZ_INTERP_BILINEAR);
351 }
352 break;
ab3e67f4
JB
353 default:
354 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
355 return;
2dd24552
JB
356 }
357
358 /* 965+ wants fuzzy fitting */
359 /* FIXME: handle multiple panels by failing gracefully */
360 if (INTEL_INFO(dev)->gen >= 4)
361 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
362 PFIT_FILTER_FUZZY);
363
364out:
365 if ((pfit_control & PFIT_ENABLE) == 0) {
366 pfit_control = 0;
367 pfit_pgm_ratios = 0;
368 }
369
6b89cdde
DV
370 /* Make sure pre-965 set dither correctly for 18bpp panels. */
371 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
372 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
373
2deefda5
DV
374 pipe_config->gmch_pfit.control = pfit_control;
375 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 376 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB
377}
378
525997e0
JN
379enum drm_connector_status
380intel_panel_detect(struct drm_device *dev)
381{
382 struct drm_i915_private *dev_priv = dev->dev_private;
383
384 /* Assume that the BIOS does not lie through the OpRegion... */
385 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
386 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
387 connector_status_connected :
388 connector_status_disconnected;
389 }
390
391 switch (i915.panel_ignore_lid) {
392 case -2:
393 return connector_status_connected;
394 case -1:
395 return connector_status_disconnected;
396 default:
397 return connector_status_unknown;
398 }
399}
400
6dda730e
JN
401/**
402 * scale - scale values from one range to another
403 *
404 * @source_val: value in range [@source_min..@source_max]
405 *
406 * Return @source_val in range [@source_min..@source_max] scaled to range
407 * [@target_min..@target_max].
408 */
409static uint32_t scale(uint32_t source_val,
410 uint32_t source_min, uint32_t source_max,
411 uint32_t target_min, uint32_t target_max)
412{
413 uint64_t target_val;
414
415 WARN_ON(source_min > source_max);
416 WARN_ON(target_min > target_max);
417
418 /* defensive */
419 source_val = clamp(source_val, source_min, source_max);
420
421 /* avoid overflows */
422 target_val = (uint64_t)(source_val - source_min) *
423 (target_max - target_min);
424 do_div(target_val, source_max - source_min);
425 target_val += target_min;
426
427 return target_val;
428}
429
430/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
431static inline u32 scale_user_to_hw(struct intel_connector *connector,
432 u32 user_level, u32 user_max)
433{
434 struct intel_panel *panel = &connector->panel;
435
436 return scale(user_level, 0, user_max,
437 panel->backlight.min, panel->backlight.max);
438}
439
440/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
441 * to [hw_min..hw_max]. */
442static inline u32 clamp_user_to_hw(struct intel_connector *connector,
443 u32 user_level, u32 user_max)
444{
445 struct intel_panel *panel = &connector->panel;
446 u32 hw_level;
447
448 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
449 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
450
451 return hw_level;
452}
453
454/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
455static inline u32 scale_hw_to_user(struct intel_connector *connector,
456 u32 hw_level, u32 user_max)
457{
458 struct intel_panel *panel = &connector->panel;
459
460 return scale(hw_level, panel->backlight.min, panel->backlight.max,
461 0, user_max);
462}
463
7bd688cd
JN
464static u32 intel_panel_compute_brightness(struct intel_connector *connector,
465 u32 val)
7bd90909 466{
7bd688cd 467 struct drm_device *dev = connector->base.dev;
4dca20ef 468 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN
469 struct intel_panel *panel = &connector->panel;
470
471 WARN_ON(panel->backlight.max == 0);
4dca20ef 472
d330a953 473 if (i915.invert_brightness < 0)
4dca20ef
CE
474 return val;
475
d330a953 476 if (i915.invert_brightness > 0 ||
d6540632 477 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 478 return panel->backlight.max - val;
d6540632 479 }
7bd90909
CE
480
481 return val;
482}
483
96ab4c70 484static u32 bdw_get_backlight(struct intel_connector *connector)
0b0b053a 485{
96ab4c70 486 struct drm_device *dev = connector->base.dev;
bfd7590d 487 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 488
96ab4c70
DV
489 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
490}
07bf139b 491
7bd688cd 492static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 493{
7bd688cd 494 struct drm_device *dev = connector->base.dev;
a9573556 495 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 496
7bd688cd
JN
497 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
498}
a9573556 499
7bd688cd
JN
500static u32 i9xx_get_backlight(struct intel_connector *connector)
501{
502 struct drm_device *dev = connector->base.dev;
503 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 504 struct intel_panel *panel = &connector->panel;
7bd688cd 505 u32 val;
07bf139b 506
7bd688cd
JN
507 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
508 if (INTEL_INFO(dev)->gen < 4)
509 val >>= 1;
ba3820ad 510
636baebf 511 if (panel->backlight.combination_mode) {
7bd688cd 512 u8 lbpc;
ba3820ad 513
7bd688cd
JN
514 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
515 val *= lbpc;
a9573556
CW
516 }
517
7bd688cd
JN
518 return val;
519}
520
521static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
522{
523 struct drm_i915_private *dev_priv = dev->dev_private;
524
525 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
526}
527
528static u32 vlv_get_backlight(struct intel_connector *connector)
529{
530 struct drm_device *dev = connector->base.dev;
531 enum pipe pipe = intel_get_pipe_from_connector(connector);
532
533 return _vlv_get_backlight(dev, pipe);
534}
535
536static u32 intel_panel_get_backlight(struct intel_connector *connector)
537{
538 struct drm_device *dev = connector->base.dev;
539 struct drm_i915_private *dev_priv = dev->dev_private;
540 u32 val;
541 unsigned long flags;
542
543 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
544
545 val = dev_priv->display.get_backlight(connector);
546 val = intel_panel_compute_brightness(connector, val);
8ba2d185 547
58c68779 548 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
8ba2d185 549
a9573556
CW
550 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
551 return val;
552}
553
96ab4c70 554static void bdw_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 555{
96ab4c70 556 struct drm_device *dev = connector->base.dev;
f8e10062
BW
557 struct drm_i915_private *dev_priv = dev->dev_private;
558 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
559 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
560}
561
7bd688cd 562static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 563{
7bd688cd 564 struct drm_device *dev = connector->base.dev;
a9573556 565 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN
566 u32 tmp;
567
568 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
569 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW
570}
571
7bd688cd 572static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 573{
7bd688cd 574 struct drm_device *dev = connector->base.dev;
a9573556 575 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 576 struct intel_panel *panel = &connector->panel;
b329b328 577 u32 tmp, mask;
ba3820ad 578
f91c15e0
JN
579 WARN_ON(panel->backlight.max == 0);
580
636baebf 581 if (panel->backlight.combination_mode) {
ba3820ad
TI
582 u8 lbpc;
583
f91c15e0 584 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI
585 level /= lbpc;
586 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
587 }
588
b329b328
JN
589 if (IS_GEN4(dev)) {
590 mask = BACKLIGHT_DUTY_CYCLE_MASK;
591 } else {
a9573556 592 level <<= 1;
b329b328
JN
593 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
594 }
7bd688cd 595
b329b328 596 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN
597 I915_WRITE(BLC_PWM_CTL, tmp | level);
598}
599
600static void vlv_set_backlight(struct intel_connector *connector, u32 level)
601{
602 struct drm_device *dev = connector->base.dev;
603 struct drm_i915_private *dev_priv = dev->dev_private;
604 enum pipe pipe = intel_get_pipe_from_connector(connector);
605 u32 tmp;
606
607 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
608 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
609}
610
611static void
612intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
613{
614 struct drm_device *dev = connector->base.dev;
615 struct drm_i915_private *dev_priv = dev->dev_private;
616
617 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
618
619 level = intel_panel_compute_brightness(connector, level);
620 dev_priv->display.set_backlight(connector, level);
a9573556 621}
47356eb6 622
6dda730e
JN
623/* set backlight brightness to level in range [0..max], scaling wrt hw min */
624static void intel_panel_set_backlight(struct intel_connector *connector,
625 u32 user_level, u32 user_max)
47356eb6 626{
752aa88a 627 struct drm_device *dev = connector->base.dev;
47356eb6 628 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 629 struct intel_panel *panel = &connector->panel;
752aa88a 630 enum pipe pipe = intel_get_pipe_from_connector(connector);
6dda730e 631 u32 hw_level;
8ba2d185
JN
632 unsigned long flags;
633
dc5a4363 634 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
635 return;
636
58c68779 637 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
d6540632 638
f91c15e0 639 WARN_ON(panel->backlight.max == 0);
d6540632 640
6dda730e
JN
641 hw_level = scale_user_to_hw(connector, user_level, user_max);
642 panel->backlight.level = hw_level;
643
644 if (panel->backlight.enabled)
645 intel_panel_actually_set_backlight(connector, hw_level);
646
647 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
648}
649
650/* set backlight brightness to level in range [0..max], assuming hw min is
651 * respected.
652 */
653void intel_panel_set_backlight_acpi(struct intel_connector *connector,
654 u32 user_level, u32 user_max)
655{
656 struct drm_device *dev = connector->base.dev;
657 struct drm_i915_private *dev_priv = dev->dev_private;
658 struct intel_panel *panel = &connector->panel;
659 enum pipe pipe = intel_get_pipe_from_connector(connector);
660 u32 hw_level;
661 unsigned long flags;
662
663 if (!panel->backlight.present || pipe == INVALID_PIPE)
664 return;
665
666 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
667
668 WARN_ON(panel->backlight.max == 0);
669
670 hw_level = clamp_user_to_hw(connector, user_level, user_max);
671 panel->backlight.level = hw_level;
47356eb6 672
58c68779 673 if (panel->backlight.device)
6dda730e
JN
674 panel->backlight.device->props.brightness =
675 scale_hw_to_user(connector,
676 panel->backlight.level,
677 panel->backlight.device->props.max_brightness);
b6b3ba5b 678
58c68779 679 if (panel->backlight.enabled)
6dda730e 680 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 681
58c68779 682 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
f52c619a
TI
683}
684
7bd688cd
JN
685static void pch_disable_backlight(struct intel_connector *connector)
686{
687 struct drm_device *dev = connector->base.dev;
688 struct drm_i915_private *dev_priv = dev->dev_private;
689 u32 tmp;
690
3bd712e5
JN
691 intel_panel_actually_set_backlight(connector, 0);
692
7bd688cd
JN
693 tmp = I915_READ(BLC_PWM_CPU_CTL2);
694 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
695
696 tmp = I915_READ(BLC_PWM_PCH_CTL1);
697 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
698}
699
3bd712e5
JN
700static void i9xx_disable_backlight(struct intel_connector *connector)
701{
702 intel_panel_actually_set_backlight(connector, 0);
703}
704
7bd688cd
JN
705static void i965_disable_backlight(struct intel_connector *connector)
706{
707 struct drm_device *dev = connector->base.dev;
708 struct drm_i915_private *dev_priv = dev->dev_private;
709 u32 tmp;
710
3bd712e5
JN
711 intel_panel_actually_set_backlight(connector, 0);
712
7bd688cd
JN
713 tmp = I915_READ(BLC_PWM_CTL2);
714 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
715}
716
717static void vlv_disable_backlight(struct intel_connector *connector)
718{
719 struct drm_device *dev = connector->base.dev;
720 struct drm_i915_private *dev_priv = dev->dev_private;
721 enum pipe pipe = intel_get_pipe_from_connector(connector);
722 u32 tmp;
723
3bd712e5
JN
724 intel_panel_actually_set_backlight(connector, 0);
725
7bd688cd
JN
726 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
727 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
728}
729
752aa88a 730void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 731{
752aa88a 732 struct drm_device *dev = connector->base.dev;
f52c619a 733 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 734 struct intel_panel *panel = &connector->panel;
752aa88a 735 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185
JN
736 unsigned long flags;
737
dc5a4363 738 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
739 return;
740
3f577573
JN
741 /*
742 * Do not disable backlight on the vgaswitcheroo path. When switching
743 * away from i915, the other client may depend on i915 to handle the
744 * backlight. This will leave the backlight on unnecessarily when
745 * another client is not activated.
746 */
747 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
748 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
749 return;
750 }
751
58c68779 752 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
47356eb6 753
ab656bb9
JN
754 if (panel->backlight.device)
755 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 756 panel->backlight.enabled = false;
3bd712e5 757 dev_priv->display.disable_backlight(connector);
24ded204 758
7bd688cd
JN
759 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
760}
24ded204 761
96ab4c70
DV
762static void bdw_enable_backlight(struct intel_connector *connector)
763{
764 struct drm_device *dev = connector->base.dev;
765 struct drm_i915_private *dev_priv = dev->dev_private;
766 struct intel_panel *panel = &connector->panel;
767 u32 pch_ctl1, pch_ctl2;
768
769 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
770 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
771 DRM_DEBUG_KMS("pch backlight already enabled\n");
772 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
773 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
774 }
24ded204 775
96ab4c70
DV
776 pch_ctl2 = panel->backlight.max << 16;
777 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 778
96ab4c70
DV
779 pch_ctl1 = 0;
780 if (panel->backlight.active_low_pwm)
781 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 782
96ab4c70
DV
783 /* BDW always uses the pch pwm controls. */
784 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
785
786 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
787 POSTING_READ(BLC_PWM_PCH_CTL1);
788 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
789
790 /* This won't stick until the above enable. */
791 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW
792}
793
7bd688cd
JN
794static void pch_enable_backlight(struct intel_connector *connector)
795{
796 struct drm_device *dev = connector->base.dev;
797 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 798 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
799 enum pipe pipe = intel_get_pipe_from_connector(connector);
800 enum transcoder cpu_transcoder =
801 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 802 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 803
b35684b8
JN
804 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
805 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 806 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN
807 cpu_ctl2 &= ~BLM_PWM_ENABLE;
808 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
809 }
7bd688cd 810
b35684b8
JN
811 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
812 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
813 DRM_DEBUG_KMS("pch backlight already enabled\n");
814 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
815 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
816 }
7bd688cd
JN
817
818 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 819 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 820 else
b35684b8
JN
821 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
822 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 823 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 824 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 825
b35684b8 826 /* This won't stick until the above enable. */
3bd712e5 827 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN
828
829 pch_ctl2 = panel->backlight.max << 16;
830 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
831
b35684b8
JN
832 pch_ctl1 = 0;
833 if (panel->backlight.active_low_pwm)
834 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 835
b35684b8
JN
836 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
837 POSTING_READ(BLC_PWM_PCH_CTL1);
838 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN
839}
840
841static void i9xx_enable_backlight(struct intel_connector *connector)
842{
b35684b8
JN
843 struct drm_device *dev = connector->base.dev;
844 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 845 struct intel_panel *panel = &connector->panel;
b35684b8
JN
846 u32 ctl, freq;
847
848 ctl = I915_READ(BLC_PWM_CTL);
849 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 850 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
851 I915_WRITE(BLC_PWM_CTL, 0);
852 }
3bd712e5 853
b35684b8
JN
854 freq = panel->backlight.max;
855 if (panel->backlight.combination_mode)
856 freq /= 0xff;
857
858 ctl = freq << 17;
b6ab66aa 859 if (panel->backlight.combination_mode)
b35684b8
JN
860 ctl |= BLM_LEGACY_MODE;
861 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
862 ctl |= BLM_POLARITY_PNV;
863
864 I915_WRITE(BLC_PWM_CTL, ctl);
865 POSTING_READ(BLC_PWM_CTL);
866
867 /* XXX: combine this into above write? */
3bd712e5 868 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 869}
8ba2d185 870
7bd688cd
JN
871static void i965_enable_backlight(struct intel_connector *connector)
872{
873 struct drm_device *dev = connector->base.dev;
874 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 875 struct intel_panel *panel = &connector->panel;
7bd688cd 876 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 877 u32 ctl, ctl2, freq;
7bd688cd 878
b35684b8
JN
879 ctl2 = I915_READ(BLC_PWM_CTL2);
880 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 881 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
882 ctl2 &= ~BLM_PWM_ENABLE;
883 I915_WRITE(BLC_PWM_CTL2, ctl2);
884 }
7bd688cd 885
b35684b8
JN
886 freq = panel->backlight.max;
887 if (panel->backlight.combination_mode)
888 freq /= 0xff;
7bd688cd 889
b35684b8
JN
890 ctl = freq << 16;
891 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 892
b35684b8
JN
893 ctl2 = BLM_PIPE(pipe);
894 if (panel->backlight.combination_mode)
895 ctl2 |= BLM_COMBINATION_MODE;
896 if (panel->backlight.active_low_pwm)
897 ctl2 |= BLM_POLARITY_I965;
898 I915_WRITE(BLC_PWM_CTL2, ctl2);
899 POSTING_READ(BLC_PWM_CTL2);
900 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN
901
902 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN
903}
904
905static void vlv_enable_backlight(struct intel_connector *connector)
906{
907 struct drm_device *dev = connector->base.dev;
908 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 909 struct intel_panel *panel = &connector->panel;
7bd688cd 910 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 911 u32 ctl, ctl2;
7bd688cd 912
b35684b8
JN
913 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
914 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 915 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
916 ctl2 &= ~BLM_PWM_ENABLE;
917 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
918 }
7bd688cd 919
b35684b8
JN
920 ctl = panel->backlight.max << 16;
921 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 922
b35684b8
JN
923 /* XXX: combine this into above write? */
924 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 925
b35684b8
JN
926 ctl2 = 0;
927 if (panel->backlight.active_low_pwm)
928 ctl2 |= BLM_POLARITY_I965;
929 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 930 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 931 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW
932}
933
752aa88a 934void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 935{
752aa88a 936 struct drm_device *dev = connector->base.dev;
47356eb6 937 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 938 struct intel_panel *panel = &connector->panel;
752aa88a 939 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185
JN
940 unsigned long flags;
941
dc5a4363 942 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
943 return;
944
6f2bcceb 945 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 946
58c68779 947 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
47356eb6 948
f91c15e0
JN
949 WARN_ON(panel->backlight.max == 0);
950
58c68779 951 if (panel->backlight.level == 0) {
f91c15e0 952 panel->backlight.level = panel->backlight.max;
58c68779
JN
953 if (panel->backlight.device)
954 panel->backlight.device->props.brightness =
6dda730e
JN
955 scale_hw_to_user(connector,
956 panel->backlight.level,
957 panel->backlight.device->props.max_brightness);
b6b3ba5b 958 }
47356eb6 959
3bd712e5 960 dev_priv->display.enable_backlight(connector);
58c68779 961 panel->backlight.enabled = true;
ab656bb9
JN
962 if (panel->backlight.device)
963 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 964
58c68779 965 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
47356eb6
CW
966}
967
912e8b12 968#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 969static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 970{
752aa88a 971 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 972 struct intel_panel *panel = &connector->panel;
752aa88a
JB
973 struct drm_device *dev = connector->base.dev;
974
51fd371b 975 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW
976 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
977 bd->props.brightness, bd->props.max_brightness);
752aa88a 978 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 979 bd->props.max_brightness);
ab656bb9
JN
980
981 /*
982 * Allow flipping bl_power as a sub-state of enabled. Sadly the
983 * backlight class device does not make it easy to to differentiate
984 * between callbacks for brightness and bl_power, so our backlight_power
985 * callback needs to take this into account.
986 */
987 if (panel->backlight.enabled) {
988 if (panel->backlight_power) {
e6755fb7
JN
989 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
990 bd->props.brightness != 0;
ab656bb9
JN
991 panel->backlight_power(connector, enable);
992 }
993 } else {
994 bd->props.power = FB_BLANK_POWERDOWN;
995 }
996
51fd371b 997 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG
998 return 0;
999}
1000
db31af1d 1001static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1002{
752aa88a
JB
1003 struct intel_connector *connector = bl_get_data(bd);
1004 struct drm_device *dev = connector->base.dev;
c8c8fb33 1005 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1006 u32 hw_level;
7bd688cd 1007 int ret;
752aa88a 1008
c8c8fb33 1009 intel_runtime_pm_get(dev_priv);
51fd371b 1010 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN
1011
1012 hw_level = intel_panel_get_backlight(connector);
1013 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1014
51fd371b 1015 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1016 intel_runtime_pm_put(dev_priv);
752aa88a 1017
7bd688cd 1018 return ret;
aaa6fd2a
MG
1019}
1020
db31af1d
JN
1021static const struct backlight_ops intel_backlight_device_ops = {
1022 .update_status = intel_backlight_device_update_status,
1023 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG
1024};
1025
db31af1d 1026static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1027{
58c68779 1028 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1029 struct backlight_properties props;
aaa6fd2a 1030
58c68779 1031 if (WARN_ON(panel->backlight.device))
dc652f90
JN
1032 return -ENODEV;
1033
6dda730e 1034 WARN_ON(panel->backlight.max == 0);
7bd688cd 1035
af437cfd 1036 memset(&props, 0, sizeof(props));
aaa6fd2a 1037 props.type = BACKLIGHT_RAW;
6dda730e
JN
1038
1039 /*
1040 * Note: Everything should work even if the backlight device max
1041 * presented to the userspace is arbitrarily chosen.
1042 */
7bd688cd 1043 props.max_brightness = panel->backlight.max;
6dda730e
JN
1044 props.brightness = scale_hw_to_user(connector,
1045 panel->backlight.level,
1046 props.max_brightness);
58c68779 1047
ab656bb9
JN
1048 if (panel->backlight.enabled)
1049 props.power = FB_BLANK_UNBLANK;
1050 else
1051 props.power = FB_BLANK_POWERDOWN;
1052
58c68779
JN
1053 /*
1054 * Note: using the same name independent of the connector prevents
1055 * registration of multiple backlight devices in the driver.
1056 */
1057 panel->backlight.device =
aaa6fd2a 1058 backlight_device_register("intel_backlight",
db31af1d
JN
1059 connector->base.kdev,
1060 connector,
1061 &intel_backlight_device_ops, &props);
aaa6fd2a 1062
58c68779 1063 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1064 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN
1065 PTR_ERR(panel->backlight.device));
1066 panel->backlight.device = NULL;
aaa6fd2a
MG
1067 return -ENODEV;
1068 }
aaa6fd2a
MG
1069 return 0;
1070}
1071
db31af1d 1072static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1073{
58c68779
JN
1074 struct intel_panel *panel = &connector->panel;
1075
1076 if (panel->backlight.device) {
1077 backlight_device_unregister(panel->backlight.device);
1078 panel->backlight.device = NULL;
dc652f90 1079 }
aaa6fd2a 1080}
db31af1d
JN
1081#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1082static int intel_backlight_device_register(struct intel_connector *connector)
1083{
1084 return 0;
1085}
1086static void intel_backlight_device_unregister(struct intel_connector *connector)
1087{
1088}
1089#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1090
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1091/*
1092 * Note: The setup hooks can't assume pipe is set!
1093 *
1094 * XXX: Query mode clock or hardware clock and program PWM modulation frequency
1095 * appropriately when it's 0. Use VBT and/or sane defaults.
1096 */
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1097static u32 get_backlight_min_vbt(struct intel_connector *connector)
1098{
1099 struct drm_device *dev = connector->base.dev;
1100 struct drm_i915_private *dev_priv = dev->dev_private;
1101 struct intel_panel *panel = &connector->panel;
1102
1103 WARN_ON(panel->backlight.max == 0);
1104
1105 /* vbt value is a coefficient in range [0..255] */
1106 return scale(dev_priv->vbt.backlight.min_brightness, 0, 255,
1107 0, panel->backlight.max);
1108}
1109
96ab4c70 1110static int bdw_setup_backlight(struct intel_connector *connector)
aaa6fd2a 1111{
96ab4c70 1112 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1113 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV
1114 struct intel_panel *panel = &connector->panel;
1115 u32 pch_ctl1, pch_ctl2, val;
1116
1117 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1118 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1119
1120 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1121 panel->backlight.max = pch_ctl2 >> 16;
1122 if (!panel->backlight.max)
1123 return -ENODEV;
1124
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1125 panel->backlight.min = get_backlight_min_vbt(connector);
1126
96ab4c70
DV
1127 val = bdw_get_backlight(connector);
1128 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1129
1130 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1131 panel->backlight.level != 0;
1132
1133 return 0;
1134}
1135
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1136static int pch_setup_backlight(struct intel_connector *connector)
1137{
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1138 struct drm_device *dev = connector->base.dev;
1139 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1140 struct intel_panel *panel = &connector->panel;
636baebf 1141 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1142
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1143 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1144 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1145
1146 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1147 panel->backlight.max = pch_ctl2 >> 16;
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1148 if (!panel->backlight.max)
1149 return -ENODEV;
1150
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1151 panel->backlight.min = get_backlight_min_vbt(connector);
1152
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1153 val = pch_get_backlight(connector);
1154 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1155
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1156 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1157 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1158 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1159
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1160 return 0;
1161}
1162
1163static int i9xx_setup_backlight(struct intel_connector *connector)
1164{
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1165 struct drm_device *dev = connector->base.dev;
1166 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1167 struct intel_panel *panel = &connector->panel;
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1168 u32 ctl, val;
1169
1170 ctl = I915_READ(BLC_PWM_CTL);
1171
b6ab66aa 1172 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
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1173 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1174
1175 if (IS_PINEVIEW(dev))
1176 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1177
1178 panel->backlight.max = ctl >> 17;
1179 if (panel->backlight.combination_mode)
1180 panel->backlight.max *= 0xff;
7bd688cd 1181
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1182 if (!panel->backlight.max)
1183 return -ENODEV;
1184
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1185 panel->backlight.min = get_backlight_min_vbt(connector);
1186
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1187 val = i9xx_get_backlight(connector);
1188 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1189
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1190 panel->backlight.enabled = panel->backlight.level != 0;
1191
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1192 return 0;
1193}
1194
1195static int i965_setup_backlight(struct intel_connector *connector)
1196{
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1197 struct drm_device *dev = connector->base.dev;
1198 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1199 struct intel_panel *panel = &connector->panel;
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1200 u32 ctl, ctl2, val;
1201
1202 ctl2 = I915_READ(BLC_PWM_CTL2);
1203 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1204 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1205
1206 ctl = I915_READ(BLC_PWM_CTL);
1207 panel->backlight.max = ctl >> 16;
1208 if (panel->backlight.combination_mode)
1209 panel->backlight.max *= 0xff;
7bd688cd 1210
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1211 if (!panel->backlight.max)
1212 return -ENODEV;
1213
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1214 panel->backlight.min = get_backlight_min_vbt(connector);
1215
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1216 val = i9xx_get_backlight(connector);
1217 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1218
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1219 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1220 panel->backlight.level != 0;
1221
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JN
1222 return 0;
1223}
1224
1225static int vlv_setup_backlight(struct intel_connector *connector)
1226{
1227 struct drm_device *dev = connector->base.dev;
1228 struct drm_i915_private *dev_priv = dev->dev_private;
1229 struct intel_panel *panel = &connector->panel;
1230 enum pipe pipe;
636baebf 1231 u32 ctl, ctl2, val;
7bd688cd 1232
055e393f 1233 for_each_pipe(dev_priv, pipe) {
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JN
1234 u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
1235
1236 /* Skip if the modulation freq is already set */
1237 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
1238 continue;
1239
1240 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
1241 I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
1242 cur_val);
1243 }
1244
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1245 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
1246 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1247
1248 ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
1249 panel->backlight.max = ctl >> 16;
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1250 if (!panel->backlight.max)
1251 return -ENODEV;
1252
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1253 panel->backlight.min = get_backlight_min_vbt(connector);
1254
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1255 val = _vlv_get_backlight(dev, PIPE_A);
1256 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1257
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1258 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1259 panel->backlight.level != 0;
1260
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1261 return 0;
1262}
1263
0657b6b1 1264int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a 1265{
db31af1d 1266 struct drm_device *dev = connector->dev;
7bd688cd 1267 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1268 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1269 struct intel_panel *panel = &intel_connector->panel;
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1270 unsigned long flags;
1271 int ret;
db31af1d 1272
c675949e 1273 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD
1274 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1275 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1276 } else {
1277 DRM_DEBUG_KMS("no backlight present per VBT\n");
1278 return 0;
1279 }
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1280 }
1281
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1282 /* set level and max in panel struct */
1283 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
1284 ret = dev_priv->display.setup_backlight(intel_connector);
1285 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
1286
1287 if (ret) {
1288 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1289 connector->name);
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1290 return ret;
1291 }
db31af1d 1292
db31af1d
JN
1293 intel_backlight_device_register(intel_connector);
1294
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1295 panel->backlight.present = true;
1296
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1297 DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
1298 "sysfs interface %sregistered\n",
1299 panel->backlight.enabled ? "enabled" : "disabled",
1300 panel->backlight.level, panel->backlight.max,
1301 panel->backlight.device ? "" : "not ");
1302
aaa6fd2a
MG
1303 return 0;
1304}
1305
db31af1d 1306void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1307{
db31af1d 1308 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1309 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1310
c91c9f32 1311 panel->backlight.present = false;
db31af1d 1312 intel_backlight_device_unregister(intel_connector);
aaa6fd2a 1313}
1d508706 1314
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JN
1315/* Set up chip specific backlight functions */
1316void intel_panel_init_backlight_funcs(struct drm_device *dev)
1317{
1318 struct drm_i915_private *dev_priv = dev->dev_private;
1319
96ab4c70
DV
1320 if (IS_BROADWELL(dev)) {
1321 dev_priv->display.setup_backlight = bdw_setup_backlight;
1322 dev_priv->display.enable_backlight = bdw_enable_backlight;
1323 dev_priv->display.disable_backlight = pch_disable_backlight;
1324 dev_priv->display.set_backlight = bdw_set_backlight;
1325 dev_priv->display.get_backlight = bdw_get_backlight;
1326 } else if (HAS_PCH_SPLIT(dev)) {
7bd688cd
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1327 dev_priv->display.setup_backlight = pch_setup_backlight;
1328 dev_priv->display.enable_backlight = pch_enable_backlight;
1329 dev_priv->display.disable_backlight = pch_disable_backlight;
1330 dev_priv->display.set_backlight = pch_set_backlight;
1331 dev_priv->display.get_backlight = pch_get_backlight;
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1332 } else if (IS_VALLEYVIEW(dev)) {
1333 dev_priv->display.setup_backlight = vlv_setup_backlight;
1334 dev_priv->display.enable_backlight = vlv_enable_backlight;
1335 dev_priv->display.disable_backlight = vlv_disable_backlight;
1336 dev_priv->display.set_backlight = vlv_set_backlight;
1337 dev_priv->display.get_backlight = vlv_get_backlight;
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JN
1338 } else if (IS_GEN4(dev)) {
1339 dev_priv->display.setup_backlight = i965_setup_backlight;
1340 dev_priv->display.enable_backlight = i965_enable_backlight;
1341 dev_priv->display.disable_backlight = i965_disable_backlight;
1342 dev_priv->display.set_backlight = i9xx_set_backlight;
1343 dev_priv->display.get_backlight = i9xx_get_backlight;
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1344 } else {
1345 dev_priv->display.setup_backlight = i9xx_setup_backlight;
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1346 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1347 dev_priv->display.disable_backlight = i9xx_disable_backlight;
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1348 dev_priv->display.set_backlight = i9xx_set_backlight;
1349 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN
1350 }
1351}
1352
dd06f90e 1353int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK
1354 struct drm_display_mode *fixed_mode,
1355 struct drm_display_mode *downclock_mode)
1d508706 1356{
dd06f90e 1357 panel->fixed_mode = fixed_mode;
4b6ed685 1358 panel->downclock_mode = downclock_mode;
dd06f90e 1359
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1360 return 0;
1361}
1362
1363void intel_panel_fini(struct intel_panel *panel)
1364{
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JN
1365 struct intel_connector *intel_connector =
1366 container_of(panel, struct intel_connector, panel);
1367
1368 if (panel->fixed_mode)
1369 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK
1370
1371 if (panel->downclock_mode)
1372 drm_mode_destroy(intel_connector->base.dev,
1373 panel->downclock_mode);
1d508706 1374}