]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/gpu/drm/i915/intel_panel.c
Merge branch 'perf/urgent' into perf/core, to pick up fixes
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
7bd90909 33#include <linux/moduleparam.h>
1d8e1c75
CW
34#include "intel_drv.h"
35
36void
4c6df4b4 37intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW
38 struct drm_display_mode *adjusted_mode)
39{
4c6df4b4 40 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID
41
42 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW
43}
44
525997e0
JN
45/**
46 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
47 * @dev: drm device
48 * @fixed_mode : panel native mode
49 * @connector: LVDS/eDP connector
50 *
51 * Return downclock_avail
52 * Find the reduced downclock for LVDS/eDP in EDID.
53 */
54struct drm_display_mode *
55intel_find_panel_downclock(struct drm_device *dev,
56 struct drm_display_mode *fixed_mode,
57 struct drm_connector *connector)
58{
59 struct drm_display_mode *scan, *tmp_mode;
60 int temp_downclock;
61
62 temp_downclock = fixed_mode->clock;
63 tmp_mode = NULL;
64
65 list_for_each_entry(scan, &connector->probed_modes, head) {
66 /*
67 * If one mode has the same resolution with the fixed_panel
68 * mode while they have the different refresh rate, it means
69 * that the reduced downclock is found. In such
70 * case we can set the different FPx0/1 to dynamically select
71 * between low and high frequency.
72 */
73 if (scan->hdisplay == fixed_mode->hdisplay &&
74 scan->hsync_start == fixed_mode->hsync_start &&
75 scan->hsync_end == fixed_mode->hsync_end &&
76 scan->htotal == fixed_mode->htotal &&
77 scan->vdisplay == fixed_mode->vdisplay &&
78 scan->vsync_start == fixed_mode->vsync_start &&
79 scan->vsync_end == fixed_mode->vsync_end &&
80 scan->vtotal == fixed_mode->vtotal) {
81 if (scan->clock < temp_downclock) {
82 /*
83 * The downclock is already found. But we
84 * expect to find the lower downclock.
85 */
86 temp_downclock = scan->clock;
87 tmp_mode = scan;
88 }
89 }
90 }
91
92 if (temp_downclock < fixed_mode->clock)
93 return drm_mode_duplicate(dev, tmp_mode);
94 else
95 return NULL;
96}
97
1d8e1c75
CW
98/* adjusted_mode has been preset to be the panel's fixed mode */
99void
b074cec8
JB
100intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
101 struct intel_crtc_config *pipe_config,
102 int fitting_mode)
1d8e1c75 103{
37327abd 104 struct drm_display_mode *adjusted_mode;
1d8e1c75
CW
105 int x, y, width, height;
106
b074cec8
JB
107 adjusted_mode = &pipe_config->adjusted_mode;
108
1d8e1c75
CW
109 x = y = width = height = 0;
110
111 /* Native modes don't need fitting */
37327abd
VS
112 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
1d8e1c75
CW
120 x = (adjusted_mode->hdisplay - width + 1)/2;
121 y = (adjusted_mode->vdisplay - height + 1)/2;
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
9084e7d2
DV
127 u32 scaled_width = adjusted_mode->hdisplay
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
130 * adjusted_mode->vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
1d8e1c75
CW
135 x = (adjusted_mode->hdisplay - width + 1) / 2;
136 y = 0;
137 height = adjusted_mode->vdisplay;
138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ
140 if (height & 1)
141 height++;
1d8e1c75
CW
142 y = (adjusted_mode->vdisplay - height + 1) / 2;
143 x = 0;
144 width = adjusted_mode->hdisplay;
145 } else {
146 x = y = 0;
147 width = adjusted_mode->hdisplay;
148 height = adjusted_mode->vdisplay;
149 }
150 }
151 break;
152
1d8e1c75
CW
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
155 width = adjusted_mode->hdisplay;
156 height = adjusted_mode->vdisplay;
157 break;
ab3e67f4
JB
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW
162 }
163
164done:
b074cec8
JB
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552
JB
170static void
171centre_horizontally(struct drm_display_mode *mode,
172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
178 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (mode->hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 mode->crtc_hdisplay = width;
185 mode->crtc_hblank_start = width + border;
186 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
187
188 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
189 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
190}
191
192static void
193centre_vertically(struct drm_display_mode *mode,
194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
199 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
200 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
203 border = (mode->vdisplay - height + 1) / 2;
204
205 mode->crtc_vdisplay = height;
206 mode->crtc_vblank_start = height + border;
207 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
208
209 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
210 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
9084e7d2
DV
226static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
227 u32 *pfit_control)
228{
229 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
230 u32 scaled_width = adjusted_mode->hdisplay *
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
233 adjusted_mode->vdisplay;
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
242 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
246static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
250 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
251 u32 scaled_width = adjusted_mode->hdisplay *
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
254 adjusted_mode->vdisplay;
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
268 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270 adjusted_mode->vdisplay);
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
284 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286 adjusted_mode->hdisplay);
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552
JB
303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304 struct intel_crtc_config *pipe_config,
305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
37327abd 309 struct drm_display_mode *adjusted_mode;
2dd24552 310
2dd24552
JB
311 adjusted_mode = &pipe_config->adjusted_mode;
312
313 /* Native modes don't need fitting */
37327abd
VS
314 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
315 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
2dd24552
JB
316 goto out;
317
318 switch (fitting_mode) {
319 case DRM_MODE_SCALE_CENTER:
320 /*
321 * For centered modes, we have to calculate border widths &
322 * heights and modify the values programmed into the CRTC.
323 */
37327abd
VS
324 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
325 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB
326 border = LVDS_BORDER_ENABLE;
327 break;
328 case DRM_MODE_SCALE_ASPECT:
329 /* Scale but preserve the aspect ratio */
9084e7d2
DV
330 if (INTEL_INFO(dev)->gen >= 4)
331 i965_scale_aspect(pipe_config, &pfit_control);
332 else
333 i9xx_scale_aspect(pipe_config, &pfit_control,
334 &pfit_pgm_ratios, &border);
2dd24552 335 break;
2dd24552
JB
336 case DRM_MODE_SCALE_FULLSCREEN:
337 /*
338 * Full scaling, even if it changes the aspect ratio.
339 * Fortunately this is all done for us in hw.
340 */
37327abd
VS
341 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
342 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
2dd24552
JB
343 pfit_control |= PFIT_ENABLE;
344 if (INTEL_INFO(dev)->gen >= 4)
345 pfit_control |= PFIT_SCALING_AUTO;
346 else
347 pfit_control |= (VERT_AUTO_SCALE |
348 VERT_INTERP_BILINEAR |
349 HORIZ_AUTO_SCALE |
350 HORIZ_INTERP_BILINEAR);
351 }
352 break;
ab3e67f4
JB
353 default:
354 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
355 return;
2dd24552
JB
356 }
357
358 /* 965+ wants fuzzy fitting */
359 /* FIXME: handle multiple panels by failing gracefully */
360 if (INTEL_INFO(dev)->gen >= 4)
361 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
362 PFIT_FILTER_FUZZY);
363
364out:
365 if ((pfit_control & PFIT_ENABLE) == 0) {
366 pfit_control = 0;
367 pfit_pgm_ratios = 0;
368 }
369
6b89cdde
DV
370 /* Make sure pre-965 set dither correctly for 18bpp panels. */
371 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
372 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
373
2deefda5
DV
374 pipe_config->gmch_pfit.control = pfit_control;
375 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 376 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB
377}
378
525997e0
JN
379enum drm_connector_status
380intel_panel_detect(struct drm_device *dev)
381{
382 struct drm_i915_private *dev_priv = dev->dev_private;
383
384 /* Assume that the BIOS does not lie through the OpRegion... */
385 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
386 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
387 connector_status_connected :
388 connector_status_disconnected;
389 }
390
391 switch (i915.panel_ignore_lid) {
392 case -2:
393 return connector_status_connected;
394 case -1:
395 return connector_status_disconnected;
396 default:
397 return connector_status_unknown;
398 }
399}
400
6dda730e
JN
401/**
402 * scale - scale values from one range to another
403 *
404 * @source_val: value in range [@source_min..@source_max]
405 *
406 * Return @source_val in range [@source_min..@source_max] scaled to range
407 * [@target_min..@target_max].
408 */
409static uint32_t scale(uint32_t source_val,
410 uint32_t source_min, uint32_t source_max,
411 uint32_t target_min, uint32_t target_max)
412{
413 uint64_t target_val;
414
415 WARN_ON(source_min > source_max);
416 WARN_ON(target_min > target_max);
417
418 /* defensive */
419 source_val = clamp(source_val, source_min, source_max);
420
421 /* avoid overflows */
673e7bbd
AE
422 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
423 (target_max - target_min), source_max - source_min);
6dda730e
JN
424 target_val += target_min;
425
426 return target_val;
427}
428
429/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
430static inline u32 scale_user_to_hw(struct intel_connector *connector,
431 u32 user_level, u32 user_max)
432{
433 struct intel_panel *panel = &connector->panel;
434
435 return scale(user_level, 0, user_max,
436 panel->backlight.min, panel->backlight.max);
437}
438
439/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
440 * to [hw_min..hw_max]. */
441static inline u32 clamp_user_to_hw(struct intel_connector *connector,
442 u32 user_level, u32 user_max)
443{
444 struct intel_panel *panel = &connector->panel;
445 u32 hw_level;
446
447 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
448 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
449
450 return hw_level;
451}
452
453/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
454static inline u32 scale_hw_to_user(struct intel_connector *connector,
455 u32 hw_level, u32 user_max)
456{
457 struct intel_panel *panel = &connector->panel;
458
459 return scale(hw_level, panel->backlight.min, panel->backlight.max,
460 0, user_max);
461}
462
7bd688cd
JN
463static u32 intel_panel_compute_brightness(struct intel_connector *connector,
464 u32 val)
7bd90909 465{
7bd688cd 466 struct drm_device *dev = connector->base.dev;
4dca20ef 467 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN
468 struct intel_panel *panel = &connector->panel;
469
470 WARN_ON(panel->backlight.max == 0);
4dca20ef 471
d330a953 472 if (i915.invert_brightness < 0)
4dca20ef
CE
473 return val;
474
d330a953 475 if (i915.invert_brightness > 0 ||
d6540632 476 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 477 return panel->backlight.max - val;
d6540632 478 }
7bd90909
CE
479
480 return val;
481}
482
96ab4c70 483static u32 bdw_get_backlight(struct intel_connector *connector)
0b0b053a 484{
96ab4c70 485 struct drm_device *dev = connector->base.dev;
bfd7590d 486 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 487
96ab4c70
DV
488 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
489}
07bf139b 490
7bd688cd 491static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 492{
7bd688cd 493 struct drm_device *dev = connector->base.dev;
a9573556 494 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 495
7bd688cd
JN
496 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
497}
a9573556 498
7bd688cd
JN
499static u32 i9xx_get_backlight(struct intel_connector *connector)
500{
501 struct drm_device *dev = connector->base.dev;
502 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 503 struct intel_panel *panel = &connector->panel;
7bd688cd 504 u32 val;
07bf139b 505
7bd688cd
JN
506 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
507 if (INTEL_INFO(dev)->gen < 4)
508 val >>= 1;
ba3820ad 509
636baebf 510 if (panel->backlight.combination_mode) {
7bd688cd 511 u8 lbpc;
ba3820ad 512
7bd688cd
JN
513 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
514 val *= lbpc;
a9573556
CW
515 }
516
7bd688cd
JN
517 return val;
518}
519
520static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
521{
522 struct drm_i915_private *dev_priv = dev->dev_private;
523
524 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
525}
526
527static u32 vlv_get_backlight(struct intel_connector *connector)
528{
529 struct drm_device *dev = connector->base.dev;
530 enum pipe pipe = intel_get_pipe_from_connector(connector);
531
532 return _vlv_get_backlight(dev, pipe);
533}
534
535static u32 intel_panel_get_backlight(struct intel_connector *connector)
536{
537 struct drm_device *dev = connector->base.dev;
538 struct drm_i915_private *dev_priv = dev->dev_private;
539 u32 val;
540 unsigned long flags;
541
542 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
543
544 val = dev_priv->display.get_backlight(connector);
545 val = intel_panel_compute_brightness(connector, val);
8ba2d185 546
58c68779 547 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
8ba2d185 548
a9573556
CW
549 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
550 return val;
551}
552
96ab4c70 553static void bdw_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 554{
96ab4c70 555 struct drm_device *dev = connector->base.dev;
f8e10062
BW
556 struct drm_i915_private *dev_priv = dev->dev_private;
557 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
558 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
559}
560
7bd688cd 561static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 562{
7bd688cd 563 struct drm_device *dev = connector->base.dev;
a9573556 564 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN
565 u32 tmp;
566
567 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
568 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW
569}
570
7bd688cd 571static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 572{
7bd688cd 573 struct drm_device *dev = connector->base.dev;
a9573556 574 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 575 struct intel_panel *panel = &connector->panel;
b329b328 576 u32 tmp, mask;
ba3820ad 577
f91c15e0
JN
578 WARN_ON(panel->backlight.max == 0);
579
636baebf 580 if (panel->backlight.combination_mode) {
ba3820ad
TI
581 u8 lbpc;
582
f91c15e0 583 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI
584 level /= lbpc;
585 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
586 }
587
b329b328
JN
588 if (IS_GEN4(dev)) {
589 mask = BACKLIGHT_DUTY_CYCLE_MASK;
590 } else {
a9573556 591 level <<= 1;
b329b328
JN
592 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
593 }
7bd688cd 594
b329b328 595 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN
596 I915_WRITE(BLC_PWM_CTL, tmp | level);
597}
598
599static void vlv_set_backlight(struct intel_connector *connector, u32 level)
600{
601 struct drm_device *dev = connector->base.dev;
602 struct drm_i915_private *dev_priv = dev->dev_private;
603 enum pipe pipe = intel_get_pipe_from_connector(connector);
604 u32 tmp;
605
606 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
607 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
608}
609
610static void
611intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
612{
613 struct drm_device *dev = connector->base.dev;
614 struct drm_i915_private *dev_priv = dev->dev_private;
615
616 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
617
618 level = intel_panel_compute_brightness(connector, level);
619 dev_priv->display.set_backlight(connector, level);
a9573556 620}
47356eb6 621
6dda730e
JN
622/* set backlight brightness to level in range [0..max], scaling wrt hw min */
623static void intel_panel_set_backlight(struct intel_connector *connector,
624 u32 user_level, u32 user_max)
47356eb6 625{
752aa88a 626 struct drm_device *dev = connector->base.dev;
47356eb6 627 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 628 struct intel_panel *panel = &connector->panel;
752aa88a 629 enum pipe pipe = intel_get_pipe_from_connector(connector);
6dda730e 630 u32 hw_level;
8ba2d185
JN
631 unsigned long flags;
632
dc5a4363 633 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
634 return;
635
58c68779 636 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
d6540632 637
f91c15e0 638 WARN_ON(panel->backlight.max == 0);
d6540632 639
6dda730e
JN
640 hw_level = scale_user_to_hw(connector, user_level, user_max);
641 panel->backlight.level = hw_level;
642
643 if (panel->backlight.enabled)
644 intel_panel_actually_set_backlight(connector, hw_level);
645
646 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
647}
648
649/* set backlight brightness to level in range [0..max], assuming hw min is
650 * respected.
651 */
652void intel_panel_set_backlight_acpi(struct intel_connector *connector,
653 u32 user_level, u32 user_max)
654{
655 struct drm_device *dev = connector->base.dev;
656 struct drm_i915_private *dev_priv = dev->dev_private;
657 struct intel_panel *panel = &connector->panel;
658 enum pipe pipe = intel_get_pipe_from_connector(connector);
659 u32 hw_level;
660 unsigned long flags;
661
662 if (!panel->backlight.present || pipe == INVALID_PIPE)
663 return;
664
665 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
666
667 WARN_ON(panel->backlight.max == 0);
668
669 hw_level = clamp_user_to_hw(connector, user_level, user_max);
670 panel->backlight.level = hw_level;
47356eb6 671
58c68779 672 if (panel->backlight.device)
6dda730e
JN
673 panel->backlight.device->props.brightness =
674 scale_hw_to_user(connector,
675 panel->backlight.level,
676 panel->backlight.device->props.max_brightness);
b6b3ba5b 677
58c68779 678 if (panel->backlight.enabled)
6dda730e 679 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 680
58c68779 681 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
f52c619a
TI
682}
683
7bd688cd
JN
684static void pch_disable_backlight(struct intel_connector *connector)
685{
686 struct drm_device *dev = connector->base.dev;
687 struct drm_i915_private *dev_priv = dev->dev_private;
688 u32 tmp;
689
3bd712e5
JN
690 intel_panel_actually_set_backlight(connector, 0);
691
7bd688cd
JN
692 tmp = I915_READ(BLC_PWM_CPU_CTL2);
693 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
694
695 tmp = I915_READ(BLC_PWM_PCH_CTL1);
696 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
697}
698
3bd712e5
JN
699static void i9xx_disable_backlight(struct intel_connector *connector)
700{
701 intel_panel_actually_set_backlight(connector, 0);
702}
703
7bd688cd
JN
704static void i965_disable_backlight(struct intel_connector *connector)
705{
706 struct drm_device *dev = connector->base.dev;
707 struct drm_i915_private *dev_priv = dev->dev_private;
708 u32 tmp;
709
3bd712e5
JN
710 intel_panel_actually_set_backlight(connector, 0);
711
7bd688cd
JN
712 tmp = I915_READ(BLC_PWM_CTL2);
713 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
714}
715
716static void vlv_disable_backlight(struct intel_connector *connector)
717{
718 struct drm_device *dev = connector->base.dev;
719 struct drm_i915_private *dev_priv = dev->dev_private;
720 enum pipe pipe = intel_get_pipe_from_connector(connector);
721 u32 tmp;
722
3bd712e5
JN
723 intel_panel_actually_set_backlight(connector, 0);
724
7bd688cd
JN
725 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
726 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
727}
728
752aa88a 729void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 730{
752aa88a 731 struct drm_device *dev = connector->base.dev;
f52c619a 732 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 733 struct intel_panel *panel = &connector->panel;
752aa88a 734 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185
JN
735 unsigned long flags;
736
dc5a4363 737 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
738 return;
739
3f577573
JN
740 /*
741 * Do not disable backlight on the vgaswitcheroo path. When switching
742 * away from i915, the other client may depend on i915 to handle the
743 * backlight. This will leave the backlight on unnecessarily when
744 * another client is not activated.
745 */
746 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
747 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
748 return;
749 }
750
58c68779 751 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
47356eb6 752
ab656bb9
JN
753 if (panel->backlight.device)
754 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 755 panel->backlight.enabled = false;
3bd712e5 756 dev_priv->display.disable_backlight(connector);
24ded204 757
7bd688cd
JN
758 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
759}
24ded204 760
96ab4c70
DV
761static void bdw_enable_backlight(struct intel_connector *connector)
762{
763 struct drm_device *dev = connector->base.dev;
764 struct drm_i915_private *dev_priv = dev->dev_private;
765 struct intel_panel *panel = &connector->panel;
766 u32 pch_ctl1, pch_ctl2;
767
768 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
769 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
770 DRM_DEBUG_KMS("pch backlight already enabled\n");
771 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
772 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
773 }
24ded204 774
96ab4c70
DV
775 pch_ctl2 = panel->backlight.max << 16;
776 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 777
96ab4c70
DV
778 pch_ctl1 = 0;
779 if (panel->backlight.active_low_pwm)
780 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 781
96ab4c70
DV
782 /* BDW always uses the pch pwm controls. */
783 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
784
785 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
786 POSTING_READ(BLC_PWM_PCH_CTL1);
787 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
788
789 /* This won't stick until the above enable. */
790 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW
791}
792
7bd688cd
JN
793static void pch_enable_backlight(struct intel_connector *connector)
794{
795 struct drm_device *dev = connector->base.dev;
796 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 797 struct intel_panel *panel = &connector->panel;
7bd688cd
JN
798 enum pipe pipe = intel_get_pipe_from_connector(connector);
799 enum transcoder cpu_transcoder =
800 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 801 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 802
b35684b8
JN
803 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
804 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 805 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN
806 cpu_ctl2 &= ~BLM_PWM_ENABLE;
807 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
808 }
7bd688cd 809
b35684b8
JN
810 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
811 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
812 DRM_DEBUG_KMS("pch backlight already enabled\n");
813 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
814 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
815 }
7bd688cd
JN
816
817 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 818 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 819 else
b35684b8
JN
820 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
821 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 822 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 823 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 824
b35684b8 825 /* This won't stick until the above enable. */
3bd712e5 826 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN
827
828 pch_ctl2 = panel->backlight.max << 16;
829 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
830
b35684b8
JN
831 pch_ctl1 = 0;
832 if (panel->backlight.active_low_pwm)
833 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 834
b35684b8
JN
835 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
836 POSTING_READ(BLC_PWM_PCH_CTL1);
837 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN
838}
839
840static void i9xx_enable_backlight(struct intel_connector *connector)
841{
b35684b8
JN
842 struct drm_device *dev = connector->base.dev;
843 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 844 struct intel_panel *panel = &connector->panel;
b35684b8
JN
845 u32 ctl, freq;
846
847 ctl = I915_READ(BLC_PWM_CTL);
848 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 849 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
850 I915_WRITE(BLC_PWM_CTL, 0);
851 }
3bd712e5 852
b35684b8
JN
853 freq = panel->backlight.max;
854 if (panel->backlight.combination_mode)
855 freq /= 0xff;
856
857 ctl = freq << 17;
b6ab66aa 858 if (panel->backlight.combination_mode)
b35684b8
JN
859 ctl |= BLM_LEGACY_MODE;
860 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
861 ctl |= BLM_POLARITY_PNV;
862
863 I915_WRITE(BLC_PWM_CTL, ctl);
864 POSTING_READ(BLC_PWM_CTL);
865
866 /* XXX: combine this into above write? */
3bd712e5 867 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 868}
8ba2d185 869
7bd688cd
JN
870static void i965_enable_backlight(struct intel_connector *connector)
871{
872 struct drm_device *dev = connector->base.dev;
873 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 874 struct intel_panel *panel = &connector->panel;
7bd688cd 875 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 876 u32 ctl, ctl2, freq;
7bd688cd 877
b35684b8
JN
878 ctl2 = I915_READ(BLC_PWM_CTL2);
879 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 880 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
881 ctl2 &= ~BLM_PWM_ENABLE;
882 I915_WRITE(BLC_PWM_CTL2, ctl2);
883 }
7bd688cd 884
b35684b8
JN
885 freq = panel->backlight.max;
886 if (panel->backlight.combination_mode)
887 freq /= 0xff;
7bd688cd 888
b35684b8
JN
889 ctl = freq << 16;
890 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 891
b35684b8
JN
892 ctl2 = BLM_PIPE(pipe);
893 if (panel->backlight.combination_mode)
894 ctl2 |= BLM_COMBINATION_MODE;
895 if (panel->backlight.active_low_pwm)
896 ctl2 |= BLM_POLARITY_I965;
897 I915_WRITE(BLC_PWM_CTL2, ctl2);
898 POSTING_READ(BLC_PWM_CTL2);
899 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN
900
901 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN
902}
903
904static void vlv_enable_backlight(struct intel_connector *connector)
905{
906 struct drm_device *dev = connector->base.dev;
907 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 908 struct intel_panel *panel = &connector->panel;
7bd688cd 909 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 910 u32 ctl, ctl2;
7bd688cd 911
b35684b8
JN
912 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
913 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 914 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN
915 ctl2 &= ~BLM_PWM_ENABLE;
916 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
917 }
7bd688cd 918
b35684b8
JN
919 ctl = panel->backlight.max << 16;
920 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 921
b35684b8
JN
922 /* XXX: combine this into above write? */
923 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 924
b35684b8
JN
925 ctl2 = 0;
926 if (panel->backlight.active_low_pwm)
927 ctl2 |= BLM_POLARITY_I965;
928 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 929 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 930 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW
931}
932
752aa88a 933void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 934{
752aa88a 935 struct drm_device *dev = connector->base.dev;
47356eb6 936 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 937 struct intel_panel *panel = &connector->panel;
752aa88a 938 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185
JN
939 unsigned long flags;
940
dc5a4363 941 if (!panel->backlight.present || pipe == INVALID_PIPE)
752aa88a
JB
942 return;
943
6f2bcceb 944 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 945
58c68779 946 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
47356eb6 947
f91c15e0
JN
948 WARN_ON(panel->backlight.max == 0);
949
58c68779 950 if (panel->backlight.level == 0) {
f91c15e0 951 panel->backlight.level = panel->backlight.max;
58c68779
JN
952 if (panel->backlight.device)
953 panel->backlight.device->props.brightness =
6dda730e
JN
954 scale_hw_to_user(connector,
955 panel->backlight.level,
956 panel->backlight.device->props.max_brightness);
b6b3ba5b 957 }
47356eb6 958
3bd712e5 959 dev_priv->display.enable_backlight(connector);
58c68779 960 panel->backlight.enabled = true;
ab656bb9
JN
961 if (panel->backlight.device)
962 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 963
58c68779 964 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
47356eb6
CW
965}
966
912e8b12 967#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 968static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 969{
752aa88a 970 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 971 struct intel_panel *panel = &connector->panel;
752aa88a
JB
972 struct drm_device *dev = connector->base.dev;
973
51fd371b 974 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW
975 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
976 bd->props.brightness, bd->props.max_brightness);
752aa88a 977 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 978 bd->props.max_brightness);
ab656bb9
JN
979
980 /*
981 * Allow flipping bl_power as a sub-state of enabled. Sadly the
982 * backlight class device does not make it easy to to differentiate
983 * between callbacks for brightness and bl_power, so our backlight_power
984 * callback needs to take this into account.
985 */
986 if (panel->backlight.enabled) {
987 if (panel->backlight_power) {
e6755fb7
JN
988 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
989 bd->props.brightness != 0;
ab656bb9
JN
990 panel->backlight_power(connector, enable);
991 }
992 } else {
993 bd->props.power = FB_BLANK_POWERDOWN;
994 }
995
51fd371b 996 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG
997 return 0;
998}
999
db31af1d 1000static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1001{
752aa88a
JB
1002 struct intel_connector *connector = bl_get_data(bd);
1003 struct drm_device *dev = connector->base.dev;
c8c8fb33 1004 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1005 u32 hw_level;
7bd688cd 1006 int ret;
752aa88a 1007
c8c8fb33 1008 intel_runtime_pm_get(dev_priv);
51fd371b 1009 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN
1010
1011 hw_level = intel_panel_get_backlight(connector);
1012 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1013
51fd371b 1014 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1015 intel_runtime_pm_put(dev_priv);
752aa88a 1016
7bd688cd 1017 return ret;
aaa6fd2a
MG
1018}
1019
db31af1d
JN
1020static const struct backlight_ops intel_backlight_device_ops = {
1021 .update_status = intel_backlight_device_update_status,
1022 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG
1023};
1024
db31af1d 1025static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1026{
58c68779 1027 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1028 struct backlight_properties props;
aaa6fd2a 1029
58c68779 1030 if (WARN_ON(panel->backlight.device))
dc652f90
JN
1031 return -ENODEV;
1032
6dda730e 1033 WARN_ON(panel->backlight.max == 0);
7bd688cd 1034
af437cfd 1035 memset(&props, 0, sizeof(props));
aaa6fd2a 1036 props.type = BACKLIGHT_RAW;
6dda730e
JN
1037
1038 /*
1039 * Note: Everything should work even if the backlight device max
1040 * presented to the userspace is arbitrarily chosen.
1041 */
7bd688cd 1042 props.max_brightness = panel->backlight.max;
6dda730e
JN
1043 props.brightness = scale_hw_to_user(connector,
1044 panel->backlight.level,
1045 props.max_brightness);
58c68779 1046
ab656bb9
JN
1047 if (panel->backlight.enabled)
1048 props.power = FB_BLANK_UNBLANK;
1049 else
1050 props.power = FB_BLANK_POWERDOWN;
1051
58c68779
JN
1052 /*
1053 * Note: using the same name independent of the connector prevents
1054 * registration of multiple backlight devices in the driver.
1055 */
1056 panel->backlight.device =
aaa6fd2a 1057 backlight_device_register("intel_backlight",
db31af1d
JN
1058 connector->base.kdev,
1059 connector,
1060 &intel_backlight_device_ops, &props);
aaa6fd2a 1061
58c68779 1062 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1063 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN
1064 PTR_ERR(panel->backlight.device));
1065 panel->backlight.device = NULL;
aaa6fd2a
MG
1066 return -ENODEV;
1067 }
aaa6fd2a
MG
1068 return 0;
1069}
1070
db31af1d 1071static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1072{
58c68779
JN
1073 struct intel_panel *panel = &connector->panel;
1074
1075 if (panel->backlight.device) {
1076 backlight_device_unregister(panel->backlight.device);
1077 panel->backlight.device = NULL;
dc652f90 1078 }
aaa6fd2a 1079}
db31af1d
JN
1080#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1081static int intel_backlight_device_register(struct intel_connector *connector)
1082{
1083 return 0;
1084}
1085static void intel_backlight_device_unregister(struct intel_connector *connector)
1086{
1087}
1088#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1089
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1090/*
1091 * Note: The setup hooks can't assume pipe is set!
1092 *
1093 * XXX: Query mode clock or hardware clock and program PWM modulation frequency
1094 * appropriately when it's 0. Use VBT and/or sane defaults.
1095 */
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1096static u32 get_backlight_min_vbt(struct intel_connector *connector)
1097{
1098 struct drm_device *dev = connector->base.dev;
1099 struct drm_i915_private *dev_priv = dev->dev_private;
1100 struct intel_panel *panel = &connector->panel;
1101
1102 WARN_ON(panel->backlight.max == 0);
1103
1104 /* vbt value is a coefficient in range [0..255] */
1105 return scale(dev_priv->vbt.backlight.min_brightness, 0, 255,
1106 0, panel->backlight.max);
1107}
1108
96ab4c70 1109static int bdw_setup_backlight(struct intel_connector *connector)
aaa6fd2a 1110{
96ab4c70 1111 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1112 struct drm_i915_private *dev_priv = dev->dev_private;
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DV
1113 struct intel_panel *panel = &connector->panel;
1114 u32 pch_ctl1, pch_ctl2, val;
1115
1116 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1117 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1118
1119 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1120 panel->backlight.max = pch_ctl2 >> 16;
1121 if (!panel->backlight.max)
1122 return -ENODEV;
1123
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1124 panel->backlight.min = get_backlight_min_vbt(connector);
1125
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1126 val = bdw_get_backlight(connector);
1127 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1128
1129 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1130 panel->backlight.level != 0;
1131
1132 return 0;
1133}
1134
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1135static int pch_setup_backlight(struct intel_connector *connector)
1136{
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1137 struct drm_device *dev = connector->base.dev;
1138 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1139 struct intel_panel *panel = &connector->panel;
636baebf 1140 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1141
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1142 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1143 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1144
1145 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1146 panel->backlight.max = pch_ctl2 >> 16;
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1147 if (!panel->backlight.max)
1148 return -ENODEV;
1149
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1150 panel->backlight.min = get_backlight_min_vbt(connector);
1151
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1152 val = pch_get_backlight(connector);
1153 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1154
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1155 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1156 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1157 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1158
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1159 return 0;
1160}
1161
1162static int i9xx_setup_backlight(struct intel_connector *connector)
1163{
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1164 struct drm_device *dev = connector->base.dev;
1165 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1166 struct intel_panel *panel = &connector->panel;
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1167 u32 ctl, val;
1168
1169 ctl = I915_READ(BLC_PWM_CTL);
1170
b6ab66aa 1171 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
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1172 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1173
1174 if (IS_PINEVIEW(dev))
1175 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1176
1177 panel->backlight.max = ctl >> 17;
1178 if (panel->backlight.combination_mode)
1179 panel->backlight.max *= 0xff;
7bd688cd 1180
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1181 if (!panel->backlight.max)
1182 return -ENODEV;
1183
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1184 panel->backlight.min = get_backlight_min_vbt(connector);
1185
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1186 val = i9xx_get_backlight(connector);
1187 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1188
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1189 panel->backlight.enabled = panel->backlight.level != 0;
1190
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1191 return 0;
1192}
1193
1194static int i965_setup_backlight(struct intel_connector *connector)
1195{
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1196 struct drm_device *dev = connector->base.dev;
1197 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1198 struct intel_panel *panel = &connector->panel;
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1199 u32 ctl, ctl2, val;
1200
1201 ctl2 = I915_READ(BLC_PWM_CTL2);
1202 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1203 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1204
1205 ctl = I915_READ(BLC_PWM_CTL);
1206 panel->backlight.max = ctl >> 16;
1207 if (panel->backlight.combination_mode)
1208 panel->backlight.max *= 0xff;
7bd688cd 1209
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1210 if (!panel->backlight.max)
1211 return -ENODEV;
1212
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1213 panel->backlight.min = get_backlight_min_vbt(connector);
1214
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1215 val = i9xx_get_backlight(connector);
1216 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1217
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1218 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1219 panel->backlight.level != 0;
1220
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1221 return 0;
1222}
1223
1224static int vlv_setup_backlight(struct intel_connector *connector)
1225{
1226 struct drm_device *dev = connector->base.dev;
1227 struct drm_i915_private *dev_priv = dev->dev_private;
1228 struct intel_panel *panel = &connector->panel;
1229 enum pipe pipe;
636baebf 1230 u32 ctl, ctl2, val;
7bd688cd 1231
055e393f 1232 for_each_pipe(dev_priv, pipe) {
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1233 u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
1234
1235 /* Skip if the modulation freq is already set */
1236 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
1237 continue;
1238
1239 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
1240 I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) |
1241 cur_val);
1242 }
1243
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1244 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
1245 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1246
1247 ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
1248 panel->backlight.max = ctl >> 16;
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1249 if (!panel->backlight.max)
1250 return -ENODEV;
1251
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1252 panel->backlight.min = get_backlight_min_vbt(connector);
1253
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1254 val = _vlv_get_backlight(dev, PIPE_A);
1255 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1256
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1257 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1258 panel->backlight.level != 0;
1259
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1260 return 0;
1261}
1262
0657b6b1 1263int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a 1264{
db31af1d 1265 struct drm_device *dev = connector->dev;
7bd688cd 1266 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1267 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1268 struct intel_panel *panel = &intel_connector->panel;
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1269 unsigned long flags;
1270 int ret;
db31af1d 1271
c675949e 1272 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD
1273 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1274 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1275 } else {
1276 DRM_DEBUG_KMS("no backlight present per VBT\n");
1277 return 0;
1278 }
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1279 }
1280
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1281 /* set level and max in panel struct */
1282 spin_lock_irqsave(&dev_priv->backlight_lock, flags);
1283 ret = dev_priv->display.setup_backlight(intel_connector);
1284 spin_unlock_irqrestore(&dev_priv->backlight_lock, flags);
1285
1286 if (ret) {
1287 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1288 connector->name);
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1289 return ret;
1290 }
db31af1d 1291
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1292 intel_backlight_device_register(intel_connector);
1293
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1294 panel->backlight.present = true;
1295
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1296 DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, "
1297 "sysfs interface %sregistered\n",
1298 panel->backlight.enabled ? "enabled" : "disabled",
1299 panel->backlight.level, panel->backlight.max,
1300 panel->backlight.device ? "" : "not ");
1301
aaa6fd2a
MG
1302 return 0;
1303}
1304
db31af1d 1305void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1306{
db31af1d 1307 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1308 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1309
c91c9f32 1310 panel->backlight.present = false;
db31af1d 1311 intel_backlight_device_unregister(intel_connector);
aaa6fd2a 1312}
1d508706 1313
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1314/* Set up chip specific backlight functions */
1315void intel_panel_init_backlight_funcs(struct drm_device *dev)
1316{
1317 struct drm_i915_private *dev_priv = dev->dev_private;
1318
96ab4c70
DV
1319 if (IS_BROADWELL(dev)) {
1320 dev_priv->display.setup_backlight = bdw_setup_backlight;
1321 dev_priv->display.enable_backlight = bdw_enable_backlight;
1322 dev_priv->display.disable_backlight = pch_disable_backlight;
1323 dev_priv->display.set_backlight = bdw_set_backlight;
1324 dev_priv->display.get_backlight = bdw_get_backlight;
1325 } else if (HAS_PCH_SPLIT(dev)) {
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1326 dev_priv->display.setup_backlight = pch_setup_backlight;
1327 dev_priv->display.enable_backlight = pch_enable_backlight;
1328 dev_priv->display.disable_backlight = pch_disable_backlight;
1329 dev_priv->display.set_backlight = pch_set_backlight;
1330 dev_priv->display.get_backlight = pch_get_backlight;
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1331 } else if (IS_VALLEYVIEW(dev)) {
1332 dev_priv->display.setup_backlight = vlv_setup_backlight;
1333 dev_priv->display.enable_backlight = vlv_enable_backlight;
1334 dev_priv->display.disable_backlight = vlv_disable_backlight;
1335 dev_priv->display.set_backlight = vlv_set_backlight;
1336 dev_priv->display.get_backlight = vlv_get_backlight;
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1337 } else if (IS_GEN4(dev)) {
1338 dev_priv->display.setup_backlight = i965_setup_backlight;
1339 dev_priv->display.enable_backlight = i965_enable_backlight;
1340 dev_priv->display.disable_backlight = i965_disable_backlight;
1341 dev_priv->display.set_backlight = i9xx_set_backlight;
1342 dev_priv->display.get_backlight = i9xx_get_backlight;
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1343 } else {
1344 dev_priv->display.setup_backlight = i9xx_setup_backlight;
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1345 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1346 dev_priv->display.disable_backlight = i9xx_disable_backlight;
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1347 dev_priv->display.set_backlight = i9xx_set_backlight;
1348 dev_priv->display.get_backlight = i9xx_get_backlight;
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1349 }
1350}
1351
dd06f90e 1352int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK
1353 struct drm_display_mode *fixed_mode,
1354 struct drm_display_mode *downclock_mode)
1d508706 1355{
dd06f90e 1356 panel->fixed_mode = fixed_mode;
4b6ed685 1357 panel->downclock_mode = downclock_mode;
dd06f90e 1358
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1359 return 0;
1360}
1361
1362void intel_panel_fini(struct intel_panel *panel)
1363{
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1364 struct intel_connector *intel_connector =
1365 container_of(panel, struct intel_connector, panel);
1366
1367 if (panel->fixed_mode)
1368 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
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VK
1369
1370 if (panel->downclock_mode)
1371 drm_mode_destroy(intel_connector->base.dev,
1372 panel->downclock_mode);
1d508706 1373}