[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / i915 / intel_panel.c

/*
 * Copyright © 2006-2010 Intel Corporation
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *      Dave Airlie <airlied@linux.ie>
 *      Jesse Barnes <jesse.barnes@intel.com>
 *      Chris Wilson <chris@chris-wilson.co.uk>
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/moduleparam.h>
#include "intel_drv.h"

#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */

void
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
		       struct drm_display_mode *adjusted_mode)
{
	adjusted_mode->hdisplay = fixed_mode->hdisplay;
	adjusted_mode->hsync_start = fixed_mode->hsync_start;
	adjusted_mode->hsync_end = fixed_mode->hsync_end;
	adjusted_mode->htotal = fixed_mode->htotal;

	adjusted_mode->vdisplay = fixed_mode->vdisplay;
	adjusted_mode->vsync_start = fixed_mode->vsync_start;
	adjusted_mode->vsync_end = fixed_mode->vsync_end;
	adjusted_mode->vtotal = fixed_mode->vtotal;

	adjusted_mode->clock = fixed_mode->clock;
}

/* adjusted_mode has been preset to be the panel's fixed mode */
void
intel_pch_panel_fitting(struct drm_device *dev,
			int fitting_mode,
			const struct drm_display_mode *mode,
			struct drm_display_mode *adjusted_mode)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	int x, y, width, height;

	x = y = width = height = 0;

	/* Native modes don't need fitting */
	if (adjusted_mode->hdisplay == mode->hdisplay &&
	    adjusted_mode->vdisplay == mode->vdisplay)
		goto done;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
		width = mode->hdisplay;
		height = mode->vdisplay;
		x = (adjusted_mode->hdisplay - width + 1)/2;
		y = (adjusted_mode->vdisplay - height + 1)/2;
		break;

	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
		{
			u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
			u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
			if (scaled_width > scaled_height) { /* pillar */
				width = scaled_height / mode->vdisplay;
				if (width & 1)
					width++;
				x = (adjusted_mode->hdisplay - width + 1) / 2;
				y = 0;
				height = adjusted_mode->vdisplay;
			} else if (scaled_width < scaled_height) { /* letter */
				height = scaled_width / mode->hdisplay;
				if (height & 1)
				    height++;
				y = (adjusted_mode->vdisplay - height + 1) / 2;
				x = 0;
				width = adjusted_mode->hdisplay;
			} else {
				x = y = 0;
				width = adjusted_mode->hdisplay;
				height = adjusted_mode->vdisplay;
			}
		}
		break;

	default:
	case DRM_MODE_SCALE_FULLSCREEN:
		x = y = 0;
		width = adjusted_mode->hdisplay;
		height = adjusted_mode->vdisplay;
		break;
	}

done:
	dev_priv->pch_pf_pos = (x << 16) | y;
	dev_priv->pch_pf_size = (width << 16) | height;
}

static int is_backlight_combination_mode(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	if (INTEL_INFO(dev)->gen >= 4)
		return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;

	if (IS_GEN2(dev))
		return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;

	return 0;
}

static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 val;

	/* Restore the CTL value if it lost, e.g. GPU reset */

	if (HAS_PCH_SPLIT(dev_priv->dev)) {
		val = I915_READ(BLC_PWM_PCH_CTL2);
		if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
			dev_priv->regfile.saveBLC_PWM_CTL2 = val;
		} else if (val == 0) {
			val = dev_priv->regfile.saveBLC_PWM_CTL2;
			I915_WRITE(BLC_PWM_PCH_CTL2, val);
		}
	} else {
		val = I915_READ(BLC_PWM_CTL);
		if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
			dev_priv->regfile.saveBLC_PWM_CTL = val;
			if (INTEL_INFO(dev)->gen >= 4)
				dev_priv->regfile.saveBLC_PWM_CTL2 =
					I915_READ(BLC_PWM_CTL2);
		} else if (val == 0) {
			val = dev_priv->regfile.saveBLC_PWM_CTL;
			I915_WRITE(BLC_PWM_CTL, val);
			if (INTEL_INFO(dev)->gen >= 4)
				I915_WRITE(BLC_PWM_CTL2,
					   dev_priv->regfile.saveBLC_PWM_CTL2);
		}
	}

	return val;
}

static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
{
	u32 max;

	max = i915_read_blc_pwm_ctl(dev);

	if (HAS_PCH_SPLIT(dev)) {
		max >>= 16;
	} else {
		if (INTEL_INFO(dev)->gen < 4)
			max >>= 17;
		else
			max >>= 16;

		if (is_backlight_combination_mode(dev))
			max *= 0xff;
	}

	return max;
}

u32 intel_panel_get_max_backlight(struct drm_device *dev)
{
	u32 max;

	max = _intel_panel_get_max_backlight(dev);
	if (max == 0) {
		/* XXX add code here to query mode clock or hardware clock
		 * and program max PWM appropriately.
		 */
		pr_warn_once("fixme: max PWM is zero\n");
		return 1;
	}

	DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
	return max;
}

static int i915_panel_invert_brightness;
MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
	"(-1 force normal, 0 machine defaults, 1 force inversion), please "
	"report PCI device ID, subsystem vendor and subsystem device ID "
	"to dri-devel@lists.freedesktop.org, if your machine needs it. "
	"It will then be included in an upcoming module version.");
module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	if (i915_panel_invert_brightness < 0)
		return val;

	if (i915_panel_invert_brightness > 0 ||
	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
		return intel_panel_get_max_backlight(dev) - val;

	return val;
}

static u32 intel_panel_get_backlight(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 val;

	if (HAS_PCH_SPLIT(dev)) {
		val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
	} else {
		val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
		if (INTEL_INFO(dev)->gen < 4)
			val >>= 1;

		if (is_backlight_combination_mode(dev)) {
			u8 lbpc;

			pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
			val *= lbpc;
		}
	}

	val = intel_panel_compute_brightness(dev, val);
	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
	return val;
}

static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(BLC_PWM_CPU_CTL, val | level);
}

static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 tmp;

	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
	level = intel_panel_compute_brightness(dev, level);

	if (HAS_PCH_SPLIT(dev))
		return intel_pch_panel_set_backlight(dev, level);

	if (is_backlight_combination_mode(dev)) {
		u32 max = intel_panel_get_max_backlight(dev);
		u8 lbpc;

		lbpc = level * 0xfe / max + 1;
		level /= lbpc;
		pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
	}

	tmp = I915_READ(BLC_PWM_CTL);
	if (INTEL_INFO(dev)->gen < 4)
		level <<= 1;
	tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
	I915_WRITE(BLC_PWM_CTL, tmp | level);
}

void intel_panel_set_backlight(struct drm_device *dev, u32 level)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	dev_priv->backlight.level = level;
	if (dev_priv->backlight.device)
		dev_priv->backlight.device->props.brightness = level;

	if (dev_priv->backlight.enabled)
		intel_panel_actually_set_backlight(dev, level);
}

void intel_panel_disable_backlight(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	dev_priv->backlight.enabled = false;
	intel_panel_actually_set_backlight(dev, 0);

	if (INTEL_INFO(dev)->gen >= 4) {
		uint32_t reg, tmp;

		reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;

		I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);

		if (HAS_PCH_SPLIT(dev)) {
			tmp = I915_READ(BLC_PWM_PCH_CTL1);
			tmp &= ~BLM_PCH_PWM_ENABLE;
			I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
		}
	}
}

void intel_panel_enable_backlight(struct drm_device *dev,
				  enum pipe pipe)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	if (dev_priv->backlight.level == 0) {
		dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
		if (dev_priv->backlight.device)
			dev_priv->backlight.device->props.brightness =
				dev_priv->backlight.level;
	}

	if (INTEL_INFO(dev)->gen >= 4) {
		uint32_t reg, tmp;

		reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;


		tmp = I915_READ(reg);

		/* Note that this can also get called through dpms changes. And
		 * we don't track the backlight dpms state, hence check whether
		 * we have to do anything first. */
		if (tmp & BLM_PWM_ENABLE)
			goto set_level;

		if (INTEL_INFO(dev)->num_pipes == 3)
			tmp &= ~BLM_PIPE_SELECT_IVB;
		else
			tmp &= ~BLM_PIPE_SELECT;

		tmp |= BLM_PIPE(pipe);
		tmp &= ~BLM_PWM_ENABLE;

		I915_WRITE(reg, tmp);
		POSTING_READ(reg);
		I915_WRITE(reg, tmp | BLM_PWM_ENABLE);

		if (HAS_PCH_SPLIT(dev)) {
			tmp = I915_READ(BLC_PWM_PCH_CTL1);
			tmp |= BLM_PCH_PWM_ENABLE;
			tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
			I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
		}
	}

set_level:
	/* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
	 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
	 * registers are set.
	 */
	dev_priv->backlight.enabled = true;
	intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
}

static void intel_panel_init_backlight(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	dev_priv->backlight.level = intel_panel_get_backlight(dev);
	dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
}

enum drm_connector_status
intel_panel_detect(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	/* Assume that the BIOS does not lie through the OpRegion... */
	if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
		return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
			connector_status_connected :
			connector_status_disconnected;
	}

	switch (i915_panel_ignore_lid) {
	case -2:
		return connector_status_connected;
	case -1:
		return connector_status_disconnected;
	default:
		return connector_status_unknown;
	}
}

#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
static int intel_panel_update_status(struct backlight_device *bd)
{
	struct drm_device *dev = bl_get_data(bd);
	intel_panel_set_backlight(dev, bd->props.brightness);
	return 0;
}

static int intel_panel_get_brightness(struct backlight_device *bd)
{
	struct drm_device *dev = bl_get_data(bd);
	return intel_panel_get_backlight(dev);
}

static const struct backlight_ops intel_panel_bl_ops = {
	.update_status = intel_panel_update_status,
	.get_brightness = intel_panel_get_brightness,
};

int intel_panel_setup_backlight(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct backlight_properties props;

	intel_panel_init_backlight(dev);

	memset(&props, 0, sizeof(props));
	props.type = BACKLIGHT_RAW;
	props.brightness = dev_priv->backlight.level;
	props.max_brightness = _intel_panel_get_max_backlight(dev);
	if (props.max_brightness == 0) {
		DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
		return -ENODEV;
	}
	dev_priv->backlight.device =
		backlight_device_register("intel_backlight",
					  &connector->kdev, dev,
					  &intel_panel_bl_ops, &props);

	if (IS_ERR(dev_priv->backlight.device)) {
		DRM_ERROR("Failed to register backlight: %ld\n",
			  PTR_ERR(dev_priv->backlight.device));
		dev_priv->backlight.device = NULL;
		return -ENODEV;
	}
	return 0;
}

void intel_panel_destroy_backlight(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	if (dev_priv->backlight.device)
		backlight_device_unregister(dev_priv->backlight.device);
}
#else
int intel_panel_setup_backlight(struct drm_connector *connector)
{
	intel_panel_init_backlight(connector->dev);
	return 0;
}

void intel_panel_destroy_backlight(struct drm_device *dev)
{
	return;
}
#endif

int intel_panel_init(struct intel_panel *panel,
		     struct drm_display_mode *fixed_mode)
{
	panel->fixed_mode = fixed_mode;

	return 0;
}

void intel_panel_fini(struct intel_panel *panel)
{
	struct intel_connector *intel_connector =
		container_of(panel, struct intel_connector, panel);

	if (panel->fixed_mode)
		drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
}
Commit	Line	Data
1d8e1c75 CW	1	/*
	2	* Copyright © 2006-2010 Intel Corporation
	3	* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	* Dave Airlie <airlied@linux.ie>
	27	* Jesse Barnes <jesse.barnes@intel.com>
	28	* Chris Wilson <chris@chris-wilson.co.uk>
	29	*/
	30
a70491cc JP	31	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
a70491cc JP	32
7bd90909	33	#include <linux/moduleparam.h>
1d8e1c75 CW	34	#include "intel_drv.h"
1d8e1c75 CW	35
ba3820ad TI	36	#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
ba3820ad TI	37
1d8e1c75 CW	38	void
	39	intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
	40	struct drm_display_mode *adjusted_mode)
	41	{
	42	adjusted_mode->hdisplay = fixed_mode->hdisplay;
	43	adjusted_mode->hsync_start = fixed_mode->hsync_start;
	44	adjusted_mode->hsync_end = fixed_mode->hsync_end;
	45	adjusted_mode->htotal = fixed_mode->htotal;
	46
	47	adjusted_mode->vdisplay = fixed_mode->vdisplay;
	48	adjusted_mode->vsync_start = fixed_mode->vsync_start;
	49	adjusted_mode->vsync_end = fixed_mode->vsync_end;
	50	adjusted_mode->vtotal = fixed_mode->vtotal;
	51
	52	adjusted_mode->clock = fixed_mode->clock;
1d8e1c75 CW	53	}
	54
	55	/* adjusted_mode has been preset to be the panel's fixed mode */
	56	void
	57	intel_pch_panel_fitting(struct drm_device *dev,
	58	int fitting_mode,
cb1793ce	59	const struct drm_display_mode *mode,
1d8e1c75 CW	60	struct drm_display_mode *adjusted_mode)
	61	{
	62	struct drm_i915_private *dev_priv = dev->dev_private;
	63	int x, y, width, height;
	64
	65	x = y = width = height = 0;
	66
	67	/* Native modes don't need fitting */
	68	if (adjusted_mode->hdisplay == mode->hdisplay &&
	69	adjusted_mode->vdisplay == mode->vdisplay)
	70	goto done;
	71
	72	switch (fitting_mode) {
	73	case DRM_MODE_SCALE_CENTER:
	74	width = mode->hdisplay;
	75	height = mode->vdisplay;
	76	x = (adjusted_mode->hdisplay - width + 1)/2;
	77	y = (adjusted_mode->vdisplay - height + 1)/2;
	78	break;
	79
	80	case DRM_MODE_SCALE_ASPECT:
	81	/* Scale but preserve the aspect ratio */
	82	{
	83	u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
	84	u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
	85	if (scaled_width > scaled_height) { /* pillar */
	86	width = scaled_height / mode->vdisplay;
302983e9	87	if (width & 1)
0206e353	88	width++;
1d8e1c75 CW	89	x = (adjusted_mode->hdisplay - width + 1) / 2;
	90	y = 0;
	91	height = adjusted_mode->vdisplay;
	92	} else if (scaled_width < scaled_height) { /* letter */
	93	height = scaled_width / mode->hdisplay;
302983e9 AJ	94	if (height & 1)
302983e9 AJ	95	height++;
1d8e1c75 CW	96	y = (adjusted_mode->vdisplay - height + 1) / 2;
	97	x = 0;
	98	width = adjusted_mode->hdisplay;
	99	} else {
	100	x = y = 0;
	101	width = adjusted_mode->hdisplay;
	102	height = adjusted_mode->vdisplay;
	103	}
	104	}
	105	break;
	106
	107	default:
	108	case DRM_MODE_SCALE_FULLSCREEN:
	109	x = y = 0;
	110	width = adjusted_mode->hdisplay;
	111	height = adjusted_mode->vdisplay;
	112	break;
	113	}
	114
	115	done:
	116	dev_priv->pch_pf_pos = (x << 16) \| y;
	117	dev_priv->pch_pf_size = (width << 16) \| height;
	118	}
a9573556	119
ba3820ad TI	120	static int is_backlight_combination_mode(struct drm_device *dev)
	121	{
	122	struct drm_i915_private *dev_priv = dev->dev_private;
	123
	124	if (INTEL_INFO(dev)->gen >= 4)
	125	return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
	126
	127	if (IS_GEN2(dev))
	128	return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
	129
	130	return 0;
	131	}
	132
bfd7590d	133	static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
0b0b053a	134	{
bfd7590d	135	struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a CW	136	u32 val;
	137
	138	/* Restore the CTL value if it lost, e.g. GPU reset */
	139
	140	if (HAS_PCH_SPLIT(dev_priv->dev)) {
	141	val = I915_READ(BLC_PWM_PCH_CTL2);
f4c956ad DV	142	if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
f4c956ad DV	143	dev_priv->regfile.saveBLC_PWM_CTL2 = val;
0b0b053a	144	} else if (val == 0) {
f4c956ad	145	val = dev_priv->regfile.saveBLC_PWM_CTL2;
bfd7590d	146	I915_WRITE(BLC_PWM_PCH_CTL2, val);
0b0b053a CW	147	}
	148	} else {
	149	val = I915_READ(BLC_PWM_CTL);
f4c956ad DV	150	if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
f4c956ad DV	151	dev_priv->regfile.saveBLC_PWM_CTL = val;
bfd7590d JN	152	if (INTEL_INFO(dev)->gen >= 4)
	153	dev_priv->regfile.saveBLC_PWM_CTL2 =
	154	I915_READ(BLC_PWM_CTL2);
0b0b053a	155	} else if (val == 0) {
f4c956ad	156	val = dev_priv->regfile.saveBLC_PWM_CTL;
bfd7590d JN	157	I915_WRITE(BLC_PWM_CTL, val);
	158	if (INTEL_INFO(dev)->gen >= 4)
	159	I915_WRITE(BLC_PWM_CTL2,
	160	dev_priv->regfile.saveBLC_PWM_CTL2);
0b0b053a CW	161	}
	162	}
	163
	164	return val;
	165	}
	166
28dcc2d6	167	static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
a9573556	168	{
a9573556 CW	169	u32 max;
a9573556 CW	170
bfd7590d	171	max = i915_read_blc_pwm_ctl(dev);
0b0b053a	172
a9573556	173	if (HAS_PCH_SPLIT(dev)) {
0b0b053a	174	max >>= 16;
a9573556	175	} else {
ca88479c	176	if (INTEL_INFO(dev)->gen < 4)
a9573556	177	max >>= 17;
ca88479c	178	else
a9573556	179	max >>= 16;
ba3820ad TI	180
	181	if (is_backlight_combination_mode(dev))
	182	max *= 0xff;
a9573556 CW	183	}
a9573556 CW	184
28dcc2d6 JN	185	return max;
	186	}
	187
	188	u32 intel_panel_get_max_backlight(struct drm_device *dev)
	189	{
	190	u32 max;
	191
	192	max = _intel_panel_get_max_backlight(dev);
	193	if (max == 0) {
	194	/* XXX add code here to query mode clock or hardware clock
	195	* and program max PWM appropriately.
	196	*/
	197	pr_warn_once("fixme: max PWM is zero\n");
	198	return 1;
	199	}
	200
a9573556 CW	201	DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
	202	return max;
	203	}
	204
4dca20ef CE	205	static int i915_panel_invert_brightness;
	206	MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
	207	"(-1 force normal, 0 machine defaults, 1 force inversion), please "
7bd90909 CE	208	"report PCI device ID, subsystem vendor and subsystem device ID "
	209	"to dri-devel@lists.freedesktop.org, if your machine needs it. "
	210	"It will then be included in an upcoming module version.");
4dca20ef	211	module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
7bd90909 CE	212	static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
7bd90909 CE	213	{
4dca20ef CE	214	struct drm_i915_private *dev_priv = dev->dev_private;
	215
	216	if (i915_panel_invert_brightness < 0)
	217	return val;
	218
	219	if (i915_panel_invert_brightness > 0 \|\|
	220	dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
7bd90909 CE	221	return intel_panel_get_max_backlight(dev) - val;
	222
	223	return val;
	224	}
	225
faea35dd	226	static u32 intel_panel_get_backlight(struct drm_device *dev)
a9573556 CW	227	{
	228	struct drm_i915_private *dev_priv = dev->dev_private;
	229	u32 val;
	230
	231	if (HAS_PCH_SPLIT(dev)) {
	232	val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
	233	} else {
	234	val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
ca88479c	235	if (INTEL_INFO(dev)->gen < 4)
a9573556	236	val >>= 1;
ba3820ad	237
0206e353	238	if (is_backlight_combination_mode(dev)) {
ba3820ad TI	239	u8 lbpc;
ba3820ad TI	240
ba3820ad TI	241	pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
	242	val *= lbpc;
	243	}
a9573556 CW	244	}
a9573556 CW	245
7bd90909	246	val = intel_panel_compute_brightness(dev, val);
a9573556 CW	247	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
	248	return val;
	249	}
	250
	251	static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
	252	{
	253	struct drm_i915_private *dev_priv = dev->dev_private;
	254	u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	255	I915_WRITE(BLC_PWM_CPU_CTL, val \| level);
	256	}
	257
f52c619a	258	static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
a9573556 CW	259	{
	260	struct drm_i915_private *dev_priv = dev->dev_private;
	261	u32 tmp;
	262
	263	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
7bd90909	264	level = intel_panel_compute_brightness(dev, level);
a9573556 CW	265
	266	if (HAS_PCH_SPLIT(dev))
	267	return intel_pch_panel_set_backlight(dev, level);
ba3820ad	268
0206e353	269	if (is_backlight_combination_mode(dev)) {
ba3820ad TI	270	u32 max = intel_panel_get_max_backlight(dev);
	271	u8 lbpc;
	272
	273	lbpc = level * 0xfe / max + 1;
	274	level /= lbpc;
	275	pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
	276	}
	277
a9573556	278	tmp = I915_READ(BLC_PWM_CTL);
a726915c	279	if (INTEL_INFO(dev)->gen < 4)
a9573556	280	level <<= 1;
ca88479c	281	tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
a9573556 CW	282	I915_WRITE(BLC_PWM_CTL, tmp \| level);
a9573556 CW	283	}
47356eb6	284
f52c619a	285	void intel_panel_set_backlight(struct drm_device *dev, u32 level)
47356eb6 CW	286	{
	287	struct drm_i915_private *dev_priv = dev->dev_private;
	288
31ad8ec6 JN	289	dev_priv->backlight.level = level;
	290	if (dev_priv->backlight.device)
	291	dev_priv->backlight.device->props.brightness = level;
b6b3ba5b	292
31ad8ec6	293	if (dev_priv->backlight.enabled)
f52c619a TI	294	intel_panel_actually_set_backlight(dev, level);
	295	}
	296
	297	void intel_panel_disable_backlight(struct drm_device *dev)
	298	{
	299	struct drm_i915_private *dev_priv = dev->dev_private;
47356eb6	300
31ad8ec6	301	dev_priv->backlight.enabled = false;
f52c619a	302	intel_panel_actually_set_backlight(dev, 0);
24ded204 DV	303
24ded204 DV	304	if (INTEL_INFO(dev)->gen >= 4) {
a4f32fc3	305	uint32_t reg, tmp;
24ded204 DV	306
	307	reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
	308
	309	I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
a4f32fc3 PZ	310
	311	if (HAS_PCH_SPLIT(dev)) {
	312	tmp = I915_READ(BLC_PWM_PCH_CTL1);
	313	tmp &= ~BLM_PCH_PWM_ENABLE;
	314	I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
	315	}
24ded204	316	}
47356eb6 CW	317	}
47356eb6 CW	318
24ded204 DV	319	void intel_panel_enable_backlight(struct drm_device *dev,
24ded204 DV	320	enum pipe pipe)
47356eb6 CW	321	{
	322	struct drm_i915_private *dev_priv = dev->dev_private;
	323
31ad8ec6 JN	324	if (dev_priv->backlight.level == 0) {
	325	dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
	326	if (dev_priv->backlight.device)
	327	dev_priv->backlight.device->props.brightness =
	328	dev_priv->backlight.level;
b6b3ba5b	329	}
47356eb6	330
24ded204 DV	331	if (INTEL_INFO(dev)->gen >= 4) {
	332	uint32_t reg, tmp;
	333
	334	reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
	335
	336
	337	tmp = I915_READ(reg);
	338
	339	/* Note that this can also get called through dpms changes. And
	340	* we don't track the backlight dpms state, hence check whether
	341	* we have to do anything first. */
	342	if (tmp & BLM_PWM_ENABLE)
770c1231	343	goto set_level;
24ded204	344
7eb552ae	345	if (INTEL_INFO(dev)->num_pipes == 3)
24ded204 DV	346	tmp &= ~BLM_PIPE_SELECT_IVB;
	347	else
	348	tmp &= ~BLM_PIPE_SELECT;
	349
	350	tmp \|= BLM_PIPE(pipe);
	351	tmp &= ~BLM_PWM_ENABLE;
	352
	353	I915_WRITE(reg, tmp);
	354	POSTING_READ(reg);
	355	I915_WRITE(reg, tmp \| BLM_PWM_ENABLE);
a4f32fc3 PZ	356
	357	if (HAS_PCH_SPLIT(dev)) {
	358	tmp = I915_READ(BLC_PWM_PCH_CTL1);
	359	tmp \|= BLM_PCH_PWM_ENABLE;
	360	tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
	361	I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
	362	}
24ded204	363	}
770c1231 TI	364
770c1231 TI	365	set_level:
b1289371 DV	366	/* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
	367	* BLC_PWM_CPU_CTL may be cleared to zero automatically when these
	368	* registers are set.
770c1231	369	*/
ecb135a1 DV	370	dev_priv->backlight.enabled = true;
ecb135a1 DV	371	intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
47356eb6 CW	372	}
47356eb6 CW	373
aaa6fd2a	374	static void intel_panel_init_backlight(struct drm_device *dev)
47356eb6 CW	375	{
	376	struct drm_i915_private *dev_priv = dev->dev_private;
	377
31ad8ec6 JN	378	dev_priv->backlight.level = intel_panel_get_backlight(dev);
31ad8ec6 JN	379	dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
47356eb6	380	}
fe16d949 CW	381
	382	enum drm_connector_status
	383	intel_panel_detect(struct drm_device *dev)
	384	{
	385	struct drm_i915_private *dev_priv = dev->dev_private;
	386
	387	/* Assume that the BIOS does not lie through the OpRegion... */
a726915c	388	if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
fe16d949 CW	389	return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
	390	connector_status_connected :
	391	connector_status_disconnected;
a726915c	392	}
fe16d949	393
a726915c DV	394	switch (i915_panel_ignore_lid) {
	395	case -2:
	396	return connector_status_connected;
	397	case -1:
	398	return connector_status_disconnected;
	399	default:
	400	return connector_status_unknown;
	401	}
fe16d949	402	}
aaa6fd2a MG	403
	404	#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
	405	static int intel_panel_update_status(struct backlight_device *bd)
	406	{
	407	struct drm_device *dev = bl_get_data(bd);
	408	intel_panel_set_backlight(dev, bd->props.brightness);
	409	return 0;
	410	}
	411
	412	static int intel_panel_get_brightness(struct backlight_device *bd)
	413	{
	414	struct drm_device *dev = bl_get_data(bd);
7c23396b	415	return intel_panel_get_backlight(dev);
aaa6fd2a MG	416	}
	417
	418	static const struct backlight_ops intel_panel_bl_ops = {
	419	.update_status = intel_panel_update_status,
	420	.get_brightness = intel_panel_get_brightness,
	421	};
	422
0657b6b1	423	int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a	424	{
0657b6b1	425	struct drm_device *dev = connector->dev;
aaa6fd2a MG	426	struct drm_i915_private *dev_priv = dev->dev_private;
aaa6fd2a MG	427	struct backlight_properties props;
aaa6fd2a MG	428
	429	intel_panel_init_backlight(dev);
	430
af437cfd	431	memset(&props, 0, sizeof(props));
aaa6fd2a	432	props.type = BACKLIGHT_RAW;
31ad8ec6	433	props.brightness = dev_priv->backlight.level;
28dcc2d6 JN	434	props.max_brightness = _intel_panel_get_max_backlight(dev);
28dcc2d6 JN	435	if (props.max_brightness == 0) {
e86b6185	436	DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
28dcc2d6 JN	437	return -ENODEV;
28dcc2d6 JN	438	}
31ad8ec6	439	dev_priv->backlight.device =
aaa6fd2a MG	440	backlight_device_register("intel_backlight",
	441	&connector->kdev, dev,
	442	&intel_panel_bl_ops, &props);
	443
31ad8ec6	444	if (IS_ERR(dev_priv->backlight.device)) {
aaa6fd2a	445	DRM_ERROR("Failed to register backlight: %ld\n",
31ad8ec6 JN	446	PTR_ERR(dev_priv->backlight.device));
31ad8ec6 JN	447	dev_priv->backlight.device = NULL;
aaa6fd2a MG	448	return -ENODEV;
aaa6fd2a MG	449	}
aaa6fd2a MG	450	return 0;
	451	}
	452
	453	void intel_panel_destroy_backlight(struct drm_device *dev)
	454	{
	455	struct drm_i915_private *dev_priv = dev->dev_private;
31ad8ec6 JN	456	if (dev_priv->backlight.device)
31ad8ec6 JN	457	backlight_device_unregister(dev_priv->backlight.device);
aaa6fd2a MG	458	}
aaa6fd2a MG	459	#else
0657b6b1	460	int intel_panel_setup_backlight(struct drm_connector *connector)
aaa6fd2a	461	{
0657b6b1	462	intel_panel_init_backlight(connector->dev);
aaa6fd2a MG	463	return 0;
	464	}
	465
	466	void intel_panel_destroy_backlight(struct drm_device *dev)
	467	{
	468	return;
	469	}
	470	#endif
1d508706	471
dd06f90e JN	472	int intel_panel_init(struct intel_panel *panel,
dd06f90e JN	473	struct drm_display_mode *fixed_mode)
1d508706	474	{
dd06f90e JN	475	panel->fixed_mode = fixed_mode;
dd06f90e JN	476
1d508706 JN	477	return 0;
	478	}
	479
	480	void intel_panel_fini(struct intel_panel *panel)
	481	{
dd06f90e JN	482	struct intel_connector *intel_connector =
	483	container_of(panel, struct intel_connector, panel);
	484
	485	if (panel->fixed_mode)
	486	drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1d508706	487	}