[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / imx / ipuv3-plane.c

/*
 * i.MX IPUv3 DP Overlay Planes
 *
 * Copyright (C) 2013 Philipp Zabel, Pengutronix
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_plane_helper.h>

#include "video/imx-ipu-v3.h"
#include "ipuv3-plane.h"

static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
{
	return container_of(p, struct ipu_plane, base);
}

static const uint32_t ipu_plane_formats[] = {
	DRM_FORMAT_ARGB1555,
	DRM_FORMAT_XRGB1555,
	DRM_FORMAT_ABGR1555,
	DRM_FORMAT_XBGR1555,
	DRM_FORMAT_RGBA5551,
	DRM_FORMAT_BGRA5551,
	DRM_FORMAT_ARGB4444,
	DRM_FORMAT_ARGB8888,
	DRM_FORMAT_XRGB8888,
	DRM_FORMAT_ABGR8888,
	DRM_FORMAT_XBGR8888,
	DRM_FORMAT_RGBA8888,
	DRM_FORMAT_RGBX8888,
	DRM_FORMAT_BGRA8888,
	DRM_FORMAT_BGRA8888,
	DRM_FORMAT_UYVY,
	DRM_FORMAT_VYUY,
	DRM_FORMAT_YUYV,
	DRM_FORMAT_YVYU,
	DRM_FORMAT_YUV420,
	DRM_FORMAT_YVU420,
	DRM_FORMAT_RGB565,
};

int ipu_plane_irq(struct ipu_plane *ipu_plane)
{
	return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
				     IPU_IRQ_EOF);
}

static inline unsigned long
drm_plane_state_to_eba(struct drm_plane_state *state)
{
	struct drm_framebuffer *fb = state->fb;
	struct drm_gem_cma_object *cma_obj;

	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
	BUG_ON(!cma_obj);

	return cma_obj->paddr + fb->offsets[0] +
	       fb->pitches[0] * (state->src_y >> 16) +
	       (fb->bits_per_pixel >> 3) * (state->src_x >> 16);
}

static inline unsigned long
drm_plane_state_to_ubo(struct drm_plane_state *state)
{
	struct drm_framebuffer *fb = state->fb;
	struct drm_gem_cma_object *cma_obj;
	unsigned long eba = drm_plane_state_to_eba(state);

	cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
	BUG_ON(!cma_obj);

	return cma_obj->paddr + fb->offsets[1] +
	       fb->pitches[1] * (state->src_y >> 16) / 2 +
	       (state->src_x >> 16) / 2 - eba;
}

static inline unsigned long
drm_plane_state_to_vbo(struct drm_plane_state *state)
{
	struct drm_framebuffer *fb = state->fb;
	struct drm_gem_cma_object *cma_obj;
	unsigned long eba = drm_plane_state_to_eba(state);

	cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
	BUG_ON(!cma_obj);

	return cma_obj->paddr + fb->offsets[2] +
	       fb->pitches[2] * (state->src_y >> 16) / 2 +
	       (state->src_x >> 16) / 2 - eba;
}

static void ipu_plane_atomic_set_base(struct ipu_plane *ipu_plane,
				      struct drm_plane_state *old_state)
{
	struct drm_plane *plane = &ipu_plane->base;
	struct drm_plane_state *state = plane->state;
	struct drm_framebuffer *fb = state->fb;
	unsigned long eba, ubo, vbo;
	int active;

	eba = drm_plane_state_to_eba(state);

	switch (fb->pixel_format) {
	case DRM_FORMAT_YUV420:
	case DRM_FORMAT_YVU420:
		if (old_state->fb)
			break;

		/*
		 * Multiplanar formats have to meet the following restrictions:
		 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
		 * - EBA, UBO and VBO are a multiple of 8
		 * - UBO and VBO are unsigned and not larger than 0xfffff8
		 * - Only EBA may be changed while scanout is active
		 * - The strides of U and V planes must be identical.
		 */
		ubo = drm_plane_state_to_ubo(state);
		vbo = drm_plane_state_to_vbo(state);

		if (fb->pixel_format == DRM_FORMAT_YUV420)
			ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
						      fb->pitches[1], ubo, vbo);
		else
			ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
						      fb->pitches[1], vbo, ubo);

		dev_dbg(ipu_plane->base.dev->dev,
			"phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
			state->src_x >> 16, state->src_y >> 16);
		break;
	default:
		dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
			eba, state->src_x >> 16, state->src_y >> 16);

		break;
	}

	if (old_state->fb) {
		active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
		ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
		ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
	} else {
		ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
		ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
	}
}

void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
{
	if (!IS_ERR_OR_NULL(ipu_plane->dp))
		ipu_dp_put(ipu_plane->dp);
	if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
		ipu_dmfc_put(ipu_plane->dmfc);
	if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
		ipu_idmac_put(ipu_plane->ipu_ch);
}

int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
{
	int ret;

	ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
	if (IS_ERR(ipu_plane->ipu_ch)) {
		ret = PTR_ERR(ipu_plane->ipu_ch);
		DRM_ERROR("failed to get idmac channel: %d\n", ret);
		return ret;
	}

	ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
	if (IS_ERR(ipu_plane->dmfc)) {
		ret = PTR_ERR(ipu_plane->dmfc);
		DRM_ERROR("failed to get dmfc: ret %d\n", ret);
		goto err_out;
	}

	if (ipu_plane->dp_flow >= 0) {
		ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
		if (IS_ERR(ipu_plane->dp)) {
			ret = PTR_ERR(ipu_plane->dp);
			DRM_ERROR("failed to get dp flow: %d\n", ret);
			goto err_out;
		}
	}

	return 0;
err_out:
	ipu_plane_put_resources(ipu_plane);

	return ret;
}

static void ipu_plane_enable(struct ipu_plane *ipu_plane)
{
	if (ipu_plane->dp)
		ipu_dp_enable(ipu_plane->ipu);
	ipu_dmfc_enable_channel(ipu_plane->dmfc);
	ipu_idmac_enable_channel(ipu_plane->ipu_ch);
	if (ipu_plane->dp)
		ipu_dp_enable_channel(ipu_plane->dp);
}

static void ipu_plane_disable(struct ipu_plane *ipu_plane)
{
	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);

	if (ipu_plane->dp)
		ipu_dp_disable_channel(ipu_plane->dp);
	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
	ipu_dmfc_disable_channel(ipu_plane->dmfc);
	if (ipu_plane->dp)
		ipu_dp_disable(ipu_plane->ipu);
}

static int ipu_disable_plane(struct drm_plane *plane)
{
	struct ipu_plane *ipu_plane = to_ipu_plane(plane);

	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);

	ipu_plane_disable(ipu_plane);

	return 0;
}

static void ipu_plane_destroy(struct drm_plane *plane)
{
	struct ipu_plane *ipu_plane = to_ipu_plane(plane);

	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);

	ipu_disable_plane(plane);
	drm_plane_cleanup(plane);
	kfree(ipu_plane);
}

static const struct drm_plane_funcs ipu_plane_funcs = {
	.update_plane	= drm_atomic_helper_update_plane,
	.disable_plane	= drm_atomic_helper_disable_plane,
	.destroy	= ipu_plane_destroy,
	.reset		= drm_atomic_helper_plane_reset,
	.atomic_duplicate_state	= drm_atomic_helper_plane_duplicate_state,
	.atomic_destroy_state	= drm_atomic_helper_plane_destroy_state,
};

static int ipu_plane_atomic_check(struct drm_plane *plane,
				  struct drm_plane_state *state)
{
	struct drm_plane_state *old_state = plane->state;
	struct drm_crtc_state *crtc_state;
	struct device *dev = plane->dev->dev;
	struct drm_framebuffer *fb = state->fb;
	struct drm_framebuffer *old_fb = old_state->fb;
	unsigned long eba, ubo, vbo, old_ubo, old_vbo;

	/* Ok to disable */
	if (!fb)
		return 0;

	if (!state->crtc)
		return -EINVAL;

	crtc_state =
		drm_atomic_get_existing_crtc_state(state->state, state->crtc);
	if (WARN_ON(!crtc_state))
		return -EINVAL;

	/* CRTC should be enabled */
	if (!crtc_state->enable)
		return -EINVAL;

	/* no scaling */
	if (state->src_w >> 16 != state->crtc_w ||
	    state->src_h >> 16 != state->crtc_h)
		return -EINVAL;

	switch (plane->type) {
	case DRM_PLANE_TYPE_PRIMARY:
		/* full plane doesn't support partial off screen */
		if (state->crtc_x || state->crtc_y ||
		    state->crtc_w != crtc_state->adjusted_mode.hdisplay ||
		    state->crtc_h != crtc_state->adjusted_mode.vdisplay)
			return -EINVAL;

		/* full plane minimum width is 13 pixels */
		if (state->crtc_w < 13)
			return -EINVAL;
		break;
	case DRM_PLANE_TYPE_OVERLAY:
		if (state->crtc_x < 0 || state->crtc_y < 0)
			return -EINVAL;

		if (state->crtc_x + state->crtc_w >
		    crtc_state->adjusted_mode.hdisplay)
			return -EINVAL;
		if (state->crtc_y + state->crtc_h >
		    crtc_state->adjusted_mode.vdisplay)
			return -EINVAL;
		break;
	default:
		dev_warn(dev, "Unsupported plane type\n");
		return -EINVAL;
	}

	if (state->crtc_h < 2)
		return -EINVAL;

	/*
	 * We support resizing active plane or changing its format by
	 * forcing CRTC mode change and disabling-enabling plane in plane's
	 * ->atomic_update callback.
	 */
	if (old_fb && (state->src_w != old_state->src_w ||
			      state->src_h != old_state->src_h ||
			      fb->pixel_format != old_fb->pixel_format))
		crtc_state->mode_changed = true;

	eba = drm_plane_state_to_eba(state);

	if (eba & 0x7)
		return -EINVAL;

	if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
		return -EINVAL;

	if (old_fb && fb->pitches[0] != old_fb->pitches[0])
		crtc_state->mode_changed = true;

	switch (fb->pixel_format) {
	case DRM_FORMAT_YUV420:
	case DRM_FORMAT_YVU420:
		/*
		 * Multiplanar formats have to meet the following restrictions:
		 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
		 * - EBA, UBO and VBO are a multiple of 8
		 * - UBO and VBO are unsigned and not larger than 0xfffff8
		 * - Only EBA may be changed while scanout is active
		 * - The strides of U and V planes must be identical.
		 */
		ubo = drm_plane_state_to_ubo(state);
		vbo = drm_plane_state_to_vbo(state);

		if ((ubo & 0x7) || (vbo & 0x7))
			return -EINVAL;

		if ((ubo > 0xfffff8) || (vbo > 0xfffff8))
			return -EINVAL;

		if (old_fb) {
			old_ubo = drm_plane_state_to_ubo(old_state);
			old_vbo = drm_plane_state_to_vbo(old_state);
			if (ubo != old_ubo || vbo != old_vbo)
				return -EINVAL;
		}

		if (fb->pitches[1] != fb->pitches[2])
			return -EINVAL;

		if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
			return -EINVAL;

		if (old_fb && old_fb->pitches[1] != fb->pitches[1])
			crtc_state->mode_changed = true;
	}

	return 0;
}

static void ipu_plane_atomic_disable(struct drm_plane *plane,
				     struct drm_plane_state *old_state)
{
	ipu_disable_plane(plane);
}

static void ipu_plane_atomic_update(struct drm_plane *plane,
				    struct drm_plane_state *old_state)
{
	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
	struct drm_plane_state *state = plane->state;
	enum ipu_color_space ics;

	if (old_state->fb) {
		struct drm_crtc_state *crtc_state = state->crtc->state;

		if (!crtc_state->mode_changed) {
			ipu_plane_atomic_set_base(ipu_plane, old_state);
			return;
		}

		ipu_disable_plane(plane);
	}

	switch (ipu_plane->dp_flow) {
	case IPU_DP_FLOW_SYNC_BG:
		ipu_dp_setup_channel(ipu_plane->dp,
					IPUV3_COLORSPACE_RGB,
					IPUV3_COLORSPACE_RGB);
		ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
		break;
	case IPU_DP_FLOW_SYNC_FG:
		ics = ipu_drm_fourcc_to_colorspace(state->fb->pixel_format);
		ipu_dp_setup_channel(ipu_plane->dp, ics,
					IPUV3_COLORSPACE_UNKNOWN);
		ipu_dp_set_window_pos(ipu_plane->dp, state->crtc_x,
					state->crtc_y);
		/* Enable local alpha on partial plane */
		switch (state->fb->pixel_format) {
		case DRM_FORMAT_ARGB1555:
		case DRM_FORMAT_ABGR1555:
		case DRM_FORMAT_RGBA5551:
		case DRM_FORMAT_BGRA5551:
		case DRM_FORMAT_ARGB4444:
		case DRM_FORMAT_ARGB8888:
		case DRM_FORMAT_ABGR8888:
		case DRM_FORMAT_RGBA8888:
		case DRM_FORMAT_BGRA8888:
			ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
			break;
		default:
			break;
		}
	}

	ipu_dmfc_config_wait4eot(ipu_plane->dmfc, state->crtc_w);

	ipu_cpmem_zero(ipu_plane->ipu_ch);
	ipu_cpmem_set_resolution(ipu_plane->ipu_ch, state->src_w >> 16,
					state->src_h >> 16);
	ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->pixel_format);
	ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
	ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
	ipu_cpmem_set_stride(ipu_plane->ipu_ch, state->fb->pitches[0]);
	ipu_plane_atomic_set_base(ipu_plane, old_state);
	ipu_plane_enable(ipu_plane);
}

static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
	.atomic_check = ipu_plane_atomic_check,
	.atomic_disable = ipu_plane_atomic_disable,
	.atomic_update = ipu_plane_atomic_update,
};

struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
				 int dma, int dp, unsigned int possible_crtcs,
				 enum drm_plane_type type)
{
	struct ipu_plane *ipu_plane;
	int ret;

	DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
		      dma, dp, possible_crtcs);

	ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
	if (!ipu_plane) {
		DRM_ERROR("failed to allocate plane\n");
		return ERR_PTR(-ENOMEM);
	}

	ipu_plane->ipu = ipu;
	ipu_plane->dma = dma;
	ipu_plane->dp_flow = dp;

	ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
				       &ipu_plane_funcs, ipu_plane_formats,
				       ARRAY_SIZE(ipu_plane_formats), type,
				       NULL);
	if (ret) {
		DRM_ERROR("failed to initialize plane\n");
		kfree(ipu_plane);
		return ERR_PTR(ret);
	}

	drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);

	return ipu_plane;
}
Commit	Line	Data
b8d181e4 PZ	1	/*
	2	* i.MX IPUv3 DP Overlay Planes
	3	*
	4	* Copyright (C) 2013 Philipp Zabel, Pengutronix
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version 2
	9	* of the License, or (at your option) any later version.
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#include <drm/drmP.h>
5f2f9115	17	#include <drm/drm_atomic.h>
255c35f8	18	#include <drm/drm_atomic_helper.h>
b8d181e4 PZ	19	#include <drm/drm_fb_cma_helper.h>
b8d181e4 PZ	20	#include <drm/drm_gem_cma_helper.h>
33f14235	21	#include <drm/drm_plane_helper.h>
b8d181e4	22
39b9004d	23	#include "video/imx-ipu-v3.h"
b8d181e4 PZ	24	#include "ipuv3-plane.h"
b8d181e4 PZ	25
3df07390 PZ	26	static inline struct ipu_plane to_ipu_plane(struct drm_plane p)
	27	{
	28	return container_of(p, struct ipu_plane, base);
	29	}
b8d181e4 PZ	30
b8d181e4 PZ	31	static const uint32_t ipu_plane_formats[] = {
c639a1cf	32	DRM_FORMAT_ARGB1555,
b8d181e4	33	DRM_FORMAT_XRGB1555,
c639a1cf	34	DRM_FORMAT_ABGR1555,
b8d181e4	35	DRM_FORMAT_XBGR1555,
c639a1cf PZ	36	DRM_FORMAT_RGBA5551,
c639a1cf PZ	37	DRM_FORMAT_BGRA5551,
cb166a30	38	DRM_FORMAT_ARGB4444,
b8d181e4 PZ	39	DRM_FORMAT_ARGB8888,
	40	DRM_FORMAT_XRGB8888,
	41	DRM_FORMAT_ABGR8888,
	42	DRM_FORMAT_XBGR8888,
59d6b718 PZ	43	DRM_FORMAT_RGBA8888,
	44	DRM_FORMAT_RGBX8888,
	45	DRM_FORMAT_BGRA8888,
	46	DRM_FORMAT_BGRA8888,
7932131f PZ	47	DRM_FORMAT_UYVY,
7932131f PZ	48	DRM_FORMAT_VYUY,
b8d181e4 PZ	49	DRM_FORMAT_YUYV,
	50	DRM_FORMAT_YVYU,
	51	DRM_FORMAT_YUV420,
	52	DRM_FORMAT_YVU420,
33bee520	53	DRM_FORMAT_RGB565,
b8d181e4 PZ	54	};
	55
	56	int ipu_plane_irq(struct ipu_plane *ipu_plane)
	57	{
	58	return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
	59	IPU_IRQ_EOF);
	60	}
	61
33f14235 LY	62	static inline unsigned long
33f14235 LY	63	drm_plane_state_to_eba(struct drm_plane_state *state)
b8d181e4	64	{
33f14235 LY	65	struct drm_framebuffer *fb = state->fb;
33f14235 LY	66	struct drm_gem_cma_object *cma_obj;
b8d181e4	67
33f14235 LY	68	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
33f14235 LY	69	BUG_ON(!cma_obj);
b8d181e4	70
33f14235 LY	71	return cma_obj->paddr + fb->offsets[0] +
	72	fb->pitches[0] * (state->src_y >> 16) +
	73	(fb->bits_per_pixel >> 3) * (state->src_x >> 16);
	74	}
08a89018	75
33f14235 LY	76	static inline unsigned long
	77	drm_plane_state_to_ubo(struct drm_plane_state *state)
	78	{
	79	struct drm_framebuffer *fb = state->fb;
	80	struct drm_gem_cma_object *cma_obj;
	81	unsigned long eba = drm_plane_state_to_eba(state);
b8d181e4	82
33f14235 LY	83	cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
33f14235 LY	84	BUG_ON(!cma_obj);
9a666030	85
33f14235 LY	86	return cma_obj->paddr + fb->offsets[1] +
	87	fb->pitches[1] * (state->src_y >> 16) / 2 +
	88	(state->src_x >> 16) / 2 - eba;
	89	}
9a666030	90
33f14235 LY	91	static inline unsigned long
	92	drm_plane_state_to_vbo(struct drm_plane_state *state)
	93	{
	94	struct drm_framebuffer *fb = state->fb;
	95	struct drm_gem_cma_object *cma_obj;
	96	unsigned long eba = drm_plane_state_to_eba(state);
	97
	98	cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
	99	BUG_ON(!cma_obj);
	100
	101	return cma_obj->paddr + fb->offsets[2] +
	102	fb->pitches[2] * (state->src_y >> 16) / 2 +
	103	(state->src_x >> 16) / 2 - eba;
	104	}
	105
	106	static void ipu_plane_atomic_set_base(struct ipu_plane *ipu_plane,
	107	struct drm_plane_state *old_state)
	108	{
	109	struct drm_plane *plane = &ipu_plane->base;
	110	struct drm_plane_state *state = plane->state;
	111	struct drm_framebuffer *fb = state->fb;
	112	unsigned long eba, ubo, vbo;
	113	int active;
	114
	115	eba = drm_plane_state_to_eba(state);
	116
	117	switch (fb->pixel_format) {
	118	case DRM_FORMAT_YUV420:
	119	case DRM_FORMAT_YVU420:
	120	if (old_state->fb)
e6245fc7	121	break;
b8d181e4	122
33f14235 LY	123	/*
	124	* Multiplanar formats have to meet the following restrictions:
	125	* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
	126	* - EBA, UBO and VBO are a multiple of 8
	127	* - UBO and VBO are unsigned and not larger than 0xfffff8
	128	* - Only EBA may be changed while scanout is active
	129	* - The strides of U and V planes must be identical.
	130	*/
	131	ubo = drm_plane_state_to_ubo(state);
	132	vbo = drm_plane_state_to_vbo(state);
6bcaf0c5	133
33f14235 LY	134	if (fb->pixel_format == DRM_FORMAT_YUV420)
	135	ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
	136	fb->pitches[1], ubo, vbo);
	137	else
	138	ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
	139	fb->pitches[1], vbo, ubo);
b8d181e4	140
33f14235 LY	141	dev_dbg(ipu_plane->base.dev->dev,
	142	"phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
	143	state->src_x >> 16, state->src_y >> 16);
	144	break;
	145	default:
	146	dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
	147	eba, state->src_x >> 16, state->src_y >> 16);
6ac217ee	148
33f14235 LY	149	break;
33f14235 LY	150	}
9a666030	151
33f14235 LY	152	if (old_state->fb) {
	153	active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
	154	ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
	155	ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
	156	} else {
	157	ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
	158	ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
	159	}
b8d181e4 PZ	160	}
	161
	162	void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
	163	{
	164	if (!IS_ERR_OR_NULL(ipu_plane->dp))
	165	ipu_dp_put(ipu_plane->dp);
	166	if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
	167	ipu_dmfc_put(ipu_plane->dmfc);
	168	if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
	169	ipu_idmac_put(ipu_plane->ipu_ch);
	170	}
	171
	172	int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
	173	{
	174	int ret;
	175
	176	ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
	177	if (IS_ERR(ipu_plane->ipu_ch)) {
	178	ret = PTR_ERR(ipu_plane->ipu_ch);
	179	DRM_ERROR("failed to get idmac channel: %d\n", ret);
	180	return ret;
	181	}
	182
	183	ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
	184	if (IS_ERR(ipu_plane->dmfc)) {
	185	ret = PTR_ERR(ipu_plane->dmfc);
	186	DRM_ERROR("failed to get dmfc: ret %d\n", ret);
	187	goto err_out;
	188	}
	189
	190	if (ipu_plane->dp_flow >= 0) {
	191	ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
	192	if (IS_ERR(ipu_plane->dp)) {
	193	ret = PTR_ERR(ipu_plane->dp);
	194	DRM_ERROR("failed to get dp flow: %d\n", ret);
	195	goto err_out;
	196	}
	197	}
	198
	199	return 0;
	200	err_out:
	201	ipu_plane_put_resources(ipu_plane);
	202
	203	return ret;
	204	}
	205
33f14235	206	static void ipu_plane_enable(struct ipu_plane *ipu_plane)
b8d181e4	207	{
285bbb01 PZ	208	if (ipu_plane->dp)
285bbb01 PZ	209	ipu_dp_enable(ipu_plane->ipu);
b8d181e4 PZ	210	ipu_dmfc_enable_channel(ipu_plane->dmfc);
	211	ipu_idmac_enable_channel(ipu_plane->ipu_ch);
	212	if (ipu_plane->dp)
	213	ipu_dp_enable_channel(ipu_plane->dp);
b8d181e4 PZ	214	}
b8d181e4 PZ	215
33f14235	216	static void ipu_plane_disable(struct ipu_plane *ipu_plane)
b8d181e4	217	{
b8d181e4 PZ	218	ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
	219
	220	if (ipu_plane->dp)
	221	ipu_dp_disable_channel(ipu_plane->dp);
	222	ipu_idmac_disable_channel(ipu_plane->ipu_ch);
	223	ipu_dmfc_disable_channel(ipu_plane->dmfc);
285bbb01 PZ	224	if (ipu_plane->dp)
285bbb01 PZ	225	ipu_dp_disable(ipu_plane->ipu);
b8d181e4 PZ	226	}
b8d181e4 PZ	227
33f14235	228	static int ipu_disable_plane(struct drm_plane *plane)
b8d181e4 PZ	229	{
b8d181e4 PZ	230	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
b8d181e4	231
33f14235	232	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
b8d181e4	233
33f14235	234	ipu_plane_disable(ipu_plane);
b8d181e4 PZ	235
	236	return 0;
	237	}
	238
33f14235	239	static void ipu_plane_destroy(struct drm_plane *plane)
b8d181e4 PZ	240	{
	241	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
	242
	243	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
	244
33f14235 LY	245	ipu_disable_plane(plane);
	246	drm_plane_cleanup(plane);
	247	kfree(ipu_plane);
	248	}
b8d181e4	249
33f14235	250	static const struct drm_plane_funcs ipu_plane_funcs = {
5f2f9115 LY	251	.update_plane = drm_atomic_helper_update_plane,
5f2f9115 LY	252	.disable_plane = drm_atomic_helper_disable_plane,
33f14235	253	.destroy = ipu_plane_destroy,
255c35f8 LY	254	.reset = drm_atomic_helper_plane_reset,
	255	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	256	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
33f14235 LY	257	};
	258
	259	static int ipu_plane_atomic_check(struct drm_plane *plane,
	260	struct drm_plane_state *state)
	261	{
	262	struct drm_plane_state *old_state = plane->state;
	263	struct drm_crtc_state *crtc_state;
	264	struct device *dev = plane->dev->dev;
	265	struct drm_framebuffer *fb = state->fb;
	266	struct drm_framebuffer *old_fb = old_state->fb;
	267	unsigned long eba, ubo, vbo, old_ubo, old_vbo;
	268
	269	/* Ok to disable */
	270	if (!fb)
5f2f9115 LY	271	return 0;
	272
	273	if (!state->crtc)
	274	return -EINVAL;
	275
	276	crtc_state =
	277	drm_atomic_get_existing_crtc_state(state->state, state->crtc);
	278	if (WARN_ON(!crtc_state))
	279	return -EINVAL;
33f14235 LY	280
33f14235 LY	281	/* CRTC should be enabled */
5f2f9115	282	if (!crtc_state->enable)
33f14235 LY	283	return -EINVAL;
	284
	285	/* no scaling */
	286	if (state->src_w >> 16 != state->crtc_w \|\|
	287	state->src_h >> 16 != state->crtc_h)
	288	return -EINVAL;
	289
33f14235 LY	290	switch (plane->type) {
	291	case DRM_PLANE_TYPE_PRIMARY:
	292	/* full plane doesn't support partial off screen */
	293	if (state->crtc_x \|\| state->crtc_y \|\|
	294	state->crtc_w != crtc_state->adjusted_mode.hdisplay \|\|
	295	state->crtc_h != crtc_state->adjusted_mode.vdisplay)
	296	return -EINVAL;
	297
	298	/* full plane minimum width is 13 pixels */
	299	if (state->crtc_w < 13)
	300	return -EINVAL;
	301	break;
	302	case DRM_PLANE_TYPE_OVERLAY:
	303	if (state->crtc_x < 0 \|\| state->crtc_y < 0)
	304	return -EINVAL;
	305
	306	if (state->crtc_x + state->crtc_w >
	307	crtc_state->adjusted_mode.hdisplay)
	308	return -EINVAL;
	309	if (state->crtc_y + state->crtc_h >
	310	crtc_state->adjusted_mode.vdisplay)
	311	return -EINVAL;
	312	break;
	313	default:
	314	dev_warn(dev, "Unsupported plane type\n");
	315	return -EINVAL;
	316	}
	317
	318	if (state->crtc_h < 2)
	319	return -EINVAL;
	320
	321	/*
c6c1f9bc LY	322	* We support resizing active plane or changing its format by
	323	* forcing CRTC mode change and disabling-enabling plane in plane's
	324	* ->atomic_update callback.
33f14235 LY	325	*/
	326	if (old_fb && (state->src_w != old_state->src_w \|\|
	327	state->src_h != old_state->src_h \|\|
	328	fb->pixel_format != old_fb->pixel_format))
c6c1f9bc	329	crtc_state->mode_changed = true;
33f14235 LY	330
	331	eba = drm_plane_state_to_eba(state);
	332
	333	if (eba & 0x7)
	334	return -EINVAL;
	335
	336	if (fb->pitches[0] < 1 \|\| fb->pitches[0] > 16384)
	337	return -EINVAL;
	338
	339	if (old_fb && fb->pitches[0] != old_fb->pitches[0])
c6c1f9bc	340	crtc_state->mode_changed = true;
33f14235 LY	341
	342	switch (fb->pixel_format) {
	343	case DRM_FORMAT_YUV420:
	344	case DRM_FORMAT_YVU420:
	345	/*
	346	* Multiplanar formats have to meet the following restrictions:
	347	* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
	348	* - EBA, UBO and VBO are a multiple of 8
	349	* - UBO and VBO are unsigned and not larger than 0xfffff8
	350	* - Only EBA may be changed while scanout is active
	351	* - The strides of U and V planes must be identical.
	352	*/
	353	ubo = drm_plane_state_to_ubo(state);
	354	vbo = drm_plane_state_to_vbo(state);
	355
	356	if ((ubo & 0x7) \|\| (vbo & 0x7))
	357	return -EINVAL;
	358
	359	if ((ubo > 0xfffff8) \|\| (vbo > 0xfffff8))
	360	return -EINVAL;
	361
	362	if (old_fb) {
	363	old_ubo = drm_plane_state_to_ubo(old_state);
	364	old_vbo = drm_plane_state_to_vbo(old_state);
	365	if (ubo != old_ubo \|\| vbo != old_vbo)
	366	return -EINVAL;
	367	}
	368
	369	if (fb->pitches[1] != fb->pitches[2])
	370	return -EINVAL;
	371
	372	if (fb->pitches[1] < 1 \|\| fb->pitches[1] > 16384)
	373	return -EINVAL;
	374
	375	if (old_fb && old_fb->pitches[1] != fb->pitches[1])
c6c1f9bc	376	crtc_state->mode_changed = true;
33f14235	377	}
b8d181e4 PZ	378
	379	return 0;
	380	}
	381
33f14235 LY	382	static void ipu_plane_atomic_disable(struct drm_plane *plane,
	383	struct drm_plane_state *old_state)
	384	{
	385	ipu_disable_plane(plane);
	386	}
	387
	388	static void ipu_plane_atomic_update(struct drm_plane *plane,
	389	struct drm_plane_state *old_state)
b8d181e4 PZ	390	{
b8d181e4 PZ	391	struct ipu_plane *ipu_plane = to_ipu_plane(plane);
33f14235 LY	392	struct drm_plane_state *state = plane->state;
33f14235 LY	393	enum ipu_color_space ics;
b8d181e4	394
33f14235	395	if (old_state->fb) {
c6c1f9bc LY	396	struct drm_crtc_state *crtc_state = state->crtc->state;
	397
	398	if (!crtc_state->mode_changed) {
	399	ipu_plane_atomic_set_base(ipu_plane, old_state);
	400	return;
	401	}
	402
	403	ipu_disable_plane(plane);
33f14235	404	}
b8d181e4	405
33f14235 LY	406	switch (ipu_plane->dp_flow) {
	407	case IPU_DP_FLOW_SYNC_BG:
	408	ipu_dp_setup_channel(ipu_plane->dp,
	409	IPUV3_COLORSPACE_RGB,
	410	IPUV3_COLORSPACE_RGB);
	411	ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
	412	break;
	413	case IPU_DP_FLOW_SYNC_FG:
	414	ics = ipu_drm_fourcc_to_colorspace(state->fb->pixel_format);
	415	ipu_dp_setup_channel(ipu_plane->dp, ics,
	416	IPUV3_COLORSPACE_UNKNOWN);
	417	ipu_dp_set_window_pos(ipu_plane->dp, state->crtc_x,
	418	state->crtc_y);
	419	/* Enable local alpha on partial plane */
	420	switch (state->fb->pixel_format) {
	421	case DRM_FORMAT_ARGB1555:
	422	case DRM_FORMAT_ABGR1555:
	423	case DRM_FORMAT_RGBA5551:
	424	case DRM_FORMAT_BGRA5551:
	425	case DRM_FORMAT_ARGB4444:
	426	case DRM_FORMAT_ARGB8888:
	427	case DRM_FORMAT_ABGR8888:
	428	case DRM_FORMAT_RGBA8888:
	429	case DRM_FORMAT_BGRA8888:
	430	ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
	431	break;
	432	default:
	433	break;
	434	}
	435	}
	436
	437	ipu_dmfc_config_wait4eot(ipu_plane->dmfc, state->crtc_w);
	438
	439	ipu_cpmem_zero(ipu_plane->ipu_ch);
	440	ipu_cpmem_set_resolution(ipu_plane->ipu_ch, state->src_w >> 16,
	441	state->src_h >> 16);
	442	ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->pixel_format);
	443	ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
	444	ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
	445	ipu_cpmem_set_stride(ipu_plane->ipu_ch, state->fb->pitches[0]);
	446	ipu_plane_atomic_set_base(ipu_plane, old_state);
	447	ipu_plane_enable(ipu_plane);
b8d181e4 PZ	448	}
b8d181e4 PZ	449
33f14235 LY	450	static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
	451	.atomic_check = ipu_plane_atomic_check,
	452	.atomic_disable = ipu_plane_atomic_disable,
	453	.atomic_update = ipu_plane_atomic_update,
b8d181e4 PZ	454	};
	455
	456	struct ipu_plane ipu_plane_init(struct drm_device dev, struct ipu_soc *ipu,
	457	int dma, int dp, unsigned int possible_crtcs,
43895599	458	enum drm_plane_type type)
b8d181e4 PZ	459	{
	460	struct ipu_plane *ipu_plane;
	461	int ret;
	462
	463	DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
	464	dma, dp, possible_crtcs);
	465
	466	ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
	467	if (!ipu_plane) {
	468	DRM_ERROR("failed to allocate plane\n");
	469	return ERR_PTR(-ENOMEM);
	470	}
	471
	472	ipu_plane->ipu = ipu;
	473	ipu_plane->dma = dma;
	474	ipu_plane->dp_flow = dp;
	475
43895599 PZ	476	ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
43895599 PZ	477	&ipu_plane_funcs, ipu_plane_formats,
b0b3b795 VS	478	ARRAY_SIZE(ipu_plane_formats), type,
b0b3b795 VS	479	NULL);
b8d181e4 PZ	480	if (ret) {
	481	DRM_ERROR("failed to initialize plane\n");
	482	kfree(ipu_plane);
	483	return ERR_PTR(ret);
	484	}
	485
33f14235 LY	486	drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
33f14235 LY	487
b8d181e4 PZ	488	return ipu_plane;
b8d181e4 PZ	489	}