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Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c8afe684 RC |
2 | |
3 | config DRM_MSM | |
4 | tristate "MSM DRM" | |
5 | depends on DRM | |
e6f6d63e | 6 | depends on ARCH_QCOM || SOC_IMX5 || (ARM && COMPILE_TEST) |
40039904 | 7 | depends on OF && COMMON_CLK |
f0c379a1 | 8 | depends on MMU |
fcf9d0b7 | 9 | depends on INTERCONNECT || !INTERCONNECT |
bdab8e8b | 10 | select QCOM_MDT_LOADER if ARCH_QCOM |
b7bbd640 | 11 | select REGULATOR |
c8afe684 | 12 | select DRM_KMS_HELPER |
3e87599b | 13 | select DRM_PANEL |
c8afe684 RC |
14 | select SHMEM |
15 | select TMPFS | |
e6f6d63e | 16 | select QCOM_SCM if ARCH_QCOM |
c0fec7f5 | 17 | select WANT_DEV_COREDUMP |
f1427016 | 18 | select SND_SOC_HDMI_CODEC if SND_SOC |
f0a42bb5 | 19 | select SYNC_FILE |
ac20fa0a | 20 | select PM_OPP |
c8afe684 RC |
21 | default y |
22 | help | |
23 | DRM/KMS driver for MSM/snapdragon. | |
24 | ||
b02872df JC |
25 | config DRM_MSM_GPU_STATE |
26 | bool | |
27 | depends on DRM_MSM && (DEBUG_FS || DEV_COREDUMP) | |
28 | default y | |
29 | ||
c8afe684 RC |
30 | config DRM_MSM_REGISTER_LOGGING |
31 | bool "MSM DRM register logging" | |
32 | depends on DRM_MSM | |
33 | default n | |
34 | help | |
35 | Compile in support for logging register reads/writes in a format | |
36 | that can be parsed by envytools demsm tool. If enabled, register | |
37 | logging can be switched on via msm.reglog=y module param. | |
a689554b | 38 | |
6a8bd08d RC |
39 | config DRM_MSM_GPU_SUDO |
40 | bool "Enable SUDO flag on submits" | |
41 | depends on DRM_MSM && EXPERT | |
42 | default n | |
43 | help | |
44 | Enable userspace that has CAP_SYS_RAWIO to submit GPU commands | |
45 | that are run from RB instead of IB1. This essentially gives | |
46 | userspace kernel level access, but is useful for firmware | |
47 | debugging. | |
48 | ||
49 | Only use this if you are a driver developer. This should *not* | |
50 | be enabled for production kernels. If unsure, say N. | |
51 | ||
feb46f02 RC |
52 | config DRM_MSM_HDMI_HDCP |
53 | bool "Enable HDMI HDCP support in MSM DRM driver" | |
54 | depends on DRM_MSM && QCOM_SCM | |
55 | default y | |
56 | help | |
57 | Choose this option to enable HDCP state machine | |
58 | ||
a689554b HL |
59 | config DRM_MSM_DSI |
60 | bool "Enable DSI support in MSM DRM driver" | |
61 | depends on DRM_MSM | |
62 | select DRM_PANEL | |
63 | select DRM_MIPI_DSI | |
64 | default y | |
65 | help | |
66 | Choose this option if you have a need for MIPI DSI connector | |
67 | support. | |
68 | ||
825637b9 HL |
69 | config DRM_MSM_DSI_PLL |
70 | bool "Enable DSI PLL driver in MSM DRM" | |
71 | depends on DRM_MSM_DSI && COMMON_CLK | |
72 | default y | |
73 | help | |
74 | Choose this option to enable DSI PLL driver which provides DSI | |
75 | source clocks under common clock framework. | |
1bf4d7c5 HL |
76 | |
77 | config DRM_MSM_DSI_28NM_PHY | |
78 | bool "Enable DSI 28nm PHY driver in MSM DRM" | |
79 | depends on DRM_MSM_DSI | |
80 | default y | |
81 | help | |
82 | Choose this option if the 28nm DSI PHY is used on the platform. | |
83 | ||
84 | config DRM_MSM_DSI_20NM_PHY | |
85 | bool "Enable DSI 20nm PHY driver in MSM DRM" | |
86 | depends on DRM_MSM_DSI | |
87 | default y | |
88 | help | |
89 | Choose this option if the 20nm DSI PHY is used on the platform. | |
225380b3 AT |
90 | |
91 | config DRM_MSM_DSI_28NM_8960_PHY | |
92 | bool "Enable DSI 28nm 8960 PHY driver in MSM DRM" | |
93 | depends on DRM_MSM_DSI | |
94 | default y | |
95 | help | |
96 | Choose this option if the 28nm DSI PHY 8960 variant is used on the | |
97 | platform. | |
f079f6d9 AT |
98 | |
99 | config DRM_MSM_DSI_14NM_PHY | |
100 | bool "Enable DSI 14nm PHY driver in MSM DRM (used by MSM8996/APQ8096)" | |
101 | depends on DRM_MSM_DSI | |
102 | default y | |
103 | help | |
104 | Choose this option if DSI PHY on 8996 is used on the platform. | |
973e02db AT |
105 | |
106 | config DRM_MSM_DSI_10NM_PHY | |
107 | bool "Enable DSI 10nm PHY driver in MSM DRM (used by SDM845)" | |
108 | depends on DRM_MSM_DSI | |
109 | default y | |
110 | help | |
111 | Choose this option if DSI PHY on SDM845 is used on the platform. |