[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / msm / dsi / dsi_cfg.c

/*
 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "dsi_cfg.h"

static const char * const dsi_v2_bus_clk_names[] = {
	"core_mmss_clk", "iface_clk", "bus_clk",
};

static const struct msm_dsi_config apq8064_dsi_cfg = {
	.io_offset = 0,
	.reg_cfg = {
		.num = 3,
		.regs = {
			{"vdda", 100000, 100},	/* 1.2 V */
			{"avdd", 10000, 100},	/* 3.0 V */
			{"vddio", 100000, 100},	/* 1.8 V */
		},
	},
	.bus_clk_names = dsi_v2_bus_clk_names,
	.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
	.io_start = { 0x4700000, 0x5800000 },
	.num_dsi = 2,
};

static const char * const dsi_6g_bus_clk_names[] = {
	"mdp_core_clk", "iface_clk", "bus_clk", "core_mmss_clk",
};

static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
	.io_offset = DSI_6G_REG_SHIFT,
	.reg_cfg = {
		.num = 4,
		.regs = {
			{"gdsc", -1, -1},
			{"vdd", 150000, 100},	/* 3.0 V */
			{"vdda", 100000, 100},	/* 1.2 V */
			{"vddio", 100000, 100},	/* 1.8 V */
		},
	},
	.bus_clk_names = dsi_6g_bus_clk_names,
	.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
	.io_start = { 0xfd922800, 0xfd922b00 },
	.num_dsi = 2,
};

static const char * const dsi_8916_bus_clk_names[] = {
	"mdp_core_clk", "iface_clk", "bus_clk",
};

static const struct msm_dsi_config msm8916_dsi_cfg = {
	.io_offset = DSI_6G_REG_SHIFT,
	.reg_cfg = {
		.num = 3,
		.regs = {
			{"gdsc", -1, -1},
			{"vdda", 100000, 100},	/* 1.2 V */
			{"vddio", 100000, 100},	/* 1.8 V */
		},
	},
	.bus_clk_names = dsi_8916_bus_clk_names,
	.num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
	.io_start = { 0x1a98000 },
	.num_dsi = 1,
};

static const struct msm_dsi_config msm8994_dsi_cfg = {
	.io_offset = DSI_6G_REG_SHIFT,
	.reg_cfg = {
		.num = 7,
		.regs = {
			{"gdsc", -1, -1},
			{"vdda", 100000, 100},	/* 1.25 V */
			{"vddio", 100000, 100},	/* 1.8 V */
			{"vcca", 10000, 100},	/* 1.0 V */
			{"vdd", 100000, 100},	/* 1.8 V */
			{"lab_reg", -1, -1},
			{"ibb_reg", -1, -1},
		},
	},
	.bus_clk_names = dsi_6g_bus_clk_names,
	.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
	.io_start = { 0xfd998000, 0xfd9a0000 },
	.num_dsi = 2,
};

/*
 * TODO: core_mmss_clk fails to enable for some reason, but things work fine
 * without it too. Figure out why it doesn't enable and uncomment below
 */
static const char * const dsi_8996_bus_clk_names[] = {
	"mdp_core_clk", "iface_clk", "bus_clk", /* "core_mmss_clk", */
};

static const struct msm_dsi_config msm8996_dsi_cfg = {
	.io_offset = DSI_6G_REG_SHIFT,
	.reg_cfg = {
		.num = 2,
		.regs = {
			{"vdda", 18160, 1 },	/* 1.25 V */
			{"vcca", 17000, 32 },	/* 0.925 V */
			{"vddio", 100000, 100 },/* 1.8 V */
		},
	},
	.bus_clk_names = dsi_8996_bus_clk_names,
	.num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
	.io_start = { 0x994000, 0x996000 },
	.num_dsi = 2,
};

static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
	{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
						&msm8974_apq8084_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
						&msm8974_apq8084_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
						&msm8974_apq8084_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
						&msm8974_apq8084_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg},
};

const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
{
	const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
	int i;

	for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
		if ((dsi_cfg_handlers[i].major == major) &&
			(dsi_cfg_handlers[i].minor == minor)) {
			cfg_hnd = &dsi_cfg_handlers[i];
			break;
		}
	}

	return cfg_hnd;
}
Commit	Line	Data
d248b61f HL	1	/*
	2	* Copyright (c) 2015, The Linux Foundation. All rights reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 and
	6	* only version 2 as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#include "dsi_cfg.h"
	15
cea65dbd AT	16	static const char * const dsi_v2_bus_clk_names[] = {
	17	"core_mmss_clk", "iface_clk", "bus_clk",
	18	};
	19
	20	static const struct msm_dsi_config apq8064_dsi_cfg = {
d248b61f	21	.io_offset = 0,
cea65dbd AT	22	.reg_cfg = {
	23	.num = 3,
	24	.regs = {
f377d597 AT	25	{"vdda", 100000, 100}, /* 1.2 V */
	26	{"avdd", 10000, 100}, /* 3.0 V */
	27	{"vddio", 100000, 100}, /* 1.8 V */
cea65dbd AT	28	},
	29	},
	30	.bus_clk_names = dsi_v2_bus_clk_names,
	31	.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
32280d66 AT	32	.io_start = { 0x4700000, 0x5800000 },
32280d66 AT	33	.num_dsi = 2,
d248b61f HL	34	};
d248b61f HL	35
6e0eb52e AT	36	static const char * const dsi_6g_bus_clk_names[] = {
	37	"mdp_core_clk", "iface_clk", "bus_clk", "core_mmss_clk",
	38	};
	39
d248b61f HL	40	static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
	41	.io_offset = DSI_6G_REG_SHIFT,
	42	.reg_cfg = {
	43	.num = 4,
	44	.regs = {
f377d597 AT	45	{"gdsc", -1, -1},
	46	{"vdd", 150000, 100}, /* 3.0 V */
	47	{"vdda", 100000, 100}, /* 1.2 V */
	48	{"vddio", 100000, 100}, /* 1.8 V */
d248b61f HL	49	},
d248b61f HL	50	},
6e0eb52e AT	51	.bus_clk_names = dsi_6g_bus_clk_names,
6e0eb52e AT	52	.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
32280d66 AT	53	.io_start = { 0xfd922800, 0xfd922b00 },
32280d66 AT	54	.num_dsi = 2,
6e0eb52e AT	55	};
	56
	57	static const char * const dsi_8916_bus_clk_names[] = {
	58	"mdp_core_clk", "iface_clk", "bus_clk",
d248b61f HL	59	};
	60
	61	static const struct msm_dsi_config msm8916_dsi_cfg = {
	62	.io_offset = DSI_6G_REG_SHIFT,
	63	.reg_cfg = {
52cde8dc	64	.num = 3,
d248b61f	65	.regs = {
f377d597 AT	66	{"gdsc", -1, -1},
	67	{"vdda", 100000, 100}, /* 1.2 V */
	68	{"vddio", 100000, 100}, /* 1.8 V */
d248b61f HL	69	},
d248b61f HL	70	},
6e0eb52e AT	71	.bus_clk_names = dsi_8916_bus_clk_names,
6e0eb52e AT	72	.num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
32280d66 AT	73	.io_start = { 0x1a98000 },
32280d66 AT	74	.num_dsi = 1,
d248b61f HL	75	};
	76
	77	static const struct msm_dsi_config msm8994_dsi_cfg = {
	78	.io_offset = DSI_6G_REG_SHIFT,
	79	.reg_cfg = {
	80	.num = 7,
	81	.regs = {
f377d597 AT	82	{"gdsc", -1, -1},
	83	{"vdda", 100000, 100}, /* 1.25 V */
	84	{"vddio", 100000, 100}, /* 1.8 V */
	85	{"vcca", 10000, 100}, /* 1.0 V */
	86	{"vdd", 100000, 100}, /* 1.8 V */
	87	{"lab_reg", -1, -1},
	88	{"ibb_reg", -1, -1},
d248b61f	89	},
6e0eb52e AT	90	},
	91	.bus_clk_names = dsi_6g_bus_clk_names,
	92	.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
32280d66 AT	93	.io_start = { 0xfd998000, 0xfd9a0000 },
32280d66 AT	94	.num_dsi = 2,
d248b61f HL	95	};
d248b61f HL	96
3a3ff88a AT	97	/*
	98	* TODO: core_mmss_clk fails to enable for some reason, but things work fine
	99	* without it too. Figure out why it doesn't enable and uncomment below
	100	*/
	101	static const char * const dsi_8996_bus_clk_names[] = {
	102	"mdp_core_clk", "iface_clk", "bus_clk", /* "core_mmss_clk", */
	103	};
	104
	105	static const struct msm_dsi_config msm8996_dsi_cfg = {
	106	.io_offset = DSI_6G_REG_SHIFT,
	107	.reg_cfg = {
	108	.num = 2,
	109	.regs = {
	110	{"vdda", 18160, 1 }, /* 1.25 V */
	111	{"vcca", 17000, 32 }, /* 0.925 V */
	112	{"vddio", 100000, 100 },/* 1.8 V */
	113	},
	114	},
	115	.bus_clk_names = dsi_8996_bus_clk_names,
	116	.num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
	117	.io_start = { 0x994000, 0x996000 },
	118	.num_dsi = 2,
	119	};
	120
d248b61f	121	static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
cea65dbd	122	{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
d248b61f HL	123	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
	124	&msm8974_apq8084_dsi_cfg},
	125	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
	126	&msm8974_apq8084_dsi_cfg},
	127	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
	128	&msm8974_apq8084_dsi_cfg},
	129	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
	130	&msm8974_apq8084_dsi_cfg},
	131	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
	132	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
3a3ff88a	133	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg},
d248b61f HL	134	};
	135
	136	const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
	137	{
	138	const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
	139	int i;
	140
	141	for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
	142	if ((dsi_cfg_handlers[i].major == major) &&
	143	(dsi_cfg_handlers[i].minor == minor)) {
	144	cfg_hnd = &dsi_cfg_handlers[i];
	145	break;
	146	}
	147	}
	148
	149	return cfg_hnd;
	150	}
	151