[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / msm / mdp / mdp5 / mdp5_cfg.h

/*
 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __MDP5_CFG_H__
#define __MDP5_CFG_H__

#include "msm_drv.h"

/*
 * mdp5_cfg
 *
 * This module configures the dynamic offsets used by mdp5.xml.h
 * (initialized in mdp5_cfg.c)
 */
extern const struct mdp5_cfg_hw *mdp5_cfg;

#define MAX_CTL			8
#define MAX_BASES		8
#define MAX_SMP_BLOCKS		44
#define MAX_CLIENTS		32

typedef DECLARE_BITMAP(mdp5_smp_state_t, MAX_SMP_BLOCKS);

#define MDP5_SUB_BLOCK_DEFINITION \
	int count; \
	uint32_t base[MAX_BASES]

struct mdp5_sub_block {
	MDP5_SUB_BLOCK_DEFINITION;
};

struct mdp5_lm_block {
	MDP5_SUB_BLOCK_DEFINITION;
	uint32_t nb_stages;		/* number of stages per blender */
};

struct mdp5_ctl_block {
	MDP5_SUB_BLOCK_DEFINITION;
	uint32_t flush_hw_mask;		/* FLUSH register's hardware mask */
};

struct mdp5_smp_block {
	int mmb_count;			/* number of SMP MMBs */
	int mmb_size;			/* MMB: size in bytes */
	uint32_t clients[MAX_CLIENTS];	/* SMP port allocation /pipe */
	mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */
	int reserved[MAX_CLIENTS];	/* # of MMBs allocated per client */
};

#define MDP5_INTF_NUM_MAX	5

struct mdp5_intf_block {
	uint32_t base[MAX_BASES];
	u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
};

struct mdp5_cfg_hw {
	char  *name;

	struct mdp5_sub_block mdp;
	struct mdp5_smp_block smp;
	struct mdp5_ctl_block ctl;
	struct mdp5_sub_block pipe_vig;
	struct mdp5_sub_block pipe_rgb;
	struct mdp5_sub_block pipe_dma;
	struct mdp5_lm_block  lm;
	struct mdp5_sub_block dspp;
	struct mdp5_sub_block ad;
	struct mdp5_sub_block pp;
	struct mdp5_intf_block intf;

	uint32_t max_clk;
};

/* platform config data (ie. from DT, or pdata) */
struct mdp5_cfg_platform {
	struct iommu_domain *iommu;
};

struct mdp5_cfg {
	const struct mdp5_cfg_hw *hw;
	struct mdp5_cfg_platform platform;
};

struct mdp5_kms;
struct mdp5_cfg_handler;

const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hnd);
struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd);
int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd);

#define mdp5_cfg_intf_is_virtual(intf_type) ({	\
	typeof(intf_type) __val = (intf_type);	\
	(__val) >= INTF_VIRTUAL ? true : false; })

struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms,
		uint32_t major, uint32_t minor);
void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd);

#endif /* __MDP5_CFG_H__ */
Commit	Line	Data
2e362e17 SV	1	/*
	2	* Copyright (c) 2014 The Linux Foundation. All rights reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 and
	6	* only version 2 as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#ifndef __MDP5_CFG_H__
	15	#define __MDP5_CFG_H__
	16
	17	#include "msm_drv.h"
	18
	19	/*
	20	* mdp5_cfg
	21	*
	22	* This module configures the dynamic offsets used by mdp5.xml.h
	23	* (initialized in mdp5_cfg.c)
	24	*/
	25	extern const struct mdp5_cfg_hw *mdp5_cfg;
	26
0deed25b	27	#define MAX_CTL 8
2e362e17 SV	28	#define MAX_BASES 8
	29	#define MAX_SMP_BLOCKS 44
	30	#define MAX_CLIENTS 32
	31
	32	typedef DECLARE_BITMAP(mdp5_smp_state_t, MAX_SMP_BLOCKS);
	33
	34	#define MDP5_SUB_BLOCK_DEFINITION \
	35	int count; \
	36	uint32_t base[MAX_BASES]
	37
	38	struct mdp5_sub_block {
	39	MDP5_SUB_BLOCK_DEFINITION;
	40	};
	41
	42	struct mdp5_lm_block {
	43	MDP5_SUB_BLOCK_DEFINITION;
	44	uint32_t nb_stages; /* number of stages per blender */
	45	};
	46
389b09a1 SV	47	struct mdp5_ctl_block {
	48	MDP5_SUB_BLOCK_DEFINITION;
	49	uint32_t flush_hw_mask; /* FLUSH register's hardware mask */
	50	};
	51
2e362e17 SV	52	struct mdp5_smp_block {
	53	int mmb_count; /* number of SMP MMBs */
	54	int mmb_size; /* MMB: size in bytes */
6fa6acdf	55	uint32_t clients[MAX_CLIENTS]; /* SMP port allocation /pipe */
2e362e17 SV	56	mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */
	57	int reserved[MAX_CLIENTS]; /* # of MMBs allocated per client */
	58	};
	59
67ac0a2d SV	60	#define MDP5_INTF_NUM_MAX 5
67ac0a2d SV	61
fe34464d SV	62	struct mdp5_intf_block {
	63	uint32_t base[MAX_BASES];
	64	u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
	65	};
	66
2e362e17 SV	67	struct mdp5_cfg_hw {
	68	char *name;
	69
f5253812	70	struct mdp5_sub_block mdp;
2e362e17	71	struct mdp5_smp_block smp;
389b09a1	72	struct mdp5_ctl_block ctl;
2e362e17 SV	73	struct mdp5_sub_block pipe_vig;
	74	struct mdp5_sub_block pipe_rgb;
	75	struct mdp5_sub_block pipe_dma;
	76	struct mdp5_lm_block lm;
	77	struct mdp5_sub_block dspp;
	78	struct mdp5_sub_block ad;
38305907	79	struct mdp5_sub_block pp;
fe34464d	80	struct mdp5_intf_block intf;
67ac0a2d	81
2e362e17 SV	82	uint32_t max_clk;
	83	};
	84
	85	/* platform config data (ie. from DT, or pdata) */
	86	struct mdp5_cfg_platform {
	87	struct iommu_domain *iommu;
	88	};
	89
	90	struct mdp5_cfg {
	91	const struct mdp5_cfg_hw *hw;
	92	struct mdp5_cfg_platform platform;
	93	};
	94
	95	struct mdp5_kms;
42238da8	96	struct mdp5_cfg_handler;
2e362e17	97
42238da8 RC	98	const struct mdp5_cfg_hw mdp5_cfg_get_hw_config(struct mdp5_cfg_handler cfg_hnd);
	99	struct mdp5_cfg mdp5_cfg_get_config(struct mdp5_cfg_handler cfg_hnd);
	100	int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd);
2e362e17	101
d145dd78 SV	102	#define mdp5_cfg_intf_is_virtual(intf_type) ({ \
	103	typeof(intf_type) __val = (intf_type); \
	104	(__val) >= INTF_VIRTUAL ? true : false; })
	105
42238da8 RC	106	struct mdp5_cfg_handler mdp5_cfg_init(struct mdp5_kms mdp5_kms,
	107	uint32_t major, uint32_t minor);
	108	void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd);
2e362e17 SV	109
2e362e17 SV	110	#endif /* __MDP5_CFG_H__ */