[mirror_ubuntu-jammy-kernel.git] / drivers / gpu / drm / nouveau / core / engine / disp / nv04.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */

#include "priv.h"

#include <core/client.h>
#include <core/event.h>
#include <nvif/unpack.h>
#include <nvif/class.h>

struct nv04_disp_priv {
	struct nouveau_disp base;
};

static int
nv04_disp_scanoutpos(struct nouveau_object *object, struct nv04_disp_priv *priv,
		     void *data, u32 size, int head)
{
	const u32 hoff = head * 0x2000;
	union {
		struct nv04_disp_scanoutpos_v0 v0;
	} *args = data;
	u32 line;
	int ret;

	nv_ioctl(object, "disp scanoutpos size %d\n", size);
	if (nvif_unpack(args->v0, 0, 0, false)) {
		nv_ioctl(object, "disp scanoutpos vers %d\n", args->v0.version);
		args->v0.vblanks = nv_rd32(priv, 0x680800 + hoff) & 0xffff;
		args->v0.vtotal  = nv_rd32(priv, 0x680804 + hoff) & 0xffff;
		args->v0.vblanke = args->v0.vtotal - 1;

		args->v0.hblanks = nv_rd32(priv, 0x680820 + hoff) & 0xffff;
		args->v0.htotal  = nv_rd32(priv, 0x680824 + hoff) & 0xffff;
		args->v0.hblanke = args->v0.htotal - 1;

		/*
		 * If output is vga instead of digital then vtotal/htotal is
		 * invalid so we have to give up and trigger the timestamping
		 * fallback in the drm core.
		 */
		if (!args->v0.vtotal || !args->v0.htotal)
			return -ENOTSUPP;

		args->v0.time[0] = ktime_to_ns(ktime_get());
		line = nv_rd32(priv, 0x600868 + hoff);
		args->v0.time[1] = ktime_to_ns(ktime_get());
		args->v0.hline = (line & 0xffff0000) >> 16;
		args->v0.vline = (line & 0x0000ffff);
	} else
		return ret;

	return 0;
}

static int
nv04_disp_mthd(struct nouveau_object *object, u32 mthd, void *data, u32 size)
{
	union {
		struct nv04_disp_mthd_v0 v0;
	} *args = data;
	struct nv04_disp_priv *priv = (void *)object->engine;
	int head, ret;

	nv_ioctl(object, "disp mthd size %d\n", size);
	if (nvif_unpack(args->v0, 0, 0, true)) {
		nv_ioctl(object, "disp mthd vers %d mthd %02x head %d\n",
			 args->v0.version, args->v0.method, args->v0.head);
		mthd = args->v0.method;
		head = args->v0.head;
	} else
		return ret;

	if (head < 0 || head >= 2)
		return -ENXIO;

	switch (mthd) {
	case NV04_DISP_SCANOUTPOS:
		return nv04_disp_scanoutpos(object, priv, data, size, head);
	default:
		break;
	}

	return -EINVAL;
}

static struct nouveau_ofuncs
nv04_disp_ofuncs = {
	.ctor = _nouveau_object_ctor,
	.dtor = nouveau_object_destroy,
	.init = nouveau_object_init,
	.fini = nouveau_object_fini,
	.mthd = nv04_disp_mthd,
	.ntfy = nouveau_disp_ntfy,
};

static struct nouveau_oclass
nv04_disp_sclass[] = {
	{ NV04_DISP, &nv04_disp_ofuncs },
	{},
};

/*******************************************************************************
 * Display engine implementation
 ******************************************************************************/

static void
nv04_disp_vblank_init(struct nvkm_event *event, int type, int head)
{
	struct nouveau_disp *disp = container_of(event, typeof(*disp), vblank);
	nv_wr32(disp, 0x600140 + (head * 0x2000) , 0x00000001);
}

static void
nv04_disp_vblank_fini(struct nvkm_event *event, int type, int head)
{
	struct nouveau_disp *disp = container_of(event, typeof(*disp), vblank);
	nv_wr32(disp, 0x600140 + (head * 0x2000) , 0x00000000);
}

static const struct nvkm_event_func
nv04_disp_vblank_func = {
	.ctor = nouveau_disp_vblank_ctor,
	.init = nv04_disp_vblank_init,
	.fini = nv04_disp_vblank_fini,
};

static void
nv04_disp_intr(struct nouveau_subdev *subdev)
{
	struct nv04_disp_priv *priv = (void *)subdev;
	u32 crtc0 = nv_rd32(priv, 0x600100);
	u32 crtc1 = nv_rd32(priv, 0x602100);
	u32 pvideo;

	if (crtc0 & 0x00000001) {
		nouveau_disp_vblank(&priv->base, 0);
		nv_wr32(priv, 0x600100, 0x00000001);
	}

	if (crtc1 & 0x00000001) {
		nouveau_disp_vblank(&priv->base, 1);
		nv_wr32(priv, 0x602100, 0x00000001);
	}

	if (nv_device(priv)->chipset >= 0x10 &&
	    nv_device(priv)->chipset <= 0x40) {
		pvideo = nv_rd32(priv, 0x8100);
		if (pvideo & ~0x11)
			nv_info(priv, "PVIDEO intr: %08x\n", pvideo);
		nv_wr32(priv, 0x8100, pvideo);
	}
}

static int
nv04_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
	       struct nouveau_oclass *oclass, void *data, u32 size,
	       struct nouveau_object **pobject)
{
	struct nv04_disp_priv *priv;
	int ret;

	ret = nouveau_disp_create(parent, engine, oclass, 2, "DISPLAY",
				  "display", &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	nv_engine(priv)->sclass = nv04_disp_sclass;
	nv_subdev(priv)->intr = nv04_disp_intr;
	return 0;
}

struct nouveau_oclass *
nv04_disp_oclass = &(struct nouveau_disp_impl) {
	.base.handle = NV_ENGINE(DISP, 0x04),
	.base.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nv04_disp_ctor,
		.dtor = _nouveau_disp_dtor,
		.init = _nouveau_disp_init,
		.fini = _nouveau_disp_fini,
	},
	.vblank = &nv04_disp_vblank_func,
}.base;
Commit	Line	Data
ebb945a9 BS	1	/*
	2	* Copyright 2012 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
	24
a8f8b489	25	#include "priv.h"
1d7c71a3	26
4952b4d3	27	#include <core/client.h>
1d7c71a3	28	#include <core/event.h>
4952b4d3 BS	29	#include <nvif/unpack.h>
4952b4d3 BS	30	#include <nvif/class.h>
ebb945a9 BS	31
	32	struct nv04_disp_priv {
	33	struct nouveau_disp base;
	34	};
	35
d2fa7d32	36	static int
4952b4d3 BS	37	nv04_disp_scanoutpos(struct nouveau_object object, struct nv04_disp_priv priv,
4952b4d3 BS	38	void *data, u32 size, int head)
d2fa7d32	39	{
4952b4d3 BS	40	const u32 hoff = head * 0x2000;
	41	union {
	42	struct nv04_disp_scanoutpos_v0 v0;
	43	} *args = data;
d2fa7d32	44	u32 line;
4952b4d3 BS	45	int ret;
	46
	47	nv_ioctl(object, "disp scanoutpos size %d\n", size);
	48	if (nvif_unpack(args->v0, 0, 0, false)) {
	49	nv_ioctl(object, "disp scanoutpos vers %d\n", args->v0.version);
	50	args->v0.vblanks = nv_rd32(priv, 0x680800 + hoff) & 0xffff;
	51	args->v0.vtotal = nv_rd32(priv, 0x680804 + hoff) & 0xffff;
	52	args->v0.vblanke = args->v0.vtotal - 1;
	53
	54	args->v0.hblanks = nv_rd32(priv, 0x680820 + hoff) & 0xffff;
	55	args->v0.htotal = nv_rd32(priv, 0x680824 + hoff) & 0xffff;
	56	args->v0.hblanke = args->v0.htotal - 1;
	57
	58	/*
	59	* If output is vga instead of digital then vtotal/htotal is
	60	* invalid so we have to give up and trigger the timestamping
	61	* fallback in the drm core.
	62	*/
	63	if (!args->v0.vtotal \|\| !args->v0.htotal)
	64	return -ENOTSUPP;
	65
	66	args->v0.time[0] = ktime_to_ns(ktime_get());
	67	line = nv_rd32(priv, 0x600868 + hoff);
	68	args->v0.time[1] = ktime_to_ns(ktime_get());
	69	args->v0.hline = (line & 0xffff0000) >> 16;
	70	args->v0.vline = (line & 0x0000ffff);
	71	} else
	72	return ret;
d2fa7d32	73
d2fa7d32 BS	74	return 0;
	75	}
	76
4952b4d3 BS	77	static int
	78	nv04_disp_mthd(struct nouveau_object object, u32 mthd, void data, u32 size)
	79	{
	80	union {
	81	struct nv04_disp_mthd_v0 v0;
	82	} *args = data;
	83	struct nv04_disp_priv priv = (void )object->engine;
	84	int head, ret;
	85
	86	nv_ioctl(object, "disp mthd size %d\n", size);
	87	if (nvif_unpack(args->v0, 0, 0, true)) {
	88	nv_ioctl(object, "disp mthd vers %d mthd %02x head %d\n",
	89	args->v0.version, args->v0.method, args->v0.head);
	90	mthd = args->v0.method;
	91	head = args->v0.head;
	92	} else
	93	return ret;
	94
	95	if (head < 0 \|\| head >= 2)
	96	return -ENXIO;
	97
	98	switch (mthd) {
	99	case NV04_DISP_SCANOUTPOS:
	100	return nv04_disp_scanoutpos(object, priv, data, size, head);
	101	default:
	102	break;
	103	}
	104
	105	return -EINVAL;
	106	}
d2fa7d32	107
4952b4d3 BS	108	static struct nouveau_ofuncs
	109	nv04_disp_ofuncs = {
	110	.ctor = _nouveau_object_ctor,
	111	.dtor = nouveau_object_destroy,
	112	.init = nouveau_object_init,
	113	.fini = nouveau_object_fini,
	114	.mthd = nv04_disp_mthd,
80bc340b	115	.ntfy = nouveau_disp_ntfy,
d2fa7d32 BS	116	};
d2fa7d32 BS	117
ebb945a9 BS	118	static struct nouveau_oclass
ebb945a9 BS	119	nv04_disp_sclass[] = {
648d4dfd	120	{ NV04_DISP, &nv04_disp_ofuncs },
ebb945a9 BS	121	{},
	122	};
	123
1d7c71a3 BS	124	/*******************************************************************************
	125	* Display engine implementation
	126	******************************************************************************/
	127
	128	static void
79ca2770	129	nv04_disp_vblank_init(struct nvkm_event *event, int type, int head)
1d7c71a3	130	{
79ca2770 BS	131	struct nouveau_disp disp = container_of(event, typeof(disp), vblank);
79ca2770 BS	132	nv_wr32(disp, 0x600140 + (head * 0x2000) , 0x00000001);
1d7c71a3 BS	133	}
1d7c71a3 BS	134
ebb945a9	135	static void
79ca2770	136	nv04_disp_vblank_fini(struct nvkm_event *event, int type, int head)
ebb945a9	137	{
79ca2770 BS	138	struct nouveau_disp disp = container_of(event, typeof(disp), vblank);
79ca2770 BS	139	nv_wr32(disp, 0x600140 + (head * 0x2000) , 0x00000000);
ebb945a9 BS	140	}
ebb945a9 BS	141
79ca2770 BS	142	static const struct nvkm_event_func
	143	nv04_disp_vblank_func = {
	144	.ctor = nouveau_disp_vblank_ctor,
	145	.init = nv04_disp_vblank_init,
	146	.fini = nv04_disp_vblank_fini,
	147	};
	148
ebb945a9 BS	149	static void
	150	nv04_disp_intr(struct nouveau_subdev *subdev)
	151	{
	152	struct nv04_disp_priv priv = (void )subdev;
	153	u32 crtc0 = nv_rd32(priv, 0x600100);
	154	u32 crtc1 = nv_rd32(priv, 0x602100);
515de6b2	155	u32 pvideo;
ebb945a9 BS	156
ebb945a9 BS	157	if (crtc0 & 0x00000001) {
79ca2770	158	nouveau_disp_vblank(&priv->base, 0);
ebb945a9 BS	159	nv_wr32(priv, 0x600100, 0x00000001);
	160	}
	161
	162	if (crtc1 & 0x00000001) {
79ca2770	163	nouveau_disp_vblank(&priv->base, 1);
ebb945a9 BS	164	nv_wr32(priv, 0x602100, 0x00000001);
ebb945a9 BS	165	}
515de6b2 IM	166
	167	if (nv_device(priv)->chipset >= 0x10 &&
	168	nv_device(priv)->chipset <= 0x40) {
	169	pvideo = nv_rd32(priv, 0x8100);
	170	if (pvideo & ~0x11)
	171	nv_info(priv, "PVIDEO intr: %08x\n", pvideo);
	172	nv_wr32(priv, 0x8100, pvideo);
	173	}
ebb945a9 BS	174	}
	175
	176	static int
	177	nv04_disp_ctor(struct nouveau_object parent, struct nouveau_object engine,
1d7c71a3 BS	178	struct nouveau_oclass oclass, void data, u32 size,
1d7c71a3 BS	179	struct nouveau_object **pobject)
ebb945a9 BS	180	{
	181	struct nv04_disp_priv *priv;
	182	int ret;
	183
1d7c71a3	184	ret = nouveau_disp_create(parent, engine, oclass, 2, "DISPLAY",
ebb945a9 BS	185	"display", &priv);
	186	*pobject = nv_object(priv);
	187	if (ret)
	188	return ret;
	189
	190	nv_engine(priv)->sclass = nv04_disp_sclass;
	191	nv_subdev(priv)->intr = nv04_disp_intr;
	192	return 0;
	193	}
	194
a8f8b489 BS	195	struct nouveau_oclass *
	196	nv04_disp_oclass = &(struct nouveau_disp_impl) {
	197	.base.handle = NV_ENGINE(DISP, 0x04),
	198	.base.ofuncs = &(struct nouveau_ofuncs) {
ebb945a9 BS	199	.ctor = nv04_disp_ctor,
	200	.dtor = _nouveau_disp_dtor,
	201	.init = _nouveau_disp_init,
	202	.fini = _nouveau_disp_fini,
	203	},
79ca2770	204	.vblank = &nv04_disp_vblank_func,
a8f8b489	205	}.base;