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1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
25 | #include <engine/software.h> | |
26 | #include <engine/disp.h> | |
27 | ||
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28 | #include <core/class.h> |
29 | ||
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30 | #include "nv50.h" |
31 | ||
32 | static struct nouveau_oclass | |
33 | nv84_disp_sclass[] = { | |
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34 | { NV84_DISP_MAST_CLASS, &nv50_disp_mast_ofuncs }, |
35 | { NV84_DISP_SYNC_CLASS, &nv50_disp_sync_ofuncs }, | |
36 | { NV84_DISP_OVLY_CLASS, &nv50_disp_ovly_ofuncs }, | |
37 | { NV84_DISP_OIMM_CLASS, &nv50_disp_oimm_ofuncs }, | |
38 | { NV84_DISP_CURS_CLASS, &nv50_disp_curs_ofuncs }, | |
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39 | {} |
40 | }; | |
41 | ||
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42 | struct nouveau_omthds |
43 | nv84_disp_base_omthds[] = { | |
44 | { SOR_MTHD(NV50_DISP_SOR_PWR) , nv50_sor_mthd }, | |
45 | { SOR_MTHD(NV84_DISP_SOR_HDMI_PWR) , nv50_sor_mthd }, | |
4a230fa6 | 46 | { SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd }, |
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47 | { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd }, |
48 | { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd }, | |
49 | {}, | |
50 | }; | |
51 | ||
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52 | static struct nouveau_oclass |
53 | nv84_disp_base_oclass[] = { | |
ef22c8bb | 54 | { NV84_DISP_CLASS, &nv50_disp_base_ofuncs, nv84_disp_base_omthds }, |
370c00f9 | 55 | {} |
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56 | }; |
57 | ||
58 | static int | |
59 | nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, | |
60 | struct nouveau_oclass *oclass, void *data, u32 size, | |
61 | struct nouveau_object **pobject) | |
62 | { | |
63 | struct nv50_disp_priv *priv; | |
64 | int ret; | |
65 | ||
66 | ret = nouveau_disp_create(parent, engine, oclass, "PDISP", | |
67 | "display", &priv); | |
68 | *pobject = nv_object(priv); | |
69 | if (ret) | |
70 | return ret; | |
71 | ||
72 | nv_engine(priv)->sclass = nv84_disp_base_oclass; | |
73 | nv_engine(priv)->cclass = &nv50_disp_cclass; | |
74 | nv_subdev(priv)->intr = nv50_disp_intr; | |
75 | priv->sclass = nv84_disp_sclass; | |
76 | priv->head.nr = 2; | |
77 | priv->dac.nr = 3; | |
78 | priv->sor.nr = 2; | |
ef22c8bb | 79 | priv->dac.power = nv50_dac_power; |
7ebb38b5 | 80 | priv->dac.sense = nv50_dac_sense; |
ef22c8bb | 81 | priv->sor.power = nv50_sor_power; |
8e9e3d2d | 82 | priv->sor.hdmi = nv84_hdmi_ctrl; |
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83 | |
84 | INIT_LIST_HEAD(&priv->base.vblank.list); | |
85 | spin_lock_init(&priv->base.vblank.lock); | |
86 | return 0; | |
87 | } | |
88 | ||
89 | struct nouveau_oclass | |
90 | nv84_disp_oclass = { | |
91 | .handle = NV_ENGINE(DISP, 0x82), | |
92 | .ofuncs = &(struct nouveau_ofuncs) { | |
93 | .ctor = nv84_disp_ctor, | |
94 | .dtor = _nouveau_disp_dtor, | |
95 | .init = _nouveau_disp_init, | |
96 | .fini = _nouveau_disp_fini, | |
97 | }, | |
98 | }; |